U-shaped quantum well gallium nitride resonant tunneling diode and its fabrication method
The GaN resonant tunneling diode designed with a U-shaped quantum well structure and graded composition solves the problems of low peak current and insufficient transmission coefficient in the prior art, and achieves high output power and high temperature operation performance, while enhancing the stability and reverse tunneling capability of the device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-12
- Publication Date
- 2026-03-13
AI Technical Summary
Existing GaN resonant tunneling diodes suffer from low peak current, unstable device performance, and poor differential negative resistance characteristics in large-size devices, making it difficult to meet the requirements of high output power and high-temperature operation. Furthermore, lattice mismatch and polarization effects in traditional structures result in insufficient transmission coefficient and reverse tunneling capability.
By employing a U-shaped quantum well structure and designing a graded InGaN composition, the band shape is controlled to reduce the effective barrier thickness for electron tunneling. Furthermore, a large bandgap BaAlPN material and a narrow bandgap n+InN collector ohmic contact layer are used, combined with molecular beam epitaxy to precisely control the barrier and well layer thicknesses, thereby reducing the depletion region width and ohmic contact resistance.
The peak current to valley current ratio of the device was improved, and dual-region differential negative resistance characteristics and reverse differential negative resistance characteristics were realized, which enhanced the stability and reliability of the device and reduced the peak voltage and power consumption.
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Figure CN115832062B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor device technology, and specifically relates to a gallium nitride resonant tunneling diode that can be used in high-frequency terahertz radiation sources and high-speed digital circuits. Background Technology
[0002] A resonant tunneling diode is a device with negative resistance at both ends based on the quantum resonant tunneling effect. It has the advantages of low voltage, low power consumption, high frequency, high speed, negative resistance, bistable, self-locking, and the ability to perform most logic functions that can only be performed by conventional devices with a small number of components. It has important applications in microwave oscillators and radiation sources and high-speed digital circuits, and is one of the main types of solid-state terahertz devices.
[0003] Traditional resonant tunneling diodes are typically made of GaAs. Due to limitations in material properties, their output power is significantly insufficient, typically only a few microwatts, making power sources based on these devices unsuitable for demanding applications. To address the issues of insufficient output power and improved high-temperature performance, attention has turned to third-generation wide-bandgap semiconductors like GaN. Compared to GaAs, GaN offers significant advantages such as a larger bandgap, higher saturation electron velocity, higher breakdown field strength, and superior high-temperature resistance, making high-power devices possible. However, current GaN resonant tunneling diodes still suffer from drawbacks such as low peak current, unstable performance, and poor differential negative resistance in large-size devices, falling short of theoretical expectations and limiting their application in terahertz radiation and detection. A typical GaN resonant tunneling diode structure, such as... Figure 1 As shown, it includes, from bottom to top, a substrate, GaN Epitaxial layer, n + GaN emitter ohmic contact layer, first GaN isolation layer, first AlGaN barrier layer, GaN quantum well layer, second AlGaN barrier layer, second GaN isolation layer, n + GaN collector ohmic contact layer and collector electrode, in n + A ring-shaped emitter electrode is provided on the GaN emitter ohmic contact layer. However, this device has the following shortcomings:
[0004] Due to the large lattice mismatch and rough, uneven interface at the double-barrier quantum well interface, the high-density dislocations in the active region of the device act as scattering centers and leakage channels, reducing the peak current of the device and increasing the valley current, thus degrading the differential negative resistance effect.
[0005] Meanwhile, due to the strong spontaneous polarization and piezoelectric polarization effects inherent in gallium nitride (GaN) materials, the energy bands in GaN quantum wells tilt due to polarization effects, forming a stepped barrier together with the emitter barrier. Electrons tunneling from the emitter need to pass through this stepped barrier, increasing the effective emitter barrier thickness. This not only causes a decrease in the emitter barrier transmission coefficient, leading to a reduction in the total transmission coefficient, device peak current, and peak-to-valley current ratio, making it difficult to achieve dual-region differential negative resistance characteristics; but also generates a wide depletion region on the collector side that extends into the collector ohmic contact layer, increasing the effective collector barrier thickness and reducing the collector barrier's ability to reduce transmission coefficient and reverse tunneling, making it difficult to achieve differential negative resistance characteristics under reverse bias.
[0006] Furthermore, due to the high collector ohmic contact resistance and the large device series resistance, the peak voltage of the resonant tunneling differential negative resistance effect and the device power consumption are increased. Summary of the Invention
[0007] The purpose of this invention is to address the shortcomings of the existing technologies by proposing a gallium nitride resonant tunneling diode with a U-shaped quantum well and its fabrication method. This reduces the effective barrier of the electron tunneling emitter under forward bias and the depletion region width of the electron tunneling collector under reverse bias, effectively increasing the peak current and peak-valley current ratio, and achieving dual-region differential negative resistance characteristics and reverse differential negative resistance characteristics.
[0008] The technical solution to achieve the objective of this invention is as follows:
[0009] 1. A U-shaped quantum well gallium nitride resonant tunneling diode, comprising, from bottom to top, a substrate 1, a GaN epitaxial layer 2, and an n... + 3. GaN emitter ohmic contact layer; 4. GaN isolation layer; 5. First barrier layer; 6. U-shaped quantum well layer; 7. Second barrier layer; 8. Gradient composition isolation layer; n + An InN collector ohmic contact layer 9 and a collector electrode 10 are provided, and annular emitter electrodes 11 are provided on both sides of the GaN isolation layer 4. A passivation layer 12 is wrapped around the GaN isolation layer 4 and the collector electrode 10. The characteristic feature is that:
[0010] The first barrier layer 5 and the second barrier layer 7 are made of B with the same composition and the same thickness. x Al y P z N, where 0≤x<1, 0≤y<1, 0≤z<1, and satisfies x+y+z=1, with a thickness of 1nm-3nm;
[0011] The U-shaped quantum well layer 6 uses a graded composition In m Ga 1-mN, wherein the component m gradually decreases from 100% near the first barrier layer 5 to 0% near the second barrier layer 7, with a gradient interval of 8%-15% and a thickness of 1.5nm-3nm.
[0012] The gradient component isolation layer 8 uses the gradient component In. n Ga 1-n N, where component n gradually increases from 0% near the second barrier layer 7 to near n + The InN collector ohmic contact layer 9 is 100% of the total layer, with a gradient interval of 2%-5% and a thickness of 4nm-12nm.
[0013] Furthermore, the GaN epitaxial layer 2 has a thickness of 1000nm-6000nm; the n + GaN emitter ohmic contact layer 3, with a doping concentration of 1x10⁻⁶. 19 cm -3 -5x10 20 cm -3 The thickness is 50nm-200nm; the GaN isolation layer 4 has a thickness of 4nm-15nm; the n + InN collector ohmic contact layer 9, with a doping concentration of 1x10⁻⁶. 19 cm -3 -5x10 20 cm -3 The thickness ranges from 50nm to 200nm.
[0014] Furthermore, the passivation layer 12 is made of any one of SiN, Al2O3, and HfO2 materials; the substrate 1 is made of any one of self-supporting gallium nitride single crystal, sapphire, silicon carbide, silicon, aluminum nitride, boron nitride, and diamond materials.
[0015] 2. A method for fabricating the gallium nitride resonant tunneling diode with the above-mentioned U-shaped quantum well, characterized by comprising the following steps:
[0016] 1) A GaN epitaxial layer of 1000nm-6000nm was epitaxially grown on the substrate using metal-organic chemical vapor deposition;
[0017] 2) Using molecular beam epitaxy, n-type epitaxial layers are grown on GaN epitaxial layers. + GaN emitter ohmic contact layer with a thickness of 50nm-200nm and a doping concentration of 1x10⁻⁶. 19 cm -3 -5x10 20 cm -3 ;
[0018] 3) Using molecular beam epitaxy, in n+ A GaN isolation layer with a thickness of 4nm-15nm is grown on the GaN emitter ohmic contact layer;
[0019] 4) A first barrier layer with a thickness of 1nm-3nm was grown on the GaN isolation layer using molecular beam epitaxy.
[0020] 5) Using molecular beam epitaxy and digital alloying technology, the thickness composition of a single atomic layer is controlled to grow a U-shaped quantum well layer with a thickness of 1.5nm-3nm on the first barrier layer;
[0021] 6) A second barrier layer with a thickness of 1 nm to 3 nm is grown on the U-shaped quantum well layer using molecular beam epitaxy;
[0022] 7) Using molecular beam epitaxy and digital alloying technology, the thickness composition of a single atomic layer is controlled to grow a gradient composition isolation layer with a thickness of 4nm-12nm in the second barrier layer.
[0023] 8) Using molecular beam epitaxy, n-type nanoparticles are grown on graded-component isolation layers. + The InN collector ohmic contact layer has a thickness of 50nm-200nm and a doping concentration of 1x10⁻⁶. 19 cm -3 -5x10 20 cm -3 ;
[0024] 9) Using optical lithography and etching processes, a mesa isolation layer with a depth of 300nm-600nm is formed from the GaN epitaxial layer to the collector ohmic contact layer;
[0025] 10) Electron beam lithography is used to form the collector electrode, and then etching is used to form a cylindrical mesa with a diameter of 1μm-10μm from the GaN isolation layer to the collector electrode on the mesa isolation.
[0026] 11) Using optical lithography and electron beam evaporation, in n + An emitter electrode is formed on the GaN emitter ohmic contact layer;
[0027] 12) Using plasma-enhanced chemical vapor deposition or atomic layer deposition, in n + A passivation layer with a thickness of 100nm-300nm is deposited on the surface from the GaN emitter ohmic contact layer to the collector electrode.
[0028] 13) An emitter electrode via is formed on the passivation layer using optical lithography and reactive ion etching.
[0029] 14) Electron beam lithography and reactive ion etching are used to form collector electrode vias with diameters of 0.5 μm-9 μm on the cylindrical mesa passivation layer;
[0030] 15) Using optical lithography, emitter Pad and collector Pad patterns are formed on the passivation layer; then, using photoresist as a mask, an electron beam evaporation method is used to evaporate a Ti / Au metal layer on the patterns to form emitter Pad and collector Pad, thus completing the fabrication of the device.
[0031] Compared with the prior art, the present invention has the following advantages:
[0032] 1. This invention employs a U-shaped quantum well structure with graded InGaN composition, which can change the energy band shape in the quantum well by adjusting the composition, effectively eliminating the triangular barrier in the quantum well, thereby reducing the effective barrier thickness that electrons tunneling from the emitter need to pass through, increasing the transmission coefficient of the tunneling electron emitter, increasing the peak current to valley current ratio of the device, and realizing the dual-region differential negative resistance characteristics.
[0033] 2. Because the present invention uses a collector isolation layer structure of InGaN with graded composition, the energy band shape of the collector depletion region can be changed by adjusting the composition, thereby reducing the width of the collector depletion region and the effective electron tunneling thickness, increasing the collector transmission coefficient of the device, improving the peak current to valley current ratio, and realizing the reverse differential negative resistance characteristic.
[0034] 3. Because the first and second barrier layers of this invention are made of BAlPN material with a large bandgap and strong polarization effect, it can not only increase the concentration of two-dimensional electron gas in the emitter potential well, thereby increasing the peak current of the device, but also increase the degree of freedom of device structure design by adjusting the composition of the barrier layer, and achieve effective control of the differential negative resistance effect.
[0035] 4. The collector ohmic contact layer of this invention uses an n-type electrode with a narrow band gap. + InN material can reduce the width of the depletion region on the collector side of the device, improve the electron tunneling capability, and achieve low ohmic contact resistance and low peak voltage.
[0036] 5. By using molecular beam epitaxy to grow the active region structure, this invention achieves precise control over the thickness of the barrier layer and the well layer, reduces the impact of uneven active region thickness distribution on device performance consistency, and improves device stability and reliability. Attached Figure Description
[0037] Figure 1 This is a structural diagram of an existing AlGaN / GaN double-barrier resonant tunneling diode;
[0038] Figure 2This is a structural diagram of the U-shaped quantum well gallium nitride resonant tunneling diode of the present invention;
[0039] Figure 3 This is a schematic diagram of the process for fabricating a U-shaped quantum well gallium nitride resonant tunneling diode according to the present invention.
[0040] Specific Implementation Cases
[0041] Reference Figure 2 The U-shaped quantum well gallium nitride resonant tunneling diode of the present invention includes a substrate 1, a GaN epitaxial layer 2, and an n-type quantum well. + 3. GaN emitter ohmic contact layer; 4. GaN isolation layer; 5. First barrier layer; 6. U-shaped quantum well layer; 7. Second barrier layer; 8. Gradient composition isolation layer; n + The structure comprises an InN collector ohmic contact layer 9, a collector electrode 10, a ring-shaped emitter electrode 11, and a passivation layer 12. Among these components;
[0042] The substrate 1 is made of any one of the following materials: self-supporting gallium nitride single crystal material, sapphire material, silicon carbide material, silicon material, aluminum nitride material, boron nitride material, and diamond material.
[0043] The GaN epitaxial layer 2 has a thickness of 1000nm-6000nm and is located on the substrate 1;
[0044] The n + GaN emitter ohmic contact layer 3, with a doping concentration of 1x10⁻⁶. 19 cm -3 -5x10 20 cm -3 It has a thickness of 50nm-200nm and is located on top of GaN epitaxial layer 2;
[0045] The GaN isolation layer 4 has a thickness of 4nm-15nm and is located in n + Above the GaN emitter ohmic contact layer 3;
[0046] The first barrier layer 5 is made of B with the same composition and thickness. x Al y P z N, where 0≤x<1, 0≤y<1, 0≤z<1, and satisfies x+y+z=1, has a thickness of 1nm-3nm, and is located above GaN isolation layer 4;
[0047] The U-shaped quantum well layer 6 uses a graded composition In m Ga 1-m N, wherein component m gradually decreases from 100% near the first barrier layer 5 to 0% near the second barrier layer 7, with a gradient interval of 8%-15% and a thickness of 1.5nm-3nm, and is located above the first barrier layer 5.
[0048] The second barrier layer 7 uses B with the same composition and thickness. x Al y P z N, where 0≤x<1, 0≤y<1, 0≤z<1, and satisfies x+y+z=1, has a thickness of 1nm-3nm, and is located above the U-shaped quantum well layer 6;
[0049] The gradient component isolation layer 8 uses the gradient component In. n Ga 1-n N, where component n gradually increases from 0% near the second barrier layer 7 to near n + The InN collector ohmic contact layer 9 is 100% of the layer, with a gradient interval of 2%-5% and a thickness of 4nm-12nm, and it is located above the second barrier layer 7.
[0050] The n + InN collector ohmic contact layer 9, with a doping concentration of 1x10⁻⁶. 19 cm -3 -5x10 20 cm -3 Between 50nm and 200nm, n + InN, which is located above the gradient component isolation layer 8;
[0051] The collector electrode 10 is located at n + Above the InN collector ohmic contact layer 9;
[0052] The annular emitter electrode 11 is located on both sides of the GaN isolation layer 4;
[0053] The passivation layer 12 is made of any one of SiN, Al2O3, or HfO2 materials, with a thickness of 100nm-300nm, and it wraps around the outside from the GaN isolation layer 4 to the collector electrode 10.
[0054] Reference Figure 3 The present invention provides three embodiments for fabricating a U-shaped quantum well gallium nitride resonant tunneling diode.
[0055] Example 1: A barrier layer is fabricated on a self-supporting gallium nitride substrate using B... 0.2 Al 0.8 The N- and U-shaped quantum well layers use an In composition m that decreases in 15% increments. m Ga 1-m N, Gradient component isolation layer uses In component n, with In increasing at 5% intervals. n Ga 1-n N-type U-shaped quantum well gallium nitride resonant tunneling diode.
[0056] Step 1: Grow a GaN epitaxial layer, such as... Figure 3 (a).
[0057] A GaN epitaxial layer with a thickness of 1000 nm was grown on a self-supporting gallium nitride substrate using metal-organic chemical vapor deposition (MOCVD). The process conditions were: temperature 950℃, pressure 40 Torr, gallium source flow rate 120 sccm, ammonia flow rate 2500 sccm, and hydrogen flow rate 3500 sccm.
[0058] Step 2, grow n + GaN emitter ohmic contact layer, such as Figure 3 (b)
[0059] n-type epitaxial layers were grown on GaN epitaxial layers using molecular beam epitaxy. + The GaN emitter ohmic contact layer has a thickness of 50 nm and a doping concentration of 1 x 10⁻⁶. 19 cm -3 The process conditions are: temperature 600℃, gallium beam equilibrium vapor pressure 2.8 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 2.0 × 10⁻⁶. -8 Torr, nitrogen flow rate of 1.2 sccm, nitrogen plasma RF source power of 350W.
[0060] Step 3: Grow a GaN isolation layer, such as... Figure 3 (c)
[0061] Using molecular beam epitaxy, in n + A GaN isolation layer with a thickness of 4 nm is grown on a GaN emitter ohmic contact layer. The process conditions are: temperature 600℃, gallium beam equilibrium vapor pressure 2.8 × 10⁻⁶. -7 Torr, nitrogen flow rate is 1.2 sccm, nitrogen plasma RF source power is 350W.
[0062] Step four, grow the first barrier layer, such as Figure 3 (d)
[0063] The first barrier layer was grown on the GaN isolation layer using molecular beam epitaxy, with a boron composition of 20%. 0.2 Al 0.8 N, with a thickness of 1 nm. The process conditions are: temperature 600℃, boron beam equilibrium vapor pressure 1.2 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the aluminum beam is 2.4 × 10⁻⁶. -7 Torr, nitrogen flow rate of 1.2 sccm, nitrogen plasma RF source power of 350W.
[0064] Step 5: Grow a U-shaped quantum well layer, such as... Figure 3 (e).
[0065] Using molecular beam epitaxy and digital alloying technology, a U-shaped quantum well layer was grown on the first barrier layer to control the thickness and composition of a single atomic layer. This layer employed In composition m decreasing in 15% increments. m Ga 1-m The material has a thickness of 1.5 nm and is N. The process conditions are: temperature 500℃, gallium beam equilibrium vapor pressure 2.8 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the indium beam is 1.0 × 10⁻⁶. -7 Torr, nitrogen flow rate of 1.2 sccm, nitrogen plasma RF source power of 350W.
[0066] Step six, grow the second barrier layer, such as Figure 3 (f).
[0067] A second barrier layer was grown on the U-shaped quantum well layer using molecular beam epitaxy, employing a boron composition of 20%. 0.2 Al 0.8 N, with a thickness of 1 nm. The process conditions are: temperature 600℃, boron beam equilibrium vapor pressure 1.2 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the aluminum beam is 2.4 × 10⁻⁶. -7 Torr, nitrogen flow rate of 1.2 sccm, nitrogen plasma RF source power of 350W.
[0068] Step 7: Grow a gradient component isolation layer, such as Figure 3 (g)
[0069] Molecular beam epitaxy (MBE) was employed, and single-atom layer thickness composition was controlled using digital alloying techniques. A graded composition isolation layer with a thickness of 4 nm was grown on the second barrier layer, with In composition n increasing in 5% increments. n Ga 1-n N. The process conditions are: temperature 500℃, gallium beam equilibrium vapor pressure 2.8×10⁻⁶. -7 Torr, the equilibrium vapor pressure of the indium beam is 1.0 × 10⁻⁶. - 7 Torr, nitrogen flow rate of 1.2 sccm, nitrogen plasma RF source power of 350W.
[0070] Step 8, grow n + InN collector ohmic contact layer, such as Figure 3 (h).
[0071] n was grown on a graded composition isolation layer using molecular beam epitaxy. +The InN collector ohmic contact layer has a thickness of 50 nm and a doping concentration of 1 x 10⁻⁶. 19 cm -3 The process conditions are: temperature 500℃, indium beam equilibrium vapor pressure 1.0×10⁻⁶. - 7 Torr, the equilibrium vapor pressure of the silicon beam is 2.0 × 10⁻⁶. -8 Torr, nitrogen flow rate is 1.2 sccm, nitrogen plasma RF 6-source power is 350W.
[0072] Step nine, in n + A mesh-like mesa isolation layer is formed on the InN collector ohmic contact layer through homogenization, photolithography, development, and etching, with a depth of 300nm. Figure 3 (i).
[0073] 9a) The mesa isolation pattern is formed using photolithography:
[0074] 9a1) Spin-coating AZ5214 photoresist, first at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 30s for 3min, then bake at 95℃ for 90s;
[0075] 9a2) Using optical lithography, n + Exposure of AZ5214 photoresist on InN collector ohmic contact layer;
[0076] 9a3) The exposed photoresist was developed using RZX-3038 developer for 45 seconds to form a grid-like mesa isolation pattern.
[0077] 9b) An inductively coupled plasma etching process is used, with photoresist as a mask and a grid-like mesa isolation pattern as a mask, to form a grid-like mesa isolation pattern with a depth of 300 nm. The process conditions are: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 300 s.
[0078] Step 10, in n + The collector electrode is formed on the surface of the InN collector ohmic contact layer and etched to n. + The GaN emitter ohmic contact layer forms a cylindrical mesa, such as Figure 3 (j).
[0079] 10a) Photolithography forms a circular mesa pattern:
[0080] 10a1) in n +Spin-coating PMMAA4 photoresist onto the InN collector ohmic contact layer: First, spin-coat at a speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 180℃ for 30 seconds, then bake at 180℃ for 90 seconds;
[0081] 10a2) Electron beam lithography was used to expose PMMAA4 photoresist with an electron dose ratio of 750.
[0082] 10a3) First, use a solution of tetramethyl dipentanone and isopropanol in a ratio of 3:1 to develop the exposed photoresist for 120s, and then fix it with isopropanol for 30s to form a circular mesa pattern with a diameter of 1μm.
[0083] 10b) Using the electron beam evaporation method, the pattern on the circular platform is shaped according to... Ti / Au / Ni metal with a thickness of 20 / 80 / 50 nm is evaporated at a certain rate and then soaked in acetone solution to form a current collector electrode.
[0084] 10c) Using the collector electrode as a mask, inductively coupled plasma etching is employed to etch n. + InN collector ohmic contact layer to n + The GaN emitter ohmic contact layer is formed into a cylindrical mesa with a diameter of 0.5 μm. The process conditions are: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 150 s.
[0085] Step eleven, in n + A ring-shaped emitter electrode is formed on the GaN emitter ohmic contact layer, such as Figure 3 (k).
[0086] 11a) Photolithography to form the ring-shaped emitter electrode pattern:
[0087] 11a1) in n + AZ5214 photoresist was spin-coated onto the GaN emitter ohmic contact layer, first at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 30s for 3min, then bake at 95℃ for 90s;
[0088] 11a2) Using traditional optical lithography, n + The AZ5214 photoresist on the GaN emitter ohmic contact layer is exposed.
[0089] 11a3) The photoresist after exposure is developed with RZX-3038 developer for 45s to form an annular emitter electrode pattern. The inner circumference of the pattern is 5μm from the cylindrical mesa.
[0090] 11b) Using electron beam evaporation, with a ring-shaped emitter electrode pattern as a mask, in n + GaN emitter ohmic contact layer according to Ti / Au metal with a thickness of 20 / 80 nm was evaporated at a certain rate and then soaked in acetone solution to form an emitter electrode. The inner circumference of the electrode is 3 μm away from the cylindrical mesa.
[0091] Step 12: Deposit a passivation layer from the GaN isolation layer to the outside of the collector electrode, such as... Figure 3 (l).
[0092] A 100 nm thick SiN passivation layer was deposited from the GaN isolation layer to the outside of the collector electrode using plasma-enhanced chemical vapor deposition. The process conditions were: time 60 s, pressure 2200 mTorr, temperature 350 ℃, SiH4 flow rate 13.5 sccm, NH3 flow rate 10 sccm, and N2 flow rate 1000 sccm.
[0093] Step thirteen, fabricate a collector electrode via on the passivation layer, such as... Figure 3 (m).
[0094] 13a) Photolithography to form the collector electrode via pattern:
[0095] 13a1) Spin-coating PMMAA4 photoresist onto the SiN passivation layer, i.e., first spin-coating at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 180°C for 30 seconds, then bake at 180°C for 90 seconds.
[0096] 13a2) Set the electron dose ratio to 750 and use electron beam lithography to expose the PMMA A4 photoresist;
[0097] 13a3) For the photoresist after exposure, first develop it with a solution of tetramethyl dipentanone and isopropanol in a ratio of 3:1 for 120s, and then fix it with isopropanol for 30s to form the collector electrode via pattern.
[0098] 13b) Using photoresist as a mask, the passivation layer is etched to the metal surface of the collector electrode using reactive ion etching to form a collector electrode via with a diameter of 0.5 μm. The process conditions are: pressure of 1500 mTorr, power of 200 W, SF6 flow rate of 8 sccm, CHF3 flow rate of 10 sccm, and He flow rate of 150 sccm.
[0099] Step fourteen: Photolithography and etching are performed on the passivation layer to form an emitter electrode via, such as... Figure 3 (n).
[0100] 14a) Photolithography to form the emitter electrode via pattern:
[0101] 14a1) Spin-coating AZ5214 photoresist onto the passivation layer, first at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Rotate at 30 seconds per minute, then bake at 95°C for 90 seconds.
[0102] 14a2) The AZ5214 photoresist on the passivation layer is exposed using traditional optical lithography;
[0103] 14a3) After exposure, the photoresist is developed with RZX-3038 developer for 45 seconds to form a ring pattern with an inner diameter slightly smaller than that of the emitter electrode.
[0104] 14b) Using reactive ion etching, with photoresist as a mask, the passivation layer is etched to the surface of the emitter electrode metal to form an emitter electrode via. The process conditions are: pressure of 1500 mTorr, power of 200 W, SF6 flow rate of 8 sccm, CHF3 flow rate of 10 sccm, and He flow rate of 150 sccm.
[0105] Step 15: Lead out the emitter electrode Pad and collector electrode Pad from the emitter electrode via and collector electrode via to complete the device fabrication, as shown below. Figure 3 (o).
[0106] 15a) Photolithography to form the emitter and collector electrode metal pad patterns:
[0107] 15a1) Spin-coat AZ5214 photoresist onto the emitter and collector vias, i.e., first spin-coat at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 30s for 3min, then bake at 95℃ for 90s;
[0108] 15a2) The AZ5214 photoresist was exposed using a traditional optical lithography method;
[0109] 15a3) The exposed photoresist was developed with RZX-3038 developer for 45 seconds to form the emitter and collector electrode metal pad patterns;
[0110] 15b) Using the electron beam evaporation method, according to Ti / Au metal with a thickness of 20 / 80 nm is evaporated at a certain rate and then soaked in acetone to form emitter electrode Pad and collector electrode Pad interconnected with emitter electrode and collector electrode, thus completing the device fabrication.
[0111] Example 2: A barrier layer is fabricated on a sapphire substrate using B. 0.2 P 0.8 The N- and U-shaped quantum well layers use an In composition m that decreases in 10% increments. m Ga 1-m N, Gradient component isolation layer uses In component n increased in 4% increments. n Ga 1-n N-type U-shaped quantum well gallium nitride resonant tunneling diode.
[0112] Step 1, grow a GaN epitaxial layer, such as Figure 3 (a).
[0113] Using metal-organic chemical vapor deposition, with process conditions set at 1100℃, 50 Torr, gallium source flow rate of 150 sccm, ammonia flow rate of 2500 sccm, and hydrogen flow rate of 3500 sccm, a GaN epitaxial layer with a thickness of 3000 nm was grown on a sapphire substrate.
[0114] Step 2, grow n + GaN emitter ohmic contact layer, such as Figure 3 (b)
[0115] Molecular beam epitaxy was used, with a temperature set at 700℃ and a gallium beam equilibrium vapor pressure of 6.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 2.0 × 10⁻⁶. -8 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350 W, a GaN epitaxial layer with a thickness of 100 nm and a doping concentration of 1 x 10⁻⁶ was grown. 20 cm -3 n + GaN emitter ohmic contact layer.
[0116] Step 3, grow a GaN isolation layer, such as Figure 3(c)
[0117] Molecular beam epitaxy was used, with a temperature set at 700℃ and a gallium beam equilibrium vapor pressure of 6.5 × 10⁻⁶. -7 Torr, nitrogen flow rate of 1.2 sccm, nitrogen plasma RF source power of 350W, under these process conditions, in n + A 10 nm thick GaN isolation layer is grown on the GaN emitter ohmic contact layer.
[0118] Step 4, Growth of the first B 0.2 P 0.8 N-barrier layer, such as Figure 3 (d)
[0119] Molecular beam epitaxy was used, with a temperature set at 700℃ and a boron beam equilibrium vapor pressure of 2.3 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the phosphorus beam is 1.0 × 10⁻⁶. -7 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350 W, a first boron layer with a thickness of 2 nm and a boron composition of 20% was grown on a GaN isolation layer. 0.2 P 0.8 N-barrier layer.
[0120] Step 5, Growth In m Ga 1-m NU-type quantum well layers, such as Figure 3 (e).
[0121] Molecular beam epitaxy was used, and the thickness and composition of a single atomic layer were controlled using digital alloying technology. The temperature was set at 525℃, and the equilibrium vapor pressure of the gallium beam was 6.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the indium beam is 2.0 × 10⁻⁶. -7 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350W, in the first B... 0.2 P 0.8 An In layer with a thickness of 2.5 nm and an In composition m decreasing in 10% increments is grown on an N-barrier layer. m Ga 1-m NU-type quantum well layer.
[0122] Step 6, grow the second B 0.2 P 0.8 N-barrier layer, such as Figure 3 (f).
[0123] Molecular beam epitaxy was used, with a temperature set at 700℃ and a boron beam equilibrium vapor pressure of 2.3 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the phosphorus beam is 1.0 × 10⁻⁶. -7Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350 W, a second B with a thickness of 2 nm and a B composition of 20% was grown on a U-shaped quantum well layer. 0.2 P 0.8 N-barrier layer.
[0124] Step 7, Growth In n Ga 1-n N-gradient component isolation layer, such as Figure 3 (g)
[0125] Molecular beam epitaxy was used, and the thickness and composition of a single atomic layer were controlled using digital alloying technology. The temperature was set at 525℃, and the equilibrium vapor pressure of the gallium beam was 6.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the indium beam is 2.0 × 10⁻⁶. -7 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350 W, in the second B... 0.2 P 0.8 In atoms with a thickness of 6 nm and an In composition n increasing in 4% increments are grown on the N-barrier layer. n Ga 1-n N-gradient component isolation layer.
[0126] Step 8, grow n + InN collector ohmic contact layer, such as Figure 3 (h).
[0127] Molecular beam epitaxy was used, with a temperature set at 525℃ and an indium beam equilibrium vapor pressure of 2.0 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.5 × 10⁻⁶. -8 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 375 W, a 100 nm thick InGaN graded composition isolation layer with a doping concentration of 1 x 10⁻⁶ was grown. 20 cm -3 n + InN collector ohmic contact layer.
[0128] Step 9, in n + A mesh-like mesa with a depth of 500nm is formed on the InN collector ohmic contact layer through homogenization, photolithography, development, and etching. Figure 3 (i).
[0129] 9.1) The mesa isolation pattern is formed using photolithography:
[0130] The specific implementation of this step is the same as step 9a) in Example 1.
[0131] 9.2) Etching to form mesa isolation:
[0132] Inductively coupled plasma etching (ICP-C) was employed, using photoresist as a mask and process conditions of 10 sccm Cl2 gas flow rate and 25 sccm BCl3 gas flow rate to etch n. + An InN collector ohmic contact layer is formed in 360s, creating a mesh-like mesa with a depth of 500nm for isolation.
[0133] Step 10, in n + Metal is deposited on the InN collector ohmic contact layer to form the collector electrode, and then etched to n. + The GaN emitter ohmic contact layer forms a cylindrical mesa with a diameter of 5 μm, such as Figure 3 (j).
[0134] 10.1) Photolithography forms a circular mesa pattern:
[0135] 10.1.1) In n + PMMA A4 photoresist was spin-coated twice onto the InN collector ohmic contact layer: the first spin-coating was performed at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at the first min; the second spin coating is performed at a rotation speed of 4000 rad / min and an acceleration of 2000 rad. 2 Spin coat at 180℃ for 30 seconds, then bake at 180℃ for 90 seconds;
[0136] 10.1.2) Electron beam lithography was used to expose PMMA A4 photoresist with an electron dose ratio of 750.
[0137] 10.1.3) For the photoresist after exposure, first develop it with a solution of tetramethyl dipentanone and isopropanol in a ratio of 3:1 for 120s, and then fix it with isopropanol for 30s to form a circular mesa pattern with a diameter of 5μm.
[0138] 10.2) Using the electron beam evaporation method, on the circular mesa pattern, according to... Ti / Au / Ni metal with a thickness of 20 / 80 / 50 nm was evaporated at a certain rate and then soaked in acetone solution to form a current collector electrode.
[0139] 10.3) Etching to form a cylindrical mesa
[0140] Using the collector electrode as a mask, a circular mesa pattern was etched using inductively coupled plasma etching (ICP-C) with a Cl2 gas flow rate of 10 sccm, a BCl3 gas flow rate of 25 sccm, and an etching time of 150 s. The etching was carried out to n... + A GaN emitter ohmic contact layer is formed to create a cylindrical mesa with a diameter of 5 μm.
[0141] Step 11, in n + A ring-shaped emitter electrode with an inner circumference distance of 5 μm from the cylindrical mesa is formed on the GaN emitter ohmic contact layer, such as... Figure 3 (k).
[0142] The specific implementation of this step is the same as step eleven in Example 1.
[0143] Step 12, deposit a 200nm Al2O3 dielectric passivation layer, such as Figure 3 (l).
[0144] Using atomic layer deposition (ALD) with the following process conditions set: time 40 s, pressure 2000 mTorr, temperature 300 °C, Al(CH3)3 flow rate 850 sccm, H2O flow rate 350 sccm, and N2 flow rate 1000 sccm, a 200 nm thick Al2O3 dielectric passivation layer was deposited from the GaN isolation layer to the outside of the collector electrode.
[0145] Step 13: Prepare a current collector electrode via with a diameter of 4 μm on the Al2O3 dielectric passivation layer, such as... Figure 3 (m).
[0146] 13.1) Photolithography to form the collector electrode via pattern:
[0147] The specific implementation of this step is the same as step 13a) in Embodiment 1.
[0148] 13.2) Etching to form the collector electrode via:
[0149] Using photoresist as a mask, reactive ion etching was employed with process conditions of 1500 mTorr pressure, 200 W power, 8 sccm SF6 flow rate, 10 sccm CHF3 flow rate, and 150 sccm He flow rate to etch the Al2O3 dielectric passivation layer to the collector electrode metal surface, forming a 4 μm diameter collector electrode via.
[0150] Step 14: Photolithography and etching are performed on the Al2O3 dielectric passivation layer to form an emitter electrode via, such as... Figure 3 (n).
[0151] 14.1) Photolithography to form the emitter electrode via pattern:
[0152] The specific implementation of this step is the same as step 14a) in Example 1.
[0153] 14.2) Etching to form emitter electrode vias
[0154] Using photoresist as a mask, reactive ion etching was employed with process conditions of 1500 mTorr pressure, 200 W power, SF6 flow rate of 8 sccm, CHF3 flow rate of 10 sccm, and He flow rate of 150 sccm to etch the Al2O3 dielectric passivation layer to the emitter electrode metal surface, forming an emitter electrode via.
[0155] Step 15: Lead out the emitter electrode Pad and collector electrode Pad from the emitter electrode and collector electrode vias to complete the device fabrication, as shown below. Figure 3 (o).
[0156] The specific implementation of this step is the same as step fifteen of Embodiment 1.
[0157] Example 3: A barrier layer is fabricated on a silicon substrate using Al. 0.2 P 0.8 The N- and U-shaped quantum well layers use In composition m that decreases in increments of 8%. m Ga 1-m The N and gradient component isolation layer uses In component n, which increases in increments of 2%. n Ga 1-n N-type U-shaped quantum well gallium nitride resonant tunneling diode.
[0158] Step A: Grow a GaN epitaxial layer, such as... Figure 3 (a).
[0159] Using metal-organic chemical vapor deposition, a GaN epitaxial layer with a thickness of 6000 nm was grown on a Si substrate under the following process conditions: temperature 1250℃, pressure 60 Torr, gallium source flow rate 200 sccm, ammonia flow rate 2500 sccm, and hydrogen flow rate 3500 sccm.
[0160] Step B, grow n + GaN emitter ohmic contact layer, such as Figure 3 (b)
[0161] Molecular beam epitaxy was used at a temperature of 780℃ and a gallium beam equilibrium vapor pressure of 8.5 × 10⁻⁶. -7 Torr, silicon beam equilibrium vapor pressure is 5.0 × 10⁻⁶ -8 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350 W, a GaN epitaxial layer with a thickness of 200 nm and a doping concentration of 5 x 10⁻⁶ was grown. 20 cm -3 n + GaN emitter ohmic contact layer.
[0162] Step C, grow a GaN isolation layer, such as Figure 3 (c)
[0163] Molecular beam epitaxy was used at a temperature of 780℃ and a gallium beam equilibrium vapor pressure of 8.5 × 10⁻⁶. -7 Under process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350W, in n + A GaN isolation layer with a thickness of 15 nm is grown on the GaN emitter ohmic contact layer.
[0164] Step D, grow the first Al 0.2 P 0.8 N-barrier layer, such as Figure 3 (d)
[0165] Molecular beam epitaxy was used at a temperature of 780℃ and an aluminum beam equilibrium vapor pressure of 0.6 × 10⁻⁶. -7 The equilibrium vapor pressure of the Torr and phosphorus beams is 3.0 × 10⁻⁶. -7 Under process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350 W, a first Al layer with a thickness of 3 nm and an Al composition of 20% was grown on a GaN isolation layer. 0.2 P 0.8 N-barrier layer.
[0166] Step E, growth In m Ga 1-m NU-type quantum well layers, such as Figure 3 (e).
[0167] Molecular beam epitaxy (MBE) was employed, and single-atom layer thickness composition was controlled using digital alloying technology at a temperature of 550℃ and a gallium beam equilibrium vapor pressure of 8.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the indium beam is 3.0 × 10⁻⁶. -7 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350W, in the first Al 0.2 P 0.8 In atoms with a thickness of 3 nm and an In composition m decreasing in 8% increments are grown on the N-barrier layer. m Ga 1-m NU-type quantum well layer.
[0168] Step F, grow the second Al 0.2 P 0.8 N-barrier layer, such as Figure 3 (f).
[0169] Molecular beam epitaxy was used at a temperature of 780℃ and an aluminum beam equilibrium vapor pressure of 0.6 × 10⁻⁶. -8 The equilibrium vapor pressure of the Torr and phosphorus beams is 3.0 × 10⁻⁶.-7 Under process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350 W, a second Al with a thickness of 3 nm and an Al composition of 20% was grown on a U-shaped quantum well layer. 0.2 P 0.8 N-barrier layer.
[0170] Step G, growth In n Ga 1-n N-gradient component isolation layer, such as Figure 3 (g)
[0171] Molecular beam epitaxy (MBE) was employed, and single-atom layer thickness composition was controlled using digital alloying technology at a temperature of 550℃ and a gallium beam equilibrium vapor pressure of 8.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the indium beam is 3.0 × 10⁻⁶. -7 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350W, in the second Al 0.2 P 0.8 In atoms with a thickness of 12 nm and an In composition n increasing in 2% increments are grown on the N-barrier layer. n Ga 1-n N-gradient component isolation layer.
[0172] Step H, grow n + InN collector ohmic contact layer, such as Figure 3 (h).
[0173] Molecular beam epitaxy was used at a temperature of 550℃ and an indium beam equilibrium vapor pressure of 3.0 × 10⁻⁶. -7 Torr, silicon beam equilibrium vapor pressure is 5.0 × 10⁻⁶ -8 Under the process conditions of Torr, nitrogen flow rate of 1.2 sccm, and nitrogen plasma RF source power of 350 W, a 200 nm thick layer with a doping concentration of 5 x 10⁻⁶ was grown on an InGaN graded composition isolation layer. 20 cm -3 n + InN collector ohmic contact layer.
[0174] Step I, in n + A 600nm deep mesh-like mesa isolation layer is formed on the InN collector ohmic contact layer through homogenization, photolithography, development, and etching. Figure 3 (i).
[0175] I.1) The mesa isolation pattern is formed using photolithography:
[0176] The specific implementation of this step is the same as step 9a) in Example 1.
[0177] I.2) Etching to form a mesa for isolation:
[0178] Using photoresist as a mask, inductively coupled plasma etching was performed under the following conditions: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 420 s. The etching process was as follows: n... + The InN collector ohmic contact layer forms a mesh-like mesa with a depth of 600 nm for isolation.
[0179] Step J, in n + Metal is deposited on the InN collector ohmic contact layer to form the collector electrode, and then etched to n. + The GaN emitter ohmic contact layer forms a cylindrical mesa with a diameter of 10 μm, such as Figure 3 (j).
[0180] J.1) Photolithography forms a circular mesa pattern:
[0181] J.1.1) in n + Spin coating on the InN collector ohmic contact layer: first at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / PMMAA4 photoresist was spin-coated for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin-coat PMMAA4 photoresist for 30 seconds at a speed of / min, then bake at 180℃ for 90 seconds;
[0182] J.1.2) Electron beam lithography was used, with an electron dose ratio of 750, to expose PMMA A4 photoresist.
[0183] J.1.3) For the photoresist after exposure, first use a solution of tetramethyl dipentanone and isopropanol in a ratio of 3:1, develop for 120s, and then fix with isopropanol for 30s to form a circular mesa pattern with a diameter of 10μm.
[0184] J.2) Using electron beam evaporation, the process is carried out on a circular mesa pattern according to... Ti / Au / Ni metal with a thickness of 20 / 80 / 50 nm is evaporated at a certain rate and then soaked in acetone solution to form a current collector electrode.
[0185] J.3) Using the collector electrode as a mask, inductively coupled plasma etching was performed under the following process conditions: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 150 s. The etching process was as follows: n... + InN collector ohmic contact layer to n + A GaN emitter ohmic contact layer is formed to create a cylindrical mesa with a diameter of 10 μm.
[0186] Step K, in n + A ring-shaped emitter electrode with an inner circumference distance of 5 μm from the cylindrical mesa is formed on the GaN emitter ohmic contact layer, such as... Figure 3 (k).
[0187] The specific implementation of this step is the same as step eleven in Example 1.
[0188] Step L: Deposit an HfO2 dielectric passivation layer, such as... Figure 3 (l).
[0189] Using atomic layer deposition (ALD) technology, under the following conditions: time 70 s, temperature 280 °C, ethyl methylamino hafnium flow rate 1200 sccm, H2O flow rate 110 sccm, and N2 flow rate 1000 sccm, a 300 nm thick HfO2 dielectric passivation layer was deposited from the GaN isolation layer to the outside of the collector electrode.
[0190] Step M involves fabricating a 9 μm diameter collector electrode via on the HfO2 dielectric passivation layer, such as... Figure 3 (m).
[0191] M.1) Photolithography to form the collector electrode via pattern:
[0192] The specific implementation of this step is the same as step 13a) in Embodiment 1.
[0193] M.2) Etching to form collector electrode vias
[0194] Using photoresist as a mask, and setting process conditions of 1500 mTorr pressure, 200 W power, 8 sccm SF6 flow rate, 10 sccm CHF3 flow rate, and 150 sccm He flow rate, the HfO2 dielectric passivation layer was etched to the collector electrode metal surface using reactive ion etching to form a 9 μm diameter collector electrode via.
[0195] Step N involves photolithography and etching to form emitter electrode vias on the HfO2 dielectric passivation layer, such as... Figure 3 (n).
[0196] N.1) Photolithography to form the emitter electrode via pattern:
[0197] The specific implementation of this step is the same as step 14a) in Example 1.
[0198] N.2) Using photoresist as a mask, under process conditions of 1500 mTorr pressure, 200 W power, SF6 flow rate of 8 sccm, CHF3 of 10 sccm, and He flow rate of 150 sccm, reactive ion etching is used to etch the HfO2 dielectric passivation layer to the emitter electrode metal surface to form an emitter electrode via.
[0199] Step O: Lead out the emitter and collector electrodes Pad from the emitter and collector electrode vias, such as... Figure 3 (o).
[0200] The specific implementation of this step is the same as step fifteen of Embodiment 1.
[0201] The above descriptions are merely three specific examples of the present invention and do not constitute any limitation on the present invention. Obviously, those skilled in the art, after understanding the content and principles of the present invention, may make various modifications and changes in form and details without departing from the principles and structure of the present invention. For example, the material used for the substrate, in addition to the self-supporting gallium nitride single crystal material, sapphire material, and silicon material used in this example, may also be any one of silicon carbide material, aluminum nitride material, boron nitride material, and diamond material. However, these modifications and changes based on the ideas of the present invention are still within the scope of the claims of the present invention.
Claims
1. A U-shaped quantum well GaN resonant tunneling diode, comprising, from bottom to top, a substrate (1), a GaN epitaxial layer (2), an n+ GaN emitter ohmic contact layer (3), a GaN spacer layer (4), a first barrier layer (5), a U-shaped quantum well layer (6), a second barrier layer (7), a graded composition spacer layer (8), an n+ InN collector ohmic contact layer (9), a collector electrode (10), ring-shaped emitter electrodes (11) provided on both sides of the GaN spacer layer (4), and a passivation layer (12) wrapped around the GaN spacer layer (4) and the collector electrode (10), characterized in that: the first barrier layer (5) and the second barrier layer (7) are made of BxAlyPzN with consistent composition and same thickness, wherein 0≤x<1, 0≤y<1, 0≤z<1, and x+y+z=1, and the thickness is 1 nm-3 nm; the U-shaped quantum well layer (6) is made of InmGa1-mN with gradually decreasing composition, wherein the composition m gradually decreases from 100% near the first barrier layer (5) to 0% near the second barrier layer (7), the gradual change interval is 8%-15%, and the thickness is 1.5 nm-3 nm; the graded composition spacer layer (8) is made of InnGa1-nN with gradually increasing composition, wherein the composition n gradually increases from 0% near the second barrier layer (7) to 100% near the n+ InN collector ohmic contact layer (9), the gradual change interval is 2%-5%, and the thickness is 4 nm-12 nm; the GaN epitaxial layer (2) has a thickness of 1000 nm-6000 nm; the GaN spacer layer (4) has a thickness of 4 nm-15 nm; the n+ GaN emitter ohmic contact layer (3) has a doping concentration of 1x1019 cm-3-5x1020 cm-3 and a thickness of 50 nm-200 nm; the n+ InN collector ohmic contact layer (9) has a doping concentration of 1x1019 cm-3-5x1020 cm-3 and a thickness of 50 nm-200 nm; the passivation layer (12) is made of any one of SiN, Al2O3, and HfO2; and the substrate (1) is made of any one of self-supporting GaN single crystal material, sapphire material, silicon carbide material, silicon material, aluminum nitride material, boron nitride material, and diamond material. The method comprises the following steps:
1. growing a GaN epitaxial layer with a thickness of 1000 nm-6000 nm on a substrate by metal organic chemical vapor deposition; 2. growing an n+ GaN emitter ohmic contact layer with a thickness of 50 nm-200 nm and a doping concentration of 1x1019 cm-3-5x1020 cm-3 on the GaN epitaxial layer by molecular beam epitaxy; 3. growing a GaN spacer layer with a thickness of 4 nm-15 nm on the n+ GaN emitter ohmic contact layer by molecular beam epitaxy; 4. growing a first barrier layer with a thickness of 1 nm-3 nm on the GaN spacer layer by molecular beam epitaxy; 2. The method of claim 1, wherein the U-shaped quantum well GaN resonant tunneling diode is formed by the steps of: 5) Using molecular beam epitaxy, the thickness of 1.5 nm-3 nm of U-shaped quantum well layer is grown on the first barrier layer by digital alloy technology for single atomic layer thickness component control; 6) Using molecular beam epitaxy, the thickness of 1 nm-3 nm of the second barrier layer is grown on the U-shaped quantum well layer; 7) Using molecular beam epitaxy, the thickness of 4 nm-12 nm of the gradual component isolation layer is grown on the second barrier layer by digital alloy technology for single atomic layer thickness component control; 8) Using molecular beam epitaxy, the n+InN collector ohmic contact layer with a thickness of 50 nm-200 nm and a doping concentration of 1x1019 cm-3-5x1020 cm-3 is grown on the gradual component isolation layer; 9) Using optical lithography process and etching process, the mesa isolation with a depth of 300 nm-600 nm from the GaN epitaxial layer to the collector ohmic contact layer is formed; 10) Using electron beam lithography process, the collector electrode is formed, and then using etching process, the cylindrical mesa with a diameter of 1 µm-10 µm from the GaN isolation layer to the collector electrode is formed on the mesa isolation; 11) Using optical lithography process and electron beam evaporation method, the emitter electrode is formed on the n+GaN emitter ohmic contact layer; 12) Using plasma enhanced chemical vapor deposition method or atomic layer deposition process, the passivation layer with a thickness of 100 nm-300 nm is deposited on the surface from the n+GaN emitter ohmic contact layer to the collector electrode; 13) Using optical lithography process and reactive ion etching method, the emitter electrode via hole is formed on the passivation layer; 14) Using electron beam lithography process and reactive ion etching method, the collector electrode via hole with a diameter of 0.5 µm-9 µm is formed on the cylindrical mesa passivation layer; 15) Using optical lithography process, the emitter Pad pattern and the collector Pad pattern are formed on the passivation layer; then using electron beam evaporation method, Ti / Au metal layer is evaporated on the pattern with photoresist as a mask to form the emitter Pad and the collector Pad, and the preparation of the device is completed.
3. The manufacturing method of claim 2, wherein: The process conditions of the metal organic chemical vapor deposition method used in step 1) are: temperature of 950 oC -1250 oC, pressure of 40 Torr-60 Torr, ammonia flow rate of 2500 sccm, gallium source flow rate of 120 sccm-200 sccm, and hydrogen flow rate of 3500 sccm; The process conditions of the plasma enhanced chemical vapor deposition method used in step 12) are: pressure of 2200 mTorr, temperature of 350 oC, SiH4 flow rate of 13.5 sccm, NH3 flow rate of 10 sccm, N2 flow rate of 1000 sccm, and time of 30 s-120 s.
4. The manufacturing method of claim 2, wherein: The process conditions of the molecular beam epitaxy method in the step 2) are: temperature 600 oC -780 oC, gallium beam flux equilibrium vapor pressure 2..8x10-7 Torr-8.5x10-7 Torr, silicon beam flux equilibrium vapor pressure 2.0x10-8 Torr-5.0x10-8 Torr, nitrogen flow rate 1.2 sccm, nitrogen plasma radio frequency source power 350 W; The process conditions of the molecular beam epitaxy method in the step 3) are: temperature 600 oC -780 oC, gallium beam flux equilibrium vapor pressure 2.8x10-7 Torr-8.5x10-7 Torr, nitrogen flow rate 1.2 sccm, nitrogen plasma radio frequency source power 350 W; The process conditions of the molecular beam epitaxy method in the steps 4) and 6) are: temperature 600 oC -780 oC, boron beam flux equilibrium vapor pressure 1.2x10-8 Torr-2.3x10-8 Torr, aluminum beam flux equilibrium vapor pressure 0.6x10-7 Torr-2.4x10-7 Torr, phosphorus beam flux equilibrium vapor pressure 1.0x10-7 Torr-3.0x10-7 Torr, nitrogen flow rate 1.2 sccm, nitrogen plasma radio frequency source power 350 W; The process conditions of the molecular beam epitaxy method in the step 5) are: temperature 500 oC -550 oC, gallium beam flux equilibrium vapor pressure 2.8x10-7 Torr-8.5x10-7 Torr, indium beam flux equilibrium vapor pressure 1.0x10-7 Torr-3.0x10-7 Torr, nitrogen flow rate 1.2 sccm, nitrogen plasma radio frequency source power 350 W; The process conditions of the molecular beam epitaxy method in the step 7) are: temperature 500 oC -550 oC, gallium beam flux equilibrium vapor pressure 2.8x10-7 Torr-8.5x10-7 Torr, indium beam flux equilibrium vapor pressure 1.0x10-7 Torr-3.0x10-7 Torr, nitrogen flow rate 1.2 sccm, nitrogen plasma radio frequency source power 350 W; The process conditions of the molecular beam epitaxy method in the step 8) are: temperature 500 oC -550 oC, indium beam flux equilibrium vapor pressure 1.0x10-7 Torr-3.0x10-7 Torr, silicon beam flux equilibrium vapor pressure 2.0x10-8 Torr-5.0x10-8 Torr, nitrogen flow rate 1.2 sccm, nitrogen plasma radio frequency source power 350 W.
5. The method of claim 2, wherein: In the step 10), an electron beam lithography and etching process is adopted to form a cylindrical mesa from the GaN isolation layer to the collector electrode, so as to realize the following: 10a) Forming a circular pattern with a diameter of 1-10 microns on the collector ohmic contact layer by electron beam lithography using PMMA A4 photoresist, baking time of 90 s, temperature of 180 oC, electron dose ratio of 750, developer of 3:1 tetramethyl dioxane and isopropyl alcohol, time of 120 s, fixer of isopropyl alcohol, time of 30 s, and then evaporating a Ti / Au metal layer on the pattern by electron beam evaporation to form a collector electrode; 10b) Using the collector electrode as a mask, forming a cylindrical mesa from the GaN isolation layer to the collector electrode by inductively coupled plasma etching using BCl3 / Cl2 gas source to etch to the n+ GaN emitter ohmic contact layer.
6. The method of claim 2, wherein: Step 9) Forming a mesa isolation from the GaN epitaxial layer to the collector ohmic contact layer by optical lithography and etching processes, as follows: 9a) Using optical lithography, first spin-coating AZ5214 photoresist on the collector ohmic contact layer at a speed of 500 rad / min and an acceleration of 1000 rad2 / min for 3 s, then at a speed of 4000 rad / min and an acceleration of 2000 rad2 / min for 30 s, and then baking at a temperature of 95 oC for 90 s, and finally developing with developer RZX-3038 for 45 s to form a mesa isolation pattern; 9b) Using the photoresist as a mask, etching the epitaxial material using BCl3 / Cl2 gas source under the process conditions of Cl2 gas flow of 10 sccm, BCl3 gas flow of 25 sccm, and etching time of 300-420 s to form a mesa isolation with a depth of 300-600 nm.
7. The method of claim 2, wherein: Step 11) Forming an emitter electrode on the n+ GaN emitter ohmic contact layer by optical lithography and electron beam evaporation, 11a) First, using optical lithography to form a circular ring pattern with an inner circumference distance of 5 microns from the cylindrical mesa on the n+ GaN emitter ohmic contact layer; 11b) Using the photoresist as a mask, evaporating a Ti / Au metal layer on the circular ring pattern by electron beam evaporation to form an emitter electrode.
8. The manufacturing method of claim 2, wherein: In step 13), forming an emitter electrode via hole on the passivation layer, first forming an emitter electrode via hole pattern on the passivation layer by optical lithography, and then using the photoresist as a mask, etching an emitter electrode via hole on the emitter electrode via hole pattern by reactive ion etching using SF6 gas source; In step 14), forming a collector electrode via hole on the cylindrical mesa passivation layer, first forming a circular pattern with a diameter of 0.5-9 microns on the cylindrical mesa passivation layer by electron beam lithography, and then using the photoresist as a mask, etching a collector electrode via hole on the circular pattern by reactive ion etching using SF6 gas source.
Citation Information
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