Method and device for verifying video interface based on uvm, electronic equipment and storage medium
By dividing the stimulus into a transaction layer and a transport layer in the UVM verification platform, and using converters and checkers for data conversion and comparison, the problem of verification reusability for different video interfaces and resolution precisions is solved, and verification costs are reduced.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGSHA JINGJIA MICROELECTRONICS
- Filing Date
- 2022-12-01
- Publication Date
- 2026-07-03
AI Technical Summary
In existing technologies, UVM-based verification platforms require the separate construction of different verification platforms when verifying video interfaces of different types and working modes, resulting in poor reusability and high verification costs.
By dividing the stimulus into a transaction layer and a transport layer, a converter adapter is used to convert the first audio and video data into the second audio and video data, and a checker is used for comparison. It supports flexible configuration of multiple video interfaces and graphics resolution precision.
It improves the reusability of the verification platform, reduces verification costs, and can more flexibly adapt to verification needs for various video interfaces and image resolution precision.
Smart Images

Figure CN115859880B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chips, and to methods, apparatus, electronic devices, and storage media for verifying video interfaces based on UVM. Background Technology
[0002] As chip performance improves, chip designs become increasingly larger, leading to a greater reliance on design verification. Design verification has become an indispensable part of the chip design process. Chip design is typically completed in the following steps: Designers convert the feature list from the requirements specification into RTL (register transition level) code using a hardware design language (such as Verilog). The RTL code (usually called DUT (Design Under Test)) is then verified using a verification platform written according to verification methodologies.
[0003] Currently, the mainstream verification methodology is UVM (Universal Verification Methodology). UVM is supported by the three major EDA (Electronic Design Automation) companies: Synopsys, Mentor, and Cadence. UVM's advantages include a factory mechanism and the adoption of register-based solutions, making it powerful. A UVM-based verification platform typically includes several parts: stimuli, a reference module, and a checker. The stimuli output to the DUT (Device Under Test), and the DUT outputs the test results. The reference module mimics the DUT, performing the same functions and outputting the expected simulation results. The checker compares the test results with the simulation results and determines the verification conclusion of the DUT based on the comparison results.
[0004] Due to market demand, video interfaces are widely used in chips. There are many types of video interfaces, with common ones including HDMI (High Definition Multimedia Interface), SDI (Serial Digital Interface), VGA (Video Graphics Array), DVI (Digital Video Interface), and AV (Audio Video). Furthermore, video interfaces can operate in different modes, such as 720p resolution and 1080p resolution.
[0005] Verifying various types and operating modes of video interfaces requires determining different incentives based on the requirements and building different verification platforms for each incentive, which is time-consuming and labor-intensive. Improving the reusability of verification platforms and reducing the cost of building them is one of the urgent technical problems to be solved in this field. Summary of the Invention
[0006] To address one of the aforementioned technical deficiencies, this application provides a method for verifying video interfaces based on UVM.
[0007] According to a first aspect of the embodiments of this application, a method for verifying a video interface based on UVM is provided, comprising:
[0008] The first audio and video data of the transaction layer is converted into the second audio and video data of the transport layer through the converter adapter.
[0009] Send the second audio and video data to the DUT (Design Under Test) to be verified.
[0010] Obtain the first processing result of the DUT;
[0011] Send the first audio and video data to the reference model;
[0012] Obtain the second processing result from the reference model;
[0013] The checker compares the first processing result with the second processing result to obtain the comparison result.
[0014] According to a second aspect of the embodiments of this application, an apparatus based on a UVM-verified video interface is provided, comprising:
[0015] The conversion unit is used to convert the first audio and video data of the transaction layer into the second audio and video data of the transport layer through the converter adapter.
[0016] The first transmitting unit is used to send the second audio and video data to the design under test (DUT).
[0017] The first acquisition unit is used to acquire the first processing result of the DUT;
[0018] The second sending unit is used to send the first audio and video data to the reference model.
[0019] The second acquisition unit is used to acquire the second processing result of the reference model;
[0020] The checking unit is used to compare the first processing result with the second processing result through the checker to obtain the comparison result.
[0021] According to a third aspect of the embodiments of this application, an electronic device is provided, comprising: a memory; a processor; and a computer program; wherein the computer program is stored in the memory and configured to be executed by the processor to implement the method of any of the above.
[0022] According to a fourth aspect of the embodiments of this application, a computer-readable storage medium is provided having a computer program stored thereon; the computer program is executed by a processor to implement the method as described in any of the foregoing.
[0023] The UVM-based verification video interface method provided in this application divides the stimulus into a transaction layer and a transport layer. This allows for more flexible modification of the stimulus in the transaction layer or the transport layer as needed, resulting in higher reusability of the verification method and saving verification costs. Attached Figure Description
[0024] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0025] Figure 1 A flowchart illustrating a UVM-based method for verifying a video interface, as provided in this application embodiment;
[0026] Figure 2 A schematic diagram of a UVM-based verification platform provided for embodiments of this application;
[0027] Figure 3 This is a schematic diagram of a UVM-based verification platform device provided in an embodiment of this application. Detailed Implementation
[0028] To make the technical solutions and advantages of the embodiments of this application clearer, the exemplary embodiments of this application will be described in further detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not an exhaustive list of all embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.
[0029] In developing this application, the inventors discovered that in practical applications, there are often situations where a design to be verified contains multiple video interfaces, or where multiple working modes need to be verified. Existing solutions involve determining different incentives based on the requirements and building different verification platforms accordingly. However, the reusability of these verification platforms is poor, and the time and labor costs are high.
[0030] In response to the above problems, such as Figure 1 As shown in the embodiment of this application, a method for verifying a video interface based on UVM is provided. The verification method includes:
[0031] Step S101: Convert the first audio and video data of the transaction layer into the second audio and video data of the transport layer using a converter adapter;
[0032] Step S102: Send the second audio and video data to the design under test (DUT);
[0033] Step S103: Obtain the first processing result of the DUT;
[0034] Step S104: Send the first audio and video data to the reference module;
[0035] Step S105: Obtain the second processing result of the reference model;
[0036] Step S106: The first processing result is compared with the second processing result by the checker to obtain the comparison result.
[0037] In practical applications, the method in this application is based on the UVM methodology and can be implemented using the System Verilog language. The verification method's environment (env) consists of components such as sequencer, driver, monitor, and checker. The environment and the DUT are connected via an interface.
[0038] Both the first and second audio / video data are transactions (excitations). The first audio / video data can be divided into audio data and video data, and the same applies to the second audio / video data. Correspondingly, there can be two adapters: one to convert the audio data in the first audio / video data into the audio data in the second audio / video data, and the other to convert the video data in the first audio / video data into the video data in the second audio / video data. The first audio / video data can be generated by a sequencer. The sequencer sends the generated first audio / video data to the adapter. The adapter, according to the DUT's video interface protocol, adds timing conversion to the first audio / video data into a format that the DUT can recognize, i.e., the second audio / video data.
[0039] Preferably, sending the second audio / video data to the design under test (DUT) includes: using a driver to transform the transaction isolation level second audio / video data into the port level third audio / video data of the DUT, driving the third audio / video data and sending it to the DUT.
[0040] In step S102, the second audio and video data is sent to the DUT (Design Under Test) to be verified. Typically, the driver needs to enhance the data transmission capability so that the DUT can recognize it. The DUT processes the input signal (the second audio and video data) and outputs the processing result (i.e., the first processing result). Then, the checker compares the processing result of the DUT with the simulation result of the reference model to obtain the comparison result, thus completing the verification of the DUT.
[0041] The UVM-based verification video interface method provided in this application divides the stimulus into a transaction layer and a transport layer. This allows for more flexible modification of the stimulus in the transaction layer or the transport layer as needed, resulting in higher reusability of the verification method and saving verification costs.
[0042] Preferably, obtaining the first processing result of the DUT includes: obtaining the third processing result of the DUT through the output monitor, and converting the third processing result into the first processing result.
[0043] The first processed data output by the DUT is from the transport layer. To facilitate comparison by the checker, the monitor needs to collect the data and convert it into a transaction layer format that is easy for the checker to compare.
[0044] Preferably, it further includes configuring the adapter, reference model, output monitor, and checker to process data corresponding to the video interface type of the DUT; wherein the adapter, reference model, output monitor, and checker are used to process data corresponding to one of the multiple video interface types according to the configuration.
[0045] In practical applications, the adapter can support multiple video interfaces, such as HDMI and DVI. Users can adjust the adapter's conversion method through pre-configuration. Correspondingly, the working method of the video interface simulated by the reference model also changes; the checker's comparison method changes, and the output monitor's method of collecting the first processing result of the conversion changes. Therefore, to enhance flexibility, based on the DUT requirements, the verification platform corresponding to the verification method selects one of the multiple video interface types supported for verification. The above components can be configured through configuration parameters to achieve adaptation to the video interface type.
[0046] The method in this application embodiment supports multiple video interface types according to the configuration, and can be used more flexibly to verify DUTs of multiple video interface types.
[0047] Preferably, before sending the second audio and video data to the design under test (DUT), the method further includes: detecting whether the timing of the second audio and video data conforms to the requirements of the video protocol corresponding to the DUT through an input monitor.
[0048] The embodiments of this application can monitor the timing of the signals output to the DUT for verification, making it easier for users to discover problems in the verification platform.
[0049] Preferably, before sending the second audio and video data to the design under test (DUT), the method further includes configuring the graphics resolution of the DUT via the APB peripheral bus or the AHB advanced high-performance bus.
[0050] In practical applications, as mentioned earlier, the DUT typically supports multiple image resolution accuracies. To switch between these accuracies, the DUT needs to be controlled. This control can be achieved using the control bus supported by the DUT.
[0051] The embodiments of this application enable more flexible verification of the DUT's various graphic parsing accuracy through DUT configuration.
[0052] Figure 2 This is a block diagram illustrating the principle of a UVM-based verification platform provided in this application embodiment. The labels, definitions, and functions of the various components in the diagram are shown in the table below.
[0053]
[0054]
[0055]
[0056] The meaning of env is: all agents, reference models, and checkers are instantiated and linked in this file.
[0057] The video_layer sequencer and audio_layer sequencer generate the first audio and video data for the transaction layer. The video_adapter sequencer and audio_adapter sequencer convert the first audio and video data into second audio and video data. The second audio and video data is driven by the audio_input driver and video_input driver and sent to the DUT. The video_input monitor and audio_input monitor monitor whether the data sent to the DUT meets the timing requirements of the corresponding video interface protocol of the DUT. The DUT processes the input data, and the third processing result is obtained by the video_output monitor and audio_output monitor and converted into the first processing result, which is then sent to the checker. The reference model receives the stimulus from the first audio and video data of the transaction layer, simulates the function of the DUT to process the first audio and video data, and obtains the second processing result. The checker compares the first processing result of the DUT with the second processing result of the reference model to determine whether the design of the DUT meets the expectations.
[0058] like Figure 3 As shown, this application provides an apparatus for verifying a video interface based on UVM. The apparatus includes a conversion unit 1, a first sending unit 2, a first acquisition unit 3, a second sending unit 4, a second acquisition unit 5, and an inspection unit 6.
[0059] The conversion unit 1 is used to convert the first audio and video data of the transaction layer into the second audio and video data of the transport layer through the converter adapter; the first sending unit 2 is used to send the second audio and video data to the design under test (DUT); the first acquisition unit 3 is used to acquire the first processing result of the DUT; the second sending unit 4 is used to send the first audio and video data to the reference model; the second acquisition unit 5 is used to acquire the second processing result of the reference model; and the checking unit 6 is used to compare the first processing result with the second processing result through the checker to obtain the comparison result.
[0060] Preferably, the first acquisition unit 3 further includes: an acquisition conversion subunit, used to acquire the third processing result of the DUT through the output monitor and convert the third processing result into the first processing result.
[0061] Furthermore, the device for verifying video interfaces based on UVM also includes a configuration unit for configuring the adapter, reference model, output monitor, and checker to process data corresponding to the video interface type of the DUT; wherein, the adapter, reference model, output monitor, and checker are used to process data corresponding to one of the multiple video interface types according to the configuration.
[0062] Furthermore, the configuration unit is also used to configure the graphics resolution of the DUT via the APB peripheral bus or the AHB advanced high-performance bus.
[0063] Furthermore, the first sending unit 2 specifically uses a driver to convert the second audio and video data at the transaction isolation level into the third audio and video data at the port level of the DUT, drives the third audio and video data, and sends it to the DUT.
[0064] Furthermore, the device for verifying the video interface based on UVM also includes a detection unit, used to detect whether the timing of the second audio and video data conforms to the requirements of the video protocol corresponding to the DUT through an input monitor.
[0065] This application provides an electronic device, including: a memory; a processor; and a computer program; wherein the computer program is stored in the memory and configured to be executed by the processor to implement any of the methods described above.
[0066] This application provides a computer-readable storage medium having a computer program stored thereon; the computer program is executed by a processor to implement the method as described above.
[0067] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of this application can be implemented in various computer languages, such as C, VHDL, Verilog, the object-oriented programming language Java, and the interpreted scripting language JavaScript.
[0068] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0069] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0070] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0071] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0072] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0073] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0074] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.
[0075] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.
Claims
1. A method for verifying a video interface based on UVM, characterized in that, include: The first audio and video data of the transaction layer is converted into the second audio and video data of the transport layer through the converter adapter. Send the second audio and video data to the DUT (Design Under Test) to be verified. Obtaining the first processing result of the DUT specifically includes: obtaining the third processing result of the DUT through the output monitor, and converting the third processing result into the first processing result; Send the first audio and video data to the reference module; Obtain the second processing result of the reference model; The first processing result is compared with the second processing result by the checker to obtain the comparison result; It also includes configuring the adapter, the reference model, the output monitor, and the checker to process data corresponding to the video interface type of the DUT; wherein the adapter, the reference model, the output monitor, and the checker are used to process data corresponding to one of multiple video interface types according to the configuration; Before sending the second audio and video data to the design under test (DUT), the method further includes: using an input monitor to detect whether the timing of the second audio and video data conforms to the requirements of the video protocol corresponding to the DUT.
2. The method according to claim 1, characterized in that, Before sending the second audio and video data to the design under test (DUT), the method further includes: Configure the graphics resolution of the DUT via the APB peripheral bus or the AHB advanced high-performance bus.
3. The method according to claim 1, characterized in that, Sending the second audio and video data to the design under test (DUT) includes: The second audio / video data at the transaction isolation level is transformed into the third audio / video data at the port level of the DUT using a driver, and the third audio / video data is driven and sent to the DUT.
4. A device for verifying a video interface based on UVM, characterized in that, include: The conversion unit is used to convert the first audio and video data of the transaction layer into the second audio and video data of the transport layer through the converter adapter. The first sending unit is used to send the second audio and video data to the design under test (DUT); The first acquisition unit is used to acquire the first processing result of the DUT; specifically, it includes: an acquisition and conversion subunit, used to acquire the third processing result of the DUT through an output monitor, and convert the third processing result into the first processing result; The second sending unit is used to send the first audio and video data to the reference module; The second acquisition unit is used to acquire the second processing result of the reference model; The checking unit is used to compare the first processing result with the second processing result through the checker to obtain the comparison result; The configuration unit is used to configure the adapter, reference model, output monitor, and checker to process data corresponding to the video interface type of the DUT; wherein, the adapter, reference model, output monitor, and checker are used to process data corresponding to one of the multiple video interface types according to the configuration; The detection unit is used to detect whether the timing of the second audio and video data conforms to the requirements of the video protocol corresponding to the DUT through the input monitor.
5. An electronic device, characterized in that, include: Memory; processor; as well as Computer programs; The computer program is stored in the memory and configured to be executed by the processor to implement the method as described in any one of claims 1-3.
6. A computer-readable storage medium, characterized in that, It stores a computer program thereon; the computer program is executed by a processor to implement the method as described in any one of claims 1-3.