Pixel structure and driving method thereof, and display device

Abstract

A pixel structure and a driving method thereof, and a display device. The pixel structure comprises: a pixel circuit and a plurality of light-emitting devices (21-23). ​​The pixel circuit has a plurality of display cycles, wherein the display cycle comprises: a first reset phase (t1), a data writing phase (t2), a second reset phase (t3) and a light-emitting phase (t4). The driving method comprises: in the second reset phase (t3), providing an effective level signal to at least one second reset line (Reset2_1-Reset2_3) so that the corresponding second reset subcircuit (151-153) initializes the signal line (Initialize signal line) it) is written into the first electrode (S3) of the light-emitting device (21-23); in the light-emitting stage (t4), an effective level signal is provided to the first light-emitting control line (EM1), and an effective level signal is provided to at least one second light-emitting control line (EM2_1-EM2_3), so that the first light-emitting control subcircuit (13) turns on the first power line (VDD) and the first electrode of the driving transistor (T3), and at least one second light-emitting control subcircuit (141-143) turns on the second electrode of the driving transistor (T3) and the corresponding light-emitting device (21-23) (S4).

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a pixel structure and a driving method thereof, and a display device. Background Art

[0002] Active Matrix Organic Light Emitting Diode (AMOLED) panels are increasingly being used. The pixel display device of AMOLED is an organic light-emitting diode (OLED). In AMOLED, a driving transistor generates a driving current in a saturated state to drive the light-emitting device to emit light. Summary of the invention

[0003] The embodiments of the present disclosure provide a pixel structure, a driving method thereof, and a display device.

[0004] In a first aspect, an embodiment of the present disclosure provides a driving method of a pixel structure, wherein the pixel structure comprises: a pixel circuit and a plurality of light-emitting devices, wherein the pixel circuit comprises: a driving transistor, a storage capacitor, a write compensation subcircuit, a first reset subcircuit, a first light-emitting control subcircuit, a plurality of second light-emitting control subcircuits and a plurality of second reset subcircuits, wherein two ends of the storage capacitor are respectively connected to a gate of the driving transistor and a first power line; the second light-emitting control subcircuit and the second reset subcircuit are both connected to the plurality of light-emitting devices in a one-to-one correspondence; the plurality of second reset subcircuits are respectively connected to a plurality of second reset lines, and the plurality of second light-emitting control subcircuits are respectively connected to a plurality of second light-emitting control lines;

[0005] The pixel circuit has multiple display cycles, and the display cycle includes: a first reset phase, a data writing phase, a second reset phase and a light emitting phase. The driving method includes:

[0006] In the first reset phase, providing an effective level signal to the first reset line so that the first reset sub-circuit writes the voltage signal on the initialization signal line into the gate of the driving transistor;

[0007] In the data writing phase, providing an effective level signal to the scan line, so that the write compensation subcircuit writes the voltage signal on the data line into the first electrode of the driving transistor and conducts the gate of the driving transistor to the second electrode;

[0008] In the second reset stage, providing an effective level signal to at least one second reset line so that the corresponding second reset subcircuit writes the voltage on the initialization signal line into the first electrode of the light emitting device;

[0009] In the light-emitting stage, a valid level signal is provided to the first light-emitting control line, and a valid level signal is provided to at least one second light-emitting control line, so that the first light-emitting control subcircuit turns on the first power line and the first electrode of the driving transistor, and at least one of the second light-emitting control subcircuits turns on the second electrode of the driving transistor and the corresponding light-emitting device.

[0010] In some embodiments, at least two of the plurality of light-emitting devices connected to the same pixel circuit have different colors;

[0011] The providing a valid level signal to at least one second reset line comprises: providing a valid level signal to each of the second reset lines;

[0012] The providing a valid level signal to at least one second light emitting control line includes: providing valid level signals to a plurality of second light emitting control lines respectively.

[0013] In some embodiments, the multiple light-emitting devices connected to the same pixel circuit have the same color;

[0014] In the light-emitting phase of n consecutive display cycles, effective level signals are provided to n second light-emitting control lines in turn; wherein n is the number of light-emitting devices in the pixel structure.

[0015] In some embodiments, the colors of the multiple light-emitting devices connected to the same pixel circuit are the same; one of the multiple second light-emitting control lines connected to the pixel circuit is a preferred light-emitting control line, and the remaining second light-emitting control lines are alternative light-emitting control lines;

[0016] In the light-emitting stage of the first m display cycles, a valid level signal is provided to the first light-emitting control line and the preferred light-emitting control line; in the light-emitting stage of the display cycle after the mth, a valid level signal is provided to the first light-emitting control line, the preferred light-emitting control line and at least one of the alternative light-emitting control lines; wherein m is determined according to the brightness attenuation curve of the light-emitting device.

[0017] In some embodiments, the first reset subcircuit includes: a first reset transistor, a gate of the first reset transistor is connected to the first reset line, a first electrode of the first reset transistor is connected to the gate of the driving transistor, and a second electrode of the first reset transistor is connected to the initialization signal line;

[0018] In the first reset stage, providing an effective level signal to the first reset line so that the first reset sub-circuit writes the voltage signal on the initialization signal line into the gate of the driving transistor specifically includes:

[0019] In the first reset stage, an effective level signal is provided to the first reset line to conduct the first electrode and the second electrode of the first reset line.

[0020] In some embodiments, the second reset subcircuit comprises: a second reset transistor, a gate of the second reset transistor is connected to the second reset line, a first electrode of the second reset transistor is connected to the light emitting device, and a second electrode of the second reset transistor is connected to the initialization signal line;

[0021] In the second reset stage, providing an effective level signal to at least one second reset line so that the corresponding second reset subcircuit writes the voltage on the initialization signal line into the first electrode of the light-emitting device specifically includes:

[0022] In the second reset phase, an effective level signal is provided to at least one second reset line to turn on the first electrode and the second electrode of the corresponding second reset transistor.

[0023] In some embodiments, the first light-emitting control subcircuit includes: a first light-emitting control transistor, the gate of the first light-emitting control transistor is connected to the first light-emitting control line, the first electrode of the first light-emitting control transistor is connected to the first power line, and the second electrode of the first light-emitting control transistor is connected to the first electrode of the driving transistor; the second light-emitting control subcircuit includes: a second light-emitting control transistor, the gate of the second light-emitting control transistor is connected to the second light-emitting control line, the first electrode of the second light-emitting control transistor is connected to the second electrode of the driving transistor, and the second electrode of the second light-emitting control transistor is connected to the light-emitting device;

[0024] In the light-emitting stage, providing an effective level signal to the first light-emitting control line and providing an effective level signal to at least one second light-emitting control line, so that the first light-emitting control subcircuit conducts the first power line with the first electrode of the driving transistor, and at least one second light-emitting control subcircuit conducts the second electrode of the driving transistor with the corresponding light-emitting device, specifically including:

[0025] In the light-emitting stage, a valid level signal is provided to the first light-emitting control line, and a valid level signal is provided to at least one second light-emitting control line, so that the first and second electrodes of the first light-emitting control transistor are turned on, and the first and second electrodes of at least one second light-emitting control transistor are turned on.

[0026] In a second aspect, an embodiment of the present disclosure further provides a pixel structure, including: a pixel circuit and a plurality of light-emitting devices, wherein the pixel circuit includes: a driving transistor, a storage capacitor, a write compensation subcircuit, a first reset subcircuit, a first light-emitting control subcircuit, a plurality of second light-emitting control subcircuits and a plurality of second reset subcircuits, wherein the two ends of the storage capacitor are respectively connected to the gate of the driving transistor and the first power line; the second light-emitting control subcircuit and the second reset subcircuit are both connected to the plurality of light-emitting devices in a one-to-one correspondence;

[0027] The write compensation subcircuit is configured to write the voltage signal on the data line into the first electrode of the driving transistor in response to the control of the signal of the scanning line, and connect the gate of the driving transistor to the second electrode;

[0028] The first reset subcircuit is configured to write a voltage signal on the initialization signal line into the gate of the driving transistor in response to control of a signal on the first reset line;

[0029] The second reset subcircuit is configured to write the voltage on the initialization signal line into the first electrode of the light-emitting device connected to the second reset subcircuit in response to the control of the signal of the corresponding second reset line;

[0030] The first light emitting control subcircuit is configured to connect the first power line to the first electrode of the driving transistor in response to the control of the signal of the first light emitting control line;

[0031] The second light emitting control sub-circuit is configured to turn on the second electrode of the driving transistor and the light emitting device connected to the second light emitting control sub-circuit in response to the control of a signal of a corresponding second light emitting control line.

[0032] In some embodiments, the second reset subcircuit comprises: a second reset transistor, a gate of the second reset transistor is connected to the second reset line, a first electrode of the second reset transistor is connected to the light emitting device, and a second electrode of the second reset transistor is connected to the initialization signal line;

[0033] The second light-emitting control subcircuit includes: a second light-emitting control transistor, a gate of the second light-emitting control transistor is connected to the second light-emitting control line, a first electrode of the second light-emitting control transistor is connected to the second electrode of the driving transistor, and a second electrode of the second light-emitting control transistor is connected to the light-emitting device.

[0034] In some embodiments, at least two of the plurality of light-emitting devices in the pixel structure emit light of different colors; or,

[0035] The light-emitting colors of the multiple light-emitting devices in the pixel structure are the same.

[0036] In some embodiments, the number of the light-emitting devices in the pixel structure is two, and the width-to-length ratio of the driving transistor is between 1 / 8 and 1 / 12; or,

[0037] The number of the light-emitting devices in the pixel structure is three, and the width-to-length ratio of the driving transistor is between 1 / 3 and 1 / 5.

[0038] In a third aspect, an embodiment of the present disclosure further provides a display device, comprising a display substrate, a first driving circuit and a second driving circuit, wherein the display substrate comprises a plurality of pixels, and at least one of the pixels is provided with a pixel structure according to any one of claims 8 to 11;

[0039] The first driving circuit is configured to provide an effective level signal to a first reset line connected to the pixel circuit in a first reset phase of the pixel circuit, so that the first reset subcircuit writes the voltage signal on the initialization signal line into the gate of the driving transistor; provide an effective level signal to a scan line connected to the pixel circuit in a data writing phase of the pixel circuit, so that the data writing subcircuit writes the voltage signal on the data line into the first electrode of the driving transistor; and provide an effective level signal to at least one second reset line connected to the pixel circuit in a second reset phase of the pixel circuit, so that the corresponding second reset subcircuit writes the voltage on the initialization signal line into the first electrode of the light-emitting device;

[0040] The second driving circuit is configured to provide a valid level signal to the first light-emitting control line connected to the pixel circuit and provide a valid level signal to at least one second light-emitting control line connected to the pixel circuit during the light-emitting stage of the pixel circuit, so that the first light-emitting control subcircuit turns on the first power line and the first electrode of the driving transistor, and at least one of the second light-emitting control subcircuits turns on the second electrode of the driving transistor and the corresponding light-emitting device.

[0041] In some embodiments, at least two of the plurality of light-emitting devices connected to the same pixel circuit have different colors;

[0042] The first driving circuit is specifically configured to provide an effective level signal to the first reset line in the first reset phase; provide an effective level signal to the scan line in the data writing phase; and provide an effective level signal to each second reset line in the second reset phase of the pixel circuit, so that the corresponding second reset sub-circuit writes the voltage on the initialization signal line into the first electrode of the light-emitting device;

[0043] The second driving circuit is specifically configured to provide a valid level signal to the first light-emitting control line and provide valid level signals to multiple second light-emitting control lines respectively during the light-emitting stage.

[0044] In some embodiments, the multiple light-emitting devices connected to the same pixel circuit have the same color;

[0045] The second driving circuit is specifically configured to provide a valid level signal to the first light-emitting control line connected to the pixel circuit during the light-emitting phase of each display cycle; and to provide a valid level signal to n second light-emitting control lines connected to the pixel circuit in turn during the light-emitting phase in n consecutive display cycles; wherein n is the number of light-emitting devices in the pixel structure.

[0046] In some embodiments, the colors of the multiple light-emitting devices connected to the same pixel circuit are the same; one of the multiple second light-emitting control lines connected to the pixel structure is a preferred light-emitting control line, and the remaining second light-emitting control lines are alternative light-emitting control lines;

[0047] The second driving circuit is specifically configured to provide valid level signals to the first light-emitting control line and the preferred light-emitting control line during the light-emitting phase of the first m display cycles; and to provide valid level signals to the first light-emitting control line, the preferred light-emitting control line and at least one of the alternative light-emitting control lines during the light-emitting phase of the display cycle after the mth one; wherein m is determined according to the brightness attenuation curves of the multiple light-emitting devices connected to the pixel circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0049] Figure 1A is a schematic diagram of an exemplary display substrate.

[0050] Figure 1B A schematic diagram of a pixel structure provided in an embodiment of the present disclosure.

[0051] Figure 1C for Figure 1B Schematic diagram of the driving method of the pixel structure shown.

[0052] Figure 2 A schematic diagram of another pixel structure provided in an embodiment of the present disclosure.

[0053] Figure 3 A schematic diagram of another pixel structure provided in an embodiment of the present disclosure.

[0054] Figure 4 A working timing diagram of the pixel structure provided in an embodiment of the present disclosure.

[0055] Figure 5 Another working timing diagram of the pixel structure provided in the embodiment of the present disclosure.

[0056] Figure 6 This is another working timing diagram of the pixel structure provided in the embodiment of the present disclosure.

[0057] Figure 7 Schematic diagram of brightness attenuation curves of light-emitting devices of different colors.

[0058] Figure 8 It is a schematic diagram of the overall structure of the display device provided in the embodiment of the present disclosure. DETAILED DESCRIPTION

[0059] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0060] In the embodiments of the present disclosure, the light emitting device is an organic light emitting diode (OLED) as an example for description. The first electrode of the light emitting device is an anode, and the second electrode is a cathode.

[0061] In addition, each transistor involved in the embodiments of the present disclosure can be independently selected from one of a polysilicon thin film transistor, an amorphous silicon thin film transistor, an oxide thin film transistor, and an organic thin film transistor. The "first electrode" involved in the present disclosure specifically refers to the source electrode of the transistor, and the corresponding "second electrode" specifically refers to the drain electrode of the transistor. Of course, those skilled in the art should know that the "first electrode" and the "second electrode" can be interchanged.

[0062] In addition, transistors can be divided into N-type transistors and P-type transistors, and each transistor in the present disclosure can be independently selected from an N-type transistor or a P-type transistor; in the following embodiments, each transistor in the display driving circuit is a P-type transistor as an example for illustrative description, and in this case, the transistors in the display driving circuit can be simultaneously manufactured using the same manufacturing process. Accordingly, the effective level signal is a low level signal, and the invalid level signal is a high level signal.

[0063] Figure 1A is a schematic diagram of an exemplary display substrate, such as Figure 1AAs shown, the display area of ​​the display substrate includes a plurality of pixels P arranged in an array, each of the plurality of pixels P includes a pixel structure, and the pixel structure includes a pixel circuit and a light-emitting device. A driving circuit is also arranged around the display area, and the driving circuit provides the pixel circuit with signals such as a scan signal and a reset signal, and the pixel circuit provides a driving current to the light-emitting device according to the received signal.

[0064] Figure 1B A schematic diagram of a pixel structure provided by an embodiment of the present disclosure is shown in FIG. Figure 1B As shown, the pixel structure includes: a pixel circuit and a plurality of light-emitting devices 21-22, the pixel circuit includes: a driving transistor T3, a storage capacitor Cs, a write compensation subcircuit 11, a first reset subcircuit 12, a first light-emitting control subcircuit 13, a plurality of second light-emitting control subcircuits 141-142 and a plurality of second reset subcircuits 151-152, the two ends of the storage capacitor Cs are respectively connected to the gate of the driving transistor T3 and the first power line VDD; the second light-emitting control subcircuits 141-142 and the second reset subcircuits 151-152 are both connected to the light-emitting devices 21-22 in a one-to-one correspondence. For example, the second light-emitting control subcircuits 141-142 and the second reset subcircuits 151-152 are both connected to the first electrodes of the corresponding light-emitting devices 21-22, and the second electrodes of the light-emitting devices 21-22 are connected to the second power line VSS. The plurality of second reset subcircuits 151-152 are respectively connected to a plurality of second reset lines Reset2_1-Reset2_2. The plurality of second light emitting control sub-circuits 141 ˜ 142 are respectively connected to the plurality of second light emitting control lines EM2_1 ˜ EM2_2 .

[0065] The write compensation sub-circuit 11 is configured to connect the gate of the driving transistor T3 to the second electrode in response to the control of the signal of the scan line Scan.

[0066] The first reset sub-circuit 12 is configured to write the voltage signal on the initialization signal line Init into the gate of the driving transistor T3 in response to the control of the signal of the first reset line Reset1 , thereby resetting the gate potential of the driving transistor T3 .

[0067] The second reset subcircuit 151 / 152 is configured to write the voltage on the initialization signal line Init to the first electrode of the light-emitting device 21 / 22 connected to the second reset subcircuit 151 / 152 in response to the control of the signal of the corresponding second reset line Reset2_1 / Reset2_2. It should be understood that the second reset lines Reset2_1 and Reset2_2 connected to different second reset subcircuits 151 and 152 are independent of each other.

[0068] The first light emission control sub-circuit 13 is configured to connect the first power line VDD to the first electrode of the driving transistor T3 in response to the control of the signal of the first light emission control line EM1 .

[0069] The second light emitting control subcircuit 141 / 142 is configured to, in response to the control of the signal of the corresponding second light emitting control line EM2_1 / EM2_2, turn on the second electrode of the driving transistor T3 and the light emitting device 21 / 22 connected to the second light emitting control subcircuit 141 / 142. It should be understood that the second light emitting control lines EM2_1 and EM2_2 connected to different second light emitting control subcircuits 141 and 142 are independent of each other.

[0070] In the embodiment of the present disclosure, the pixel structure has multiple display cycles, each display cycle is the time period for the display substrate to display a frame of image. Each display cycle of the pixel structure may include a first reset phase, a data writing phase, a second reset phase, and a light emitting phase. Figure 1C for Figure 1B Schematic diagram of the driving method of the pixel structure shown in FIG. Figure 1C As shown, the driving method includes:

[0071] In the first reset stage, a valid level signal is provided to the first reset line Reset1 so that the first reset sub-circuit 12 writes the voltage signal on the initialization signal line Init into the gate of the driving transistor T3, thereby resetting the gate potential of the driving transistor T3.

[0072] In the data writing stage, an effective level signal is provided to the scan line Scan so that the write compensation sub-circuit 11 writes the voltage signal on the data line Data into the first electrode of the driving transistor T3, and turns on the gate and the second electrode of the driving transistor T3, so that the voltage stored in the storage capacitor Cs is related to the voltage signal on the data line Data and the threshold voltage of the driving transistor T3.

[0073] In the second reset stage, a valid level signal is provided to at least one second reset line Reset2_1 / Reset2_2, so that the corresponding second reset subcircuit 151 / 152 writes the voltage signal on the initialization signal line Init into the first electrode of the light emitting device 21 / 22, thereby resetting the potential of the first electrode of the light emitting device 21 / 22.

[0074] In the light-emitting stage, a valid level signal is provided to the first light-emitting control line EM1, and a valid level signal is provided to at least one second light-emitting control line EM2_1~EM2_2, so that the first light-emitting control subcircuit 13 turns on the first power line VDD and the first electrode of the driving transistor T3, and at least one second light-emitting control subcircuit 141 / 142 turns on the second electrode of the driving transistor T3 and the corresponding light-emitting device 21 / 22, so that the driving transistor T3 provides a driving current for at least one light-emitting device 21 / 22.

[0075] In some examples, at least two of the light-emitting devices connected to the same pixel circuit have different colors, for example, the light-emitting devices 21-22 are red light-emitting devices and green light-emitting devices respectively; for another example, the same pixel circuit is simultaneously connected to a red light-emitting device, a green light-emitting device and a blue light-emitting device; for another example, the same pixel circuit is simultaneously connected to a red light-emitting device, two green light-emitting devices, and a blue light-emitting device. In this case, in the second reset stage, an effective level signal is provided to each second reset line Reset2_1-Reset2_2, so that each second reset sub-circuit 151 / 152 resets the potential of the first electrode of the corresponding light-emitting device 21 / 22. In the light-emitting stage, an effective level signal is provided to the first light-emitting control line EM1, and effective level signals are provided to the plurality of second light-emitting control lines EM2_1 to EM2_2, respectively, so that the driving transistor T3 provides a driving current for the plurality of light-emitting devices 21 to 22; wherein, the magnitude of the driving current that the driving transistor T3 can output is related to the voltage stored in the storage capacitor Cs, that is, related to the voltage signal on the data line Data; and when the on-time of the second light-emitting control subcircuit 141 / 142 is long enough, the driving current output by the driving transistor T3 can be fully output to each light-emitting device 21 / 22, and when the on-time of the second light-emitting control subcircuit 141 / 142 is insufficient, the magnitude of the current actually flowing through the light-emitting device 21 / 22 is related to the on-time of the second light-emitting control subcircuit 141 / 142, therefore, by controlling the time when the effective level signal is loaded on each second light-emitting control line EM2_1 / EM2_2, the magnitude of the current flowing through the light-emitting device 21 / 22 can be controlled, thereby controlling the light-emitting brightness of the light-emitting device 21 / 22. At this time, the same pixel circuit can drive multiple light-emitting devices 21-22 to emit light at the same time, which is conducive to achieving high resolution of the display device.

[0076] Of course, in each display cycle of the pixel circuit, only one light emitting device 21 / 22 may be driven to emit light. For example, the colors of the multiple light emitting devices 21-22 in each pixel structure are the same. In the light emitting phase of n consecutive display cycles (i.e., when displaying n consecutive frames of images), effective level signals are provided to n second light emitting control lines in turn, thereby driving the multiple light emitting devices 21-22 to emit light in turn. In this way, when a certain area of ​​the display device displays the same image content for a long time, the light emitting devices 21-22 in the pixel structure in the area can be controlled to emit light in turn, so as to prevent the display burn-in problem caused by the light emitting device 21 / 22 in a certain area emitting light for a long time.

[0077] In addition, since the attenuation curves of light-emitting devices of different colors are different, after the display device has been used for a period of time, the attenuation degrees of light-emitting devices of different colors may be different, which may easily cause color deviation. In the pixel structure of the embodiment of the present disclosure, the pixel circuit can drive multiple light-emitting devices 21-22. In this way, when the light-emitting colors of multiple light-emitting devices 21-22 are the same and are all colors with the fastest attenuation speed, before the cumulative working time of the display device reaches a predetermined time, in each light-emitting stage, the pixel circuit can be used to drive one of the light-emitting devices 21 / 22 to emit light; after the cumulative working time of the display device reaches a predetermined time, in each light-emitting stage of the pixel structure, the pixel circuit can be used to drive at least two light-emitting devices 21-22 to emit light at the same time, thereby compensating for the brightness attenuation of the light-emitting devices 21 / 22.

[0078] Figure 2 is a schematic diagram of another pixel structure provided in an embodiment of the present disclosure, wherein: Figure 2 The pixel structure shown is based on Figure 1B A specific implementation of the pixel structure shown in FIG. Figure 2 As shown, in some embodiments, the write compensation subcircuit 11 includes: a data write transistor T4 and a compensation transistor T1, the gate of the data write transistor T4 is connected to the scan line Scan, the first electrode of the data write transistor T4 is connected to the data line Data, and the second electrode of the data write transistor T4 is connected to the first electrode of the driving transistor T3. The gate of the compensation transistor T1 is connected to the scan line Scan, the first electrode of the compensation transistor T1 is connected to the second electrode of the driving transistor T3, and the second electrode of the compensation transistor T1 is connected to the gate of the driving transistor T3.

[0079] In some embodiments, the first reset sub-circuit 12 includes: a first reset transistor T2, the gate of the first reset transistor T2 is connected to the first reset line Reset1, the first electrode of the first reset transistor T2 is connected to the gate of the driving transistor T3, and the second electrode of the first reset transistor T2 is connected to the initialization signal line Init. In the first reset stage, the first reset sub-circuit 12 writes the voltage signal on the initialization signal line Init into the gate of the driving transistor T3, which specifically means that the first electrode and the second electrode of the first reset transistor T2 are turned on, so that the gate of the driving transistor T3 is turned on to the initialization signal line Init.

[0080] In some embodiments, the second reset subcircuit 151 / 152 includes: a second reset transistor T7_1 / T7_2, the gate of the second reset transistor T7_1 / T7_2 is connected to the second reset line Reset2_1 / Reset2_2, the first electrode of the second reset transistor T7_1 / T7_2 is connected to the first electrode of the light emitting device 21 / 22, and the second electrode of the second reset transistor T7_1 / T7_2 is connected to the initialization signal line Init. In the second reset stage, the second reset subcircuit 151 / 152 writes the voltage signal on the initialization signal line Init to the first electrode of the light emitting device 21 / 22, specifically, the first electrode and the second electrode of the second reset transistor T7_1 / T7_2 are turned on, so that the first electrode of the light emitting device 21 / 22 is turned on to the initialization signal line Init.

[0081] In some embodiments, the first light-emitting control subcircuit 13 includes: a first light-emitting control transistor T5, a gate of the first light-emitting control transistor T5 connected to the first light-emitting control line EM1, a first electrode of the first light-emitting control transistor T5 connected to the first power line VDD, and a second electrode of the first light-emitting control transistor T5 connected to the first electrode of the driving transistor T3. In the light-emitting stage, the first light-emitting control subcircuit 13 conducts the first power line VDD with the first electrode of the driving transistor T3, specifically, the first electrode and the second electrode of the first light-emitting control transistor T5 are conducted, so that the first power line VDD is conducted with the first electrode of the driving transistor T3.

[0082] In some embodiments, the second light-emitting control subcircuit 141 / 142 includes: a second light-emitting control transistor T6_1 / T6_2, a gate of the second light-emitting control transistor T6_1 / T6_2 connected to a second light-emitting control line EM2_1 / EM2_2, a first electrode of the second light-emitting control transistor T6_1 / T6_2 connected to a second electrode of the driving transistor T3, and a second electrode of the second light-emitting control transistor T6_1 / T6_2 connected to a light-emitting device 21 / 22. In the light-emitting stage, the second light-emitting control subcircuit 141 / 142 turns on the second electrode of the driving transistor T3 and the corresponding light-emitting device 21 / 22, specifically, the first electrode of the second light-emitting control transistor T6_1 / T6_2 and the second electrode are turned on, thereby turning on the second electrode of the driving transistor T3 and the corresponding light-emitting device 21 / 22.

[0083] In some embodiments, at least two second reset transistors T7_1-T7_2 form a dual-gate structure, thereby reducing the space occupied by the pixel structure. Figure 2 In the case where the pixel structure includes two second reset transistors T7_1~T7_2, the two second reset transistors T7_1~T7_2 constitute a double-gate transistor, which has two gates, two first electrodes and one second electrode. The two gates of the double-gate transistor serve as the gates of the two second reset transistors T7_1~T7_2 respectively, the two first electrodes of the double-gate transistor serve as the first electrodes of the two second reset transistors T7_1~T7_2 respectively, and the second electrode of the double-gate transistor serves as the second electrode of the two second reset transistors T7_1 / T7_2 at the same time.

[0084] Figure 3 A schematic diagram of another pixel structure provided in an embodiment of the present disclosure, Figure 3 and Figure 2 The pixel structures shown differ only in that: Figure 2 In the pixel structure, the pixel structure includes two light emitting devices 21-22, two second resetting sub-circuits 151-152, and two second light emitting control sub-circuits 141-142; and Figure 3 In the pixel structure, three light-emitting devices 21-23, three second reset subcircuits 151-153, and three second light-emitting control subcircuits 141-143 are included. It should be noted that the light-emitting devices 21 / 22 / 23, the second reset subcircuits 151 / 152 / 153, and the second light-emitting control subcircuits 141 / 142 / 143 may also be set to other numbers, which are not specifically limited here.

[0085] for Figure 3 In the pixel structure shown in , two of the second reset transistors T7_1 ˜ T7_2 may constitute dual-gate transistors, while the other second reset transistor T7_3 is a single transistor.

[0086] Below Figure 3 Taking the pixel structure shown in as an example, the driving process of the pixel structure in the embodiment of the present disclosure is introduced.

[0087] In some embodiments, the light emitting colors of the plurality of light emitting devices 21 to 23 in the pixel structure may be different from each other. For example, Figure 3 The light emitting devices 21 to 23 emit red, green and blue light respectively. In this case, the working sequence of the pixel structure can be as follows: Figure 4 As shown in , the driving process of the pixel structure includes: a first resetting stage t1, a data writing stage t2, a second resetting stage t3, and a light emitting stage t4.

[0088] In the first reset stage t1, a valid level signal is provided to the first reset line Reset1, and an invalid level signal is provided to the scan line Scan, the second reset line Reset2_1 / Reset2_2, the first light-emitting control line EM1 and the second light-emitting control line EM2_1 / EM2_2. At this time, the first reset transistor T2 is turned on, and the voltage signal on the initial voltage line Init is transmitted to the gate of the driving transistor T3, thereby resetting the gate potential of the driving transistor T3. The data writing transistor T4, the compensation transistor T1, the first light-emitting control transistor T5, the second light-emitting control transistors T6_1~T6_3, and the second reset transistors T7_1~T7_3 are all turned off.

[0089] In the data writing phase t2, a valid level signal is provided to the scan line Scan, and an invalid level signal is provided to the first reset line Reset1, the second reset lines Reset2_1~Reset2_3, the first light-emitting control line EM1, and the second light-emitting control lines EM2_1~EM2_3. At this time, the data writing transistor T4 is turned on, and the voltage signal on the data line Data is written to the first electrode of the driving transistor T3; at the same time, the compensation transistor T1 is turned on, so that the gate of the driving transistor T3 is short-circuited with the second electrode to form a diode structure. At this time, the voltage signal on the data line Data passes through the driving transistor T3 and the compensation transistor T1 and flows to the gate of the driving transistor T3. The gate potential of the driving transistor T3 reaches Vdata+Vth, where Vth is the threshold voltage of the driving transistor T3, and Vdata is the voltage on the data line Data.

[0090] In the second reset stage t3, valid level signals are provided to the second reset lines Reset2_1 to Reset2_3. Invalid level signals are provided to the first reset line Reset1, the scan line Scan, the first light-emitting control line EM1, and the second light-emitting control lines EM2_1 to EM2_3. At this time, the plurality of second light-emitting control transistors T6_1 to T6_3 are all turned on, so that the voltage signal on the initial signal line Init is transmitted to the first electrode of each light-emitting device 21 to 23, so as to reset the potential of the first electrode of each light-emitting device 21 to 23.

[0091] In the light-emitting stage t4, an invalid level signal is provided to the first reset line Reset1, the second reset lines Reset2_1~Reset2_3, and the scan line Scan, an effective level signal is provided to the first light-emitting control line EM1, and effective level signals are provided to the plurality of second light-emitting control lines EM2_1~EM2_3. It should be noted that the effective level signals provided to the plurality of second light-emitting control lines EM2_1~EM2_3 are independent of each other. At this time, the first light-emitting control transistor T5 is turned on, and each second light-emitting control transistor T6_1 / T6_2 / T6_3 is turned on when the corresponding second light-emitting control line EM2_1 / EM2_2 / EM2_3 is loaded with an effective level, so that the plurality of light-emitting devices 21~23 all emit light. Specifically, under the voltage maintenance effect of the storage capacitor Cs, the gate potential of the driving transistor T3 is maintained at Vdata+Vth. When any of the second light emitting control transistors T6_1 / T6_2 / T6_3 is turned on, the driving transistor T3 outputs a driving current. When the on time of the second light emitting control transistors T6_1 / T6_2 / T6_3 reaches a certain time, the driving current I flowing through the light emitting device 21 / 22 / 23 OLED The following saturation current formula is satisfied:

[0092] I OLED =K(Vgs-Vth) 2 =K(Vdata+Vth-ELVDD-Vth) 2

[0093] =K(Vdata-ELVDD) 2

[0094] Wherein, K is a coefficient related to the characteristics of the driving transistor T3 itself, Vgs is the gate-source voltage of the driving transistor T3, that is, the voltage between the gate and the first electrode of the driving transistor T3, and ELVDD is the voltage provided by the first power line VDD.

[0095] When the conduction time of the second light emitting control transistor T6_1 / T6_2 / T6_3 is less than a certain time, the current flowing through the light emitting device 21 / 22 / 23 is less than the above IOLED , and with I OLED It is related to the conduction time of the second light emitting control transistor T6_1 / T6_2. Therefore, by controlling the time when the second light emitting control line EM2_1 / EM2_2 / EM2_3 is loaded with the effective level signal and the above Vdata, the current flowing through the light emitting device 21 / 22 / 23 can be controlled. That is to say, in the light emitting stage t4, the effective level signal is not continuously provided to each second light emitting control line EM2_1 / EM2_2 / EM2_3.

[0096] In some other embodiments, the light emitting colors of the plurality of light emitting devices 21 to 23 in the pixel structure may be the same. In this case, the working sequence of the pixel structure may be as follows: Figure 5 The working process of the pixel structure also includes: a first resetting stage t1, a data writing stage t2, a second charging stage t3, and a light emitting stage t4.

[0097] In the first reset stage t1, a valid level signal is provided to the first reset line Reset1, and an invalid level signal is provided to the scan line Scan, the second reset lines Reset2_1~Reset2_3, the first light-emitting control line EM1 and the second light-emitting control line EM2_1~EM2_3. At this time, the first reset transistor T2 is turned on, and the voltage signal on the initial signal line Init is transmitted to the gate of the driving transistor T3, thereby resetting the gate potential of the driving transistor T3. The data writing transistor T4, the compensation transistor T1, the first light-emitting control transistor T5, the second light-emitting control transistors T6_1~T6_3, and the second reset transistors T7_1~T7_3 are all turned off.

[0098] In the data writing phase t2, a valid level signal is provided to the scan line Scan, and an invalid level signal is provided to the first reset line Reset1, the second reset lines Reset2_1~Reset2_3, the first light-emitting control line EM1, and the second light-emitting control lines EM2_1~EM2_3. At this time, the data writing transistor T4 is turned on, and the voltage signal on the data line Data is written to the first electrode of the driving transistor T3; at the same time, the compensation transistor T1 is turned on, so that the gate of the driving transistor T3 is short-circuited with the second electrode to form a diode structure. At this time, the voltage signal on the data line Data passes through the driving transistor T3 and the compensation transistor T1 and flows to the gate of the driving transistor T3. The gate potential of the driving transistor T3 reaches Vdata+Vth, where Vth is the threshold voltage of the driving transistor T3 and Vdata is the voltage on the data line Data.

[0099] In the second reset stage t3, a valid level signal is provided to at least one second reset line Reset2_1, and an invalid level signal is provided to the first reset line Reset1, the scan line Scan, the first light emitting control line EM1, and the second light emitting control lines EM2_1 to EM2_3. At this time, at least the second reset transistor T7_1 is turned on, so that the voltage signal on the initial signal line Init is transmitted to at least the first electrode of the light emitting device 21, so as to reset the potential of the first electrode of at least one of the light emitting devices 21.

[0100] In the light-emitting stage t4, an invalid level signal is provided to the first reset line Reset1, the second reset lines Reset2_1~Reset2_3, and the scan line Scan, and a valid level signal is continuously provided to the first light-emitting control line EM1 and one of the second light-emitting control lines EM2_1. At this time, the first light-emitting control transistor T5 is turned on, and one of the second light-emitting control transistors T6_1 is turned on. Under the voltage maintenance effect of the storage capacitor Cs, the gate potential of the driving transistor T3 is maintained at Vdata+Vth. The current output by the driving transistor T3 to the corresponding light-emitting device 21 reaches the above-mentioned driving current I OLED .

[0101] In each display cycle, the working process of the pixel structure includes the above four stages, and in the light-emitting stages of three consecutive (i-th to i+2-th) display cycles, effective level signals can be provided to the three second light-emitting control lines EM2_1 to EM2_3 in turn, so that the three light-emitting devices 21 to 23 in the pixel structure work in turn in the three display cycles to prevent a single light-emitting device 21 / 22 / 23 from working for a long time and causing burn-in on the display screen. The display cycle can be a display stage of one frame of display screen, and of course, it can also be a display stage of two frames or other number of frames of display screen.

[0102] It should be noted that in Figure 5 In the second reset phase t3 of the display cycle, an effective level signal is provided to each second reset line Reset2_1 to Reset2_3, but in fact, it is not necessary to provide an effective level signal to all second reset lines Reset2_1 to Reset2_3. For example, if an effective level signal is provided to the second light-emitting control line EM2_1 to control the light-emitting device 21 to emit light in the light-emitting phase of the i-th display cycle, then in the reset phase t3 of the i-th display cycle, at least the effective level signal is provided to the second reset line Reset2_1 corresponding to the light-emitting device 21. If in the light-emitting phase t4 of the i+1-th display cycle, an effective level signal is provided to the second light-emitting control line EM2_2 to control the light-emitting device 22 to emit light, then in the reset phase t3 of the i+1-th display cycle, at least the effective level signal is provided to the second reset line Reset2_2 corresponding to the light-emitting device 22.

[0103] It should also be noted that Figure 5 The operating timing shown in Figure 3 The pixel structure in is used as an example for explanation. The number of light-emitting devices in the pixel structure can also be other numbers. It is only necessary to provide effective level signals to n second light-emitting control lines in turn during the light-emitting phase in n consecutive display cycles, so that the n light-emitting devices can emit light in turn in n display cycles. Wherein, n is the number of light-emitting devices in the pixel structure.

[0104] For the case where the light-emitting colors of the multiple light-emitting devices 21 to 23 in the pixel structure are the same, the working sequence of the pixel structure can also be as follows: Figure 6 as shown in .

[0105] and Figure 5 The working sequence is the same as in the first reset phase t1, a valid level signal is provided to the first reset line Reset1, an invalid level signal is provided to the scan line Scan, the second reset lines Reset2_1~Reset2_3, the first light control line EM1 and the second light control line EM2_1~EM2_3, the first reset transistor T2 is turned on, and the gate potential of the driving transistor T3 is reset. In the data writing phase t2, a valid level signal is provided to the scan line Scan, and an invalid level signal is provided to the first reset line Reset1, the second reset lines Reset2_1~Reset2_3, the first light control transistor T5 and the second light control transistor T6_1~T6_3. The gate potential of the driving transistor T3 reaches Vdata+Vth. In the second reset stage t3, a valid level signal is provided to at least one second reset line Reset2_1 / Reset2_2 / Reset2_3, and the voltage signal on the initial signal line Init is transmitted to the first electrode of the corresponding light emitting device 21 / 22 / 23 to reset the potential of the first electrode of at least one light emitting device 21 / 22 / 23.

[0106] Will Figure 3 One of the second light emitting control lines EM2_1 connected to the pixel structure in FIG. 1 is used as a preferred light emitting control line, and the remaining second light emitting control lines EM2_2 to EM2_3 are used as candidate light emitting control lines. Figure 6 and Figure 5 The working process is different in that Figure 6As shown, in the light-emitting stage t4 of the first m display cycles, invalid level signals are provided to the first reset line Reset1, the second reset lines Reset2_1~Reset2_3, and the scan line Scan, and valid level signals are provided to the first light-emitting control line EM1 and the second light-emitting control line EM2_1 (i.e., the preferred light-emitting control line). At this time, the first light-emitting control transistor T5 is turned on, and the second light-emitting control transistor T6_1 is turned on, thereby providing a driving current for the light-emitting device 21. Since the brightness of the light-emitting device 21 is attenuated after m display cycles, in the light-emitting stage t4 of the display cycle (m+1) and thereafter, other light-emitting devices 22 and / or 23 can be controlled to emit light to compensate for the brightness attenuation of the light-emitting device 21. Specifically, in the light-emitting phase t4 of the display cycle (m+1) and thereafter, an invalid level signal is provided to the first reset line Reset1, the second reset lines Reset2_1 to Reset2_3, and the scan line Scan, and an effective level signal is provided to the first light-emitting control line EM1 and at least one alternative light-emitting control line (i.e., at least one of EM2_2 and EM2_3). At this time, the first light-emitting control transistor T5 is turned on, the second light-emitting control transistor T6_1 is turned on, and at least one of the second light-emitting control transistors T6_2 and / T6_3 is turned on, thereby controlling at least one of the light-emitting devices 22 and 23 and the light-emitting device 21 to emit light. The duration of providing the effective level signal to the alternative light-emitting control line can be determined according to the brightness required by the light-emitting device 22 / 23.

[0107] Among them, for any display cycle, if it is necessary to control one or more light-emitting devices to emit light in the light-emitting stage t4, then in the second reset stage t3, a valid level signal is provided to the second reset line corresponding to the light-emitting device to be emitted to reset the potential of the first electrode of the light-emitting device to be emitted.

[0108] The first m display cycles may be the first m display cycles of the cumulative operation of the pixel structure, that is, the first m display cycles of the cumulative display of the display device, and the value of m may be determined according to the brightness attenuation curve of the light-emitting device. For example, in the display device, a sub-pixel of a first color (e.g., blue), a sub-pixel of a second color (e.g., red), and a sub-pixel of a third color (e.g., green) may be provided. Figure 7 Schematic diagram of brightness attenuation curve of light emitting devices of different colors, such as Figure 7As shown, the decay rate of the light-emitting device of the first color is greater than the decay rate of the light-emitting device of the second color and the decay rate of the light-emitting device of the second color. In this case, the above pixel structure can be set in the sub-pixel of the first color. If the difference between the brightness decay degree of the light-emitting device of the first color and the brightness decay degree of other colors reaches a preset value, the cumulative working time of the light-emitting device of the first color is time1, then m is the number of display cycles corresponding to the cumulative display time of the display device is time1. Of course, the above pixel structure can also be set in both the sub-pixels of the first color and the second color. For example, Figure 7 As shown, when the driving time reaches 500 hours (hr), the luminous brightness of the light-emitting devices of the first color and the second color will obviously decay. In this case, after the cumulative display time of the display device reaches 500 hours, during the luminous phase of the pixel circuit in the first color sub-pixel, at least two light-emitting devices of the first color in the pixel circuit are controlled to emit light simultaneously; during the luminous phase of the pixel circuit in the second color sub-pixel, at least two light-emitting devices of the second color in the pixel circuit are controlled to emit light simultaneously.

[0109] In some embodiments, the driving current value that the driving transistor T3 can output can be increased by adjusting the width-to-length ratio of the driving transistor T3, so as to meet the requirements of two or more light-emitting devices emitting light at the same time. In some examples, the number of light-emitting devices connected to the same pixel circuit is two, and the width-to-length ratio of the driving transistor T3 is between 1 / 8 and 1 / 12, for example, when it is 3 / 30, the current value that the driving transistor T3 can output is 200nA; in other examples, the number of light-emitting devices connected to the same pixel circuit is three, and the width-to-length ratio of the driving transistor is between 1 / 3 and 1 / 5, for example, the width-to-length ratio of the driving transistor T3 is 5 / 20, and the current value that the driving transistor T3 can output can reach 300nA. In addition, the voltage difference between the first power line VDD and the second power line VSS can be increased to further increase the driving current that the driving transistor T3 can output, for example, the voltage of the first power line VDD is between 4 and 5V, for example, 4.6V; the voltage of the second power line VSS is between -4V and -6V, for example, -5V.

[0110] It should be noted that, in the above embodiments, the working process of the pixel structure includes two reset stages (i.e., the first reset stage t1 and the second reset stage t3) as an example for explanation, but in fact, the first reset stage t1 and the second reset stage t3 of the pixel structure can be combined, that is, before the data writing stage t2, a valid level signal is provided to the first reset line Reset1 and at least one second reset line Reset2_1 / Reset2_2 / Reset2_3 at the same time.

[0111] The present disclosure also provides a display device, Figure 8 is a schematic diagram of the overall structure of the display device provided in the embodiment of the present disclosure, such as Figure 8 As shown, the display device includes a display substrate, a first driving circuit 30 and a second driving circuit 40. The display substrate includes a display area DA and a peripheral area located around the display area DA, and the first driving circuit 30 and the second driving circuit 40 can be arranged in the peripheral area of ​​the display substrate. The display area DA includes a plurality of pixels P arranged in an array, and at least one pixel P is provided with the pixel structure in the above embodiment. Multiple light-emitting devices in the same pixel structure can be arranged in a row direction or in a column direction.

[0112] In some embodiments, each pixel P is provided with the pixel structure in the above embodiment, the scan line Scan connected to the pixel structure in the same row is the same, the first reset line connected to the pixel structure in the same row is the same, the second reset line connected to the pixel structure in the same row is the same, and the first light-emitting control line EM1 connected to the pixel structure in the same row is the same. Taking the number of light-emitting devices in the pixel structure as two as an example, the second light-emitting control line EM2_1 connected to the pixel structure in the same row is the same, and the second light-emitting control line EM2_2 connected to the pixel structure in the same row is the same. The data line connected to the pixel structure in the same column is the same. The data lines Data1 to DataM connected to the multiple columns of pixel structures are connected to the data driving circuit 50, so as to receive the data voltage signal provided by the data driving circuit 50.

[0113] The first driving circuit 30 is configured as follows: in the first reset stage of the pixel circuit, providing an effective level signal to the first reset line connected to the pixel circuit, so that the first reset sub-circuit writes the voltage signal on the initialization signal line into the gate of the driving transistor; in the data writing stage of the pixel circuit, providing an effective level signal to the scanning line connected to the pixel circuit, so that the data writing sub-circuit writes the voltage signal on the data line into the first electrode of the driving transistor; and in the second reset stage of the pixel circuit, providing an effective level signal to at least one second reset line connected to the pixel circuit, so that the corresponding second reset sub-circuit writes the voltage on the initialization signal line into the first electrode of the light-emitting device.

[0114] Optionally, the first driving circuit 30 may specifically include a plurality of cascaded gate driving units, for example, Figure 8As shown, the first driving circuit 30 includes: a first-stage gate driving unit S_1, a second-stage gate driving unit S_2, a third-stage gate driving unit S_3, ..., an N-1-stage gate driving unit S_N-1, and an N-stage gate driving unit S_N. The first-stage gate driving unit S_1 is connected to the scanning line connected to the first row of pixel circuits, and is used to provide the first row of pixel circuits with a scanning signal in an effective level state during the data writing phase of the first row of pixel circuits; at the same time, the first-stage gate driving circuit S_1 is connected to the first reset line connected to the second row of pixel circuits, so as to provide the second row of pixel circuits with a first reset signal in an effective level state during the first reset phase of the second row of pixel circuits. The second-level gate driving unit S_2 is connected to the scanning line connected to the second-row pixel circuit, and is used to provide the second-row pixel circuit with a scanning signal in a valid level state during the data writing phase of the second-row pixel circuit; at the same time, the second-level gate driving unit S_2 is connected to the second reset line connected to the first-row pixel structure and the first reset line connected to the third-row pixel circuit, so as to provide the first-row pixel circuit with a second reset signal in a valid level state during the second reset phase of the first-row pixel circuit; and to provide the first-row pixel circuit with a first reset signal in a valid level state during the first reset phase of the third-row pixel circuit. The N-1th level gate driving unit S_N-1 is connected to the scanning line connected to the N-1th row pixel circuit, thereby providing the N-1th row pixel circuit with a scanning signal in a valid level state during the data writing phase of the N-1th row pixel circuit; at the same time, the N-1th level gate driving unit S_N-1 is connected to the second reset line connected to the N-2th row pixel circuit and the first reset line connected to the N-th row pixel circuit, thereby providing the N-2th row pixel circuit with a second reset signal in a valid level state during the second reset phase of the N-2th row pixel circuit; and providing the N-2th row pixel circuit with a first reset signal in a valid level state during the first reset phase of the N-2th row pixel circuit. The N-th level gate driving unit S_N is connected to the scanning line connected to the N-th row pixel circuit, thereby providing the N-th row pixel circuit with a scanning signal in a valid level state during the data writing phase of the N-th row pixel circuit; at the same time, the N-th level gate driving unit S_N is connected to the second reset line connected to the N-1-th row pixel circuit, thereby providing the N-1-th row pixel circuit with a second reset signal in a valid level state during the second reset phase of the N-1-th row pixel circuit.

[0115] The second driving circuit 40 is configured to: in the light-emitting stage of the pixel circuit, provide a valid level signal to the first light-emitting control line EM1 connected to the pixel circuit, and provide a valid level signal to at least one second light-emitting control line EM2_1 / EM2_2 connected to the pixel circuit, so that the first light-emitting control subcircuit connects the first power line to the first electrode of the driving transistor, and at least one second light-emitting control subcircuit connects the second electrode of the driving transistor to the corresponding light-emitting device.

[0116] Optionally, the second driving circuit 40 may include a first shift register 41 and a plurality of second shift registers 42_1 to 42_2, and the second shift registers 42_1 / 42_2 correspond to the second light emitting control lines EM2_1 / EM2_2 connected to the same row of pixel circuits. The structure of the second driving circuit 40 is described below by taking the same row of pixel circuits connected to two second light emitting control lines EM2_1 to EM2_2 as an example.

[0117] The first shift register 41 includes a plurality of cascaded first shift register units G1_1 to G1_N, each of which is connected to a first light emitting control line EM1. Figure 8 As shown, the first-stage first shift register unit G1_1 is connected to the first light-emitting control line EM1 connected to the first row of pixel circuits, the second-stage first shift register unit G1_2 is connected to the first light-emitting control line EM1 connected to the second row of pixel circuits, and so on, the N-th-stage first shift register unit G1_N is connected to the first light-emitting control line EM1 connected to the N-th row of pixel circuits. The second shift register 42_1 includes a plurality of cascaded second shift register units G21_1 to G21_N, and the second shift register 42_2 includes a plurality of cascaded second shift register units G22_1 to G22_N. The first-level second shift register unit G21_1 and the first-level second shift register unit G22_1 are respectively connected to the two second light-emitting control lines EM2_1~EM2_2 connected to the first row of pixel circuits; the second-level second shift register unit G21_2 and the second-level second shift register unit G22_2 are respectively connected to the two second light-emitting control lines EM2_1~EM2_2 connected to the second row of pixel circuits; and so on, the N-level second shift register unit G21_N and the N-level second shift register unit G22_N are respectively connected to the two second light-emitting control lines EM2_1~EM2_2 connected to the N-th row of pixel circuits.

[0118] In some embodiments, at least two of the multiple light-emitting devices connected to the same pixel circuit have different colors. The first driving circuit 30 is specifically configured to provide an effective level signal to the first reset line connected to the pixel circuit in the first reset phase of the pixel circuit; provide an effective level signal to the scan line connected to the pixel circuit in the data writing phase of the pixel circuit; and provide an effective level signal to each second reset line connected to the pixel circuit in the second reset phase of the pixel circuit, so that the corresponding second reset subcircuit writes the voltage on the initialization signal line to the first electrode of the light-emitting device. The second driving circuit 40 is specifically configured to provide an effective level signal to the first light-emitting control line EM1 connected to the pixel circuit in the light-emitting phase of the pixel circuit, and provide effective level signals to the multiple second light-emitting control lines EM2_1~EM2_2 connected to the pixel circuit respectively.

[0119] In this case, a plurality of light-emitting devices can be respectively used as a plurality of sub-pixels of a pixel, and since a plurality of light-emitting devices in a pixel structure share one pixel circuit, it is beneficial to improve the resolution of the display device.

[0120] In some other embodiments, the colors of the multiple light-emitting devices connected to the same pixel circuit are the same. The second driving circuit 40 is specifically configured to provide an effective level signal to the first light-emitting control line EM1 connected to the pixel circuit during the light-emitting phase of each display cycle of the pixel circuit; and to provide effective level signals to the n second light-emitting control lines connected to the pixel circuit in turn during the light-emitting phase of n consecutive display cycles. Wherein n is the number of light-emitting devices in the pixel structure.

[0121] For example, when the control circuit of the display device determines that the image in a certain area remains unchanged when the display substrate is continuously displaying multiple frames of images, the control circuit can send a control signal to the second drive circuit 40. The second drive circuit 40 controls the multiple light-emitting devices in each pixel structure in the area to emit light in turn in multiple consecutive display cycles according to the control signal, thereby improving the problem of display burn-in.

[0122] In other embodiments, the colors of multiple light-emitting devices connected to the same pixel circuit are the same. One of the multiple second light-emitting control lines EM2_1 to EM2_2 connected to the pixel structure is a preferred light-emitting control line, and the remaining second light-emitting control lines are alternative light-emitting control lines. The second driving circuit 40 is specifically configured to provide an effective level signal to the first light-emitting control line EM1 and the preferred light-emitting control line connected to the pixel circuit during the light-emitting phase of the first m display cycles of the pixel circuit; and to provide an effective level signal to the first light-emitting control line EM1, the preferred light-emitting control line and at least one alternative light-emitting control line connected to the pixel circuit during the light-emitting phase of the display cycle after the mth; wherein m is determined according to the brightness attenuation curves of the multiple light-emitting devices connected to the pixel circuit.

[0123] That is to say, before the cumulative display time of the display device reaches a predetermined time, one light-emitting device in the pixel structure is controlled to emit light in each display cycle, and after the cumulative display time of the display device reaches the predetermined time, at least two light-emitting devices in the pixel structure are controlled to emit light in each display cycle. In this way, the problem of reduced brightness of the pixel structure due to the long light-emitting time of the light-emitting device can be compensated, thereby extending the service life of the display device.

[0124] The specific driving process of the pixel structure has been introduced above and will not be repeated here.

[0125] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A method for driving a pixel structure, the pixel structure comprising: A pixel circuit and a plurality of light-emitting devices, the pixel circuit comprising: a driving transistor, a storage capacitor, a write compensation subcircuit, a first reset subcircuit, a first light-emitting control subcircuit, a plurality of second light-emitting control subcircuits and a plurality of second reset subcircuits, the two ends of the storage capacitor being respectively connected to the gate of the driving transistor and a first power line; the second light-emitting control subcircuit and the second reset subcircuit are both connected to the plurality of light-emitting devices in a one-to-one correspondence; the plurality of second reset subcircuits are respectively connected to a plurality of second reset lines, and the plurality of second light-emitting control subcircuits are respectively connected to a plurality of second light-emitting control lines; The pixel circuit has multiple display cycles, and the display cycle includes: a first reset phase, a data writing phase, a second reset phase and a light emitting phase. The driving method includes: In the first reset phase, providing an effective level signal to the first reset line so that the first reset sub-circuit writes the voltage signal on the initialization signal line into the gate of the driving transistor; In the data writing phase, providing an effective level signal to the scan line, so that the write compensation subcircuit writes the voltage signal on the data line into the first electrode of the driving transistor and conducts the gate of the driving transistor to the second electrode; In the second reset stage, providing an effective level signal to at least one second reset line so that the corresponding second reset subcircuit writes the voltage on the initialization signal line into the first electrode of the light emitting device; In the light-emitting stage, providing an effective level signal to the first light-emitting control line, and providing an effective level signal to at least one second light-emitting control line, so that the first light-emitting control subcircuit conducts the first power line with the first electrode of the driving transistor, and at least one second light-emitting control subcircuit conducts the second electrode of the driving transistor with the corresponding light-emitting device; The colors of the multiple light-emitting devices connected to the same pixel circuit are the same; one of the multiple second light-emitting control lines connected to the pixel structure is a preferred light-emitting control line, and the remaining second light-emitting control lines are alternative light-emitting control lines; In the light-emitting stage of the first m display cycles, a valid level signal is provided to the first light-emitting control line and the preferred light-emitting control line; in the light-emitting stage of the display cycle after the mth, a valid level signal is provided to the first light-emitting control line, the preferred light-emitting control line and at least one of the alternative light-emitting control lines; wherein m is determined according to the brightness attenuation curve of the light-emitting device.

2. The driving method according to claim 1, wherein: The first reset subcircuit comprises: a first reset transistor, a gate of the first reset transistor is connected to the first reset line, a first electrode of the first reset transistor is connected to the gate of the driving transistor, and a second electrode of the first reset transistor is connected to the initialization signal line; In the first reset stage, providing an effective level signal to the first reset line so that the first reset sub-circuit writes the voltage signal on the initialization signal line into the gate of the driving transistor specifically includes: In the first reset stage, an effective level signal is provided to the first reset line to conduct the first electrode and the second electrode of the first reset line.

3. The driving method according to claim 1, wherein: The second reset subcircuit comprises: a second reset transistor, a gate of the second reset transistor is connected to the second reset line, a first electrode of the second reset transistor is connected to the light emitting device, and a second electrode of the second reset transistor is connected to the initialization signal line; In the second reset stage, providing an effective level signal to at least one second reset line so that the corresponding second reset subcircuit writes the voltage on the initialization signal line into the first electrode of the light-emitting device specifically includes: In the second reset phase, an effective level signal is provided to at least one second reset line to turn on the first electrode and the second electrode of the corresponding second reset transistor.

4. The driving method according to claim 1, wherein: The first light-emitting control subcircuit comprises: a first light-emitting control transistor, the gate of the first light-emitting control transistor is connected to the first light-emitting control line, the first electrode of the first light-emitting control transistor is connected to the first power line, and the second electrode of the first light-emitting control transistor is connected to the first electrode of the driving transistor; the second light-emitting control subcircuit comprises: a second light-emitting control transistor, the gate of the second light-emitting control transistor is connected to the second light-emitting control line, the first electrode of the second light-emitting control transistor is connected to the second electrode of the driving transistor, and the second electrode of the second light-emitting control transistor is connected to the light-emitting device; In the light-emitting stage, providing an effective level signal to the first light-emitting control line and providing an effective level signal to at least one second light-emitting control line, so that the first light-emitting control subcircuit conducts the first power line with the first electrode of the driving transistor, and at least one second light-emitting control subcircuit conducts the second electrode of the driving transistor with the corresponding light-emitting device, specifically including: In the light-emitting stage, a valid level signal is provided to the first light-emitting control line, and a valid level signal is provided to at least one second light-emitting control line, so that the first and second electrodes of the first light-emitting control transistor are turned on, and the first and second electrodes of at least one second light-emitting control transistor are turned on.

5. A pixel structure comprising: A pixel circuit and a plurality of light-emitting devices, wherein the pixel circuit comprises: a driving transistor, a storage capacitor, a write compensation subcircuit, a first reset subcircuit, a first light-emitting control subcircuit, a plurality of second light-emitting control subcircuits and a plurality of second reset subcircuits, wherein two ends of the storage capacitor are respectively connected to the gate of the driving transistor and the first power line; the second light-emitting control subcircuit and the second reset subcircuit are both connected to the plurality of light-emitting devices in a one-to-one correspondence; The write compensation subcircuit is configured to write the voltage signal on the data line into the first electrode of the driving transistor in response to the control of the signal of the scanning line, and connect the gate of the driving transistor to the second electrode; The first reset subcircuit is configured to write a voltage signal on the initialization signal line into the gate of the driving transistor in response to control of a signal on the first reset line; The second reset subcircuit is configured to write the voltage on the initialization signal line into the first electrode of the light-emitting device connected to the second reset subcircuit in response to the control of the signal of the corresponding second reset line; The first light emitting control subcircuit is configured to connect the first power line to the first electrode of the driving transistor in response to the control of the signal of the first light emitting control line; The second light emitting control subcircuit is configured to, in response to the control of a signal of a corresponding second light emitting control line, turn on the second electrode of the driving transistor and the light emitting device connected to the second light emitting control subcircuit; The plurality of light-emitting devices connected to the pixel circuit have the same color; the plurality of the second light-emitting control subcircuits of the pixel structure are connected to a plurality of second light-emitting control lines, one of the plurality of second light-emitting control lines is a preferred light-emitting control line, and the remaining second light-emitting control lines are alternative light-emitting control lines; In the light-emitting stage of the first m display cycles, the first light-emitting control line and the preferred light-emitting control line provide valid level signals; in the light-emitting stage of the display cycle after the mth, the first light-emitting control line, the preferred light-emitting control line and at least one of the alternative light-emitting control lines provide valid level signals; wherein m is determined according to the brightness attenuation curve of the light-emitting device.

6. The pixel structure according to claim 5, wherein: The second reset subcircuit comprises: a second reset transistor, a gate of the second reset transistor is connected to the second reset line, a first electrode of the second reset transistor is connected to the light emitting device, and a second electrode of the second reset transistor is connected to the initialization signal line; The second light-emitting control subcircuit includes: a second light-emitting control transistor, a gate of the second light-emitting control transistor is connected to the second light-emitting control line, a first electrode of the second light-emitting control transistor is connected to the second electrode of the driving transistor, and a second electrode of the second light-emitting control transistor is connected to the light-emitting device.

7. The pixel structure according to claim 5 or 6, wherein: The number of the light-emitting devices in the pixel structure is two, and the width-to-length ratio of the driving transistor is between 1 / 8 and 1 / 12; or, The number of the light-emitting devices in the pixel structure is three, and the width-to-length ratio of the driving transistor is between 1 / 3 and 1 / 5.

8. A display device, comprising a display substrate, a first driving circuit and a second driving circuit, wherein the display substrate comprises a plurality of pixels, and at least one of the pixels is provided with a pixel structure according to any one of claims 5 to 7; The first driving circuit is configured to provide an effective level signal to a first reset line connected to the pixel circuit in a first reset phase of the pixel circuit, so that the first reset subcircuit writes the voltage signal on the initialization signal line into the gate of the driving transistor; provide an effective level signal to a scan line connected to the pixel circuit in a data writing phase of the pixel circuit, so that the data writing subcircuit writes the voltage signal on the data line into the first electrode of the driving transistor; and provide an effective level signal to at least one second reset line connected to the pixel circuit in a second reset phase of the pixel circuit, so that the corresponding second reset subcircuit writes the voltage on the initialization signal line into the first electrode of the light-emitting device; The second driving circuit is configured to provide an effective level signal to the first light-emitting control line connected to the pixel circuit and provide an effective level signal to at least one second light-emitting control line connected to the pixel circuit during the light-emitting phase of the pixel circuit, so that the first light-emitting control subcircuit conducts the first power line with the first electrode of the driving transistor, and at least one of the second light-emitting control subcircuits conducts the second electrode of the driving transistor with the corresponding light-emitting device; The multiple light-emitting devices connected to the same pixel circuit have the same color; one of the multiple second light-emitting control lines connected to the pixel circuit is a preferred light-emitting control line, and the remaining second light-emitting control lines are alternative light-emitting control lines; The second driving circuit is specifically configured to provide valid level signals to the first light-emitting control line and the first light-emitting control line in the light-emitting phase of the first m display cycles; and to provide valid level signals to the first light-emitting control line, the first light-emitting control line and at least one of the alternative light-emitting control lines in the light-emitting phase of the display cycle after the mth one; wherein, m is determined according to brightness attenuation curves of a plurality of light-emitting devices connected to the pixel circuit.

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