A RSU multi-channel parallel communication method and system

Abstract

The present invention discloses a RSU multi-channel parallel communication method and system, the communication method is implemented based on an RSU device and multiple OBU devices, the RSU device includes an MCU unit and an FPGA unit, the FPGA unit is connected to multiple radio frequency chips for sending and receiving data to the OBU device, each radio frequency chip corresponds to a unique channel, and the MCU unit is installed with a master control APP. The present invention realizes multi-OBU time-sharing communication by formulating a data link layer protocol, and solves the problem that other OBUs are awakened after the RSU and OBU establish a link. For the RSU and OBU that have established a link, it is required to communicate within a specified time window. The present invention ensures multi-OBU time-sharing communication by setting up multiple time windows. Compared with the prior art, the present invention can accommodate a large number of OBU devices to communicate simultaneously, thereby solving the problems of low efficiency and OBU missing labels in the existing ETC system, and better meeting the application requirements.

Description

Technical Field

[0001] The present invention relates to an ETC toll collection system, and in particular to an RSU multi-channel parallel communication method and system. Background Art

[0002] Electronic Toll Collection System (ETC) is a road toll collection method currently used in the world. It uses dedicated short-range communication (DSRC) technology equipment based on the 5.8GHz microwave frequency band to achieve electronic toll collection. ETC1.0 is exactly the same as traditional ETC in function, but ETC2.0 is the world's first high-capacity two-way communication road-vehicle cooperative system realized by DSRC, which supports "information services". The ETC2.0 system can not only automatically collect fees (ETC), but also provide vehicles with real-time traffic information, and can also collect vehicle driving information.

[0003] For the existing communication methods, please refer to the Chinese patent publication with publication number CN 106559849 A and the name "target area selection method, device and system, OBU, RSU". In this type of existing scheme, the communication mechanism between the RSU device and the OBU device is generally as follows: the RSU device is a single channel, fixed to one frequency. After the RSU device sends a broadcast packet, if multiple OBU devices wake up at the same time, multiple transaction threads are created to perform time-sharing operations with different OBUs; if only one OBU device wakes up, it can only communicate with one OBU. No broadcast packets are inserted during the transaction, and the next round of communication can only be carried out until all OBU device links are disconnected.

[0004] Based on the above characteristics, it can be seen that the existing RSU processing mechanism has several problems: 1. Low capacity, unable to support the bandwidth requirements of ETC2.0; 2. Long transaction processing time and low efficiency; 3. Omissions in the transaction process. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide an RSU multi-channel parallel communication method and system that can accommodate a large number of OBU devices for simultaneous communication, thereby solving the low efficiency of the existing ETC system and the OBU missing label problem.

[0006] In order to solve the above technical problems, the present invention adopts the following technical solutions.

[0007] A RSU multi-channel parallel communication method, the communication method is implemented based on an RSU device and multiple OBU devices, the RSU device includes an MCU unit and an FPGA unit, the FPGA unit is connected to multiple radio frequency chips for sending and receiving data to the OBU device, each radio frequency chip corresponds to a unique channel, the MCU unit is installed with a master control APP, the communication method includes: step S1, the master control APP sends a management frame FCM with a Linux timestamp to the FPGA unit, the FPGA unit encapsulates the management frame FCM of the full broadcast window, and sends the management frame FCM according to a preset period; step S2, the OBU device replies with a VST signal after receiving the management frame FCM, and the FPGA unit feeds back to the master control APP after receiving the VST signal; step S3, the master control APP obtains the MAC address of the OBU device ID, allocates the uplink and downlink communication time windows of the OBU device in the management frame FCM, and the FPGA unit sends a new management frame FCM at the next sending time; step S4, the master control APP sends an OBU data request packet to the FPGA unit, the FPGA unit searches for the time window of the OBU device in the management frame FCM, and then sends the OBU data request packet in the allocated time window; step S5, the OBU device establishes a link with the RSU device, and realizes data interaction between the master control APP and the OBU device within the specified time window through the FPGA unit.

[0008] Preferably, after the data interaction is completed, the master control APP actively releases the link and sends EventReport to the FPGA unit. The FPGA unit sends data within the specified time window. The master control APP updates the management frame FCM and deletes the time window of the OBU device that has released the link in the management frame FCM. After a delay of a preset time, the master control APP sends the updated management frame FCM to the FPGA unit.

[0009] Preferably, when the time length for the master control APP to receive the OBU device data reaches a preset timeout time, the master control APP releases the link, updates the management frame FCM, deletes the time window corresponding to the OBU device in the management frame FCM, and the master control APP sends the updated management frame FCM to the FPGA unit.

[0010] Preferably, in step S4, if the time window information of the OBU device does not exist in the management frame FCM, the request data of the OBU device is discarded.

[0011] Preferably, the management frame FCM includes a timestamp, frequency domain information, time domain information, a service address, configuration information, D / U information, an offset time and a duration.

[0012] A RSU multi-channel parallel communication system, the communication system includes an RSU device and multiple OBU devices, the RSU device includes an MCU unit and an FPGA unit, the FPGA unit is connected to multiple radio frequency chips for sending and receiving data to the OBU devices, each radio frequency chip corresponds to a unique channel, the MCU unit is installed with a master control APP, and the communication system is used to implement the communication method described above.

[0013] In the RSU multi-channel parallel communication method and system disclosed in the present invention, the FPGA unit is connected with multiple radio frequency chips, each channel corresponds to a radio frequency chip, and the transmitting and receiving frequencies of each radio frequency chip are different, thereby realizing multi-channel parallel communication of the RSU. Specifically, the present invention realizes multi-OBU time-sharing communication by formulating a data link layer protocol, and solves the problem that other OBUs are awakened after the RSU and OBU establish a link. For the RSU and OBU that have established a link, it is required to communicate within a specified time window. The present invention ensures multi-OBU time-sharing communication by setting up multiple time windows. Compared with the prior art, the present invention can accommodate a large number of OBU devices to communicate simultaneously, thereby solving the low efficiency of the existing ETC system and the problem of OBU missing labels, and better meets the application requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a flow chart of the RSU multi-channel parallel communication method of the present invention;

[0015] Figure 2 It is a timing diagram of the RSU multi-channel parallel communication method of the present invention;

[0016] Figure 3 It is a schematic diagram of the correspondence between Section and channel;

[0017] Figure 4 This is a schematic diagram of the data content of the management frame FCM;

[0018] Figure 5 It is a schematic diagram of the time domain information format;

[0019] Figure 6 This is a schematic diagram of the configuration information format;

[0020] Figure 7 Schematic diagram of transmission direction encoding. DETAILED DESCRIPTION

[0021] The present invention is described in more detail below with reference to the accompanying drawings and embodiments.

[0022] The present invention discloses a RSU multi-channel parallel communication method, see Figure 1 and Figure 2 The communication method is implemented based on an RSU device and multiple OBU devices. The RSU device includes an MCU unit and an FPGA unit. The FPGA unit is connected to multiple radio frequency chips for sending and receiving data to the OBU device. Each radio frequency chip corresponds to a unique channel. The MCU unit is installed with a master control APP. The communication method includes:

[0023] Step S1, the master control APP sends a management frame FCM with a Linux timestamp to the FPGA unit, the FPGA unit encapsulates the management frame FCM of the full broadcast window, and sends the management frame FCM according to a preset period (for example: a period of 10ms);

[0024] Step S2, the OBU device replies with a VST signal after receiving the management frame FCM, and the FPGA unit feeds back the VST signal to the main control APP after receiving the VST signal;

[0025] Step S3, the master control APP obtains the MAC ID of the OBU device, allocates the uplink and downlink communication time windows of the OBU device in the management frame FCM, and the FPGA unit sends a new management frame FCM at the next sending time;

[0026] Step S4, the master control APP sends an OBU data request packet to the FPGA unit, the FPGA unit searches for the time window of the OBU device in the management frame FCM, and then sends the OBU data request packet in the allocated time window; in the step S4, if the time window information of the OBU device does not exist in the management frame FCM, the request data of the OBU device is discarded;

[0027] Step S5, the OBU device establishes a link with the RSU device, and implements data interaction between the master control APP and the OBU device within a specified time window through the FPGA unit.

[0028] In the above method, the FPGA unit is connected with a plurality of radio frequency chips, each channel corresponds to a radio frequency chip, and the transmitting and receiving frequencies of each radio frequency chip are different, thereby realizing multi-channel parallel communication of RSU. Specifically, the present invention realizes multi-OBU time-sharing communication by formulating a data link layer protocol, and solves the problem that other OBUs are awakened after the RSU and OBU establish a link. For the RSU and OBU that have established a link, it is required to communicate within a specified time window. The present invention ensures multi-OBU time-sharing communication by setting up multiple time windows. Compared with the prior art, the present invention can accommodate a large number of OBU devices to communicate simultaneously, thereby solving the problems of low efficiency of the existing ETC system and OBU missing labels, and better meeting the application requirements.

[0029] Furthermore, after the data interaction is completed, the master control APP actively releases the link and sends EventReport to the FPGA unit. The FPGA unit sends data within the specified time window. The master control APP updates the management frame FCM and deletes the time window of the OBU device that has released the link in the management frame FCM. After a delay of a preset time (for example: 30ms), the master control APP sends the updated management frame FCM to the FPGA unit.

[0030] During the specific execution process, when the time for the master control APP to receive the OBU device data reaches a preset timeout period (the default timeout period is: 200ms), the master control APP releases the link, updates the management frame FCM, deletes the time window corresponding to the OBU device in the management frame FCM, and the master control APP sends the updated management frame FCM to the FPGA unit.

[0031] In the preferred embodiment of the present invention, the MCU unit is implemented by AM335x. The communication process between AM335x and FPGA is as follows: AM335x software divides a 16MB RAM area, the first 20K area is divided into 10 sections, each section size is 2KB, the first 5 are used for the data area sent by am335x to FPGA (Tx section), and the last 5 are used for am335x to get data from FPGA (Rx section). The corresponding relationship between section and channel can be seen in Figure 3 .

[0032] The first 4 bytes of each section are used to identify whether the data in the section is valid and its length. Bit 7 of the first byte is used to identify the validity of the data (the remaining 7 bits are reserved and can be used to specify the channel). Bit 7 is 1 to indicate the existence of valid data, and 0 to indicate no valid data. The remaining 3 bytes are used to identify the length of the data (big endian byte order).

[0033] The data transmission and reception process of AM335X is as follows:

[0034] 1. AM335X sends data process;

[0035] am335x fills the data to be sent into the Tx section of the corresponding channel (starting from the 5th byte of the section), then fills in the length of the data (starting from the 2nd byte of the section, the size is 3 bytes), and finally sets the highest position of the first byte of the section to 1.

[0036] The FPGA periodically polls and scans whether the highest bit of the first byte of each Tx section is 1. If it is 1, it indicates that there is data to be processed. After the data is processed, the highest bit of the first byte of this Tx section is cleared to zero to mark that the data of this section has been processed.

[0037] am335x can query the highest bit of the first byte of the Tx section to determine whether new data can be filled into this Tx section. If the highest bit of the first byte is 1, it means that there is valid data and new data cannot be filled; if the highest bit of the first byte is 0, it means that new data can be filled.

[0038] Because the FPGA main frequency is above 50M, and the maximum transmission rate of RF is 8M, there is a problem of wide input and narrow output. For RF large data transmission, in order to improve the transmission performance, FPGA uses 2 2K TxBufs to process data and realize the function of Ping-Pong Buffer. That is, after FPGA takes the Tx section data to TxBuf1, it clears the highest bit of the first byte of this Tx section. FPGA synchronously sends the data in TxBuf1 to the RF module. At this time, AM335X can continue to store 2K data in this Tx section, and then FPGA stores the Tx section data in TxBuf2. After the RF sends the TxBuf1 data, it can continue to send the data in TxBuf2.

[0039] 2. AM335X receives data process;

[0040] When FPGA has data to transmit to am335x, it first checks whether the highest bit of the first byte of the Rx section of the corresponding channel is 0. If it is 0, fill the data into this Rx section area in the same way as am335x fills and sends data. After filling, it sends an interrupt to am335x by pulling down the interrupt pin level; if it is 1, wait until the bit is cleared;

[0041] After receiving the interrupt signal, am335x scans the highest bit of the first byte of each Rx section in the interrupt handler to see if it is 1. If it is 1, it indicates that there is valid data, notifying the application layer that there is data to be read. After the application layer reads the data, the highest bit of the first byte of this Rx section is cleared to zero.

[0042] In the specific implementation process of this embodiment, the RSU antenna uses AM335x as the MCU, the system platform is Linux, and FPGA is used to control the communication of multiple RF chips. AM335x and FPGA use the GPMC interface to communicate. FPGA accesses 5 RF chips and is divided into 5 channels. The transmit and receive frequencies of each RF chip are different. The transmit and receive frequencies are allocated at intervals of 5M. For example: RF chip 1 uses the frequency: transmit-5840, receive-5790; RF chip 2 uses the frequency: transmit-5835, receive-5795; RF chip 3 uses the frequency: transmit-5830, receive-5800; the frequencies are allocated to each RF chip in turn, and each RF chip can work in parallel. AM335x allocates data storage areas for the reception and transmission of each channel. The lane software writes data into the corresponding data area of ​​FPGA through AM335x. FPGA reads data from the data area and then sends the data through the corresponding RF chip. FPGA receives the RF data and writes it into the corresponding channel data area. AM335x reads the data from the data area and sends it to the lane software for processing. FPGA can quickly send and receive RF data to achieve the purpose of multi-channel parallel communication.

[0043] This embodiment solves the problem of time-sharing communication of multiple OBUs and awakening other OBUs that have not been awakened after the RSU and OBU establish a link by formulating a data link layer protocol. The FPGA periodically sends a management frame (FCM), which contains the number of channels, channel numbers, multiple time window information, and reserves at least one broadcast window. The RSU and OBU that have established a link communicate within the specified time window, and multiple time windows ensure time-sharing communication of multiple OBUs. For OBUs that have not established a link, you can reply to VST in the broadcast window, and then the application determines to establish a link.

[0044] In this embodiment, the management frame FCM includes timestamp, frequency domain information, time domain information, service address, configuration information, D / U information, offset time and duration. In the process of formulating the data link layer protocol in this embodiment, the FPGA sends a management frame (FCM) periodically (10ms, the cycle time is set by the application) on each channel. The content of FCM is set by the application. Please refer to Figure 4 , the relevant content is as follows:

[0045] 1. Timestamp: current local time in Unix time format, 4 bytes;

[0046] 2. Frequency domain information: indicates the number of channels used in the current communication area, one byte;

[0047] 3. Time domain information: The time domain status consists of two parts: the time domain number (Bit 0~3) and the channel number, which is one byte. The larger the time domain number, the more service windows are provided and the more OBUs can communicate at the same time; the channel number indicates the frequency domain in which the channel is located. For the format of the time domain information, please refer to Figure 5 ;

[0048] 4. Service address: indicates the OBU device address of the current time window service, four bytes. If it is set to all "FF", it means that the current time window is a broadcast time window;

[0049] 6. Configuration information: Contains the data transmission direction, offset time and duration of the current window (unit, composed of 4 bytes, its composition format is shown in Figure 6 ;

[0050] 7. D / U: indicates the transmission direction of the current control window, consisting of 2 bits, see Figure 7 ;

[0051] 8. Offset time: indicates the offset time of the start time of the current time window relative to the end time of the control frame;

[0052] 9. Duration: The duration of the current time window. The transmission of all information should strictly control the length of the sent data frame according to the window duration.

[0053] The present invention also discloses an RSU multi-channel parallel communication system, wherein the communication system comprises an RSU device and a plurality of OBU devices, wherein the RSU device comprises an MCU unit and an FPGA unit, wherein the FPGA unit is connected to a plurality of radio frequency chips for sending and receiving data to the OBU devices, wherein each radio frequency chip corresponds to a unique channel, and the MCU unit is installed with a master control APP. In a preferred embodiment of the present invention, the steps performed by the communication system are as follows:

[0054] Step (1), APP sends FCM startup packet with Linux timestamp, FPGA encapsulates FCM packet of full broadcast window, and sends FCM periodically 10ms;

[0055] Step (2), after receiving FCM, OBU replies VST in the broadcast window. After receiving VST, FPGA sends it to the application through AM335x.

[0056] Step (3), after the application receives the VST, it obtains the MAC ID of the OBU, allocates the uplink and downlink communication time windows of this OBU in the FCM, and sends it to the FPGA. After receiving the FCM, the FPGA sends a new FCM at the next sending time;

[0057] Step (4), the application sends an OBU data request packet. After receiving the OBU data request packet, the FPGA searches for the time window of this OBU in the FCM, and then sends the OBU data request packet in the allocated window. If the window information of this OBU does not exist in the FCM, the OBU request data is discarded;

[0058] Step (5), after the OBU and RSU establish a link, the FPGA receives the data from the application and sends the data within the specified time window. The FPGA receives the OBU data and forwards it to the application;

[0059] Step (6), the application actively releases the link and sends an EventReport to the FPGA. After receiving the EventReport packet sent by the application, the FPGA sends data within the specified time window. The application updates the FCM and deletes the OBU time window of the released link in the FCM. After 30ms, the application sends the updated FCM to the FPGA.

[0060] Step (7), when the application times out receiving the OBU information (the default timeout is 200ms), the application passively releases the link, updates the FCM, deletes the time window of this OBU in the FCM, and sends the updated FCM to the FPGA.

[0061] The RSU multi-channel parallel communication method and system disclosed in the present invention, each channel of which can communicate with multiple OBUs in time-sharing, and multiple channel communication methods are adopted in the RSU, each channel corresponds to a radio frequency chip, and different receiving and transmitting frequencies are allocated, and each channel has different receiving and transmitting frequencies, thereby realizing multi-channel parallel communication of the RSU. The RSU manages the communication time window of each channel, and periodically sends a management frame, and the management frame specifies the OBU communication time window. A 1ms broadcast window is reserved in the time window, and the rest of the time is an OBU dedicated link window, which can ensure that after the RSU and the OBU establish a link for communication, other OBUs can also be awakened. Based on the above scheme, the present invention solves the problem that the existing ETC1.0 has a small capacity and cannot support the bandwidth requirements of ETC2.0. The present invention adopts a time window management mechanism, which can accommodate more OBUs to communicate at the same time, and solves the problems of low efficiency of the existing ETC1.0 and OBU missing labels.

[0062] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions or improvements made within the technical scope of the present invention should be included in the scope of protection of the present invention.

Claims

1. A RSU multi-channel parallel communication method, characterized in that: The communication method is implemented based on an RSU device and multiple OBU devices. The RSU device includes an MCU unit and an FPGA unit. The FPGA unit is connected to multiple radio frequency chips for sending and receiving data to the OBU device. Each radio frequency chip corresponds to a unique channel. The MCU unit is installed with a master control APP. The communication method includes: Step S1, the master control APP sends a management frame FCM with a Linux timestamp to the FPGA unit, the FPGA unit encapsulates the management frame FCM of the full broadcast window, and sends the management frame FCM according to a preset period; Step S2, the OBU device replies with a VST signal after receiving the management frame FCM, and the FPGA unit feeds back the VST signal to the main control APP after receiving the VST signal; Step S3, the master control APP obtains the MAC ID of the OBU device, allocates the uplink and downlink communication time windows of the OBU device in the management frame FCM, and the FPGA unit sends a new management frame FCM at the next sending time; Step S4, the master control APP sends an OBU data request packet to the FPGA unit, the FPGA unit searches the time window of the OBU device in the management frame FCM, and then sends the OBU data request packet in the allocated time window; Step S5, the OBU device establishes a link with the RSU device, and implements data interaction between the master control APP and the OBU device within a specified time window through the FPGA unit; After the data interaction is completed, the master control APP actively releases the link and sends EventReport to the FPGA unit. The FPGA unit sends data within the specified time window. The master control APP updates the management frame FCM and deletes the time window of the OBU device that has released the link in the management frame FCM. After a preset delay, the master control APP sends the updated management frame FCM to the FPGA unit. When the duration for the master control APP to receive the OBU device data reaches a preset timeout period, the master control APP releases the link, updates the management frame FCM, deletes the time window corresponding to the OBU device in the management frame FCM, and sends the updated management frame FCM to the FPGA unit.

2. The RSU multi-channel parallel communication method according to claim 1, characterized in that: In the step S4, if the time window information of the OBU device does not exist in the management frame FCM, the request data of the OBU device is discarded.

3. The RSU multi-channel parallel communication method according to claim 1, characterized in that: The management frame FCM includes a timestamp, frequency domain information, time domain information, a service address, configuration information, D / U information, an offset time and a duration.

4. An RSU multi-channel parallel communication system, characterized in that: The communication system includes an RSU device and multiple OBU devices, the RSU device includes an MCU unit and an FPGA unit, the FPGA unit is connected to multiple radio frequency chips for sending and receiving data to the OBU devices, each radio frequency chip corresponds to a unique channel, the MCU unit is installed with a master control APP, and the communication system is used to implement the communication method described in any one of claims 1-3.

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