Display panel and display device

Abstract

This application discloses a display panel and a display device. The display panel includes a display area, an opening area, and a first partition area, the first partition area surrounding the opening area, and the display area surrounding the first partition area. The display panel includes: a substrate including a first flexible layer; a buffer layer located on one side of the first flexible layer; a first conductive layer located on the side of the buffer layer opposite to the first flexible layer; a first antistatic groove located in the first partition area, the first antistatic groove at least partitioning the buffer layer; a second conductive layer located at the bottom of the first antistatic groove, the first conductive layer and the second conductive layer being electrically connected; or, a second antistatic groove located in the first partition area, the second antistatic groove at least partially surrounding the opening area, along the direction from the first conductive layer to the substrate, the second antistatic groove partitioning at least a portion of the first flexible layer; a third conductive layer located at the bottom of the bottom of the second antistatic groove, the third conductive layer and the first conductive layer being insulated from each other. This application can improve the antistatic capability of the display panel.

Description

Technical Field

[0001] This application relates to the field of display panel technology, and more particularly to a display panel and display device. Background Technology

[0002] Display panels are typically cut with openings as needed, such as for cameras. After the display panel is manufactured, it needs to undergo an electrostatic discharge (ESD) test to check its quality. Because the cut surfaces of the openings are conductive, static electricity can enter the display area during the ESD test, potentially igniting the light-emitting elements around the opening and reducing the anti-static capability of the display panel after the opening is made. Summary of the Invention

[0003] This application provides a display panel and display device that can improve the anti-static capability of the display panel.

[0004] In a first aspect, a display panel is provided, including a display area, an opening area, and a first partition area, the first partition area surrounding the opening area and the display area surrounding the first partition area; along the thickness direction of the display panel, the display panel includes: a substrate including a first flexible layer; a buffer layer located on one side of the first flexible layer; a first conductive layer located on the side of the buffer layer opposite to the first flexible layer; a first antistatic groove located in the first partition area, the first antistatic groove at least partitioning the buffer layer; a second conductive layer located at the bottom of the first antistatic groove, the first conductive layer and the second conductive layer being electrically connected; or, a second antistatic groove located in the first partition area, the second antistatic groove at least partially surrounding the opening area, along the direction from the first conductive layer to the substrate, the second antistatic groove partitioning at least a portion of the first flexible layer; a third conductive layer located at the bottom of the bottom of the second antistatic groove, the third conductive layer and the first conductive layer being insulated from each other.

[0005] Secondly, this application also provides a display device, including a display panel according to the embodiment of the first aspect of this application.

[0006] In the display panel and display device provided in this application embodiment, a first partition area is provided between the display area and the opening area. A first anti-static groove or a second anti-static groove is provided in the first partition area to reduce the possibility of static electricity affecting the normal light emission of the display panel. The second conductive layer of the first anti-static groove is electrically connected to the first conductive layer and in contact with the first flexible layer, which can guide static electricity to the first conductive layer and reduce the impact of static electricity on the light-emitting device. The second anti-static groove isolates the first flexible layer and blocks the conduction of static electricity to the display area. Therefore, the display panel and display device of this application embodiment can reduce the impact of static electricity on the light-emitting device in the display area, thereby improving the anti-static capability of the display panel of this application embodiment. Attached Figure Description

[0007] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0008] Figure 1 This is a schematic diagram of a display panel according to an embodiment of this application.

[0009] Figure 2 for Figure 1 A cross-sectional view of the display panel in an embodiment of this application.

[0010] Figure 3 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0011] Figure 4 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0012] Figure 5 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0013] Figure 6 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0014] Figure 7 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0015] Figure 8 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0016] Figure 9 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0017] Figure 10 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0018] Figure 11 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0019] Figure 12 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0020] Figure 13 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0021] Figure 14 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0022] Figure 15 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0023] Figure 16 This is a schematic diagram of a display device according to an embodiment of this application.

[0024] Figure label:

[0025] 10. Display panel; 110. Substrate; 111. First flexible layer; 112. Inorganic layer; 113. Second flexible layer; 120. Array layer; 130. Buffer layer; 140. Light-emitting functional layer; 141. Anode; 142. Organic light-emitting layer; 143. Cathode; 144. Hole transport layer; 145. Electron transport layer; 146. Pixel definition layer; 147. Pixel definition aperture; 148. Light-emitting device; 150. First conductive layer; 160. Second conductive layer; 170. Third conductive layer; 180. Fourth conductive layer; 190. Fifth conductive layer;

[0026] 210. First antistatic tank; 220. Second antistatic tank; 230. First partition tank;

[0027] AA, Display area; B1, First partition area; B2, Barrier area; B3, Second partition area; C, Opening area; D, Doped area. Detailed Implementation

[0028] The features and exemplary embodiments of various aspects of this application will now be described in detail. Numerous specific details are set forth in the following detailed description in order to provide a comprehensive understanding of this application. However, it will be apparent to those skilled in the art that this application can be implemented without some of these specific details. The following description of embodiments is merely intended to provide a better understanding of this application by illustrating examples thereof.

[0029] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The embodiments will now be described in detail with reference to the accompanying drawings.

[0030] Relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0031] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0032] Furthermore, the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0033] It should be understood that in the embodiments of this application, "B corresponding to A" means that B is associated with A, and B can be determined based on A. However, it should also be understood that determining B based on A does not mean that B is determined solely based on A; B can also be determined based on A and / or other information.

[0034] The applicant discovered that when openings are needed in display panels to accommodate structures such as cameras, these openings are typically created by cutting. However, during cutting, the sidewalls of the opening carbonize, forming a conductive structure. During electrostatic discharge (ESD) testing, static electricity can conduct through the carbonized sidewalls of the opening into the interior of the display panel and down to the substrate. When the display panel is flexible, the flexible substrate exhibits a certain degree of conductivity. Static electricity can then conduct through the flexible substrate to the display area of ​​the display panel. When this static electricity reaches the location of the corresponding pixel circuit within the display area, it may cause the thin-film transistors (TFTs) in the pixel circuit to malfunction, thereby triggering the light-emitting devices corresponding to the TFTs to emit light. In other words, after cutting to create openings, the display panel's ESD protection capability deteriorates.

[0035] Based on the above analysis, the applicant proposes a display panel and a display device. The display panel includes a display area, an opening area, and a first partition area. The display area surrounds the opening area, and the first partition area is located between the display area and the opening area. A first anti-static groove or a second anti-static groove is provided within the first partition area. When the first anti-static groove is provided, it blocks the buffer layer. The second conductive layer within the first anti-static groove contacts both the first conductive layer and the first flexible layer of the substrate, thus forming an electrostatic path. Static electricity is guided out through the first flexible layer, the second conductive layer, and the first conductive layer, thereby preventing further conduction of static electricity to the display area via the first flexible layer, thereby improving the anti-static capability of the display panel of this application. When the second anti-static groove is provided, it blocks the first flexible layer, directly preventing static electricity from conducting to the display area via the first flexible layer, which also improves the anti-static capability of the display panel of this application.

[0036] Figure 1 This is a schematic diagram of a display panel according to an embodiment of this application. Figure 2 for Figure 1 A cross-sectional view of the display panel in an embodiment of this application.

[0037] Specifically, please refer to Figure 1 and Figure 2 This application provides a display panel 10, including a display area AA, an opening area C, and a first partition area B1. The first partition area B1 surrounds the opening area C, and the display area AA surrounds the first partition area B1. Along the thickness direction of the display panel 10, the display panel 10 includes: a substrate 110, including a first flexible layer 111; a buffer layer 130 located on one side of the first flexible layer 111; a first conductive layer 150 located on the side of the buffer layer 130 away from the first flexible layer 111; a first antistatic groove 210 located in the first partition area B1, the first antistatic groove 210 at least partitioning the buffer layer 130; and a second conductive layer 160 located at the bottom of the first antistatic groove 210. The first conductive layer 150 and the second conductive layer 160 are electrically connected.

[0038] Continue reading Figure 1 The display panel 10 of this embodiment includes a display area AA, an opening area C, and a first partition area B1. In this embodiment, the area corresponding to the display area AA can display and emit light. The display panel 10 of this embodiment has an opening in the opening area C. The display area AA can surround the opening area C; that is, the opening can be provided in the middle and at the edge of the display panel 10 of this embodiment. The first partition area B1 is located between the display area AA and the opening area C, and is used to prevent moisture and static electricity from entering the display area AA through the opening. The opening located in the opening area C can penetrate the display panel 10 of this embodiment.

[0039] Continue reading Figure 2 The substrate 110 is a flexible substrate, including a first flexible layer 111, which can be transparent, semi-transparent, or opaque. The first flexible layer 111 has a certain degree of conductivity. A buffer layer 130 is located on one side of the flexible substrate 110. The buffer layer 130 may include a multilayer inorganic and organic layer stacked structure to block oxygen and moisture, prevent moisture or impurities from diffusing through the substrate, and provide a flat surface on the upper surface of the substrate. The specific structure will not be described in detail in this application. It should be noted that a portion of the buffer layer 130 and the substrate 110 are located in the display area AA, and a portion is located in the first isolation area B1.

[0040] Continue reading Figure 2 Within the display area AA, the display panel 10 of this embodiment may include an array layer 120, a light-emitting functional layer 140, and an encapsulation layer. The array layer 120 is located on a substrate 110. The light-emitting functional layer 140 is located on the side of the array layer 120 facing away from the substrate 110. The encapsulation layer is located on the side of the light-emitting functional layer 140 facing away from the array layer 120. The light-emitting functional layer 140 includes a light-emitting device 148. The light-emitting device 148 may be an organic light-emitting diode (OLED), including an anode 141, a pixel definition layer 146 located above the anode 141, an organic light-emitting layer 142, and a cathode 143. The anode 141, the organic light-emitting layer 142, and the cathode 143 are sequentially arranged along the direction facing away from the substrate 110. The anode 141 includes an anode 141 pattern corresponding one-to-one with a pixel unit, and the anode 141 pattern is connected to the source electrode or drain electrode of the thin-film transistor through vias on the planarization layer. The pixel definition layer 146 is located on the side of the anode 141 facing away from the array layer 120. The pixel definition layer 146 can be formed of organic materials such as polyimide (PI), polyamide, benzocyclobutene (BCB), acrylic resin or phenolic resin, or inorganic materials such as SiNx.

[0041] Continue reading Figure 2The pixel definition layer 146 includes multiple pixel definition openings 147, which expose the anode 141. The pixel definition layer 146 covers the edges of the anode 141 pattern. An organic light-emitting layer 142 at least partially fills the pixel definition openings 147 and contacts the anode 141. The organic light-emitting layer 142 within the pixel definition openings 147 forms a minimum light-emitting device 148. Each light-emitting device 148 can emit light of different colors depending on the different organic light-emitting layers 142. Each light-emitting device 148 and the pixel circuit together constitute a sub-pixel. Multiple sub-pixels form a pixel unit, and multiple pixel units display the image.

[0042] Continue reading Figure 2 The organic light-emitting layer 142 can be formed within the pixel definition opening 147 of the pixel definition layer 146 using methods such as inkjet printing, nozzle printing, or vapor deposition. The cathode 143 can be formed on the organic light-emitting layer 142 by vapor deposition. Optionally, the cathode 143 can cover the entire surface of the organic light-emitting layer 142 and the pixel definition layer 146.

[0043] Continue reading Figure 2 The light-emitting functional layer 140 further includes a hole transport layer 144 and an electron transport layer 145. The hole transport layer 144 is located on the surface of the anode 141 facing away from the substrate 110, the organic light-emitting layer 142 is located on the surface of the hole transport layer 144 facing away from the anode 141, and the electron transport layer 145 is located on the surface of the organic light-emitting layer 142 facing away from the hole transport layer 144. The hole transport layer 144, located between the anode 141 and the organic light-emitting layer 142, enhances the ability of the anode 141 to inject holes and transport them to the organic light-emitting layer 142. The electron transport layer 145, located between the organic light-emitting layer 142 and the cathode 143, enhances the ability of the cathode 143 to inject electrons and transport them to the organic light-emitting layer 142. This allows for a greater injection of holes and electrons into the organic light-emitting layer 142, thereby improving the recombination efficiency and ultimately increasing the luminous efficiency of the organic light-emitting layer 142.

[0044] Continue reading Figure 2The array layer 120 includes a plurality of thin-film transistors (TFTs) and pixel circuits formed by the TFTs for controlling the light-emitting device 148. This embodiment uses a top-gate type TFT as an example for structural description. The array layer 120 includes an active layer for forming the TFT, comprising a source region and a drain region formed by doping with N-type or P-type impurity ions, and a channel region between the source and drain regions; a gate insulating layer on the active layer; and a gate of the TFT located on the gate insulating layer. An interlayer insulating layer is located on the gate, which may be formed of an insulating inorganic layer such as silicon oxide or silicon nitride, or alternatively, an insulating organic layer. The source and drain electrodes of the TFT are located on the interlayer insulating layer. The source and drain electrodes are electrically connected (or bonded) to the source and drain regions respectively through contact holes formed by selectively removing the gate insulating layer and the interlayer insulating layer.

[0045] Continue reading Figure 2 The display panel 10 in this embodiment may further include an encapsulation layer located on the side of the first conductive layer 150 facing away from the substrate 110, and the encapsulation layer covers the first antistatic groove 210. The encapsulation layer may be a thin-film encapsulation layer that completely covers the entire display area AA and extends from the display area AA to the first isolation area B1. Within the display area AA, the encapsulation layer encapsulates the light-emitting functional layer 140, and within the first isolation area B1, the encapsulation layer encapsulates the first antistatic groove 210.

[0046] Continue reading Figure 2 The display panel 10 in this embodiment further includes a barrier region B2 and a second partition region B3. The barrier region B2 is located before the first partition region B1 and the opening region C. The barrier region B2 has a barrier structure, which is arranged along the thickness direction of the display panel 10 and located on the side of the buffer layer 130 facing away from the substrate 110. During the fabrication of the encapsulation layer, the barrier structure prevents the material of the encapsulation layer from flowing from the display area AA and the first partition region B1 toward the opening region C. The second partition region B3 is located between the barrier region B2 and the opening region C. The second partition region B3 has a plurality of partition grooves arranged in a row along the direction from the barrier region B2 to the opening region C to prevent moisture from entering the display area AA.

[0047] Continue reading Figure 2 In this embodiment, the first conductive layer 150 is located on the side of the buffer layer 130 opposite to the first flexible layer 111, and the first conductive layer 150 can be prepared by vapor deposition. A portion of the first conductive layer 150 can be located in the display area AA, and a portion of the first conductive layer 150 can also be located in the first isolation area B1.

[0048] Continue reading Figure 2Within the first partition area B1, the display panel 10 of this embodiment is provided with a first anti-static groove 210 to reduce static electricity entering the display area AA via the first flexible layer 111. The first anti-static groove 210 extends along the thickness direction of the display panel 10 and at least blocks the buffer zone, exposing the first flexible layer 111 at its bottom. A second conductive layer 160 is provided at the bottom of the first anti-static groove 210, and the second conductive layer 160 is electrically connected to the first conductive layer 150. Considering that the first flexible layer 111 also has a certain conductivity, the first flexible layer 111, the second conductive layer 160, and the first conductive layer 150 form a current path. When static electricity is conducted to the first antistatic tank 210 via the first flexible layer 111, the static electricity will preferentially be drawn out via the second conductive layer 160 and the first conductive layer 150 because the conductivity of the first conductive layer 150 and the second conductive layer 160 is significantly better than that of the first flexible layer 111. This makes it difficult for static electricity to continue to be conducted to the display area AA along the first flexible layer 111, thereby improving the antistatic capability of the display panel 10 in this embodiment.

[0049] Further reading Figure 2 The first antistatic groove 210 separates the first conductive layer 150 and the buffer layer 130, and the second conductive layer 160 is formed on the surface of the first flexible layer 111.

[0050] In addition to isolating the buffer layer 130, the first antistatic groove 210 can also isolate the first conductive layer 150, allowing the first conductive layer 150 to extend to the edge of the first antistatic groove 210. The surface of the first flexible layer 111 facing the buffer layer 130 is exposed at the bottom of the first antistatic groove 210. The second conductive layer 160 is located on the surface of the first flexible layer 111 and at the bottom of the first antistatic groove 210. The first conductive layer 150 and the second conductive layer 160 can be connected by a through-hole connection; the first conductive layer 150 and the second conductive layer 160 can also be connected by an overlap; or they can be manufactured in the same layer to form an integral structure, thereby ensuring a good electrical connection between the first conductive layer 150 and the second conductive layer 160. The second conductive layer 160 covers the first flexible layer 111 exposed at the bottom of the first partition groove 230 and is connected by overlapping. This ensures a good connection between the second conductive layer 160 and the first flexible layer 111, allowing static electricity to be conducted out through the second conductive layer 160 and the first conductive layer 150. This reduces the possibility of static electricity entering the display area AA through the first flexible layer 111, thereby improving the anti-static capability of the display panel 10 in this embodiment.

[0051] Figure 3 for Figure 1 A cross-sectional view of the AA interface of the display panel in an embodiment of this application.

[0052] Further reading Figure 3 The first conductive layer 150 is reused as the second conductive layer 160. The first conductive layer 150 is a cathode 143 vapor deposition layer and is continuously distributed on the side wall of the first antistatic tank 210.

[0053] The portion of the first conductive layer 150 located in the display area AA can be used as the cathode 143 of the light-emitting functional layer 140; that is, the first conductive layer 150 is a cathode 143 vapor-deposited layer. The first conductive layer 150 is reused as the second conductive layer 160. During fabrication, the first conductive layer 150 and the second conductive layer 160 can be fabricated in the same layer using vapor deposition. This simplifies the electrical connection between the first conductive layer 150 and the second conductive layer 160. In actual operation of the display panel 10 of this embodiment, the first conductive layer 150 is in a low-level state. Since the first flexible layer 111, the second conductive layer 160, and the first conductive layer 150 form a conductive path in the first partition area B1, when static electricity enters the first flexible layer 111 from the opening area C, the low-level signal of the first conductive layer 150 will cover the voltage of the static electricity, reducing the impact of static electricity on the display area AA.

[0054] Further reading Figure 3 Along the direction from the first conductive layer 150 to the substrate 110, the opening width of the first antistatic groove 210 gradually decreases; the bottom width of the first antistatic groove 210 is greater than zero, so that the first conductive layer 150 covers at least part of the first flexible layer 111 at the bottom of the first antistatic groove 210.

[0055] Along the direction from the first conductive layer 150 to the substrate 110, the first antistatic trench 210 is wider at the top and narrower at the bottom, and the first flexible layer 111 is exposed at the bottom of the first antistatic trench 210, thus forming an inverted trapezoidal trench structure. When fabricating the second conductive layer 160, the second conductive layer 160 can cover the first flexible layer 111 exposed at the bottom of the first antistatic trench 210, and can also cover the sidewall of the first antistatic trench 210, thereby extending to the edge of the first antistatic trench 210, so that the first conductive layer 150 and the second conductive layer 160 can be fabricated in the same layer, and the first conductive layer 150 can be reused as the second conductive layer 160.

[0056] Figure 4 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0057] Optionally, please refer to Figure 4Along the direction from the first conductive layer 150 to the substrate 110, the opening width of the first antistatic groove 210 can also remain unchanged, so that the first antistatic groove 210 forms a straight groove. Similarly, the second conductive layer 160 can also cover the sidewall of the first antistatic groove 210, thereby extending to the edge of the first antistatic groove 210, so that the first conductive layer 150 and the second conductive layer 160 can be fabricated in the same layer, and the first conductive layer 150 can be reused as the second conductive layer 160.

[0058] Figure 5 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0059] Further, please refer to Figure 5 The display panel 10 in this embodiment of the application further includes a first partition groove 230. The first partition groove 230 is disposed around the opening area C. Along the direction from the opening area C to the display area AA, the first partition groove 230 is located between the first antistatic groove 210 and the opening area C. The first partition groove 230 separates the first conductive layer 150, the buffer layer 130 and at least part of the first flexible layer 111.

[0060] In addition to preventing moisture from entering the display area AA from the opening area C, the first isolation groove 230 also isolates the first conductive layer 150, the buffer layer 130, and at least part of the first flexible layer 111, preventing static electricity from entering the display area AA from the opening area C through the first conductive layer 150 or the first flexible layer 111. Furthermore, the first isolation groove 230 can also reduce the electrical signal of the display area AA from entering the opening area C through the first conductive layer 150. Through the combined effect of the first isolation groove 230 and the first anti-static groove 210, the possibility of static electricity entering the display area AA from the opening area C can be significantly reduced, thereby ensuring that the display panel has a good display effect.

[0061] Figure 6 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0062] Further, please refer to Figure 6 The substrate 110 further includes: an inorganic layer 112 located on the side of the first flexible layer 111 away from the buffer layer 130; and a second flexible layer 113 located on the side of the inorganic layer 112 away from the first flexible layer 111.

[0063] Along the thickness direction of the substrate 110, a first flexible layer 111, an inorganic layer 112, and a second flexible layer 113 are sequentially stacked, forming a multilayer structure for the substrate 110. The first flexible layer 111 and the second flexible layer 113 ensure good flexibility of the substrate 110, while the inorganic layer 112 ensures good moisture barrier properties. For example, the materials of the first flexible layer 111 and the second flexible layer 113 can both be thin polymers, such as polyimide, and the material of the inorganic layer 112 can be amorphous silicon (A-Si). All three layers—the first flexible layer 111, the inorganic layer 112, and the second flexible layer 113—possess a certain degree of conductivity, with the inorganic layer 112 exhibiting superior conductivity compared to the first flexible layer 111 and the second flexible layer 113.

[0064] Because the first antistatic groove 210 blocks the buffer layer 130, the second conductive layer 160 located at the bottom of the first antistatic groove 210 is in contact with the first flexible layer 111. Considering that the second conductive layer 160 is electrically connected to the first conductive layer 150, the first flexible layer 111, the second conductive layer 160, and the first conductive layer 150 can form a current conduction path. When static electricity is conducted to the display area AA via the first flexible layer 111, the inorganic layer 112, and the second flexible layer 113, it will preferentially conduct to the current conduction path with higher conductivity. Since the first conductive layer 150 and the second conductive layer 160 are usually made of metal materials with high conductivity, when static electricity is conducted to the first antistatic groove 210, the static electricity will be conducted to the conduction path formed by the first flexible layer 111, the second conductive layer 160, and the first conductive layer 150, thereby reducing the possibility of static electricity continuing to conduct to the display area AA via the first flexible layer 111, the inorganic layer 112, and the second flexible layer 113, thereby reducing the impact of static electricity on the display area and improving the display effect of the display panel in this embodiment.

[0065] Figure 7 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0066] Further, please refer to Figure 7 The display panel 10 in this embodiment further includes a fourth conductive layer 180. Along the direction from the first conductive layer 150 to the substrate 110, the fourth conductive layer 180 is located between the inorganic layer 112 and the buffer layer 130. Along the direction from the opening area C to the display area AA, the fourth conductive layer 180 is located between the first antistatic groove 210 and the display area AA. The fourth conductive layer 180 is electrically connected to the first conductive layer 150.

[0067] The fourth conductive layer 180 is located between the inorganic layer 112 and the buffer layer 130. This means that the fourth conductive layer 180 forms a charge path with the inorganic layer 112 through contact. The fourth conductive layer 180 is electrically connected to the first conductive layer 150, thus forming a charge path between the inorganic layer 112, the fourth conductive layer 180, and the first conductive layer 150. When a small amount of static electricity is conducted through the second flexible layer 113 to the first antistatic groove 210, the static electricity will be conducted to the first conductive layer 150 via the inorganic layer 112 and the fourth conductive layer 180, thereby hindering the conduction of static electricity along the substrate 110 to the display area AA, further improving the antistatic capability of the display panel 10 in this embodiment. When the first conductive layer 150 is reused as the cathode 143 of the light-emitting functional layer 140, the low-level signal of the first conductive layer 150 will cover the voltage of the static electricity, reducing the impact of static electricity on the display area AA. For example, the fourth conductive layer 180 can be located between the inorganic layer 112 and the first flexible layer 111. At this time, the fourth conductive layer 180 comes into contact with the inorganic layer 112, so that the inorganic layer 112, the fourth conductive layer 180 and the first conductive layer 150 form a current conduction path, which can guide static electricity to the first conductive layer 150, thereby preventing static electricity from being conducted to the display area through the first flexible layer 111 and the inorganic layer 112.

[0068] Figure 8 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0069] Further, please refer to Figure 8 The inorganic layer 112 includes: a doped region D, which is located in the first isolation region B1; the doped region D has a hole structure.

[0070] A doped region D is formed in the inorganic layer 112, thereby forming an inorganic layer 112 along the direction from the display area AA to the aperture area C, resulting in a conventional inorganic layer-doped inorganic layer-conventional inorganic layer structure. Since the inorganic layer 112 uses an inorganic material such as amorphous silicon, after doping in the doped region D, the inorganic layer 112 forms a hole structure, thus forming a semiconductor structure in the doped inorganic layer 112 within the doped region D. Because the conductivity of the inorganic layer 112 is superior to that of the second flexible layer 113, the inorganic layer 112 serves as the primary conduction path for static electricity when the first flexible layer 111 is blocked. When static electricity is conducted to the display area AA via the inorganic layer 112, the semiconductor structure formed by the doped inorganic layer 112 absorbs and stores the static electricity, thereby preventing further conduction of static electricity to the display area AA, thus improving the anti-static capability of the display panel 10 in this embodiment. When manufacturing the display panel of this application embodiment, after preparing the inorganic layer 112, material can be directly added to the position corresponding to the doped region D of the inorganic layer 112 so that the doped region D forms a hole structure.

[0071] The doped region D can be located between the first antistatic trench 210 and the opening region C. When the amount of static charge is too large, the semiconductor structure corresponding to the doped region D will reach saturation in its absorption of static electricity. Excess static electricity may still be conducted to the display area AA through the first flexible layer 111, the inorganic layer 112, and the second flexible layer 113. At this time, since the first antistatic trench 210 is located between the doped region D and the display area AA, the excess static electricity will be conducted to the conduction path formed by the first flexible layer 111, the second conductive layer 160, and the first conductive layer 150, which can reduce the impact of static electricity on the display area and improve the display effect of the display panel in this embodiment.

[0072] Figure 9 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0073] Please see Figure 9 In another embodiment of this application, a second antistatic groove 220 is provided in the first partition area B1. The difference between this embodiment and the previous embodiment of this application is the difference between the first antistatic groove 210 and the second antistatic groove 220. All other structures are the same.

[0074] Specifically, please refer to Figure 9 The display panel 10 in this embodiment further includes a second antistatic groove 220 and a third conductive layer 170. The second antistatic groove 220 is located in the first isolation region B1 and at least partially surrounds the opening region C; along the direction from the first conductive layer 150 to the substrate 110, the second antistatic groove 220 blocks at least a portion of the first flexible layer 111. The third conductive layer 170 is located at the bottom of the second antistatic groove 220 and is insulated from the first conductive layer 150.

[0075] Within the first partition area B1, the display panel 10 of this embodiment is provided with a second antistatic groove 220 to reduce static electricity entering the display area AA via the first flexible layer 111. The second antistatic groove 220 extends along the thickness direction of the display panel 10 and blocks the first flexible layer 111, thereby preventing static electricity from being conducted to the display area AA via the first flexible layer 111, thus improving the antistatic capability of the display panel 10 of this embodiment. In addition, the third conductive layer 170 located at the bottom of the second antistatic groove 220 is insulated from the first conductive layer 150, preventing the first conductive layer 150 from forming an electrical connection with the side of the second antistatic groove 220 near the opening area, thereby making the layer structure above the buffer layer 130 insulated from the display area AA and the opening area C due to the second partition groove.

[0076] Figure 10 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0077] Further, please refer to Figure 10 The substrate 110 further includes: an inorganic layer 112 located on the side of the first flexible layer 111 away from the buffer layer 130; and a second flexible layer 113 located on the side of the inorganic layer 112 away from the first flexible layer 111.

[0078] Along the thickness direction of the substrate 110, a first flexible layer 111, an inorganic layer 112, and a second flexible layer 113 are sequentially stacked, forming a multilayer structure for the substrate 110. The first flexible layer 111 and the second flexible layer 113 ensure good flexibility of the substrate 110, while the inorganic layer 112 ensures good moisture barrier properties. For example, the materials of the first flexible layer 111 and the second flexible layer 113 can both be thin polymers, such as polyimide, and the material of the inorganic layer 112 can be amorphous silicon (A-Si). All three layers—the first flexible layer 111, the inorganic layer 112, and the second flexible layer 113—possess a certain degree of conductivity, with the inorganic layer 112 exhibiting superior conductivity compared to the first flexible layer 111 and the second flexible layer 113.

[0079] Figure 11 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0080] Further, please refer to Figure 11 Along the direction from the first conductive layer 150 to the substrate 110, the second antistatic groove 220 separates the first flexible layer 111 and at least a portion of the inorganic layer 112.

[0081] The second antistatic groove 220 isolates at least a portion of the inorganic layer 112. At the recess of the second antistatic groove 220, the inorganic layer 112's ability to conduct static electricity decreases. Given that the first flexible layer 111 has difficulty conducting static electricity, the isolation portion of the inorganic layer 112 by the second antistatic groove 220 further hinders the conduction of static electricity to the display area AA, further improving the antistatic capability of the display panel 10 in this embodiment. Furthermore, the second antistatic groove 220 may not isolate the second flexible layer 113 to ensure the structural strength of the substrate 110.

[0082] Further reading Figure 11 Along the direction from the opening area C to the display area AA, the opening width of the second antistatic groove 220 is the first width. From the direction from the first conductive layer 150 to the substrate 110, the first width of the second antistatic groove 220 at the end near the first conductive layer 150 is smaller than the first width of the bottom of the second antistatic groove 220.

[0083] Along the direction from the opening area C to the display area AA, the opening width of the second antistatic groove 220 is smaller than the bottom width of the second antistatic groove 220, making the second antistatic groove 220 a groove structure that is narrower at the top and wider at the bottom. For example, the second antistatic groove 220 can be a groove structure that is narrower at the top and wider at the bottom, either an inverted T-shaped groove structure or a trapezoidal groove structure that is narrower at the top and wider at the bottom. When the second antistatic groove 220 is processed using an under-cut process, the second antistatic groove 220 has an inverted T-shaped groove structure that is narrower at the top and wider at the bottom, and the bottom edge of the second antistatic groove 220 is recessed relative to the sidewall. When fabricating the third conductive layer 170, the first conductive layer 150 and the third conductive layer 170 can be fabricated simultaneously by vapor deposition. Because the bottom of the second antistatic tank 220 is processed using a bottom-cutting process, although the first conductive layer 150 and the third conductive layer 170 are fabricated simultaneously by vapor deposition, the third conductive layer 170 located at the bottom of the second antistatic tank 220 is in a non-contact state with the sidewall of the second antistatic tank 220. This ensures that the first conductive layer 150 and the third conductive layer 170 form two non-contact metal layers, guaranteeing that the second antistatic tank 220 isolates the layer structure (e.g., the first conductive layer 150) above the buffer layer 130 between the display area AA and the opening area C. It should be noted that when the first conductive layer 150 and the third conductive layer 170 are fabricated simultaneously by vapor deposition, the first conductive layer 150 and the third conductive layer 170 can correspond to the cathode 143, or they can be other metal functional layers fabricated by vapor deposition. Therefore, in this embodiment, the second antistatic tank 220 not only improves the antistatic capability of the display panel 10 but also serves as an isolation tank.

[0084] Figure 12 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0085] Further, please refer to Figure 12 The display panel 10 in this embodiment further includes a fourth conductive layer 180. Along the direction from the first conductive layer 150 to the substrate 110, the fourth conductive layer 180 is located between the inorganic layer 112 and the buffer layer 130. Along the direction from the opening area C to the display area AA, the fourth conductive layer 180 is located between the second antistatic groove 220 and the display area AA. The fourth conductive layer 180 is electrically connected to the first conductive layer 150.

[0086] The fourth conductive layer 180 is located between the inorganic layer 112 and the buffer layer 130. This means that the fourth conductive layer 180 forms a charge path with the inorganic layer 112 through contact. The fourth conductive layer 180 is electrically connected to the first conductive layer 150, thus forming a charge path between the inorganic layer 112, the fourth conductive layer 180, and the first conductive layer 150. When a small amount of static electricity is conducted through the second flexible layer 113 to the second antistatic tank 220, the static electricity will be conducted to the first conductive layer 150 via the inorganic layer 112 and the fourth conductive layer 180, thereby hindering the conduction of static electricity along the substrate 110 to the display area AA, further improving the antistatic capability of the display panel 10 in this embodiment. When the first conductive layer 150 is reused as the cathode 143 of the light-emitting functional layer 140, the low-level signal of the first conductive layer 150 will cover the voltage of the static electricity, reducing the impact of static electricity on the display area AA. For example, the fourth conductive layer 180 can be located between the inorganic layer 112 and the first flexible layer 111. At this time, the fourth conductive layer 180 comes into contact with the inorganic layer 112, so that the inorganic layer 112, the fourth conductive layer 180 and the first conductive layer 150 form a current conduction path, which can guide static electricity to the first conductive layer 150, thereby preventing static electricity from being conducted to the display area through the first flexible layer 111 and the inorganic layer 112.

[0087] Figure 13 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0088] Further, please refer to Figure 13 The inorganic layer 112 includes: a doped region D, which is located in the first isolation region B1; the doped region D has a hole structure.

[0089] A doped region D is formed in the inorganic layer 112, thereby forming an inorganic layer 112 along the direction from the display area AA to the aperture area C, resulting in a structure of conventional inorganic layer-doped inorganic layer-conventional inorganic layer 112. Since the inorganic layer 112 uses an inorganic material such as amorphous silicon, after doping in the doped region D, the inorganic layer 112 forms a hole structure, thus forming a semiconductor structure. Because the conductivity of the inorganic layer 112 is superior to that of the second flexible layer 113, the inorganic layer 112 serves as the main conduction path for static electricity when the first flexible layer 111 is blocked. When static electricity is conducted to the display area AA via the inorganic layer 112, the semiconductor structure formed by the doped inorganic layer 112 absorbs and stores the static electricity, thereby preventing further conduction of static electricity to the display area AA, thus improving the anti-static capability of the display panel 10 in this embodiment.

[0090] Further reading Figure 13 Along the thickness direction of the display panel 10, the second antistatic groove 220 and the doped region D at least partially overlap in their orthographic projections onto the display panel 10.

[0091] Along the thickness direction of the display panel 10, the second antistatic groove 220 and the doped region D at least partially overlap in the orthographic projection direction of the display panel 10, such that the doped region D of the inorganic layer 112 is located below the second antistatic groove 220. Considering that static electricity can be conducted through the inorganic layer 112 to the second antistatic groove 220, the location of the doped region D of the inorganic layer 112 below the second antistatic groove 220 allows static electricity conducted through the inorganic layer 112 to be conducted to the doped region D of the inorganic layer 112, thereby allowing the static electricity to be absorbed by the doped region D. Therefore, by placing the doped region D of the inorganic layer 112 below the second antistatic groove 220, the antistatic capability of the display panel 10 of this embodiment can be further improved.

[0092] Figure 14 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0093] Further, please refer to Figure 14 Along the thickness direction of the display panel 10, the second antistatic groove 220 separates the first flexible layer 111, and the third conductive layer 170 is formed on the upper surface of the doped region D.

[0094] The second antistatic groove 220 isolates the first flexible layer 111, exposing the doped region D of the inorganic layer 112 at the bottom of the second antistatic groove 220, meaning that the doped region D is located directly below the second antistatic groove 220. The third conductive layer 170 covers the upper surface of the doped region D, which can improve the absorption capacity of the doped region D for static electricity, thereby improving the antistatic capability of the display panel 10 in this embodiment.

[0095] Furthermore, the inorganic layer 112 contains silicon, and the doped region D is doped with boron to form a hole structure.

[0096] In this embodiment, the inorganic layer 112 is made of amorphous silicon and contains silicon. Boron is added to the inorganic layer 112 in the doped region D. When the trivalent boron atom and the four surrounding tetravalent silicon atoms form a covalent structure, one electron is missing, creating a hole. This results in a P-type amorphous semiconductor structure with a hole structure in the doped region D. When static electricity is conducted to the doped region D, the electrons required for electrostatic conduction enter the hole structure, thus hindering further electrostatic conduction and achieving the effect of adsorbing static electricity. When adding boron, the inorganic layer 112 is first prepared, and a first flexible layer 111 and a buffer layer 130 are prepared above it. A second antistatic trench 220 is fabricated by undercutting, exposing the bottom of the inorganic layer 112. Boron is then added to the inorganic layer 112 to form the doped region D. Exemplarily, chemical vapor deposition can be used to add boron to the inorganic layer 112.

[0097] Figure 15 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0098] Further, please refer to Figure 15 The display panel 10 in this embodiment further includes a fifth conductive layer 190. Along the direction from the first conductive layer to the substrate, the fifth conductive layer 190 is located between the inorganic layer 112 and the first flexible layer 111. Along the direction from the doped region D to the display region AA, the fifth conductive layer 190 is located between the doped region D and the display region AA. The fifth conductive layer 190 is electrically connected to the first conductive layer 150.

[0099] The fifth conductive layer 190 is located between the doped region D and the display region AA, and is in contact with the inorganic layer 112. The fifth conductive layer 190 is also electrically connected to the first conductive layer 150. Since the inorganic layer 112 also has a certain conductivity, the inorganic layer 112, the fifth conductive layer 190, and the first conductive layer 150 can form a static electricity conduction path. When the static charge is large, the semiconductor structure formed in the doped region D will become saturated, and the static electricity will continue to be conducted to the display region from the second antistatic trench 220 via the inorganic layer 112. Since the conductivity of the fifth conductive layer 190 and the first conductive layer 150 is significantly better than that of the inorganic layer 112 and the first flexible layer 111, excess static electricity can be conducted to the first conductive layer 150 via the fifth conductive layer 190, thereby hindering the conduction of static electricity along the inorganic layer 112 to the display region AA, further improving the antistatic capability of the display panel 10 in this embodiment. When the first conductive layer 150 is reused as the cathode 143 of the light-emitting functional layer 140, the low-level signal of the first conductive layer 150 will cover the voltage of static electricity, reducing the impact of static electricity on the display area AA.

[0100] Figure 16 for Figure 1 Another cross-sectional view of the display panel of the present application embodiment in section AA.

[0101] Please see Figure 16 This application also provides a display device. The display device includes the display panel 10 provided in any of the above embodiments. The display device provided in this application can be any product or component with practical functions, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0102] In summary, embodiments of this application provide a display panel and display device in which a first partition area is provided between the display area and the opening area, and a first anti-static groove or a second anti-static groove is provided in the first partition area to reduce the possibility of static electricity affecting the normal light emission of the display panel. The second conductive layer of the first anti-static groove is electrically connected to the first conductive layer and in contact with the first flexible layer, which can guide static electricity to the first conductive layer and reduce the impact of static electricity on the light-emitting device; the second anti-static groove isolates the first flexible layer and prevents static electricity from being conducted to the display area. Therefore, the display panel and display device of this application embodiment can reduce the impact of static electricity on the light-emitting device in the display area, thereby improving the anti-static capability of the display panel of this application embodiment.

[0103] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display panel, characterized by, The display panel comprises a display area, an opening area and a first partition area, the first partition area surrounds the opening area, and the display area surrounds the first partition area. In the thickness direction of the display panel, the display panel comprises: a substrate comprising a first flexible layer; a buffer layer located on one side of the first flexible layer; The substrate further comprises: an inorganic layer located on the side of the first flexible layer away from the buffer layer; and a second flexible layer located on the side of the inorganic layer away from the first flexible layer; a first conductive layer located on the side of the buffer layer away from the first flexible layer; a second anti-static groove located in the first partition area, the second anti-static groove at least partially surrounds the opening area, in the direction from the first conductive layer to the substrate, the second anti-static groove partitions the first flexible layer and at least part of the inorganic layer, a third conductive layer located at the bottom of the bottom of the second anti-static groove, the third conductive layer and the first conductive layer are insulated; a fourth conductive layer located between the inorganic layer and the buffer layer in the direction from the first conductive layer to the substrate, the fourth conductive layer is located between the second anti-static groove and the display area in the direction from the opening area to the display area, and the fourth conductive layer is electrically connected with the first conductive layer.

2. The display panel of claim 1, wherein, The display panel further comprises: a first anti-static groove located in the first partition area, the first anti-static groove at least partitions the buffer layer, a second conductive layer located at the bottom of the first anti-static groove, the first conductive layer and the second conductive layer are electrically connected; the first anti-static groove partitions the first conductive layer and the buffer layer, and the second conductive layer is formed on the surface of the first flexible layer.

3. The display panel of claim 2, wherein, The first conductive layer is multiplexed as the second conductive layer, the first conductive layer is a cathode evaporation layer, and is continuously distributed on the sidewall of the first anti-static groove.

4. The display panel of claim 3, wherein, In the direction from the first conductive layer to the substrate, the opening width of the first anti-static groove gradually decreases; the bottom width of the first anti-static groove is greater than zero, so that the first conductive layer covers at least part of the first flexible layer at the bottom of the first anti-static groove.

5. The display panel of claim 2, wherein, Further comprising a first partition groove, the first partition groove is arranged around the opening area, in the direction from the opening area to the display area, the first partition groove is located between the first anti-static groove and the opening area, and the first partition groove partitions the first conductive layer, the buffer layer and at least part of the first flexible layer.

6. The display panel of claim 1, wherein, In the direction from the opening area to the display area, the opening width of the second anti-static groove is a first width, in the direction from the first conductive layer to the substrate, the first width of one end of the second anti-static groove close to the first conductive layer is smaller than the first width of the bottom of the second anti-static groove.

7. A display panel, characterized by The display panel comprises a display area, an opening area and a first partition area, the first partition area surrounds the opening area, and the display area surrounds the first partition area. In the thickness direction of the display panel, the display panel comprises: a substrate comprising a first flexible layer; a buffer layer located on one side of the first flexible layer; The substrate further comprises: an inorganic layer located on the side of the first flexible layer away from the buffer layer; and a second flexible layer located on the side of the inorganic layer away from the first flexible layer; A first conductive layer is located on the side of the buffer layer away from the first flexible layer. The inorganic layer includes a doped region located in the first partition region, the doped region having a hole structure. A first anti-static groove is located in the first partition region, the first anti-static groove at least partitioning the buffer layer, a second conductive layer is located at the bottom of the first anti-static groove, the first conductive layer and the second conductive layer are electrically connected; the doped region is located between the first anti-static groove and the opening region. Or, a second anti-static groove is located in the first partition region, the second anti-static groove at least partially surrounding the opening region, along the direction from the first conductive layer to the substrate, the second anti-static groove partitioning the first flexible layer and at least part of the inorganic layer, a third conductive layer is located at the bottom of the bottom of the second anti-static groove, the third conductive layer and the first conductive layer are insulated, along the thickness direction of the display panel, the second anti-static groove and the doped region at least partially overlap in the orthographic projection of the display panel.

8. The display panel of claim 7, wherein, Along the thickness direction of the display panel, the second anti-static groove partitions the first flexible layer, and the third conductive layer is formed on the upper surface of the doped region.

9. The display panel of claim 7, wherein, The material of the inorganic layer contains silicon element, and boron element is doped in the doped region to form a hole structure.

10. The display panel of claim 7, wherein, Further comprising a fifth conductive layer, along the direction from the first conductive layer to the substrate, the fifth conductive layer is located between the inorganic layer and the first flexible layer, along the direction from the doped region to the display region, the fifth conductive layer is located between the doped region and the display region, the fifth conductive layer and the first conductive layer are electrically connected.

11. A display device, characterized by comprising: The display panel comprises any one of claims 1 to 10.

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