Hotspot detection methods, devices, and media

Abstract

Example embodiments according to the present disclosure provide hotspot detection methods, devices, and media. The method includes obtaining a test pattern and a reference process window for the test pattern. The reference process window indicates a range of one or more process parameters. The method also includes determining, based on the reference process window, a first simulated pattern formed by photolithography with the test pattern. The method also includes determining a first imaging cost related to at least forming the first simulated pattern. The method also includes determining, based on the first imaging cost, a target set of process parameters. The method further includes determining, based on the target set of process parameters, a hotspot in a layout to be detected. In this way, hotspot detection can be achieved without measurement data, thereby advantageously speeding up the development process for new process nodes.

Description

Technical Field

[0001] The embodiments of this disclosure primarily relate to the field of integrated circuits, and more specifically, to hotspot detection methods, devices, and media. Background Technology

[0002] Photolithography is one of the key processes determining the linewidth of integrated circuits. In advanced semiconductor process nodes, due to the diffraction and interference effects of light, as well as limitations in light source design, photolithography cannot achieve sufficient lithographic processing windows or produces poor lithographic imaging quality at certain specific sizes or pitches. Patterns exhibiting these phenomena in the layout are called hot spots. Before transferring the layout to the wafer, it needs to be inspected to identify hot spots. In particular, identifying hot spots in the layout as early as possible during the development of new process nodes is beneficial for optimizing the layout design. Summary of the Invention

[0003] In a first aspect of this disclosure, a hotspot detection method is provided. In this method, a test pattern and a reference process window for the test pattern are acquired. The reference process window indicates a range of one or more process parameters. The method further includes determining, based on the reference process window, a first simulated pattern formed by photolithography using the test pattern. The method further includes determining a first imaging cost at least related to forming the first simulated pattern. The method further includes determining a target set of process parameters based on the first imaging cost. The method further includes determining hotspots in the layout to be detected based on the target set of process parameters.

[0004] In a second aspect of this disclosure, an electronic device is provided. The electronic device includes a processor and a memory coupled to the processor. The memory has instructions stored therein, which, when executed by the processor, cause the electronic device to perform a method according to a first aspect of this disclosure.

[0005] In a third aspect of this disclosure, a computer-readable storage medium is provided. A computer program is stored on the computer-readable storage medium. When executed by a processor, the computer program implements the method according to a first aspect of this disclosure.

[0006] It should be understood that the content described in this summary section is not intended to limit the key or essential features of the embodiments of this disclosure, nor is it intended to restrict the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0007] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. In the drawings, the same or similar reference numerals denote the same or similar elements, wherein:

[0008] Figure 1 A schematic diagram of an example environment in which the various embodiments of this disclosure can be implemented is shown;

[0009] Figure 2 A flowchart of a method for hotspot detection according to some embodiments of the present disclosure is shown;

[0010] Figure 3 A flowchart illustrating an example process for determining a first simulation pattern according to some embodiments of the present disclosure is shown;

[0011] Figure 4 A schematic diagram of multiple initial process conditions in a reference process window according to some embodiments of the present disclosure is shown;

[0012] Figure 5 A flowchart illustrating an example process for determining candidate process conditions according to some embodiments of this disclosure is shown;

[0013] Figure 6 A flowchart illustrating an example process for determining hotspots based on a target parameter set according to some embodiments of this disclosure is shown;

[0014] Figure 7 A flowchart illustrating an example process for detecting hotspots using a cost function according to some embodiments of this disclosure is shown; and

[0015] Figure 8 A block diagram of an electronic device in which one or more embodiments of the present disclosure may be implemented is shown. Detailed Implementation

[0016] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0017] In the description of embodiments of this disclosure, the term "comprising" and similar terms should be understood as open-ended inclusion, i.e., "including but not limited to". The term "based on" should be understood as "at least partially based on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0018] As used in this article, the term "nominal conditions" or "nominal process conditions" refers to the process conditions corresponding to the center of the process window.

[0019] As briefly mentioned earlier, the goal is to detect hotspots in the layout as early as possible to optimize the layout design. For example, in the early stages of Resolution Enhancement Technology (RET) processes, optical models are typically needed to simulate the lithography illumination process for RET-related testing / development planning, such as detecting failure locations on a mask layout that has already undergone optical nearest neighbor correction (OPC) during Design-Process Co-Optimization (DTCO). Models used for this purpose are also known as "hotspot models," and they are used to detect or screen for lithography-related failures (i.e., hotspots) on the mask layout.

[0020] In traditional methods for generating such hotspot models, measurement data from an optimized process is required to calibrate the hotspot model. This measurement data includes measurements of a given pattern under nominal conditions and within a range of focus values ​​and exposure doses. These patterns may contain low process fidelity and exhibit metrological noise at the top or bottom of the photoresist used to calibrate the hotspot model's performance.

[0021] This traditional approach has some problems. On the one hand, in the development of new process nodes, there may be no available lithography process or the lithography process has not yet been optimized. This can lead to a gap between the generated model and the optimized lithography process; that is, the generated model may deviate from the optimized lithography process.

[0022] On the other hand, the lack of wafer measurement data for model calibration and verification also limits the generation of hotspot models for DTCO. In other words, without measurement data, it is difficult to calibrate and verify hotspot models. However, in some scenarios, hotspot detection of the design layout is necessary. For example, in some scenarios targeting the design layout, hotspot detection of the lithography process is required without OPC. Before the advent of DTCO, this was also known as Lithography Compliance Check (LCC).

[0023] Therefore, embodiments of this disclosure provide a hotspot detection scheme to solve, or at least partially solve, the aforementioned problems and / or other potential problems in conventional schemes. According to embodiments of this disclosure, a simulated pattern formed by photolithography using the test pattern is determined based on a reference process window for the test pattern through photolithographic imaging simulation. Then, a target set of process parameters is determined based on at least the imaging cost associated with forming the simulated pattern. Hotspot detection is performed on the layout to be tested based on the target set of process parameters.

[0024] In the embodiments of this disclosure, the process parameters of a new process node are determined through photolithography imaging simulation, using a known process window as a reference. For example, the process parameters of the new process node are determined through simulation, using the process window of a neighboring process node as a starting point. These new process node parameters are then used to construct a hotspot detection model for hotspot detection. In this way, hotspot detection can be performed without actual measurement data. Furthermore, this can advantageously accelerate the development process of new process nodes.

[0025] Figure 1 A schematic diagram of an example environment 100 in which the various embodiments of this disclosure can be implemented is shown. In example environment 100, electronic device 101 takes test pattern 102 as input. Figure 1 In the example, test pattern 102 includes two rectangles 1021 and 1022 with a predetermined spacing. It should be understood that this form of test pattern 102 is merely illustrative and not intended to limit the scope of this disclosure. In embodiments of this disclosure, test pattern 102 can be any pattern of interest, or a pattern prone to problems in photolithography. The following will primarily focus on... Figure 1 The example pattern is used to describe the concept according to this disclosure. It should be understood that example patterns with other patterns or shapes are similar and will not be described separately below.

[0026] Electronic device 101 also acquires a reference process window 103 for test pattern 102. In this document, the term "process window" defines a range of one or more process parameters. Figure 1In the illustrated diagram, reference process window 103 exemplarily defines the ranges of two key factors in the process parameters: focus and exposure dose. It should be understood that this is merely exemplary, and in embodiments of this disclosure, the process window can define the range of any suitable process parameter, such as the Mask Error Enhancement Factor (MEEF), Image Logarithmic Slope (ILS), etc. The concept according to this disclosure will be described below primarily using focus and exposure dose as examples of process parameters. It should be understood that the same applies to cases that include other parameters, which will not be described separately below. Furthermore, Figure 1 The shape of the reference process window 103 shown is merely exemplary and is not intended to limit the scope of this disclosure. The reference process window may have any suitable shape (e.g., elliptical), and the scope of this disclosure is not limited in this respect.

[0027] Electronic device 101 also acquires the layout to be detected 104. Figure 1 In the example, the layout to be detected 104 includes graphic 1041 and graphic 1042. The layout to be detected 104 can be any type of layout requiring hotspot detection, such as a design layout, an OPC-processed layout, etc. The embodiments of this disclosure are not limited in this respect. Furthermore, Figure 1 The number and shape of the graphics included in the layout to be detected 104 shown are merely exemplary and are not intended to limit the scope of this disclosure.

[0028] Electronic device 101 performs hotspot detection on layout 104 to be inspected based on reference process window 103 and test pattern 102 through photolithographic imaging simulation. Specifically, electronic device 101 first determines a target process parameter set based on reference process window 103 and test pattern 102. The target process parameter set may include values ​​or ranges of one or more process parameters that can meet imaging requirements. For example, the target process parameter set may include a new process window or a portion thereof (such as several points within the process window). Then, electronic device 101 performs hotspot detection on layout 104 to be inspected based on the target process parameter set through photolithographic imaging simulation. In some embodiments, reference process window 103 is used for a first semiconductor process, while the target process parameter set and layout 104 to be inspected are used for a second semiconductor process different from the first semiconductor process. For example, reference process window 103 is the process parameters of a neighboring process node (e.g., a 14nm process node), while layout 104 to be inspected is a layout designed for a new process node (e.g., a 10nm process node).

[0029] Accordingly, electronic device 101 generates detection result 106. Detection result 106 may include information associated with hotspots in the layout to be detected 104. For example, this information may indicate the location of the detected hotspot in the layout, the type of the detected hotspot, the degree of failure of the detected hotspot, etc.

[0030] In example environment 100, electronic device 101 can be any type of computing-capable device, including terminal devices or server devices. Terminal devices can be any type of mobile terminal, fixed terminal, or portable terminal, including mobile phones, desktop computers, laptop computers, notebook computers, netbook computers, tablet computers, media computers, multimedia tablets, personal communication system (PCS) devices, personal navigation devices, personal digital assistants (PDAs), audio / video players, digital cameras / camcorders, positioning devices, television receivers, radio receivers, e-book devices, gaming devices, or any combination of the foregoing, including accessories and peripherals of these devices or any combination thereof. Server devices can include, for example, computing systems / servers, such as mainframes, edge computing nodes, computing devices in cloud environments, and so on.

[0031] It should be understood that the structure and function of environment 100 are described for illustrative purposes only and do not imply any limitation on the scope of this disclosure. References will follow below. Figures 2 to 5 The following describes in detail the exemplary embodiments according to this disclosure.

[0032] Figure 2 A flowchart of a hotspot detection method 200 according to some embodiments of the present disclosure is shown. Method 200 can be performed by, for example... Figure 1 The illustrated electronic device 101 performs the operation. It should be understood that method 200 may also include additional boxes not shown and / or some (or more) of the boxes shown may be omitted, and the scope of this disclosure is not limited in this respect. Generally, in boxes 210 to 240, electronic device 101 determines a target set of process parameters based on test pattern 102 and reference process window 103. The target set of process parameters belongs to the same process node as the layout to be tested 104. Then, in box 250, electronic device 101 detects hot spots in the layout to be tested 104 based on the target set of process parameters. Method 200 will now be described in detail.

[0033] In block 210, electronic device 101 acquires test pattern 102 and a reference process window 103 for test pattern 102. As previously described, reference process window 103 may be from an initial process node (i.e., a known process node) and indicates a range of one or more process parameters. These process parameters may include, for example, focus values, exposure doses, etc. In some embodiments, reference process window 103 may be for a first semiconductor process, such as the 14nm process mentioned above. According to embodiments of this disclosure, a target set of process parameters can be determined using reference process window 103 and test pattern 102. Correspondingly, the target set of process parameters may be for a second semiconductor process different from the first semiconductor process, such as the 10nm process mentioned above. Of course, it should be understood that the above examples of first and second semiconductor processes are merely illustrative and are not intended to limit the scope of this disclosure. The first and second semiconductor processes may be various suitable processes for manufacturing semiconductor products.

[0034] In addition to the test pattern 102 and the reference process window 103, the electronic device 101 can also acquire other data for performing photolithography imaging simulation. Such data may include parameters related to the light source (e.g., light intensity map) and parameters related to the photoresist (e.g., photoresist stacking structure, thickness, etc.). In some embodiments, the electronic device 101 can also acquire auxiliary patterns to assist in imaging the test pattern 102. These auxiliary patterns may be, for example, sub-resolution assistant features (SRAFs). Small patterns are added around sparse patterns in the integrated circuit design layout so that the sparse patterns appear as dense patterns from an optical angle; these small patterns are smaller than the resolution of the photolithography machine. During exposure, these patterns only scatter light and are not transferred to the photoresist; hence, they are called sub-resolution assistant features. The electronic device 101 can add auxiliary patterns to the test pattern 102 according to auxiliary pattern insertion rules.

[0035] In frame 220, electronic device 101, based on the reference process window 103, determines a simulated pattern formed by photolithography using test pattern 102, which is also referred to herein as a first simulated pattern. Electronic device 101 can generate the first simulated pattern through photolithographic imaging simulation. For example, in photolithographic imaging simulation, electronic device 101 can place test pattern 102 on a simulated mask. Thus, through simulation, a simulated pattern formed in the photoresist or any plane of interest can be determined.

[0036] In some embodiments, the first simulation pattern may be determined from a plurality of candidate patterns. Figure 3A flowchart illustrating an example process 300 for determining a first simulation pattern according to some embodiments of the present disclosure is shown. Process 300 can be considered as an example implementation of block 320. Figure 3 As shown, in some embodiments, at block 310, electronic device 101 may determine a plurality of initial process conditions based on reference process window 103. Each of these initial process conditions is defined by process parameters within reference process window 103.

[0037] The initial process conditions can be defined by any process parameter or combination of process parameters within the range defined by the reference process window 103. In particular, in some embodiments, these initial process conditions can be uniformly selected or sampled within the range defined by the reference process window 103. As will be understood from the following detailed description, uniformly selecting the initial process conditions facilitates the rapid determination of new process parameters. Figure 4 An example of initial process conditions within reference process window 103 is shown. Figure 4 In the diagram, 15 initial process conditions 4031, confined within the process parameter window, are shown in circles. Each initial process condition 4031 corresponds to a specific combination of focus value and exposure dose value. Specifically, five values ​​are evenly selected within the range of focus values ​​(i.e., depth of focus, DOF), and three values ​​are evenly selected within the range of exposure dose (i.e., exposure latitude, EL). Thus, 15 initial process conditions are determined.

[0038] It should be understood that, Figure 4 The number of initial process conditions 4031 and their distribution within the reference process window shown are merely exemplary and not intended to limit the scope of this disclosure. Depending on the lithography scenario and process, any other suitable number of initial process conditions 4031 may be present. The following will primarily focus on... Figure 4 The example of initial process conditions 4031 shown is used to illustrate the concept of this disclosure. Embodiments with other numbers of initial process conditions 4031 are similar and will not be described in detail below.

[0039] Next, in box 320, the electronic device 101 can perform photolithography imaging simulations for multiple initial process conditions to generate multiple candidate patterns. Each candidate pattern is formed by the test pattern 102 under a corresponding initial process condition. These candidate patterns can be simulated to form in a plane of any height of the photoresist or any other plane of interest. Figure 4 In the example shown, 15 candidate patterns can be generated based on 15 initial process conditions 4031.

[0040] In block 330, electronic device 101 can determine the aforementioned first simulated pattern based on multiple candidate patterns. Any suitable criteria can be used to determine the first simulated pattern from these candidate patterns. The pattern size, such as the critical dimension (CD), is an important indicator of image quality. Therefore, in some embodiments, the first simulated pattern can be determined by taking the pattern size into consideration. Specifically, electronic device 101 can determine, for each candidate pattern, the difference between the size associated with that candidate pattern and the target size. If the difference is less than a threshold, the candidate pattern is selected as the first simulated pattern. The threshold can be flexibly set according to different design requirements or margins. For example, the threshold can be within ±8% of the target size. Alternatively, the threshold can be within ±10% of the target size.

[0041] In embodiments of this disclosure, the dimension associated with the candidate pattern can be a dimension at any location within the pattern, such as the side length, width, or distance between different polygons. Specifically, the dimension associated with the candidate pattern can be the CD or spatial width (SW) at the measurement location. The target dimension can be a design goal or desired value for that dimension. For example, if the dimension associated with the candidate pattern is the CD, the target dimension can be a design goal for an Adaptive Development and Inspection (ADI) CD.

[0042] The above is for reference only. Figure 3 An example of determining a first simulated pattern based on the dimensions associated with a candidate pattern is described. However, it should be understood that this is merely exemplary, and the first simulated pattern can also be selected from candidate patterns based on other criteria related to image quality (e.g., MEEF, ILS).

[0043] Continue to refer to Figure 2 In block 230, electronic device 101 determines at least the imaging cost associated with forming the first simulated pattern, also referred to as the first imaging cost. In embodiments of this disclosure, the imaging cost can represent the difference between the simulated imaging quality and the desired imaging quality. Generally, a lower imaging cost corresponds to better process parameters. The imaging cost can be used to comprehensively consider the advantages and disadvantages of process parameters. The imaging cost can be represented by a cost function. The cost function is used to evaluate simulation or optimization results.

[0044] In some embodiments, a first imaging cost may be determined based on multiple cost components. The cost component associated with forming the first simulated pattern, also referred to as the first cost component, may include one or more cost items. For example, the first cost component may include a cost item determined based on the size associated with the first simulated pattern. This cost item may reflect the difference between the simulated size and the target size. Alternatively or additionally, the first cost component may include a cost item determined based on the center of focus (FC) associated with the first simulated pattern. This cost item may reflect the deviation of the center of focus corresponding to the process conditions for forming the first simulated pattern from an ideal or predetermined center of focus. Alternatively or additionally, the first cost component may include a cost item determined based on the depth of focus associated with the first simulated pattern. This cost item may reflect the deviation of the depth of focus for forming the first simulated pattern from an ideal or predetermined depth of focus. The first cost component may include a cost item determined based on the exposure latitude (EL) associated with the first simulated pattern. This cost item may reflect the deviation of the exposure latitude for forming the first simulated pattern from an ideal or predetermined exposure latitude. Alternatively or additionally, the first cost component may include a cost item related to the MEEF determined based on the first simulated pattern. This cost item may reflect the difference between the simulated MEEF and the ideal or predetermined MEEF. Alternatively or additionally, the first cost component may include a cost item related to the ILS determined based on the first simulation pattern. This cost item may reflect the difference between the simulated ILS and the ideal or predetermined ILS. Alternatively or additionally, the first cost component may include a cost item related to auxiliary patterns (e.g., SRAF). This cost item may reflect whether the auxiliary pattern is imaged on the photoresist and / or the degree of image significance.

[0045] In some embodiments, the first cost component can be determined by combining the various cost items described above. For example, the first cost component can be determined by the following equation:

[0046] Anchor CF =f1(FC)+f1(DOF)+f1(EL)+f1(MEEF)+f1(ILS)+f1(SARF) (1)

[0047] Anchor CFLet f1 represent the first cost component, f1 represent the cost item, FC represent the focus center associated with the first simulated pattern, and f1(FC) represent its associated cost item; DOF represent the focus depth associated with the first simulated pattern, and f1(DOF) represent its associated cost item; EL represent the exposure latitude associated with the first simulated pattern, and f1(EL) represent its associated cost item; MEEF represent the mask error enhancement factor associated with the first simulated pattern, and f1(MEEF) represent its associated cost item; ILS represent the image logarithmic slope associated with the first simulated pattern, and f1(ILS) represent its associated cost item; and SARF represent the number of auxiliary patterns, and f1(SARF) represent its associated cost item.

[0048] Taking ILS as an example, its related cost items can be calculated using the following formula:

[0049]

[0050] Where W1 represents the first simulation pattern, n is the direction along the slope measurement, and T... ILS This represents the ideal or predetermined value of the ILS. It should be understood that the calculation of the cost items related to the ILS shown in Equation (2) is merely exemplary and is not intended to limit the scope of this disclosure. In embodiments of this disclosure, any suitable method may be used to calculate the cost items related to the ILS. It should also be understood that other cost items may be calculated in any suitable manner.

[0051] In traditional approaches, the focus center at the nominal exposure dose (i.e., the center of DOF) is considered only for a single pattern. In this embodiment, by comprehensively considering various cost factors, the advantages and disadvantages of process parameters can be considered holistically, which helps in identifying the target process parameters.

[0052] In some embodiments, in addition to using the test pattern 102 to form a first simulated pattern, an additional pattern can be generated by modifying the test pattern 102, and the cost component of forming the additional pattern is taken into consideration when determining the first imaging cost. Specifically, the electronic device 101 can generate the additional pattern by modifying the test pattern 102. The additional pattern can be obtained by changing certain dimensions in the test pattern 102. For example, it can be obtained by... Figure 1 Additional patterns are generated by appropriately increasing or decreasing the spacing of rectangles 1021 in the example test pattern 102 shown. Alternatively or additionally, additional patterns can be generated by appropriately increasing or decreasing the CD of rectangles 1021.

[0053] Next, through photolithographic imaging simulation, electronic device 101 determines a simulated pattern, also known as a third simulated pattern, formed by photolithography using an additional pattern. It should be understood that the first and third simulated patterns are formed under the same process conditions. In such an embodiment, electronic device 101 can determine the first imaging cost based on the first cost component described above and the cost component related to the third simulated pattern (also known as the second cost component).

[0054] Specifically, the electronic device 101 can obtain a first imaging cost by combining a first cost component and a second cost component. For example, the first cost component can be determined by one or more cost items described above.

[0055] Similar to the first cost component, the second cost component may include one or more cost items. For example, the second cost component may include a cost item determined based on the dimensions associated with the third simulated pattern. This cost item may reflect the difference between the simulated dimensions and the target dimensions. Alternatively or additionally, the second cost component may include a cost item determined based on the DOF associated with the third simulated pattern. This cost item may reflect the deviation of the depth of focus forming the third simulated pattern from an ideal or predetermined depth of focus. The second cost component may include a cost item determined based on the EL associated with the third simulated pattern. This cost item may reflect the deviation of the exposure latitude forming the third simulated pattern from an ideal or predetermined exposure latitude. Alternatively or additionally, the second cost component may include a cost item related to the MEEF determined based on the third simulated pattern. This cost item may reflect the difference between the simulated MEEF and the ideal or predetermined MEEF. Alternatively or additionally, the second cost component may include a cost item related to the ILS determined based on the third simulated pattern. This cost item may reflect the difference between the simulated ILS and the ideal or predetermined ILS. Alternatively or additionally, the second cost component may include a cost item related to auxiliary graphics (e.g., SRAF). This cost item can reflect whether the auxiliary pattern is imaged on the photoresist and / or the degree of significance of the image.

[0056] In some embodiments, the second cost component can be determined by combining the various cost items described above. For example, the second cost component can be determined using the following equation:

[0057] Other CF =f2(DOF)+f2(EL)+f2(MEEF)+f2(ILS)+f2(SARF) (3)

[0058] Other CFThe second cost component is defined as follows: DOF represents the depth of focus associated with the third simulation pattern, and f2(DOF) represents its associated cost term; EL represents the exposure latitude associated with the third simulation pattern, and f2(EL) represents its associated cost term; MEEF represents the mask error enhancement factor determined based on the third simulation pattern, and f2(MEEF) represents its associated cost term; ILS represents the image logarithmic slope determined based on the third simulation pattern, and f2(ILS) represents its associated cost term; and SARF represents the auxiliary pattern, and f2(SARF) represents its associated cost term. Compared to the first cost component, the focus center is not considered in the second cost component because the focus center of the auxiliary pattern is usually different from that of the test pattern.

[0059] Continuing with the ILS example, its related cost items can be calculated using the following formula:

[0060]

[0061] Where W2 represents the third simulation pattern, n is the direction along the slope measurement, and T... ILS This represents the ideal or predetermined value of the ILS. It should be understood that the calculation of the cost items related to the ILS shown in Equation (3) is merely exemplary and is not intended to limit the scope of this disclosure. In embodiments of this disclosure, any suitable method may be used to calculate the cost items related to the ILS. It should also be understood that other cost items may be calculated in any suitable manner.

[0062] The first cost component and the second cost component can be determined using the method described above. Different weights can be assigned to the first cost component and the second cost component depending on the circumstances to make the determined first imaging cost more accurate. Specifically, when combining the first cost component and the second cost component into the first imaging cost, the electronic device 101 can assign a first weight and a second weight to the test pattern and the additional pattern, respectively. In some embodiments, the first weight can be greater than the second weight. Next, the electronic device 101 weights the first cost component and the second cost component according to the first weight and the second weight, respectively, to determine the first imaging cost.

[0063] By considering additional patterning, it can be ensured that the ILS / MEEF is contained within the optical process window, and that imaging on planes at different heights of the photoresist (e.g., along the z-axis) has the same or similar process window center. For example, imaging on the bottom and top surfaces of the photoresist has the same or similar process window center.

[0064] Continue to refer to Figure 2In box 240, electronic device 101 determines a target set of process parameters based on a first imaging cost. The target set of process parameters may include one or more process parameters for a new process node. For example, the target set of process parameters may include a new process window or a portion thereof (such as several points within the process window). The first simulated pattern is formed under certain process conditions. In some embodiments, if the first imaging cost is sufficiently small, such as less than a threshold cost, the process parameters corresponding to the process conditions that form the first simulated pattern can be determined as target process parameters in the target set of process parameters.

[0065] In some embodiments, the first simulated pattern is formed under initial process conditions, such initial process conditions being, for example, a reference... Figure 4 One or more of the initial process conditions 4031 described. In this embodiment, a target set of process parameters can be recursively determined starting from a first imaging cost and initial process conditions. Specifically, the first electronic device 101 can determine at least one candidate process condition based on the first imaging cost and initial process conditions. Then, the target process parameters in the target set of process parameters are determined based on the at least one candidate process condition.

[0066] Figure 5 A flowchart illustrating an example process 500 for determining at least one candidate process condition according to an embodiment of the present disclosure is shown. At block 510, the electronic device 101 uses a first imaging cost as a reference imaging cost and an initial process condition as a starting point for process condition change to determine a modified process condition. In some embodiments, the initial process condition may be randomly changed to serve as the modified process condition.

[0067] In some embodiments, the direction of process condition change can be determined based on the dimensions associated with the multiple candidate patterns mentioned above, and the changed process conditions can be determined by changing the initial process conditions in the determined direction. As mentioned earlier, multiple candidate patterns formed under multiple initial process conditions can be determined through photolithography process simulation. The associated dimensions mentioned above are determined for each of these candidate patterns. The closer these dimensions are to the target dimensions, the closer the corresponding initial process conditions are to a process more optimized for the new process node. Therefore, the direction toward such initial process conditions can be the direction of process condition change.

[0068] refer to Figure 4Example. Suppose that the size of one or more candidate patterns corresponding to the initial process conditions in the lower right corner is closer to the target size than the upper left corner of the reference process window 103. In this case, process condition 4041 can be determined as the modified process condition. Alternatively, the process window can be moved towards the lower right corner of the reference process window 103, and the modified process condition can be selected within the moved process window. In this embodiment, changing the process conditions based on the sizes of multiple candidate patterns is beneficial for efficiently locating the optimized process parameters for the new process node.

[0069] Continuing with process 500, in block 520, electronic device 101 determines a new simulated pattern formed by test pattern 102 under modified process conditions through photolithographic imaging simulation. For example, a pattern formed on a plane of photoresist can be simulated, which is the same plane as the plane formed by the first simulated pattern. In block 530, a new imaging cost, at least related to forming the new simulated pattern, is determined. The determination of the new imaging cost is similar to the determination of the first imaging cost described above, and therefore will not be repeated.

[0070] In box 540, determine whether the new imaging cost is less than the reference imaging cost. If the new imaging cost is not less than the reference imaging cost, it means that the changed process conditions are not optimal compared to the original process conditions. In this case, process 500 can be terminated, or you can return to box 510 to redetermine the direction of the process condition change.

[0071] If the new imaging cost is less than the reference imaging cost, it means that the modified process conditions are optimized compared to the original process conditions. Accordingly, process 500 proceeds to block 550. In block 550, the electronic device 101 identifies the modified process conditions as candidate process conditions. Then, in block 560, the electronic device 101 uses the new imaging cost as the reference imaging cost and the modified process conditions as the starting point for a new process condition change to redetermine the modified process conditions. By repeatedly performing the steps in blocks S502 to S505, the process conditions with low imaging costs are eventually determined iteratively, for example, the process conditions with the lowest imaging cost. The process parameters corresponding to these process conditions can be determined as target process parameters in the target process parameter set.

[0072] As an example, several new imaging costs were determined through the steps shown in box 530 under multiple modified process conditions. For instance, if studying the new imaging costs reveals that increasing the focus value and exposure dose results in a lower imaging cost, while decreasing the focus value and exposure dose increases the determined new imaging cost, then in subsequent iterations, the process parameters can be adjusted in the direction of increasing the focus value and exposure dose to ultimately obtain the target process parameters with the minimum imaging cost.

[0073] In traditional measurement-based approaches, the measurement data comes from measurements of a single plane at a single height of the photoresist, failing to reflect the imaging quality across planes at different heights. Considering only the height of a single photoresist element can easily lead to problems with imaging quality and continuity, such as missing top surfaces of the photoresist or residue on the bottom surfaces.

[0074] In some embodiments of this disclosure, multiple planes of different heights of the photoresist can be considered when determining the target set of process parameters. In particular, the surfaces of the photoresist (e.g., the top and bottom surfaces) are areas where imaging quality is prone to problems. Therefore, in some embodiments, the patterning of the photoresist surfaces can be taken into account when determining the target set of process parameters. For example, a cost component related to the pattern formed on the photoresist surface can be added to the first imaging cost.

[0075] Alternatively or additionally, in some embodiments, the pattern formed on the surface of the photoresist can be inspected for defects. Specifically, electronic device 101 can determine a simulated pattern (hereinafter referred to as the second simulated pattern) formed on the surface of the photoresist by test pattern 102 under a given process condition (e.g., each candidate process condition) for at least one candidate process condition. The surface of the photoresist may include a top surface and a bottom surface. Electronic device 101 can determine whether the second simulated pattern has defects. Defects here can refer to predetermined types of defects that are prone to occur on the surface, such as photoresist loss defects on the top surface of the photoresist and / or photoresist scum defects on the bottom surface of the photoresist. Such defects can be detected, for example, by comparing the shape of the simulated pattern with the shape of the test pattern. If the second simulated pattern does not have such defects, it means that the given process condition is optimized. Accordingly, the process parameters defining the given process conditions can be determined as target process parameters. In this way, by extending defect inspection to the top and bottom surfaces of the photoresist, higher imaging quality and continuity along the photoresist contour can be achieved, thereby preventing photoresist loss defects and photoresist residue defects in subsequent photolithography processes, and thus improving photolithography quality.

[0076] Continue to refer to Figure 2In box 250, electronic device 101 identifies hotspots in layout 104 to be inspected based on a target set of process parameters. Electronic device 101 can perform hotspot detection via photolithography imaging simulation. For example, in photolithography imaging simulation, electronic device 101 can determine the simulated process conditions based on the target set of process parameters. Layout 104 to be inspected is placed on a simulated mask. Thus, through simulation, a simulated pattern, also referred to as the simulated pattern to be inspected, can be determined by utilizing layout 104 under the simulated process conditions on one or more planes. These one or more planes may include planes in the photoresist or any plane of interest.

[0077] As mentioned above, in some embodiments, the target process parameter set may include a new process window or at least the center of a new process window. Accordingly, a focus center can be determined. After determining the focus center, a plane in the photoresist corresponding to the focus center can be determined, which is also called the "focus plane".

[0078] In the photolithography imaging simulation described above, the chemical reactions of the photoresist are not considered. Therefore, the process parameters determined in this manner (e.g., focus center or exposure dose center) simulate the optimal process conditions under which the spatial image is projected onto the photoresist but before a latent image has formed. The plane in the photoresist corresponding to the center of the process window (e.g., the focus plane) can be considered an optical quality-oriented image plane, which may be the same as or different from the metrology-oriented image plane determined by measurement data. In other words, the optimal imaging of interest is the imaging after the spatial image has propagated to the photoresist but before any chemical reactions occur. This optical quality-oriented image plane (e.g., the focus plane) can be used to build optical models for different purposes and under different process conditions, such as for hotspot detection. Since the dependence on the presence of the photoresist is removed in this simulation, photoresist measurement data is not required.

[0079] Therefore, in some embodiments, the simulated pattern to be detected formed on the focal plane using the pattern to be detected 104 can be determined through photolithographic imaging simulation. Hot spots can then be determined based on this simulated pattern to be detected.

[0080] Unlike measurement data, photolithography simulation allows for the creation of simulated patterns on multiple planes, such as simulated patterns formed on planes at different heights of the photoresist. See below for reference. Figure 6 The flowchart describes an example process 600 for determining hotspots based on a target parameter set. Example process 600 can be viewed as an example implementation of box 250.

[0081] In block 610, electronic device 101 can determine target process conditions defined by process parameters in a target process parameter set. The target process conditions can be defined by any process parameter or combination of process parameters in the target process parameter set. In some embodiments, the target process parameter set may include a process window, and the target process conditions may be defined by process parameters or combinations of process parameters within that process window. For example, target process parameters may be defined by focus values ​​and exposure doses in the target process parameter set.

[0082] In some embodiments, multiple target process conditions may be determined. These target process conditions may be uniformly selected or sampled within a range defined by a process window. In some embodiments, the target process conditions may include the process conditions corresponding to the center of the process window. For example, the target process conditions may be defined by the center of the DOF and the center of the EL.

[0083] In block 620, electronic device 101 can perform photolithography imaging simulation for target process conditions to generate multiple simulated patterns to be inspected formed by the layout to be inspected 104 under the target process conditions. For example, in the photolithography imaging simulation, electronic device 101 can set the process conditions to the target process conditions and set the simulation mask to have the pattern in the layout to be inspected 104. Then, by running the photolithography imaging simulation, multiple simulated patterns to be inspected can be determined, each simulated pattern to be inspected formed on one of the multiple planes. For example, these planes can be planes with different heights of photoresist.

[0084] In conventional methods, measurement data is only applied to a single plane of the photoresist. However, due to the thickness of the photoresist, the imaging quality varies at different heights of the plane. In this embodiment of the present disclosure, by considering multiple simulated patterns across multiple planes, more comprehensive information can be used for hotspot detection. This can advantageously improve the accuracy of hotspot detection.

[0085] In some embodiments, these simulated patterns to be detected may include simulated patterns formed on a focal plane. Generally, a focal plane has good imaging quality. By taking into account the simulated patterns formed on the focal plane, hot spots in the published image can be ensured to be detected. In addition, the focal plane used herein is the optically quality-oriented plane described above, which is independent of measurement data, and therefore allows for early hot spot detection even without measurement data.

[0086] In some embodiments, these simulated patterns to be detected may include simulated patterns formed on the top surface of the photoresist and / or simulated patterns formed on the bottom surface of the photoresist. The top and bottom surfaces of the photoresist are areas where imaging quality is prone to problems. For example, the top surface of the photoresist is prone to photoresist loss defects, and the bottom surface is prone to photoresist scum defects. In this embodiment, by taking the simulated patterns on the top and / or bottom surfaces of the photoresist into account, it is beneficial to detect hot spots that are not easily detected. This can advantageously improve the detection rate of hot spots.

[0087] In some embodiments, these simulated patterns on the side to be inspected may include simulated patterns formed on the focal plane, simulated patterns formed on the top surface of the photoresist, and simulated patterns formed on the bottom surface of the photoresist. Thus, patterns at the highest, middle, and lowest points of the photoresist are considered along its height. This improves the accuracy and detection rate of hotspot detection, thereby facilitating layout optimization.

[0088] Continue to refer to Figure 6 In box 630, electronic device 101 can determine hotspots in layout 104 to be detected based on multiple simulated patterns to be detected. Electronic device 101 can utilize any suitable algorithm to determine hotspots. In some embodiments, electronic device 101 can utilize a machine learning model. For example, the machine learning model can take the simulated patterns to be detected as input, or data measured from the simulated patterns to be detected as input. Such a machine learning model can be a neural network model, a support vector machine-based classifier, a decision tree-based classifier, etc. It is understood that the machine learning model has been trained before being utilized by electronic device 101.

[0089] In some embodiments, the electronic device 101 may use a cost function (also referred to as "hotspot cost") to determine hotspots. Hotspot cost can be determined based on any suitable measurement metric. In some embodiments, the simulated dimensions of the pattern to be detected may be used as a measurement metric. Reference Figure 7 The diagram illustrates a flowchart of an example process 700 for detecting hotspots using a cost function according to some embodiments of the present disclosure. Process 700 can be viewed as an example implementation of block 630.

[0090] Specifically, in block 710, for each of these simulated patterns to be tested, electronic device 101 can determine a first difference between the simulated size and the target size of the simulated pattern to be tested, thereby obtaining a plurality of first differences. The simulated size described herein is the size at the position in the simulated pattern to be tested corresponding to the measurement position in the layout to be tested 104.

[0091] The dimensions described here can be any suitable dimensions associated with the pattern, such as CD, space width (SW). As an example, Figure 1 The diagram shows measurement positions 111, 112, and 113 in the layout 102 to be inspected. SW is measured as a simulation dimension at the position corresponding to measurement position 111 in the simulation pattern to be inspected. CD is measured as a simulation dimension at the positions corresponding to measurement positions 112 and 113 in the simulation pattern to be inspected. The target dimension can be a design target or a desired value for that dimension. For example, when CD is used as the simulation dimension, the target dimension is a design target or a desired value for CD. When SW is used as the simulation dimension, the target dimension is a design target or a desired value for SW.

[0092] After obtaining multiple first differences, in box 720, electronic device 101 can determine the hotspot cost associated with hotspot detection based at least on these first differences. For example, the sum or weighted sum of these first differences can be used as at least a portion of the hotspot cost. In addition to size, the hotspot cost can also be based on other measurements, such as ILS, MEEF, edge placement error (EPE), etc., at the measurement location. For the same measurement location, these different measurements can be combined to form the hotspot cost. For example, the hotspot cost can be calculated using equation (5):

[0093]

[0094] Where i is the index of the measurement indicator, and i = 1, 2, ..., N, v i w represents the value of the i-th measurement indicator. i This represents the weight of the i-th measurement indicator. It should be understood that the first difference described above is v. i one.

[0095] In box 730, electronic device 101 can determine whether the hotspot cost identified in box 720 exceeds a cost threshold. If the hotspot cost is determined to exceed the cost threshold, process 700 proceeds to box 740. In box 740, electronic device 101 can determine that a graphic in the layout to be detected 104 associated with a measurement location is a hotspot. For example, a first hotspot cost can be determined based on the values ​​of multiple measurement metrics corresponding to measurement location 113, and the first hotspot cost exceeds the threshold. In this case, the graphic associated with measurement location 113 (e.g., graphic 1041 or a portion thereof) can be identified as a hotspot. As another example, a second hotspot cost can be determined based on the values ​​of multiple measurement metrics corresponding to measurement location 112, and the second hotspot cost is below the cost threshold, then the image associated with measurement location 112 (e.g., graphic 1042 or a portion thereof) will not be identified as a hotspot.

[0096] In the example embodiments described above, hotspot models are constructed to detect hotspots in the layout using target process parameters obtained from test patterns and reference process windows in the absence of actual measurement data. If measurement data exists, it can be incorporated into such a hotspot model. For example, in some embodiments, hotspot costs can be additionally based on metrics associated with the measurement data.

[0097] Specifically, for a first simulated pattern among multiple simulated patterns to be tested, the electronic device 101 additionally determines the difference between the simulated size and the measured size of the first simulated pattern to be tested, also referred to as the second difference. The measured size is obtained by measuring the actual pattern on the wafer. It should be understood that the measured size and the simulated size are also corresponding. For example, when the simulated CD is used as the simulated size, the measured size is the measured CD value. As another example, when the simulated SW is used as the simulated size, the measured size is the measured SW value. Then, in block 720, the electronic device 101 can determine the hotspot cost based on multiple first and second differences. For example, the second difference can be v in equation (5). i one.

[0098] Furthermore, the measurement dimensions are typically only the result of measuring a pattern on a single plane, while there are multiple simulated patterns to be detected formed on different planes. In some embodiments, the first simulated pattern to be detected mentioned above for comparison may be formed on a plane that is the same as or close to the plane to which the measurement dimensions are targeted. Alternatively, in some embodiments, the plane formed by the simulated patterns to be detected may be disregarded, and the simulated dimensions of any simulated pattern to be detected or each simulated pattern to be detected may be compared with the measurement dimensions. That is, in such embodiments, the first simulated pattern to be detected may be any simulated pattern to be detected or each simulated pattern to be detected.

[0099] In traditional approaches, measurement data is used as the sole metric. In contrast, in this embodiment of the present disclosure, measurement data is used as only one metric, and hotspot cost is not entirely determined by the measurement data. This approach considers multiple metrics in hotspot detection, thereby improving the accuracy of hotspot detection.

[0100] Figure 8 A block diagram is shown illustrating an electronic device 800 in which one or more embodiments of the present disclosure may be implemented. It should be understood that... Figure 8 The electronic device 800 shown is merely exemplary and should not be construed as limiting the functionality and scope of the embodiments described herein. Figure 8 The electronic device 800 shown can be used to achieve Figure 1 Electronic device 101.

[0101] like Figure 8 As shown, electronic device 800 is in the form of a general-purpose electronic device. Components of electronic device 800 may include, but are not limited to, one or more processors or processing units 810, memory 820, storage device 830, one or more communication units 840, one or more input devices 850, and one or more output devices 880. Processing unit 810 may be a physical or virtual processor and is capable of performing various processes according to programs stored in memory 820. In a multiprocessor system, multiple processing units execute computer-executable instructions in parallel to improve the parallel processing capability of electronic device 800.

[0102] Electronic device 800 typically includes multiple computer storage media. Such media can be any accessible media that is accessible to electronic device 800, including but not limited to volatile and non-volatile media, removable and non-removable media. Memory 820 can be volatile memory (e.g., registers, cache, random access memory (RAM)), non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory), or some combination thereof. Storage device 830 can be a removable or non-removable medium and can include machine-readable media, such as flash drives, disks, or any other media that can be used to store information and / or data (e.g., training data for training) and can be accessed within electronic device 800.

[0103] Electronic device 800 may further include additional removable / non-removable, volatile / non-volatile storage media. Although not explicitly stated... Figure 8 As shown, disk drives for reading from or writing to removable, non-volatile disks (e.g., "floppy disks") and optical disk drives for reading from or writing to removable, non-volatile optical disks can be provided. In these cases, each drive can be connected to a bus (not shown) via one or more data media interfaces. Memory 820 may include computer program product 825 having one or more program modules configured to perform various methods or actions of various embodiments of this disclosure.

[0104] The communication unit 840 enables communication with other electronic devices via a communication medium. Additionally, the functionality of the components of the electronic device 800 can be implemented using a single computing cluster or multiple computing machines capable of communicating via communication connections. Therefore, the electronic device 800 can operate in a networked environment using logical connections to one or more other servers, network personal computers (PCs), or another network node.

[0105] Input device 850 can be one or more input devices, such as a mouse, keyboard, trackball, etc. Output device 860 can be one or more output devices, such as a monitor, speaker, printer, etc. Electronic device 800 can also communicate with one or more external devices (not shown) via communication unit 840 as needed. These external devices include storage devices, display devices, etc., and can communicate with one or more devices that enable user interaction with electronic device 800, or with any device that enables electronic device 800 to communicate with one or more other electronic devices (e.g., network card, modem, etc.). Such communication can be performed via input / output (I / O) interface (not shown).

[0106] According to an exemplary implementation of this disclosure, a computer-readable storage medium is provided that stores computer-executable instructions thereon, wherein the computer-executable instructions are executed by a processor to implement the methods described above. According to an exemplary implementation of this disclosure, a computer program product is also provided, which is tangibly stored on a non-transitory computer-readable medium and includes computer-executable instructions, which are executed by a processor to implement the methods described above.

[0107] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatuses, devices, and computer program products implemented according to this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0108] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processing unit of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0109] Computer-readable program instructions can be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions that execute on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0110] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0111] Various implementations of this disclosure have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed implementations. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described implementations. The terminology used herein is chosen to best explain the principles, practical applications, or improvements to technology in the market, or to enable others skilled in the art to understand the various implementations disclosed herein.

Claims

1. A hotspot detection method, characterized in that, include: Acquire a test pattern and a reference process window for the test pattern, the reference process window indicating a range of one or more process parameters; Based on the reference process window, a first simulated pattern is determined by photolithography using the test pattern, the first simulated pattern being formed under one or more initial process conditions; Determine at least a first imaging cost related to forming the first simulated pattern; Based on the first imaging cost and the one or more initial process conditions, a target process parameter set is determined; as well as Based on the target process parameter set, hot spots in the layout to be tested are determined.

2. The hotspot detection method according to claim 1, characterized in that, The hotspots identified in the map to be detected include: Based on the target process parameter set, the target process conditions defined by the process parameters in the target process parameter set are determined; Perform photolithography imaging simulation under the target process conditions to generate multiple simulated patterns to be tested formed by the pattern to be tested under the target process conditions; and Based on the multiple simulation patterns to be detected, hot spots are identified in the pattern to be detected.

3. The hotspot detection method of claim 2, wherein, The target process parameter set includes a focus center, and the plurality of simulation patterns to be detected include at least: A simulated pattern formed on the plane of the photoresist corresponding to the focal center.

4. The hotspot detection method according to claim 2 or 3, characterized in that, The plurality of simulated patterns to be detected includes at least one of the following: The simulated pattern formed on the top surface of the photoresist, The simulated pattern formed on the bottom surface of the photoresist.

5. The hotspot detection method of claim 2, wherein, The hotspots in the detection pattern are determined based on the multiple simulation patterns to be detected, including: For each simulated pattern to be tested, a first difference between the simulated size and the target size of the simulated pattern to be tested is determined to obtain multiple first differences, wherein the simulated size is the size at the position in the simulated pattern to be tested that corresponds to the measurement position in the layout to be tested; Based at least on the aforementioned plurality of first differences, determine the hotspot cost associated with hotspot detection; and In response to the hotspot cost exceeding a cost threshold, the graphic associated with the measurement location in the detection area is identified as a hotspot.

6. The hotspot detection method of claim 5, wherein, Also includes: For the first simulated pattern among the plurality of simulated patterns to be tested, a second difference is determined between the simulated size and the measured size of the first simulated pattern to be tested, wherein the measured size is obtained by measuring the actual pattern on the wafer. Determining the hotspot costs associated with hotspot detection includes: The hotspot cost is determined based on the plurality of first differences and the second differences.

7. The hotspot detection method of claim 1, wherein, Based on the reference process window, the first simulated pattern formed by photolithography using the test pattern includes: Based on the reference process window, multiple initial process conditions are determined, and each of the multiple initial process conditions is limited by the process parameters in the process window. Photolithography imaging simulations are performed for each of the multiple initial process conditions to generate multiple candidate patterns, each candidate pattern being formed from the test pattern under one initial process condition; and Based on the multiple candidate patterns, the first simulation pattern is determined.

8. The hotspot detection method of claim 7, wherein, The first simulation pattern determined based on the plurality of candidate patterns includes: For each candidate pattern, determine the difference between the dimension associated with that candidate pattern and the target dimension; and In response to the difference being less than a threshold, the candidate pattern is determined as the first simulation pattern.

9. The hotspot detection method according to claim 1, characterized in that, Determining the target process parameter set based on the first imaging cost and the one or more initial process conditions includes: Based on the first imaging cost and the one or more initial process conditions, at least one candidate process condition is determined, wherein the initial process conditions are defined by process parameters within the reference process window; and Based on the at least one candidate process condition, the target process parameters in the target process parameter set are determined.

10. The hotspot detection method according to claim 9, characterized in that, Determining the at least one candidate process condition includes: S501, the first imaging cost is used as the reference imaging cost, and the initial process conditions are used as the starting point for changing the process conditions, so as to determine the changed process conditions. Repeat steps S502 to S505 to obtain multiple candidate process conditions: S502, through photolithography imaging simulation, determine the new simulation pattern formed by the test pattern under the changed process conditions; S503, determine at least the new imaging cost related to forming the new simulation pattern; S504, in response to the new imaging cost being less than the reference imaging cost, the modified process conditions are determined as candidate process conditions; S505, the new imaging cost is used as the reference imaging cost, and the changed process conditions are used as the starting point for the new process condition change, so as to redetermine the changed process conditions.

11. The hotspot detection method according to claim 9, characterized in that, Determining the target process parameters in the target process parameter set based on the at least one candidate process condition includes: For a given process condition among the at least one candidate process conditions, determine a third simulated pattern formed by the test pattern on the surface of the photoresist under the given process conditions; and In response to the fact that the third simulation pattern is not defective, the target process parameters are determined by defining the process parameters that limit the given process conditions.

12. The hotspot detection method according to claim 1, characterized in that, The reference process window is used for a first semiconductor process, and the target process parameter set and the layout to be tested are used for a second semiconductor process that is different from the first semiconductor process.

13. An electronic device, characterized in that, include: At least one processing unit; as well as At least one memory, coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, the instructions causing the electronic device to perform the method according to any one of claims 1 to 12 when executed by the at least one processing unit.

14. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program can be executed by a processor to implement the method according to any one of claims 1 to 12.

Images