Texture recognition module and its driving method, display device

Abstract

A texture recognition module. The texture recognition module includes: a substrate (1); a driving circuit layer (9) located on one side of the substrate, including a plurality of arrayed driving transistors (12); a first insulating layer (5) located on the side of the driving circuit layer away from the substrate, including a plurality of first vias (13) penetrating the thickness of the first insulating layer; a plurality of photoelectric conversion units (15) located on the side of the first insulating layer away from the driving circuit layer, which are in one-to-one contact with the first electrode of the driving transistor through the first vias; a second insulating layer (16) located on the side of the first insulating layer away from the substrate, including a plurality of second vias (17) corresponding to the photoelectric conversion units; the distance between the edge of the second via and the edge of the surface of the photoelectric conversion unit away from the substrate is less than or equal to a first preset value; a plurality of first electrodes (18) located on the side of the photoelectric conversion unit away from the driving circuit layer; each first electrode covers the photoelectric conversion unit in the second via.

Description

Technical Field

[0001] This disclosure relates to the field of texture recognition technology, and in particular to a texture recognition module and its driving method and display device. Background Technology

[0002] An optical fingerprint sensor is a device that uses the principles of light refraction and reflection to collect fingerprints. As one of the most widely used and cost-effective biometric technologies, the fingerprint recognition market will continue to maintain a steady growth rate. Currently, fingerprint recognition technology is mainly used in mobile devices, security, corporate attendance systems, and smart community access control systems. With the maturity of the technology and the reduction in costs, the application areas of fingerprint recognition technology are becoming increasingly widespread.

[0003] Traditional optical fingerprint sensors place the finger on an optical lens. Under the illumination of a built-in light source, light is emitted from the bottom. The angle at which the emitted light refracts and the brightness of the reflected light vary depending on the uneven lines of the fingerprint surface. A photodetector converts the light signal into an electrical signal, which in turn forms a digital, multi-grayscale fingerprint image that can be processed by fingerprint device algorithms. The ridges are black, and the valleys (the recessed areas between the ridges) are white.

[0004] However, due to inherent material defects, optical fingerprint sensors sometimes capture remnants of the previous image during image acquisition, resulting in blurred images and low fingerprint image quality. This phenomenon is particularly pronounced in strong light and low temperature environments, affecting image quality and fingerprint recognition accuracy, and increasing the false recognition rate. Existing fingerprint sensor modules still need improvement to ensure image quality and increase fingerprint recognition accuracy. Summary of the Invention

[0005] This disclosure provides a texture recognition module, which includes:

[0006] Substrate;

[0007] The driving circuit layer, located on one side of the substrate, includes multiple driving transistors arranged in an array;

[0008] The first insulating layer is located on the side of the driving circuit layer away from the substrate and includes a plurality of first vias that penetrate the thickness of the first insulating layer.

[0009] Multiple photoelectric conversion units are located on the side of the first insulating layer away from the driving circuit layer, and are in contact with the first electrode of the driving transistor through the first via;

[0010] The second insulating layer is located on the side of the first insulating layer away from the substrate and includes a plurality of second vias corresponding to the photoelectric conversion section. The distance between the edge of the area of ​​the second via exposing the photoelectric conversion section on the substrate and the edge of the surface of the photoelectric conversion section on the substrate away from the substrate on the substrate is less than or equal to a first preset value.

[0011] Multiple first electrodes are located on the side of the photoelectric conversion section away from the driving circuit layer; each first electrode covers the photoelectric conversion section through a second via.

[0012] In some embodiments, the distance between the area of ​​the second via exposing the photoelectric conversion section on the edge of the orthogonal projection of the substrate and the surface of the photoelectric conversion section on the side opposite to the substrate on the edge of the orthogonal projection of the substrate is greater than or equal to 0.5 micrometers and less than or equal to 2 micrometers.

[0013] In some embodiments, the distance between the edge of the first electrode in the orthographic projection of the substrate and the surface of the photoelectric conversion section on the side opposite to the substrate in the orthographic projection of the substrate is greater than or equal to 0 micrometers and less than or equal to 0.5 micrometers.

[0014] In some embodiments, the orthographic projection of the photoelectric conversion unit onto the substrate falls within the orthographic projection of the first via onto the substrate.

[0015] In some embodiments, the first electrode of the driving transistor includes: a first portion, and a second portion connected to the first portion;

[0016] The orthographic projection of the first via onto the substrate falls within the orthographic projection of the first portion onto the substrate, and the pattern of the orthographic projection of the first via onto the substrate is similar to the pattern of the orthographic projection of the first portion onto the substrate.

[0017] In some embodiments, the area of ​​the first via projected onto the substrate is greater than or equal to 70% and less than or equal to 90% of the area of ​​the first portion projected onto the substrate.

[0018] In some embodiments, the pattern of the first via projected onto the substrate is similar to the pattern of the photoelectric conversion section projected onto the substrate.

[0019] In some embodiments, the area of ​​the photoelectric conversion unit projected onto the substrate is greater than or equal to 90% and less than or equal to 100% of the area of ​​the first via projected onto the substrate.

[0020] In some embodiments, the side of the photoelectric conversion section has a chamfer on the side near the driving transistor.

[0021] In some embodiments, the chamfer is an inner chamfer that is recessed toward the center of the photoelectric conversion section.

[0022] In some embodiments, the shape of the orthographic projection of the chamfer onto the substrate is an arc or a broken line.

[0023] In some embodiments, the driving circuit layer specifically includes:

[0024] The first conductive layer includes: the control electrode of each driving transistor, and multiple scan signal lines;

[0025] A gate insulating layer is located on the side of the first conductive layer that faces away from the substrate.

[0026] The active layer is located on the side of the gate insulating layer that is away from the first conductive layer.

[0027] The second conductive layer, located on the side of the active layer away from the gate insulating layer, includes: the first and second electrodes of each driving transistor, and multiple data signal lines; the data signal lines and scan signal lines intersect to form multiple texture recognition units; the data signal lines are electrically connected to the second electrode of the driving transistor.

[0028] In some embodiments, the texture recognition module further includes:

[0029] Multiple data reading units are electrically connected to data signal lines one-to-one; including: an operational amplifier circuit, a storage circuit, and a switching circuit; the first input terminal of the operational amplifier circuit is coupled to the data signal line, the first terminal of the storage circuit, and the first terminal of the switching circuit; the output terminal of the operational amplifier is coupled to the second terminal of the storage circuit and the second terminal of the switching circuit; the output terminal of the operational amplifier circuit is configured to output a ridge identification signal according to the data signal input from the data signal line.

[0030] In some embodiments, the operational amplifier circuit includes: a first amplifier;

[0031] The first input terminal of the operational amplifier is coupled to the data signal line, the first terminal of the storage circuit, and the first terminal of the switching circuit; the second input terminal of the operational amplifier is grounded.

[0032] In some embodiments, the storage circuit includes: a first capacitor;

[0033] The first electrode of the first capacitor is coupled to the first input terminal of the operational amplifier circuit, and the second electrode of the first capacitor is coupled to the output terminal of the operational amplifier circuit.

[0034] In some embodiments, the switching circuit includes: a first switch;

[0035] The first terminal of the first switch is coupled to the first input terminal of the operational amplifier circuit, and the second terminal of the first switch is coupled to the output terminal of the operational amplifier circuit.

[0036] In some embodiments, it also includes:

[0037] The third insulating layer is located on the side of the second insulating layer opposite to the first insulating layer and includes multiple third vias;

[0038] The third conductive layer is located on the side of the third insulating layer that is opposite to the second insulating layer; it is in contact with the first electrode through the third via.

[0039] The fourth insulating layer is located on the side of the third conductive layer that is opposite to the third insulating layer;

[0040] A light-shielding metal layer is located on the side of the fourth insulating layer that is away from the third conductive layer; the orthogonal projection of the light-shielding metal layer onto the substrate covers the orthogonal projection of the active layer of the driving transistor onto the substrate.

[0041] The fifth insulating layer is located on the side of the light-shielding metal layer opposite to the fourth insulating layer; it has a fourth via that penetrates its thickness;

[0042] The shielding layer is located on the side of the fifth insulating layer away from the light-shielding metal layer, and contacts the light-shielding metal layer through the fourth via.

[0043] In some embodiments, the distance between the edge of the third via in the orthographic projection of the substrate and the surface of the photoelectric conversion part on the side opposite to the substrate in the orthographic projection of the substrate is greater than or equal to 3 micrometers and less than or equal to 6 micrometers.

[0044] This disclosure provides a driving method for a texture recognition module, including:

[0045] During the image removal stage, the driving transistor of the control texture recognition module is turned on, and an image removal signal is provided to the photoelectric conversion unit.

[0046] During the image acquisition stage, the driving transistor of the control texture recognition module is turned off, and a common voltage signal is provided to the photoelectric conversion unit.

[0047] In some embodiments, the image removal signal is electrically opposite to the common voltage signal.

[0048] In some embodiments, the image removal signal is a positive voltage signal and the common voltage signal is a negative voltage signal.

[0049] This disclosure provides a display device, including a texture recognition module provided in this disclosure. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0051] Figure 1 This is a schematic diagram of the structure of a texture recognition module provided in an embodiment of the present disclosure;

[0052] Figure 2 This is a schematic diagram of another texture recognition module provided in an embodiment of the present disclosure;

[0053] Figure 3 This is a schematic diagram of the structure of another texture recognition module provided in an embodiment of the present disclosure;

[0054] Figure 4 This is a schematic diagram of the structure of another texture recognition module provided in an embodiment of the present disclosure;

[0055] Figure 5 This is a schematic diagram of the structure of another texture recognition module provided in an embodiment of the present disclosure;

[0056] Figure 6 This is a schematic diagram of the structure of another texture recognition module provided in an embodiment of the present disclosure;

[0057] Figure 7 A flowchart illustrating a driving method for a texture recognition module provided in an embodiment of this disclosure;

[0058] Figure 8 This is a timing diagram of a driving method for a texture recognition module provided in an embodiment of the present disclosure. Detailed Implementation

[0059] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Furthermore, the embodiments and features in the embodiments of this application can be combined with each other without conflict. All other embodiments obtained by those skilled in the art based on the described embodiments of this application without creative effort are within the scope of protection of this application.

[0060] Unless otherwise defined, the technical or scientific terms used in this application shall have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0061] It should be noted that the dimensions and shapes of the figures in the accompanying drawings do not reflect actual proportions and are intended only to illustrate the content of this application. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

[0062] In related technologies, a TFT optical fingerprint recognition sensor module includes a TFT disposed on a substrate and a photodiode electrically connected to the TFT. The drain of the TFT serves as the bottom electrode of the photodiode, which also includes a top electrode and a photoelectric conversion layer located between the top electrode and the drain. In specific implementations, after forming the photoelectric conversion layer, a planarization layer needs to be formed, and a via is created using a patterning process to expose a portion of the photoelectric conversion layer. The top electrode of the photodiode is then formed within this via. However, due to the top electrode etching process, the area of ​​the photoelectric conversion layer not covered by the top electrode is relatively large. This means that the area not covered by the top electrode lacks the opposing electric field formed by the upper and lower electrodes of the photoelectric conversion layer. When a voltage is applied to the upper and lower electrodes of the photoelectric material, the lack of an opposing electric field means the photoelectric material is not fully within the electric field range. Carrier velocities are slower in the edge regions, making them easily trapped by defect states in the photoelectric material. Especially due to process conditions, there are many defect states on the sidewalls of the photoelectric material. These trapped carriers are released in the next frame, resulting in image residue and affecting image quality.

[0063] Based on the aforementioned problems existing in related technologies, this disclosure provides a texture recognition module, such as... Figure 1 As shown, the texture recognition module includes:

[0064] Substrate 1;

[0065] The driving circuit layer 9 is located on one side of the substrate 1 and includes multiple driving transistors 12 arranged in an array.

[0066] The first insulating layer 5 is located on the side of the driving circuit layer 9 away from the substrate 1, and includes a plurality of first vias 13 that penetrate the thickness of the first insulating layer 5.

[0067] Multiple photoelectric conversion units 15 are located on the side of the first insulating layer 5 away from the driving circuit layer 9, and are in contact with the first electrode 14 of the driving transistor 12 through the first via 13.

[0068] The second insulating layer 16 is located on the side of the first insulating layer 5 away from the substrate 1, and includes a plurality of second vias 17 corresponding one-to-one with the photoelectric conversion section 15; the distance h13 between the edge of the area of ​​the second via 17 exposing the photoelectric conversion section 15 in the orthographic projection of the substrate 1 and the edge of the surface of the photoelectric conversion section 15 on the side away from the substrate 1 in the orthographic projection of the substrate 1 is less than or equal to a first preset value.

[0069] Multiple first electrodes 18 are located on the side of the photoelectric conversion section 15 away from the driving circuit layer 9; each first electrode 18 covers the photoelectric conversion section 15 through the second via 17.

[0070] The texture recognition module provided in this embodiment increases the area of ​​the second via, such that the distance between the edge of the area of ​​the second via exposing the photoelectric conversion part on the substrate and the edge of the surface of the photoelectric conversion part on the substrate away from the substrate on the substrate is less than or equal to a first preset value. Correspondingly, the area of ​​the first electrode can be increased, thereby increasing the area of ​​the photoelectric conversion part covered by the first electrode. This can increase the coverage range of the electric field on the photoelectric conversion part, reduce the probability of photogenerated carriers being captured by defect states on the sidewalls of the photoelectric conversion part, improve the problem of image ghosting, and improve the accuracy of texture recognition.

[0071] It should be noted that the texture recognition module provided in this embodiment is an optical texture recognition module, which can recognize fingerprints, palm prints and other textures.

[0072] It should be noted that in the texture recognition module provided in the embodiments of this disclosure, the first electrode of the driving transistor, the photoelectric conversion part, and the first electrode layer constitute a photodiode.

[0073] In some embodiments, the area of ​​the first electrode projected onto the substrate is greater than or equal to 95% and less than or equal to 100% of the area of ​​the photoelectric conversion section on the side facing away from the substrate projected onto the substrate.

[0074] In some embodiments, the first preset value is 2 micrometers. That is, the distance h13 between the edge of the photoelectric conversion section exposed by the second via on the orthographic projection of the substrate and the edge of the orthographic projection of the surface of the photoelectric conversion section on the side away from the substrate on the substrate is less than or equal to 2 micrometers.

[0075] In some embodiments, the distance h13 between the edge of the photoelectric conversion section exposed by the second via on the orthographic projection of the substrate and the edge of the orthographic projection of the surface of the photoelectric conversion section on the side opposite to the substrate on the substrate is greater than or equal to 0.5 micrometers and less than or equal to 2 micrometers.

[0076] In a specific implementation, a first electrode can be formed on the side of the photoelectric conversion section away from the substrate first, and then a second insulating layer can be formed and a second via can be formed in the second insulating layer to expose the first electrode. The second insulating layer can cover the edge of the first electrode portion.

[0077] In some embodiments, the distance between the edge of the first electrode in the orthographic projection of the substrate and the surface of the photoelectric conversion section on the side opposite to the substrate in the orthographic projection of the substrate is greater than or equal to 0 micrometers and less than or equal to 0.5 micrometers.

[0078] In some embodiments, such as Figure 1 As shown, the first electrode completely covers the surface of the photoelectric conversion unit 15 facing away from the substrate 1. That is, the distance between the edge of the first electrode and the edge of the surface of the photoelectric conversion unit facing away from the substrate is 0 micrometers.

[0079] Of course, in some embodiments, the first electrode can also cover part of the sidewall of the photoelectric conversion section. This ensures that the orthographic projection of the surface of the photoelectric conversion section facing away from the substrate falls within the orthographic projection of the first electrode on the substrate. This increases the coverage of the electric field on the sidewall of the photoelectric conversion section, reduces the probability of photogenerated carriers being captured by defect states in the photoelectric conversion section, and further mitigates the image ghosting problem.

[0080] In some embodiments, such as Figure 1 , Figure 2 As shown, the orthogonal projection of the photoelectric conversion unit 15 onto the substrate 1 falls within the orthogonal projection of the first via 13 onto the substrate 1.

[0081] It should be noted that in the texture recognition module provided by the relevant technology, due to the etching process, there are areas where the photoelectric conversion layer and the drain are not in direct contact. When a voltage is applied to the upper and lower electrodes of the photoelectric material, the areas where the photoelectric conversion layer and the drain are not in direct contact face the absence of electric field. The photoelectric material is not completely within the electric field range, and the carrier velocity in the edge region is relatively slow, making it easy to be captured by defect states in the photoelectric material. In particular, due to the process conditions, there are more defect states on the sidewalls of the photoelectric material. These captured carriers will be released in the next frame of the image, forming image residue and affecting image quality.

[0082] The texture recognition module provided in this embodiment has a photoelectric conversion unit whose orthogonal projection on the substrate falls within the orthogonal projection of the first via on the substrate. This ensures that the surface of the photoelectric conversion unit near the substrate is in complete contact with the first electrode of the driving transistor, which reduces the probability of photogenerated carriers being captured by defect states on the sidewall of the photoelectric conversion unit. This improves the problem of image ghosting and enhances the accuracy of texture recognition.

[0083] In practical implementation, for example, it could be as follows: Figure 1 As shown, the area of ​​the first via 13 exposing the first electrode 14 of the driving transistor 12 is larger than the area of ​​the photoelectric conversion section 15 on the surface near the substrate 1. Alternatively, it could be as follows: Figure 2 As shown, the area of ​​the first via 13 exposing the first electrode 14 of the driving transistor 12 is equal to the area of ​​the photoelectric conversion section 14 on the side surface near the substrate 1.

[0084] In some embodiments, such as Figure 3 As shown, the side of the photoelectric conversion unit 15 has a chamfer 27 on the side near the substrate 1.

[0085] The texture recognition module provided in this embodiment has a chamfered edge on the side of the photoelectric conversion unit near the substrate, which reduces the leakage current on the sidewall of the photoelectric conversion unit and mitigates the impact of increased leakage current caused by increasing the area of ​​the first electrode. This improves the accuracy of texture recognition.

[0086] In some embodiments, the chamfer is an inner chamfer that is recessed toward the center of the photoelectric conversion section.

[0087] In some embodiments, the shape of the orthographic projection of the chamfer onto the substrate is an arc or a broken line.

[0088] In practice, an etching process can be used to form a chamfer on the edge of the photoelectric conversion part near the substrate.

[0089] In some embodiments, such as Figure 1 , Figure 2 , Figure 3 , Figure 4 As shown, the driving circuit layer 9 specifically includes:

[0090] The first conductive layer 28 includes: control electrode 19 of each driving transistor 12, and multiple scan signal lines 30;

[0091] The gate insulating layer 2 is located on the side of the first conductive layer 28 that is away from the substrate 1;

[0092] The active layer 20 is located on the side of the gate insulating layer 2 that is away from the first conductive layer 28;

[0093] The second conductive layer 29 is located on the side of the active layer 20 away from the gate insulating layer 2, and includes: the first electrode 14 and the second electrode 21 of each driving transistor 12, and multiple data signal lines 31; the data signal lines 31 and the scan signal lines 32 intersect each other to divide into multiple texture recognition units 33; the data signal lines 31 are electrically connected to the second electrode 21 of the driving transistor 12.

[0094] It should be noted that, Figure 4 Only one texture recognition unit is shown in the figure, and an example is given where the area of ​​the first electrode of the driving transistor exposed by the first via is larger than the area of ​​the photoelectric conversion part on the side of the substrate. Figure 1 , Figure 3 For example, it could be along Figure 4 A cross-sectional view of AA'. And... Figure 1 , Figure 2 , Figure 3 as well as Figure 4 The following explanation uses a bottom-gate driving transistor as an example. Of course, in actual implementation, the driving transistor can also be a top-gate structure, where the active layer is located between the control electrode and the substrate. Figure 4In this example, the distance is explained by taking the scanning signal line 30 extending along the first direction X and the data signal line 36 extending along the second direction Y. The first direction X is perpendicular to the second direction Y.

[0095] In some embodiments, such as Figure 4 As shown, the first electrode 14 of the driving transistor includes: a first portion 34, and a second portion 35 connected to the first portion 34;

[0096] The orthographic projection of the first via 13 onto the substrate 1 falls within the orthographic projection of the first portion 34 onto the substrate 1, and the pattern of the orthographic projection of the first via 13 onto the substrate 1 is similar to the pattern of the orthographic projection of the first portion 34 onto the substrate 1.

[0097] In some embodiments, the area of ​​the photoelectric conversion unit projected onto the substrate is greater than or equal to 90% and less than or equal to 100% of the area of ​​the first via projected onto the substrate.

[0098] In some embodiments, such as Figure 4 As shown, the minimum distances h1, h2, h3, and h4 between the edge of the first via 13 and the edge of the photoelectric conversion unit 15 are greater than or equal to 0 micrometers and less than or equal to 2 micrometers.

[0099] In some embodiments, h1 = h2 = h3 = h4.

[0100] In some embodiments, such as Figure 4 As shown, the minimum distances h5 and h6 between the edge of the first electrode 14 of the driving transistor and the scan signal line 30 are greater than or equal to 3 micrometers and less than or equal to 5 micrometers, and the minimum distances h7 and h8 between the edge of the first electrode 14 of the driving transistor and the data signal line 31 are greater than or equal to 3 micrometers and less than or equal to 5 micrometers.

[0101] In some embodiments, h5 = h6 = h7 = h8.

[0102] In some embodiments, the area of ​​the first via projected onto the substrate is greater than or equal to 70% and less than or equal to 90% of the area of ​​the first portion projected onto the substrate.

[0103] In some embodiments, such as Figure 4 As shown, the minimum distances h9, h10, h11, and h12 between the edge of the first via 13 and the edge of the first part 34 are greater than or equal to 3 micrometers and less than or equal to 5 micrometers.

[0104] In some embodiments, such as Figure 4 As shown, the pattern of the first via 13 projected onto the substrate is similar to the pattern of the photoelectric conversion unit 15 projected onto the substrate.

[0105] In some embodiments, such as Figure 1 , Figure 2 , Figure 3 As shown, the texture recognition module also includes:

[0106] The third insulating layer 7 is located on the side of the second insulating layer 16 opposite to the first insulating layer 5, and includes a plurality of third vias 37;

[0107] The third conductive layer 8 is located on the side of the third insulating layer 7 that is away from the second insulating layer 16; it is in contact with the first electrode 18 through the third via.

[0108] The fourth insulating layer 22 is located on the side of the third conductive layer 8 that is opposite to the third insulating layer 7;

[0109] The light-shielding metal layer 24 is located on the side of the fourth insulating layer 22 that is away from the third conductive layer 8; the orthogonal projection of the light-shielding metal layer 24 on the substrate 1 covers the orthogonal projection of the active layer 20 of the driving transistor 12 on the substrate 1.

[0110] The fifth insulating layer 23 is located on the side of the light-shielding metal layer 24 opposite to the fourth insulating layer 22; it has a fourth via 25 that penetrates its thickness;

[0111] The shielding layer 26 is located on the side of the fifth insulating layer 23 away from the light-shielding metal layer 24, and contacts the light-shielding metal layer 24 through the fourth via 25.

[0112] In some embodiments, the driving transistor may be, for example, a thin-film transistor. The materials of the control electrode, first electrode, second electrode, and light-shielding metal layer of the driving transistor may be, for example, metals such as aluminum, molybdenum, and copper. The photoelectric conversion unit includes electron / intrinsic / hole-doped semiconductor materials, such as pin-doped amorphous silicon (a-Si) and polycrystalline silicon (p-Si). The active layer material of the driving transistor may be, for example, amorphous silicon, polycrystalline silicon, indium gallium zinc oxide (IGZO), etc., and the materials of the gate insulating layer, first insulating layer, and third insulating layer may be, for example, silicon nitride and silicon oxide. The material of the second insulating layer may include, for example, resin. The function of the second insulating layer is to planarize the film layer step difference caused by the deposition and etching of the photoelectric conversion unit, ensuring that the layers above it do not break due to step difference ramp-up. The function of the third insulating layer is to optimize the contact morphology between the planarization layer and the layers above it. The materials of the first electrode and the third conductive layer are preferably transparent conductive materials, for example, indium tin oxide. The third conductive layer is used to provide a common voltage signal to the first electrode. The function of the third insulating layer is to isolate the electrical overlap between the light-shielding metal layer and the third conductive layer. The light-shielding metal layer is an opaque metal layer that prevents light from reaching the channel region of the driving transistor, thus preventing excessive leakage current in the active layer due to light exposure. The fourth insulating layer, compared to the other insulating layers, is a thicker silicon oxide or silicon nitride film, designed to ensure the texture recognition module has sufficient resistance to surface scratches. The shielding layer is a transparent conductive film, made of materials such as indium tin oxide. When the texture recognition module provided in this embodiment is applied to a display product, the shielding layer can prevent crosstalk from the display panel signal lines to the texture recognition module.

[0113] In some embodiments, such as Figures 1-3 As shown, the distance h14 between the edge of the third via 37 in the orthogonal projection of the substrate 1 and the surface of the photoelectric conversion unit 15 on the side opposite to the substrate 1 in the orthogonal projection of the substrate 1 is greater than or equal to 3 micrometers and less than or equal to 6 micrometers.

[0114] In some embodiments, such as Figure 5 As shown, the texture recognition module also includes:

[0115] Multiple data reading units 38 are electrically connected to data signal lines 31 in a one-to-one correspondence; including: an operational amplifier circuit 39, a storage circuit 40, and a switching circuit 41; the first input terminal of the operational amplifier circuit 39 is coupled to the data signal line 31, the first terminal of the storage circuit 40, and the first terminal of the switching circuit 41; the output terminal of the operational amplifier circuit 39 is coupled to the second terminal of the storage circuit 40 and the second terminal of the switching circuit 41; the output terminal of the operational amplifier circuit 39 is configured to output a ridge identification signal according to the data signal input from the data signal line 31.

[0116] In some embodiments, such as Figure 6As shown, the operational amplifier circuit 29 includes: a first amplifier 42;

[0117] The first input terminal of the operational amplifier 42 is coupled to the data signal line 31, the first terminal of the storage circuit 40, and the first terminal of the switching circuit 41; the second input terminal of the operational amplifier 42 is grounded.

[0118] In some embodiments, such as Figure 6 As shown, the storage circuit 40 includes: a first capacitor 43;

[0119] The first electrode of the first capacitor 43 is coupled to the first input terminal of the operational amplifier circuit 39, and the second electrode of the first capacitor 43 is coupled to the output terminal of the operational amplifier circuit 39.

[0120] In some embodiments, such as Figure 6 As shown, the switching circuit 41 includes: a first switch 44;

[0121] The first terminal of the first switch 44 is coupled to the first input terminal of the operational amplifier circuit 39, and the second terminal of the first switch 44 is coupled to the output terminal of the operational amplifier circuit 39.

[0122] It should be noted that, Figure 5 , Figure 6 The photodiode includes a photoelectric conversion unit, a first electrode, and a first electrode of a driving transistor. A third conductive layer electrically connected to the first electrode is electrically connected to a voltage signal terminal. The voltage signal terminal can provide a positive voltage signal +V or a negative voltage signal -V to the first electrode through the third conductive layer.

[0123] This disclosure provides a driving method for the above-mentioned texture recognition module, such as... Figure 7 As shown, it includes:

[0124] S101, Image Removal Stage: The driving transistor of the control texture recognition module is turned on, and an image removal signal is provided to the photoelectric conversion unit.

[0125] S102, during the image acquisition stage, the driving transistor of the control texture recognition module is turned off, and a common voltage signal is provided to the photoelectric conversion unit.

[0126] The driving method for the texture recognition module provided in this embodiment adds a ghost image removal stage and provides a ghost image removal signal to the photoelectric conversion unit during the ghost image removal stage. This allows a large current to pass through the photoelectric material of the photoelectric conversion unit, thereby filling the defect states in the photoelectric material with the large current. In this way, in the subsequent image acquisition stage, the photogenerated carriers generated by the photoelectric material will not be captured by the defect states, thereby improving the problem of image ghosting and increasing the accuracy of texture recognition.

[0127] In some embodiments, the image removal signal is electrically opposite to the common voltage signal.

[0128] In some embodiments, the image removal signal is a positive voltage signal and the common voltage signal is a negative voltage signal.

[0129] Next, as Figure 6 The texture recognition module shown is used as an example for illustration. During the image acquisition stage, the photoelectric conversion unit receives light and provides a negative voltage signal to the photodiode. In negative voltage signal mode, the driving transistor in the texture recognition unit is turned off, disconnecting the photodiode from the data reading unit. The photoelectric material in the photoelectric conversion unit generates photogenerated carriers and accumulates charge. During the image retention stage, a positive voltage signal is provided to the photodiode, allowing a large current to pass through the photoelectric material in the photoelectric conversion unit. This large current fills the defect states in the photoelectric material, preventing the photogenerated carriers sensed by the light from being captured by the defect states, thus reducing image retention.

[0130] Figure 8 This is a timing diagram illustrating the combination of positive and negative pressure signals. (Example) Figure 8 As shown, the frame timing in the image retention phase differs from that in the image acquisition phase. At the start of texture recognition, a positive voltage signal is applied for each frame. When exposure begins, the frame timing reverts to the negative voltage signal timing and applies a negative voltage signal again. After the frame timing reverts, there is a brief delay of several frames (Ndelay) to allow the detector to adapt to the new frame timing and stabilize the image's grayscale values. After Ndelay, the photodiode collects the light source signal for exposure, accumulating photogenerated carriers and generating an image until the process ends, at which point the system reverts to the positive voltage signal mode.

[0131] This disclosure provides a display device, including a texture recognition module provided in this disclosure.

[0132] In some embodiments, the display panel may be, for example, an electroluminescent display panel, wherein the sub-pixels of the display panel include electroluminescent devices. Electroluminescent devices may be, for example, organic light-emitting diode (OLED) devices or quantum dot (QD) light-emitting diode (QD) devices.

[0133] The display device provided in this disclosure includes any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. Other essential components of this display device are understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting this disclosure. Implementation of this display device can refer to the embodiments of the display panel described above; repeated details will not be repeated.

[0134] In summary, the texture recognition module, driving method, and display device provided in this disclosure increase the area of ​​the second via of the texture recognition module, making the distance between the edge of the photoelectric conversion section exposed by the second via on the substrate and the edge of the surface of the photoelectric conversion section on the substrate away from the substrate on the substrate less than or equal to a first preset value. Correspondingly, the area of ​​the first electrode can be increased, thereby increasing the area of ​​the photoelectric conversion section covered by the first electrode. This can increase the coverage range of the electric field on the photoelectric conversion section, reduce the probability of photogenerated carriers being captured by defect states on the sidewalls of the photoelectric conversion section, improve the problem of image ghosting, and improve the accuracy of texture recognition.

[0135] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0136] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations to the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A texture recognition module, wherein, The texture recognition module includes: Substrate; A driving circuit layer, located on one side of the substrate, includes multiple driving transistors arranged in an array; A first insulating layer is located on the side of the driving circuit layer opposite to the substrate, and includes a plurality of first vias that penetrate the thickness of the first insulating layer. Multiple photoelectric conversion units are located on the side of the first insulating layer away from the driving circuit layer, and are in contact with the first electrode of the driving transistor through the first via; The second insulating layer is located on the side of the first insulating layer away from the substrate and includes a plurality of second vias corresponding one-to-one with the photoelectric conversion part. The distance between the edge of the region of the second via exposing the photoelectric conversion part in the orthographic projection of the substrate and the edge of the orthographic projection of the surface of the photoelectric conversion part on the side away from the substrate in the orthographic projection of the substrate is less than or equal to a first preset value. Multiple first electrodes are located on the side of the photoelectric conversion unit away from the driving circuit layer, and each first electrode covers the photoelectric conversion unit through the second via. Also includes: The third insulating layer is located on the side of the second insulating layer opposite to the first insulating layer and includes a plurality of third vias; The third conductive layer is located on the side of the third insulating layer opposite to the second insulating layer; it contacts the first electrode through the third via. The fourth insulating layer is located on the side of the third conductive layer that is opposite to the third insulating layer; A light-shielding metal layer is located on the side of the fourth insulating layer opposite to the third conductive layer; the orthographic projection of the light-shielding metal layer on the substrate covers the orthographic projection of the active layer of the driving transistor on the substrate. The fifth insulating layer is located on the side of the light-shielding metal layer opposite to the fourth insulating layer; it has a fourth via penetrating its thickness; The shielding layer is located on the side of the fifth insulating layer opposite to the light-shielding metal layer, and contacts the light-shielding metal layer through the fourth via.

2. The texture recognition module according to claim 1, wherein, The distance between the area of ​​the second via exposing the photoelectric conversion part on the edge of the orthogonal projection of the substrate and the distance between the surface of the photoelectric conversion part on the side opposite to the substrate on the edge of the orthogonal projection of the substrate is greater than or equal to 0.5 micrometers and less than or equal to 2 micrometers.

3. The texture recognition module according to claim 1 or 2, wherein, The distance between the edge of the first electrode's orthogonal projection onto the substrate and the surface of the photoelectric conversion unit on the side opposite to the substrate's orthogonal projection onto the substrate's edge is greater than or equal to 0 micrometers and less than or equal to 0.5 micrometers.

4. The texture recognition module according to any one of claims 1 to 2, wherein, The orthographic projection of the photoelectric conversion unit onto the substrate falls within the orthographic projection of the first via onto the substrate.

5. The texture recognition module according to any one of claims 1 to 2, wherein, The first electrode of the driving transistor includes: a first portion, and a second portion connected to the first portion; The orthographic projection of the first via onto the substrate falls within the orthographic projection of the first portion onto the substrate, and the pattern of the orthographic projection of the first via onto the substrate is similar to the pattern of the orthographic projection of the first portion onto the substrate.

6. The texture recognition module according to claim 5, wherein, The area of ​​the first via projected onto the substrate is greater than or equal to 70% and less than or equal to 90% of the area of ​​the first portion projected onto the substrate.

7. The texture recognition module according to claim 5, wherein, The pattern of the first via projected onto the substrate is similar to the pattern of the photoelectric conversion unit projected onto the substrate.

8. The texture recognition module according to claim 6, wherein, The area of ​​the photoelectric conversion unit projected onto the substrate is greater than or equal to 90% and less than or equal to 100% of the area of ​​the first via projected onto the substrate.

9. The texture recognition module according to any one of claims 1-2 and 6-8, wherein, The side of the photoelectric conversion unit has a chamfer on the side closest to the driving transistor.

10. The texture recognition module according to claim 9, wherein, The chamfer is an inner chamfer that is recessed toward the center of the photoelectric conversion part.

11. The texture recognition module according to claim 9, wherein, The shape of the chamfer's orthogonal projection on the substrate is an arc or a broken line.

12. The texture recognition module according to claim 1, wherein, The driving circuit layer specifically includes: The first conductive layer includes: the control electrode of each of the driving transistors, and multiple scan signal lines; A gate insulating layer is located on the side of the first conductive layer that is away from the substrate. The active layer is located on the side of the gate insulating layer that is away from the first conductive layer; The second conductive layer, located on the side of the active layer away from the gate insulating layer, includes: a first electrode and a second electrode of each of the driving transistors, and multiple data signal lines; the data signal lines intersect with the scan signal lines to form multiple texture recognition units; the data signal lines are electrically connected to the second electrode of the driving transistor.

13. The texture recognition module according to claim 12, wherein, The texture recognition module also includes: Multiple data reading units are electrically connected to the data signal lines one-to-one; including: an operational amplifier circuit, a storage circuit, and a switching circuit; the first input terminal of the operational amplifier circuit is coupled to the data signal lines, the first terminal of the storage circuit, and the first terminal of the switching circuit; the output terminal of the operational amplifier is coupled to the second terminal of the storage circuit and the second terminal of the switching circuit; the output terminal of the operational amplifier circuit is configured to output a texture identification signal based on the data signal input from the data signal lines.

14. The texture recognition module according to claim 13, wherein, The operational amplifier circuit includes: a first amplifier; The first input terminal of the operational amplifier is coupled to the data signal line, the first terminal of the storage circuit, and the first terminal of the switching circuit; the second input terminal of the operational amplifier is grounded.

15. The texture recognition module according to claim 13 or 14, wherein, The storage circuit includes: a first capacitor; The first electrode of the first capacitor is coupled to the first input terminal of the operational amplifier circuit, and the second electrode of the first capacitor is coupled to the output terminal of the operational amplifier circuit.

16. The texture recognition module according to claim 15, wherein, The switching circuit includes: a first switch; The first terminal of the first switch is coupled to the first input terminal of the operational amplifier circuit, and the second terminal of the first switch is coupled to the output terminal of the operational amplifier circuit.

17. The texture recognition module according to any one of claims 1-2, 6-8, 10-14, and 16, wherein, The distance between the edge of the third via in the orthographic projection of the substrate and the surface of the photoelectric conversion unit on the side opposite to the substrate in the orthographic projection of the substrate is greater than or equal to 3 micrometers and less than or equal to 6 micrometers.

18. A driving method for a texture recognition module according to any one of claims 1 to 17, wherein, The method includes: During the image removal stage, the driving transistor of the texture recognition module is turned on, and an image removal signal is provided to the photoelectric conversion unit. During the image acquisition stage, the driving transistor of the texture recognition module is turned off, and a common voltage signal is provided to the photoelectric conversion unit.

19. The method according to claim 18, wherein, The image removal signal is electrically opposite to the common voltage signal.

20. The method according to claim 19, wherein, The image removal signal is a positive voltage signal, and the common voltage signal is a negative voltage signal.

21. A display device, wherein, Includes the texture recognition module according to any one of claims 1 to 17.

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