A burst signal self-interference cancellation device based on FPGA

Abstract

The present invention relates to a burst signal self-interference cancellation device based on FPGA, which belongs to the field of communication countermeasures. It includes a signal acquisition interface module 1, a delay estimation module 2, a power estimation module 3, a coarse delay compensation module 4, a power compensation module 5, an orthogonal digital down-conversion module 6, a fine delay compensation module 7, a frequency difference / phase difference compensation module 8, a burst signal reconstruction module 9 and an adaptive cancellation module 10; the present invention completes the digital domain signal self-interference cancellation function by a series of reconstruction processing of the communication signal in the digital domain under the premise of a known interference signal. The device is characterized in that it supports the interference cancellation function of the burst signal. For burst interference, the interference cancellation function of the burst signal is completed by reconstructing the burst signal multiple times.

Description

Technical Field

[0001] The invention belongs to the communication related field and relates to a new digital domain self-interference cancellation device. Background Art

[0002] In today's information age, information technology has developed rapidly and wireless communication technology has made unprecedented progress. Many electronic facilities are mixed, the electromagnetic spectrum is becoming increasingly dense, and the signal frequency almost covers the entire frequency domain from medium frequency to very high frequency. The concept of simultaneous full-duplex is proposed to alleviate the increasingly tense relationship between the rapidly growing business needs and limited spectrum resources by changing wireless communication technology. However, there is a serious self-interference problem in the simultaneous full-duplex system. Summary of the invention

[0003] The present invention needs to solve the above-mentioned problems that occur in reality, innovate in the direction of interference cancellation, and provide a burst signal self-interference cancellation device based on FPGA.

[0004] The technical solution adopted by the present invention is:

[0005] A burst signal self-interference cancellation device based on FPGA, comprising a signal acquisition interface module 1, a delay estimation module 2, a power estimation module 3, a coarse delay compensation module 4, a power compensation module 5, an orthogonal digital down-conversion module 6, a fine delay compensation module 7, a frequency difference / phase difference compensation module 8, a burst signal reconstruction module 9 and an adaptive cancellation module 10;

[0006] The signal acquisition interface module 1 is used to receive the sampled data and send the collected sum path data and reference path data to the delay estimation module 2 and the coarse delay compensation module 4;

[0007] The delay estimation module 2 is used to receive the sum path data and the reference path data sent by the signal acquisition interface module 1, perform coarse delay estimation, and send the obtained coarse delay difference to the coarse delay compensation module 4; it is also used to receive the two-path narrowband data processed by the orthogonal digital down-conversion module 6, perform fine delay estimation, and send the fine delay difference to the fine delay compensation module 7;

[0008] The power estimation module 3 is used to receive the summed data and the reference data after the delay compensation by the coarse delay compensation module 4, and estimate the power difference between the two data to obtain a power compensation value, and send the power compensation value to the power compensation module 5;

[0009] The coarse delay compensation module 4 is used to receive the summed data and the reference data sent by the signal acquisition interface module 1, and receive the coarse delay difference sent by the delay estimation module 2, perform delay difference compensation on the summed data and the reference data according to the coarse delay difference, and send the summed data and the reference data after delay compensation to the power estimation module 3 and the power compensation module 5;

[0010] The power compensation module 5 is used to receive the summed data and the reference data after the delay compensation is completed by the coarse delay compensation module 4, and receive the power compensation value obtained by the power estimation module 3, perform power compensation on the summed data and the reference data according to the power compensation value, and send the two data after the power compensation to the orthogonal digital down-conversion module 6;

[0011] The orthogonal digital down-conversion module 6 is used to receive the combined data and the reference data after the power compensation module 5 completes the power compensation, and simultaneously performs orthogonal down-conversion processing on the two data to obtain two narrowband data, and send the two narrowband data to the delay estimation module 2 and the fine delay compensation module 7;

[0012] The fine delay compensation module 7 is used to receive the narrowband sum data and reference data sent by the orthogonal digital down-conversion module 6, and receive the fine delay difference sent by the delay estimation module 2, complete the fine delay difference compensation between the sum data and the reference data, and send the two data after the fine delay compensation to the frequency difference / phase difference compensation module 8;

[0013] The frequency difference / phase difference compensation module 8 is used to receive the summed data and the reference data after the fine delay compensation module 7 completes the fine delay compensation, and performs frequency difference and phase difference compensation on the summed data and the reference data through an external frequency difference and phase difference, and sends the summed data and the reference data after the frequency difference and phase difference compensation to the burst signal reconstruction module 9;

[0014] The burst signal reconstruction module 9 is used to receive the summed data and reference data after the frequency difference and phase difference compensation module 8 completes the frequency difference and phase difference compensation, perform burst signal detection on the reference data, reconstruct each detected burst signal, and send the reconstructed summed data and reference data to the adaptive cancellation module 10;

[0015] The adaptive cancellation module 10 is used to receive the sum data and reference data reconstructed by the burst signal reconstruction module 9, and to perform real-time channel difference compensation on the two received signals through an adaptive filter.

[0016] Further, the delay estimation module 2 includes a large-point coarse delay estimation module 201 and a fine delay estimation module 202;

[0017] The large-point coarse delay estimation module 201 is used to receive the sum path data and the reference path data sent by the signal acquisition interface module 1, perform coarse delay estimation, and send the obtained coarse delay difference to the coarse delay compensation module 4; the fine delay estimation module 202 is used to receive the two-path narrowband data processed by the orthogonal digital down-conversion module 6, perform fine delay estimation, and send the fine delay difference to the fine delay compensation module 7;

[0018] The large-point rough delay estimation module 201 includes a frequency domain correlation module 2010, a peak detection module 2011, an automatic threshold generation module 2012 and a delay point acquisition module 2013;

[0019] The frequency domain correlation module 2010 is used to receive the summed data and reference data sent by the signal acquisition interface module 1, perform frequency domain search correlation on the reference data and the summed data, and send the correlation results to the peak detection module 2011;

[0020] The peak detection module 2011 is used to receive the correlation results sent by the frequency domain correlation module 2010, perform peak detection on the correlation results, and send the detected peak value to the delay point acquisition module 2013;

[0021] The automatic threshold generation module 2012 is used to receive the summed data and reference data sent by the signal acquisition interface module 1, obtain the threshold value through the signal energy values ​​of the reference data and the summed data, and send the threshold value to the delay point acquisition module 2013;

[0022] The delay point acquisition module 2013 is used to receive the threshold value and the correlation peak detection result, obtain the delay point and the coarse delay difference of the combined signal relative to the reference signal, and send the coarse delay difference to the coarse delay compensation module 4.

[0023] Furthermore, the power estimation module 3 includes an average power estimation module 301 and an optimal offset power compensation value acquisition module 302;

[0024] The average power estimation module 301 is used to receive the summed data and reference data after the coarse delay compensation module 4 completes the coarse delay compensation, and estimates the average power of the two signals within a set time, and sends the average power to the optimal offset power compensation value acquisition module 302;

[0025] The optimal cancellation power compensation value acquisition module 302 is used to obtain the compensation value required for the two signals to achieve the optimal cancellation power by performing compensation analysis on the preset optimal cancellation power and the average power of the two signals, and send the power compensation value to the power compensation module 5.

[0026] Further, the burst signal reconstruction module 9 includes a burst signal detection module 901, a phase difference estimation module 902, a delay waiting module 903 and a phase difference compensation module 904; wherein the phase difference estimation module 902 includes a differential processing module 9020, a frequency domain conversion module 9021, a peak query module 9022 and a phase extraction module 9023;

[0027] The burst signal detection module 901 is used to receive the two-channel data for which the frequency difference and phase difference compensation module 8 completes the frequency difference and phase difference compensation, and performs double sliding window burst signal detection on the reference channel data, and sends the combined channel data and the reference channel data when the burst signal is detected to the phase difference estimation module 902;

[0028] The differential processing module 9020 is used to receive the combined data and the reference data when the burst signal detection module 901 detects a burst signal, perform differential processing, and send the obtained differential data to the frequency domain conversion module 9021;

[0029] The frequency domain conversion module 9021 is used to receive the differential data obtained by the differential processing module 9020, perform FFT processing on the differential data, extract the amplitude and phase of the frequency domain data after obtaining the frequency domain data, and send the amplitude value of the frequency domain data to the peak query module 9022, and send the phase value of the frequency domain data to the phase extraction module 9023;

[0030] The peak value query module 9022 is used to receive the amplitude value of the frequency domain data from the frequency domain conversion module 9021, perform peak value search on the frequency domain amplitude data, and send the position of the peak value to the phase extraction module 9023;

[0031] The phase extraction module 9023 is used to receive the phase value of the frequency domain data from the frequency domain conversion module 9021, and receive the peak position searched by the peak query module 9022, extract the phase value at the peak position, and send the extracted phase value to the phase difference compensation module 904;

[0032] The delay waiting module 903 is used to receive the combined data and reference data after the frequency difference and phase difference compensation sent by the frequency difference / phase difference compensation module 8, delay and cache the combined data and the reference data, and is also used to receive the phase extraction completion flag of the phase extraction module 9023, and after receiving the completion flag, read out the data and send it to the phase difference compensation module 904;

[0033] The phase difference compensation module 904 is used to receive the phase difference sent by the phase extraction module 9023, as well as the combined data and reference data after delayed waiting sent by the delay waiting module 903, and use the phase difference value to generate a local oscillator, multiply the local oscillator and the combined signal to obtain a mixed combined signal, complete the phase difference compensation, and send the reconstructed combined data and reference data to the adaptive cancellation module 10.

[0034] Compared with the prior art, the present invention has the following advantages:

[0035] 1. The present invention can achieve low interference-to-signal ratio interference cancellation by reconstructing the interference signal in multiple dimensions and multiple times.

[0036] 2. The present invention has the advantages of adjustable weighting coefficients of the adaptive filter and fast adaptive convergence speed.

[0037] 3. The present invention realizes real-time burst signal interference cancellation. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 This is a block diagram of the overall principle of the present invention.

[0039] Figure 2 This is a principle block diagram of the delay estimation module of the present invention.

[0040] Figure 3 This is a principle block diagram of a large-point coarse delay estimation module of the present invention.

[0041] Figure 4 This is a principle block diagram of the power estimation module of the present invention.

[0042] Figure 5 This is a principle block diagram of the burst signal reconstruction module of the present invention.

[0043] Figure 6 This is a principle block diagram of the phase difference estimation module of the present invention. DETAILED DESCRIPTION

[0044] Reference Figures 1 to 6 , the present invention is further described.

[0045] Figure 1 The principle block diagram of the present invention is as follows: a burst signal self-interference cancellation device based on FPGA, comprising a signal acquisition interface module 1, a delay estimation module 2, a power estimation module 3, a coarse delay compensation module 4, a power compensation module 5, an orthogonal digital down-conversion module 6, a fine delay compensation module 7, a frequency difference / phase difference compensation module 8, a burst signal reconstruction module 9 and an adaptive cancellation module 10;

[0046] The signal acquisition interface module 1 is used to receive the sampled data and send the collected sum path data and reference path data to the delay estimation module 2 and the coarse delay compensation module 4;

[0047] The delay estimation module 2 is used to receive the sum path data and the reference path data sent by the signal acquisition interface module 1, perform coarse delay estimation, and send the obtained coarse delay difference to the coarse delay compensation module 4; it is also used to receive the two-path narrowband data processed by the orthogonal digital down-conversion module 6, perform fine delay estimation, and send the fine delay difference to the fine delay compensation module 7;

[0048] The power estimation module 3 is used to receive the summed data and the reference data after the delay compensation by the coarse delay compensation module 4, and estimate the power difference between the two data to obtain a power compensation value, and send the power compensation value to the power compensation module 5;

[0049] The coarse delay compensation module 4 is used to receive the summed data and the reference data sent by the signal acquisition interface module 1, and receive the coarse delay difference sent by the delay estimation module 2, perform delay difference compensation on the summed data and the reference data according to the coarse delay difference, and send the summed data and the reference data after delay compensation to the power estimation module 3 and the power compensation module 5;

[0050] The power compensation module 5 is used to receive the summed data and the reference data after the delay compensation is completed by the coarse delay compensation module 4, and receive the power compensation value obtained by the power estimation module 3, perform power compensation on the summed data and the reference data according to the power compensation value, and send the two data after the power compensation to the orthogonal digital down-conversion module 6;

[0051] The orthogonal digital down-conversion module 6 is used to receive the combined data and the reference data after the power compensation module 5 completes the power compensation, and simultaneously performs orthogonal down-conversion processing on the two data to obtain two narrowband data, and send the two narrowband data to the delay estimation module 2 and the fine delay compensation module 7;

[0052] The fine delay compensation module 7 is used to receive the narrowband sum data and reference data sent by the orthogonal digital down-conversion module 6, and receive the fine delay difference sent by the delay estimation module 2, complete the fine delay difference compensation between the sum data and the reference data, and send the two data after the fine delay compensation to the frequency difference / phase difference compensation module 8;

[0053] The frequency difference / phase difference compensation module 8 is used to receive the summed data and the reference data after the fine delay compensation module 7 completes the fine delay compensation, and performs frequency difference and phase difference compensation on the summed data and the reference data through an external frequency difference and phase difference, and sends the summed data and the reference data after the frequency difference and phase difference compensation to the burst signal reconstruction module 9;

[0054] The burst signal reconstruction module 9 is used to receive the summed data and reference data after the frequency difference and phase difference compensation module 8 completes the frequency difference and phase difference compensation, perform burst signal detection on the reference data, reconstruct each detected burst signal, and send the reconstructed summed data and reference data to the adaptive cancellation module 10;

[0055] The adaptive cancellation module 10 is used to receive the sum data and reference data reconstructed by the burst signal reconstruction module 9, and to perform real-time channel difference compensation on the two received signals through an adaptive filter.

[0056] like Figure 2 The figure shows a principle block diagram of the delay estimation module 2, which includes a large-point coarse delay estimation module 201 and a fine delay estimation module 202;

[0057] The large-point coarse delay estimation module 201 is used to receive the sum path data and the reference path data sent by the signal acquisition interface module 1, perform coarse delay estimation, and send the obtained coarse delay difference to the coarse delay compensation module 4; the fine delay estimation module 202 is used to receive the two-path narrowband data processed by the orthogonal digital down-conversion module 6, perform fine delay estimation, and send the fine delay difference to the fine delay compensation module 7;

[0058] The large point number coarse delay estimation module 201 includes a frequency domain correlation module 2010, a peak detection module 2011, an automatic threshold generation module 2012 and a delay point number acquisition module 2013; Figure 3 shown.

[0059] The frequency domain correlation module 2010 is used to receive the summed data and reference data sent by the signal acquisition interface module 1, perform frequency domain search correlation on the reference data and the summed data, and send the correlation results to the peak detection module 2011;

[0060] The peak detection module 2011 is used to receive the correlation results sent by the frequency domain correlation module 2010, perform peak detection on the correlation results, and send the detected peak value to the delay point acquisition module 2013;

[0061] The automatic threshold generation module 2012 is used to receive the summed data and reference data sent by the signal acquisition interface module 1, obtain the threshold value through the signal energy values ​​of the reference data and the summed data, and send the threshold value to the delay point acquisition module 2013;

[0062] The delay point acquisition module 2013 is used to receive the threshold value and the correlation peak detection result, obtain the delay point and the coarse delay difference of the combined signal relative to the reference signal, and send the coarse delay difference to the coarse delay compensation module 4.

[0063] Figure 4The power estimation module 3 includes an average power estimation module 301 and an optimal offset power compensation value acquisition module 302;

[0064] The average power estimation module 301 is used to receive the summed data and reference data after the coarse delay compensation module 4 completes the coarse delay compensation, and estimates the average power of the two signals within a set time, and sends the average power to the optimal offset power compensation value acquisition module 302;

[0065] The optimal cancellation power compensation value acquisition module 302 is used to obtain the compensation value required for the two signals to achieve the optimal cancellation power by performing compensation analysis on the preset optimal cancellation power and the average power of the two signals, and send the power compensation value to the power compensation module 5.

[0066] Figure 5 The schematic diagram of the burst signal reconstruction module shown in FIG. 1 shows that the burst signal reconstruction module 9 includes a burst signal detection module 901, a phase difference estimation module 902, a delay waiting module 903 and a phase difference compensation module 904; wherein, Figure 6 The phase difference estimation module 902 shown includes a difference processing module 9020, a frequency domain conversion module 9021, a peak query module 9022 and a phase extraction module 9023;

[0067] The burst signal detection module 901 is used to receive the two-channel data for which the frequency difference and phase difference compensation module 8 completes the frequency difference and phase difference compensation, and performs double sliding window burst signal detection on the reference channel data, and sends the combined channel data and the reference channel data when the burst signal is detected to the phase difference estimation module 902;

[0068] The differential processing module 9020 is used to receive the combined data and the reference data when the burst signal detection module 901 detects a burst signal, perform differential processing, and send the obtained differential data to the frequency domain conversion module 9021;

[0069] The frequency domain conversion module 9021 is used to receive the differential data obtained by the differential processing module 9020, perform FFT processing on the differential data, extract the amplitude and phase of the frequency domain data after obtaining the frequency domain data, and send the amplitude value of the frequency domain data to the peak query module 9022, and send the phase value of the frequency domain data to the phase extraction module 9023;

[0070] The peak value query module 9022 is used to receive the amplitude value of the frequency domain data from the frequency domain conversion module 9021, perform peak value search on the frequency domain amplitude data, and send the position of the peak value to the phase extraction module 9023;

[0071] The phase extraction module 9023 is used to receive the phase value of the frequency domain data from the frequency domain conversion module 9021, and receive the peak position searched by the peak query module 9022, extract the phase value at the peak position, and send the extracted phase value to the phase difference compensation module 904;

[0072] The delay waiting module 903 is used to receive the combined data and reference data after the frequency difference and phase difference compensation sent by the frequency difference / phase difference compensation module 8, delay and cache the combined data and the reference data, and is also used to receive the phase extraction completion flag of the phase extraction module 9023, and after receiving the completion flag, read out the data and send it to the phase difference compensation module 904;

[0073] The phase difference compensation module 904 is used to receive the phase difference sent by the phase extraction module 9023, as well as the combined data and reference data after delayed waiting sent by the delay waiting module 903, and use the phase difference value to generate a local oscillator, multiply the local oscillator and the combined signal to obtain a mixed combined signal, complete the phase difference compensation, and send the reconstructed combined data and reference data to the adaptive cancellation module 10.

Claims

1. A burst signal self-interference cancellation device based on FPGA, comprising a signal acquisition interface module (1), an orthogonal digital down-conversion module (6) and an adaptive cancellation module (10); characterized in that: It also includes a delay estimation module (2), a power estimation module (3), a coarse delay compensation module (4), a power compensation module (5), a fine delay compensation module (7), a frequency difference / phase difference compensation module (8) and a burst signal reconstruction module (9); The signal acquisition interface module (1) is used to receive sampled data and send the collected sum path data and reference path data to the delay estimation module (2) and the coarse delay compensation module (4); The delay estimation module (2) is used to receive the sum path data and the reference path data sent by the signal acquisition interface module (1), perform coarse delay estimation, and send the obtained coarse delay difference to the coarse delay compensation module (4); it is also used to receive the two-path narrowband data processed by the orthogonal digital down-conversion module (6), perform fine delay estimation, and send the fine delay difference to the fine delay compensation module (7); The power estimation module (3) is used to receive the summed data and the reference data after the delay compensation is completed by the coarse delay compensation module (4), estimate the power difference between the two data, obtain a power compensation value, and send the power compensation value to the power compensation module (5); The coarse delay compensation module (4) is used to receive the summed path data and the reference path data sent by the signal acquisition interface module (1), and receive the coarse delay difference sent by the delay estimation module (2), perform delay difference compensation on the summed path data and the reference path data according to the coarse delay difference, and send the summed path data and the reference path data after the delay compensation to the power estimation module (3) and the power compensation module (5); The power compensation module (5) is used to receive the summed data and the reference data after the delay compensation is completed by the coarse delay compensation module (4), and receive the power compensation value obtained by the power estimation module (3), perform power compensation on the summed data and the reference data according to the power compensation value, and send the two data after the power compensation to the orthogonal digital down-conversion module (6); The orthogonal digital down-conversion module (6) is used to receive the combined data and the reference data after the power compensation module (5) completes the power compensation, and simultaneously performs orthogonal down-conversion processing on the two data to obtain two narrow-band data, and sends the two narrow-band data to the delay estimation module (2) and the fine delay compensation module (7); The fine delay compensation module (7) is used to receive the narrowband sum data and reference data sent by the orthogonal digital down-conversion module (6), and receive the fine delay difference sent by the delay estimation module (2), complete the fine delay difference compensation between the sum data and the reference data, and send the two data after the fine delay compensation to the frequency difference / phase difference compensation module (8); The frequency difference / phase difference compensation module (8) is used to receive the summed data and the reference data after the fine delay compensation module (7) completes the fine delay compensation, and performs frequency difference and phase difference compensation on the summed data and the reference data through an external frequency difference and phase difference, and sends the summed data and the reference data after the frequency difference and phase difference compensation to the burst signal reconstruction module (9); The burst signal reconstruction module (9) is used to receive the summed path data and the reference path data after the frequency difference / phase difference compensation module (8) completes the frequency difference and phase difference compensation, perform burst signal detection on the reference path data, reconstruct each detected burst signal, and send the reconstructed summed path data and the reference path data to the adaptive cancellation module (10); The adaptive offset module (10) is used to receive the sum path data and reference path data reconstructed by the burst signal reconstruction module (9), and to perform real-time channel difference compensation on the received two path signals through an adaptive filter.

2. According to the FPGA-based burst signal self-interference cancellation device of claim 1, it is characterized in that: The delay estimation module (2) comprises a large-point coarse delay estimation module (201) and a fine delay estimation module (202); The large-point coarse delay estimation module (201) is used to receive the sum path data and the reference path data sent by the signal acquisition interface module (1), perform coarse delay estimation, and send the obtained coarse delay difference to the coarse delay compensation module (4); the fine delay estimation module (202) is used to receive the two-path narrowband data processed by the orthogonal digital down-conversion module (6), perform fine delay estimation, and send the fine delay difference to the fine delay compensation module (7); The large-point rough delay estimation module (201) includes a frequency domain correlation module (2010), a peak detection module (2011), an automatic threshold generation module (2012) and a delay point acquisition module (2013); The frequency domain correlation module (2010) is used to receive the summed data and reference data sent by the signal acquisition interface module (1), perform frequency domain search correlation on the reference data and the summed data, and send the correlation result to the peak detection module (2011); The peak detection module (2011) is used for receiving the correlation results sent by the frequency domain correlation module (2010), performing peak detection on the correlation results, and sending the detected peak value to the delay point acquisition module (2013); The automatic threshold generation module (2012) is used for receiving the summed data and the reference data sent by the signal acquisition interface module (1), obtaining the threshold value through the signal energy values ​​of the reference data and the summed data, and sending the threshold value to the delay point acquisition module (2013); The delay point acquisition module (2013) is used to receive the threshold value and the related peak detection result, obtain the delay point and the coarse delay difference of the combined signal relative to the reference signal, and send the coarse delay difference to the coarse delay compensation module (4).

3. The burst signal self-interference cancellation device based on FPGA according to claim 1, characterized in that: The power estimation module (3) comprises an average power estimation module (301) and an optimal offset power compensation value acquisition module (302); The average power estimation module (301) is used to receive the summed data and reference data after the coarse delay compensation module (4) completes the coarse delay compensation, and estimates the average power of the two signals within a set time, and sends the average power to the optimal offset power compensation value acquisition module (302); The optimal offset power compensation value acquisition module (302) is used to obtain the compensation value required for the two signals to achieve the optimal offset power by performing compensation analysis on the preset optimal offset power and the average power of the two signals, and send the power compensation value to the power compensation module (5).

4. The burst signal self-interference cancellation device based on FPGA according to claim 1, characterized in that: The burst signal reconstruction module (9) comprises a burst signal detection module (901), a phase difference estimation module (902), a delay waiting module (903) and a phase difference compensation module (904); wherein the phase difference estimation module (902) comprises a differential processing module (9020), a frequency domain conversion module (9021), a peak value query module (9022) and a phase extraction module (9023); The burst signal detection module (901) is used to receive the two-channel data for which the frequency difference and phase difference compensation module (8) completes the frequency difference and phase difference compensation, and performs double sliding window burst signal detection on the reference channel data, and sends the combined channel data and the reference channel data when the burst signal is detected to the phase difference estimation module (902); The differential processing module (9020) is used to receive the combined data and reference data when the burst signal detection module (901) detects a burst signal, perform differential processing, and send the obtained differential data to the frequency domain conversion module (9021); The frequency domain conversion module (9021) is used to receive the differential data obtained by the differential processing module (9020), perform FFT processing on the differential data, obtain frequency domain data, extract amplitude and phase of the frequency domain data, and send the amplitude value of the frequency domain data to the peak query module (9022), and send the phase value of the frequency domain data to the phase extraction module (9023); The peak value query module (9022) is used to receive the amplitude value of the frequency domain data from the frequency domain conversion module (9021), perform peak value search on the frequency domain amplitude data, and send the position of the peak value to the phase extraction module (9023); The phase extraction module (9023) is used to receive the phase value of the frequency domain data from the frequency domain conversion module (9021), and receive the peak position searched by the peak query module (9022), extract the phase value at the peak position, and send the extracted phase value to the phase difference compensation module (904); The delay waiting module (903) is used to receive the combined data and reference data after frequency difference and phase difference compensation sent by the frequency difference / phase difference compensation module (8), delay and cache the combined data and reference data, and is also used to receive the phase extraction completion flag of the phase extraction module (9023), and after receiving the completion flag, read out the data and send it to the phase difference compensation module (904); The phase difference compensation module (904) is used to receive the phase difference sent by the phase extraction module (9023) and the combined data and reference data after delayed waiting sent by the delay waiting module (903), and use the phase difference value to generate a local oscillator, multiply the local oscillator and the combined signal to obtain a mixed combined signal, complete the phase difference compensation, and send the reconstructed combined data and reference data to the adaptive cancellation module (10).

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