A Hardware-Supported Observation Point Debugging Method

Abstract

The present invention discloses a hardware-supported breakpoint debugging method, which includes the following steps: Step 1: Set a group of control status registers in the processor for data stream debugging; Step 2: Add a hardware breakpoint function interface in the debugger for observation; Step 3: Map the observed content to the control status registers of the processor and start listening to and matching the program data stream; Step 4: When the processor monitors that the content of the control status register is modified, update the semaphore of the program and send a SIGTRAP signal to the program; Step 5: The debugger obtains the SIGTRAP signal and makes a breakpoint determination. If the determination is successful, the program stops running and waits for the user's next operation. The present invention can timely and accurately detect program errors caused by illegal modification of data, improving the efficiency of program debugging.

Description

Technical Field

[0001] The present invention relates to a hardware - supported breakpoint debugging method, belonging to the technical field of computer program debugging. Background Art

[0002] Program debugging is an essential stage in the software development process. In this stage, programmers need to spend a lot of energy and time and use various debugging methods to find and correct program bugs. In recent years, with the increase in the scale and complexity of application software, the bugs in the program have become more and more hidden and difficult to locate, so the dependence on program debugging technology is getting higher and higher, and there is an urgent need to implement some efficient and convenient program data - flow debugging methods.

[0003] A watchpoint is one of the key technologies in program debugging. After setting a watchpoint for a variable in the program, any attempt to operate on the variable will trigger the program to stop running, thus exposing the errors in the program, such as abnormal access and illegal tampering of program variables. There are usually two implementation methods for watchpoints: software watchpoints and hardware watchpoints. Software watchpoints stop the program through step - by - step debugging and detect the value of the variable at the same time. Although the implementation process of this method is simple, "stop at each step" will seriously reduce the execution speed of the program, making the debugging process inefficient and time - consuming. Hardware watchpoints, on the other hand, monitor variables with the help of processor hardware registers. When it matches that the program data flow attempts to modify the variable value, it will trigger a hardware interrupt and pause the program. This method does not affect the program execution efficiency while implementing the monitoring mechanism, but the design and implementation of hardware watchpoints are closely related to the processor architecture and require the simultaneous support of the processor and operating system functions.

[0004] Currently, there are two implementation methods for watchpoints: software watchpoints and hardware watchpoints. The implementation process of software watchpoints is simple, but it will seriously reduce the execution speed of the program, making the debugging process time - consuming. Hardware watchpoints, on the other hand, monitor variables with the help of processor hardware registers, which can implement the monitoring mechanism without affecting the program execution efficiency. However, the design and implementation of hardware watchpoints are closely related to the processor architecture and require the simultaneous support of the processor and operating system functions, so the overall implementation difficulty and workload are relatively large. Summary of the Invention

[0005] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a hardware - supported breakpoint debugging method, which can timely and accurately detect program errors caused by illegal data modification and improve the program debugging efficiency.

[0006] To achieve the above - mentioned purpose, the present invention is implemented by the following technical solutions:

[0007] In the first aspect, the present invention provides a hardware - supported breakpoint debugging method, including:

[0008] Step 1: Set a set of control status registers in the processor for data stream debugging;

[0009] Step 2: Add a hardware breakpoint function interface in the debugger for observation;

[0010] Step 3: Map the observed content to the control status registers of the processor, and start listening to and matching the program data stream;

[0011] Step 4: When the processor monitors that the content of the control status register is modified, update the semaphore of the program and send a SIGTRAP signal to the program;

[0012] Step 5: The debugger obtains the SIGTRAP signal and performs breakpoint determination. If the determination is successful, the program stops running and waits for the user's next operation.

[0013] Further, in the above Step 1, the control status registers include a data stream address matching register and a data stream address masking register.

[0014] Further, in the above Step 1, the setting of the control status registers includes setting the data stream address matching register to be readable and writable, clearing it when reset, and generating a data stream fault when the data stream access address matches the content of this register; setting the data stream address masking register to be readable and writable, setting all the lower 53 bits to 1 when reset, masking the number of bits for data stream address comparison, and the length of address matching can be selected.

[0015] Further, in the above Step 2, the added breakpoint function interfaces in the debugger include a breakpoint storage array definition interface, a breakpoint setting interface, a breakpoint deletion interface, and a breakpoint enabling interface.

[0016] Further, the breakpoint storage array definition interface includes breakpoint address length judgment, breakpoint index judgment, and breakpoint storage array update. The breakpoint enabling interface determines the current breakpoint status through a breakpoint effective flag; the breakpoint deletion interface cancels the data stream matching function by writing a default value to the control status register.

[0017] Further, in the above Step 2, a set of debug registers are also defined in the debugger, and the debug registers correspond to the control status registers of the processor.

[0018] Further, in the above Step 3, mapping the observed content to the control status registers of the processor and starting to listen to and match the program data stream includes:

[0019] During the program debugging phase, after setting a breakpoint for a certain variable or address, the debugger writes the observed content into the debug register, and then uses the system call to map the observed content to the control status register of the processor to start monitoring and matching the program data stream.

[0020] Further, in step 5, if the breakpoint determination fails, the current SIGTRAP signal is skipped.

[0021] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:

[0022] During the program debugging phase of the present invention, after starting the observation and debugging of a certain variable or address, the observed address is written into the control status register through system calls and privileged operations to start monitoring and matching the program data stream. Once it is found that the address is modified, the semaphore of the program is updated, and a SIGTRAP signal is sent. After the debugger obtains the signal, the breakpoint determination is performed, and the program stops running, waiting for the user's next operation. Through this "real-time" monitoring mechanism based on hardware, program errors caused by illegal modification of data can be discovered in a timely and accurate manner, improving the efficiency of program debugging. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a flowchart of a hardware-supported breakpoint debugging method provided by an embodiment of the present invention;

[0024] Figure 2 is a schematic diagram of the structure of a breakpoint storage array provided by an embodiment of the present invention;

[0025] Figure 3 is a functional diagram of the bits of a data stream address matching register provided by an embodiment of the invention;

[0026] Figure 4 is a functional diagram of the bits of a data stream address masking register provided by an embodiment of the invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0027] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and should not be used to limit the protection scope of the present invention.

[0028] Embodiment 1

[0029] This embodiment introduces a hardware-supported breakpoint debugging method, including:

[0030] Step 1: Set a group of control status registers in the processor for data stream debugging;

[0031] Step 2: Add a hardware breakpoint function interface in the debugger for observation;

[0032] Step 3: Map the observed content to the control status register of the processor and start monitoring and matching the program data stream;

[0033] Step 4: When the processor monitors that the content of the control status register is modified, update the semaphore of the program and send a SIGTRAP signal to the program;

[0034] Step 5: The debugger obtains the SIGTRAP signal and makes an observation point determination. If the determination is successful, the program stops running and waits for the user's next operation.

[0035] The hardware-supported observation point debugging method provided in this embodiment specifically involves the following steps in its application process:

[0036] a. Set a group of control status registers in the processor, which specifically need to include a data stream address matching register and a data stream address masking register;

[0037] b. The observation point supported by the debugger software code includes the definition of an observation point storage array, observation point setting, observation point deletion, observation point enabling, and debugging register definition, etc.;

[0038] c. Write the observed content into the debugging register through the debugger, and then use system calls and privileged operations to map the observed content to the control status register of the processor and start monitoring and matching the program data stream;

[0039] d. When the processor monitors that the content of the control status register is modified, update the semaphore of the program and send a SIGTRAP signal. After the debugger obtains the signal, it makes an observation point determination, and the program stops running and waits for the user's next operation.

[0040] Specifically, the setting of the control status register in step a includes setting the data stream address matching register to be readable and writable, clearing it when reset, and generating a data stream fault when the data stream access address matches the content of this register; setting the data stream address masking register to be readable and writable, setting all 53 low bits to 1 when reset, masking the number of bits for data stream address comparison, and the length of address matching can be selected.

[0041] Specifically, the observation point function interfaces added to the debugger source code in step b, where the observation point storage array includes an observation point setting interface that includes judgment of the observation point address length, judgment of the observation point index, and update of the observation point storage array; the observation point enabling interface judges the current observation point status through the observation point effective flag; the observation point deletion interface cancels the data stream matching function by writing the default value to the control status register.

[0042] Specifically, in step c, the debugger writes the observed address into the control status register, which is specifically implemented by means of system calls and privileged operation paths. First, the address is written into the debug register, and then further written into the control status register. Finally, the observed address is successfully recorded in the thread state, and the thread will continuously match the observed content of the control status register during operation to start monitoring the program data stream.

[0043] Specifically, in step d, when it is matched that the observed content has been modified, the operating system will update the semaphore of the program and send a SIGTRAP signal to the program. After the signal handling function in the debugger obtains the SIGTRAP signal, it determines the breakpoint by querying the breakpoint storage array; if the breakpoint match is successful, the control program stops running and waits for the user's next operation; if the match fails, the SIGTRAP signal is ignored.

[0044] Next, a preferred embodiment is used to illustrate the content involved in the above embodiments.

[0045] S10: Set a group of control status registers in the processor for data stream debugging.

[0046] A group of control status registers specifically need to include a data stream address match register and a data stream address mask register.

[0047] In this embodiment, the setting of the control status register includes setting the data stream address match register to be readable and writable, clearing it when reset, and generating a data stream fault when the data stream access address matches the content of this register; setting the data stream address mask register to be readable and writable, setting all 53 low bits to 1 when reset, masking the number of bits for data stream address comparison, and the length of address match can be selected.

[0048] For example, as Figure 3 shown, the functions of bits 0 to 63 of the data stream address match register are set in sequence. Among them, bits 0 to 52 represent the address compared with the data stream address, that is, the maximum address length where breakpoints can be set remains within 53 bits; bits 53 to 54 represent the address match enable bits, "00" indicates prohibiting address comparison, "01" indicates allowing read access address comparison, "10" indicates allowing write address comparison, "11" indicates allowing read and write address comparison; bit 55 represents the physical address flag, "1" indicates physical address comparison, that is, bits 0 to 47 of the physical address of the data stream are compared. Otherwise, virtual address comparison is performed, that is, bits 0 to 52 of the virtual address of the data stream are compared; the functions of bits 56 to 63 are temporarily reserved.

[0049] For example, as Figure 4As shown, the functions of bits 0 to 63 of the data stream address mask register are set in sequence. Among them, bits 0 to 52 represent the data stream address match mask bits, corresponding to each of bits 0 to 52 in the data stream address match register. A value of "1" indicates that this bit participates in the comparison, and initially all are "1", that is, all 53 bits of the address are compared.

[0050] S20: Add a hardware breakpoint function interface in the debugger.

[0051] The breakpoint function interfaces added in the debugger include the definition of the breakpoint storage array, breakpoint setting, breakpoint deletion, breakpoint enabling, etc. In addition, a set of debug registers is defined in the debugger to correspond to the control status registers of the processor.

[0052] In this embodiment, as Figure 2 shown, the storage array structure of the breakpoint is defined. The size of the array is determined according to the maximum number of breakpoints supported by the processor. Each element in the array records all the information of a breakpoint, including the observation address, enable flag, and other information. Among them, the observation address records the content to be observed. If the content to be observed is a variable, the address of the variable is recorded. The enable flag is used to record the disabled / enabled state of the breakpoint. Other information records information such as the read / write mode of the breakpoint and the length of the observation address.

[0053] In the embodiment of the present invention, the hardware breakpoint function interfaces and functions added in the debugger are described as shown in Table 1 below:

[0054] Table 1 Breakpoint function interfaces and functions

[0055]

[0056]

[0057] For example, in the debugger, a hardware breakpoint is set for a variable or address through the breakpoint command. The debugger determines whether the content to be observed is a variable or an address. If it is a variable, the address of the variable needs to be obtained. After obtaining the observation address, the debugger directly calls SetHardwareWatchpoint() to start setting the hardware breakpoint. Among them, the final observation address needs to be obtained by combining the mask bit and length of the address, and further calls WriteDebugRegisterValue() to write the address into the debug register. At the same time, the debugger updates the breakpoint storage array and adds the information of the currently set hardware breakpoint.

[0058] S30: Read and write the control status register to start listening and matching the program data stream.

[0059] During the program debugging phase, after setting a watchpoint for a certain variable or address, the debugger writes the watched address into the debug register, and then uses system calls and privileged operations to map the watched content to the processor's control status register, and starts to monitor and match the program data stream.

[0060] S31: The operating system determines whether the watched address is successfully monitored and matched.

[0061] Through system calls and privileged operations, the watched content is mapped to the processor's control status register, starts to monitor the data stream of the program execution, and calls do_match() for data stream monitoring and matching.

[0062] For example, if it is monitored that the watched address is modified, that is, after the data stream matching is successful, the operating system immediately updates the information such as si_signo, si_addr, si_code, si_value in the program's semaphore siginfo, and sends a SIGTRAP signal to the program. If the data stream matching fails, continue to monitor the program data stream.

[0063] S32: The debugger determines whether the watchpoint is hit.

[0064] When it is monitored that the watched content is modified, the operating system updates the program's semaphore and sends a SIGTRAP signal to the program. After the debugger gets the signal, it makes a watchpoint determination. If the determination is successful, the program stops running and waits for the user's next operation; if the determination fails, the current SIGTRAP signal is skipped.

[0065] For example, the debugger uses the MonitorSIGTRAP() function to capture the SIGTRAP signal of the program and make a judgment. If the debugger's judgment result is that the watchpoint is hit, it calls MonitorWatchpoint() to update the current thread status and pause the program execution.

[0066] If the debugger determines that the watchpoint is hit, it calls the GetDescription() function to display the specific information of the watchpoint, including the new value and old value of the watchpoint, the watched address, the watched variable, etc. If the debugger determines that the watchpoint is not hit, it will skip the current SIGTRAP signal, that is, it will not handle this signal as a watchpoint.

[0067] During the program debugging stage of the present invention, after starting the observation debugging for a certain variable or address, the observed address is written into the control status register through system calls and privileged operations, and the program data stream is monitored and matched. Once it is found that the address is modified, the semaphore of the program is updated, and a SIGTRAP signal is issued. After the debugger obtains the signal, it makes a breakpoint determination, and the program stops running, waiting for the user's next operation. Through this "real-time" monitoring mechanism based on hardware, program errors caused by illegal modification of data can be found in a timely and accurate manner, improving the efficiency of program debugging.

[0068] The above are only the preferred embodiments of the present invention. It should be pointed out that for those of ordinary skill in the art in this technical field, without departing from the technical principle of the present invention, several improvements and deformations can be made, and these improvements and deformations should also be regarded as the protection scope of the present invention.

Claims

1. A hardware-supported breakpoint debugging method, characterized in that Including: Step 1: Set a group of control status registers in the processor for data stream debugging; Step 2: Add a hardware breakpoint function interface in the debugger for observation; Step 3: Map the observed content to the control status registers of the processor, and start listening and matching the program data stream; Step 4: When the processor monitors that the content of the control status register is modified, update the semaphore of the program and send a SIGTRAP signal to the program; Step 5: The debugger obtains the SIGTRAP signal and makes a breakpoint determination. If the determination is successful, the program stops running and waits for the user's next operation.

2. The hardware-supported breakpoint debugging method according to claim 1, characterized in that In the said Step 1, the control status registers include a data stream address matching register and a data stream address masking register.

3. The hardware-supported breakpoint debugging method according to claim 2, wherein In the said Step 1, the setting of the control status registers includes setting the data stream address matching register to be readable and writable, clearing it when reset, and generating a data stream fault when the data stream access address matches the content of this register; setting the data stream address masking register to be readable and writable, setting all the lower 53 bits to 1 when reset, masking the number of bits for data stream address comparison, and the length of address matching can be selected.

4. The hardware-supported observation point debugging method according to claim 1, characterized in that In the said Step 2, the added breakpoint function interface in the debugger includes a breakpoint storage array definition interface, a breakpoint setting interface, a breakpoint deletion interface, and a breakpoint enabling interface.

5. The hardware-supported observation point debugging method according to claim 4, wherein The said breakpoint storage array definition interface includes breakpoint address length judgment, breakpoint index judgment, and breakpoint storage array update. The said breakpoint enabling interface determines the current breakpoint status through a breakpoint effective flag; the said breakpoint deletion interface cancels the data stream matching function by writing the default value to the control status register.

6. The hardware-supported breakpoint debugging method according to claim 1, wherein In the said Step 2, it also includes defining a group of debug registers in the debugger, and the said debug registers correspond to the control status registers of the processor.

7. The hardware-supported observation point debugging method according to claim 6, wherein In the said Step 3, mapping the observed content to the control status registers of the processor and starting to listen and match the program data stream includes: In the program debugging stage, when a breakpoint is set for a certain variable or address, the debugger writes the observed content into the debug register, and then uses the system call to map the observed content to the control status registers of the processor, and starts to listen and match the program data stream.

8. The hardware-supported breakpoint debugging method according to claim 6, wherein In the said Step 5, if the breakpoint determination fails, the current SIGTRAP signal is skipped.

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