Hierarchical key management method and device, computer device and storage medium
By splitting the master key into two components and storing them encrypted, a key protection key is generated, which solves the problem of the risk of master key leakage in cryptographic devices and realizes secure destruction and protection in the absence of external power supply.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CCORE TECH CO LTD
- Filing Date
- 2021-10-29
- Publication Date
- 2026-05-15
AI Technical Summary
In existing technologies, there is a risk of leakage when the master key is stored in a distributed manner in cryptographic devices, and the plaintext is stored in memory during use, making it easy to be detected by attacks.
The master key is split into two master key components, which are encrypted and stored in the chip’s internal fast memory and battery-safe storage area, respectively. A key protection key is generated and decrypted to generate a session key when needed. The key is protected by an encrypted key block and a black-box key mechanism to ensure that the key component ciphertext can be destroyed even when there is no external power supply.
It improves the confidentiality of the master key, prevents key leakage, ensures that the decryption of lower-level keys does not affect the security of higher-level and peer-level keys, and enables the secure destruction of keys even without external power supply.
Smart Images
Figure CN116070220B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of embedded technology, and in particular to a hierarchical key management method, apparatus, computer device, and storage medium. Background Technology
[0002] As users become increasingly concerned about data privacy, they are also placing greater emphasis on the security of data encryption. Existing cryptographic devices typically employ a three-tier key management system, including a master key, a key protection key, and session keys. While the master key requires manual input, the key protection key and session keys can be automatically installed, replaced, and revoked by the key management system according to protocols. Therefore, the confidentiality of the master key is particularly crucial.
[0003] In existing technologies, a knowledge splitting algorithm is typically used to divide the master key into multiple key components, which are then stored separately in memory. When needed, each key component is read to generate the master key; alternatively, the master key components are stored in an external U-key. Because the key components are not encrypted during storage, there is a risk of leakage. Furthermore, the master key is also stored in plaintext in memory during use, posing a risk of being discovered by software or other attack methods. Summary of the Invention
[0004] Therefore, it is necessary to provide a hierarchical key management method, apparatus, computer equipment, and storage medium that can improve the confidentiality of the master key in response to the above-mentioned technical problems.
[0005] Firstly, this application provides a hierarchical key management method. The method includes:
[0006] Obtain the master key, split the master key into a first master key component and a second master key component, and clear the plaintext master key from the chip memory;
[0007] The first master key component and the second master key component are encrypted respectively to generate ciphertext of the first master key component and ciphertext of the second master key component. The ciphertext of the first master key component is stored in the chip's internal fast memory, and the ciphertext of the second master key component is stored in the battery power protection safety storage area. The battery power protection safety storage area is connected to the chip through a serial peripheral interface.
[0008] When an instruction to generate a key protection key is detected, a key protection key is generated. The key protection key is then encrypted using the first set of master key component ciphertext and the second set of master key component ciphertext to obtain the ciphertext of the key protection key. The ciphertext of the key protection key is then stored in the chip's internal fast memory.
[0009] Upon detecting an instruction to generate a session key, the ciphertext of the key-protection key is decrypted, and the corresponding session key is generated based on the decrypted key-protection key.
[0010] In this process, after the second set of master key components is stored in the battery power-saving security storage area, when attacked, the security destruction mechanism is invoked to destroy both the master key ciphertext stored in the chip memory and the second set of master key components stored in the battery power-saving security storage area.
[0011] In one embodiment, the first set of master key components and the second set of master key components are encrypted respectively to generate ciphertext of the first set of master key components and ciphertext of the second set of master key components. The ciphertext of the first set of master key components is stored in the chip's internal fast memory, and the ciphertext of the second set of master key components is stored in the battery power preservation and safety storage area, including:
[0012] Obtain the random number generated by the random number generator and use it as the data encryption key;
[0013] Based on the data encryption key, the first master key component and the second master key component are encrypted using the national cryptographic algorithm to obtain the ciphertext of the first master key component and the ciphertext of the second master key component respectively.
[0014] The data encryption key is encrypted to obtain an encryption key block. The first set of master key component ciphertext is stored adjacent to the encryption key block in the chip's internal fast memory, and the second set of master key component ciphertext is stored adjacent to the encryption key block in the battery power protection safety storage area. The encryption key block is used to obtain the data encryption key to decrypt the master key component ciphertext.
[0015] In one embodiment, a key protection key is generated, and the key protection key is encrypted using a first set of master key component ciphertext and a second set of master key component ciphertext to obtain the ciphertext of the key protection key, including:
[0016] The security algorithm engine module and random number generator are invoked to generate a key protection key, which includes a public-private key pair for encryption and a public-private key pair for signing.
[0017] The first and second master key component ciphertexts are read into the security algorithm engine module within the chip. The encryption key block is decrypted within the security algorithm engine module to obtain the data encryption key. The key decryption key is then obtained. Based on the key decryption key, the encryption key block is decrypted within the security algorithm engine module to obtain the data encryption key. Based on the data encryption key, the first and second master key component ciphertexts are decrypted within the security algorithm engine module to obtain the plaintext of the two master key components. The master key is then recovered from the plaintext of the two master key components.
[0018] The key protection key is encrypted using the master key and black-box key mechanism to obtain the ciphertext of the key protection key;
[0019] Obtain the memory storage key stored in the first memory of the chip; the memory storage key is generated by a random number generator and stored in the first memory after each chip power-on. The first memory is a register that is not accessible to software; based on the national cryptographic algorithm, the master key is encrypted in the security algorithm engine module using the memory storage key to obtain the master key memory ciphertext, the master key memory ciphertext is stored in the chip memory, and the plaintext of the master key in the security chip memory is cleared.
[0020] In one embodiment, a session key is generated based on the ciphertext of the key-protected key, including:
[0021] Read the ciphertext of the key protection key from the chip's internal fast memory;
[0022] The first and second sets of master key ciphertext are read into the security algorithm engine module within the chip. The security algorithm engine module decrypts the two sets of master key ciphertext using encryption key blocks to obtain the plaintext of the two sets of master key components. Based on the plaintext of the two sets of master key components, the master key is recovered in the security algorithm engine module.
[0023] In the security algorithm engine module, the ciphertext of the public key of the key protection key is decrypted using the master key to obtain the public key of the key protection key. The public key of the key protection key is then sent to the server, and the plaintext of the public key of the key protection key in the memory of the security chip is cleared.
[0024] Obtain the corresponding session key ciphertext generated by the server;
[0025] In the security algorithm engine module, the ciphertext of the private key of the key protection key is decrypted using the master key to obtain the private key of the key protection key. The ciphertext of the session key is then decrypted using the private key of the key protection key to obtain the session key. Finally, the plaintext of the private key of the key protection key is cleared from the memory of the security chip.
[0026] In one embodiment, after generating the key protection key, the method further includes:
[0027] When the preset key backup permission is obtained, a random number generator is invoked to generate a backup key; the preset key backup permission is obtained when the number of logged-in administrators based on the user management tool is greater than half of the total number of administrators.
[0028] The backup key is split into multiple backup key components, and these components are stored separately on the authentication storage devices corresponding to multiple currently logged-in administrators. The number of backup key components corresponds to the number of administrators logged in via the user management tool.
[0029] The backup key is encrypted using a black-box key mechanism to obtain the ciphertext of the backup key. The ciphertext of the backup key is stored in the chip memory, and the plaintext of the backup key in the chip memory is cleared. The ciphertext of the backup key is used to encrypt the first set of master key components, the second set of master key components, and the ciphertext of the key protection key stored in the chip's internal fast memory, and then exported to the host computer for backup.
[0030] In one embodiment, after encrypting the first set of master key components, the second set of master key components, and the key protection key stored in the chip's internal fast memory using the ciphertext of the backup key, and exporting them to the host computer for backup, the method further includes:
[0031] In the case of backup and recovery, the backup key components are read from the authentication storage devices of multiple administrators. The backup key is then recovered using a knowledge-based decomposition algorithm within the security algorithm engine module. The backup key is then encrypted using a black-box key mechanism, stored in the chip memory, and the plaintext backup key in the security chip memory is cleared.
[0032] The ciphertext of the first master key component, the ciphertext of the second master key component, and the ciphertext of the backup key, which are backed up to the host computer, are read into the security algorithm engine module. Using the ciphertext of the backup key, the ciphertexts of the first and second master key components in the security algorithm engine module are decrypted to obtain the first and second master key components. The first and second master key components are then encrypted to generate corresponding ciphertexts of the first and second master key components. The ciphertext of the first master key component is stored in the chip's internal fast memory, and the ciphertext of the second master key component is stored in the battery power-saving safe storage area. The first and second master key components are then cleared from the security chip's memory.
[0033] By using the ciphertext of the backup key, the ciphertext of the encrypted key protection key stored in the host computer is decrypted to obtain the ciphertext of the key protection key, and then the ciphertext of the key protection key is stored in the chip's internal fast memory.
[0034] Secondly, this application also provides a hierarchical key management device. The device includes:
[0035] The master key generation and splitting module is used to obtain the master key, split the master key into a first group of master key components and a second group of master key components, and clear the plaintext master key in the chip memory;
[0036] The master key component encryption storage module is used to encrypt the first master key component and the second master key component respectively, and generate the first master key component ciphertext and the second master key component ciphertext accordingly. The first master key component ciphertext is stored in the chip's internal fast memory, and the second master key component ciphertext is stored in the battery power protection safety storage area. The battery power protection safety storage area is connected to the chip through a serial peripheral interface.
[0037] The key protection key generation module is used to generate a key protection key when an instruction to generate a key protection key is detected. The key protection key is encrypted by the first set of master key component ciphertext and the second set of master key component ciphertext to obtain the ciphertext of the key protection key, and the ciphertext of the key protection key is stored in the chip's internal fast memory.
[0038] The session key generation module is used to decrypt the ciphertext of the key protection key when an instruction to generate a session key is detected, and to generate the corresponding session key based on the decrypted key protection key.
[0039] Thirdly, this application also provides a computer device. The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the steps of the methods described in any of the above embodiments.
[0040] Fourthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, implements the steps of the methods described in any of the above embodiments.
[0041] Fifthly, this application also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, implements the steps of the method described in any of the above embodiments.
[0042] The aforementioned hierarchical key management method, device, computer equipment, and storage medium split the master key into two master key components, generating two corresponding ciphertexts for each component. These components are stored separately in the chip's internal memory and a battery-protected secure storage area. This allows the ciphertext of the key component in the battery-protected secure storage area to be destroyed even when the cryptographic device is not powered externally, thus achieving the function of destroying the master key and protecting it from leakage. Based on the master key, hierarchical key protection keys and session keys are generated. The decryption of lower-level keys does not affect the security of higher-level keys or keys at the same level. Attached Figure Description
[0043] Figure 1 This is an application scenario diagram of a hierarchical key management method in one embodiment;
[0044] Figure 2 This is a flowchart illustrating a hierarchical key management method in one embodiment;
[0045] Figure 3 This is a flowchart illustrating the master key generation and storage steps in one embodiment;
[0046] Figure 4 This is a schematic diagram of the BLOB mechanism encapsulation process in one embodiment;
[0047] Figure 5 This is a schematic diagram of the BLOB mechanism decapsulation process in one embodiment;
[0048] Figure 6 This is a flowchart illustrating the key protection key generation step in another embodiment;
[0049] Figure 7 This is a flowchart illustrating the session key generation step in another embodiment;
[0050] Figure 8 This is a structural block diagram of a hierarchical key management device in one embodiment;
[0051] Figure 9 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation
[0052] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0053] The hierarchical key management method provided in this application can be applied to, for example... Figure 1 In the application environment shown, terminal 102 communicates with server 104 via a network. Terminal 102 can be, but is not limited to, various cryptographic devices installed on personal computers, laptops, smartphones, tablets, and portable wearable devices. Server 104 can be implemented as a standalone server or a server cluster consisting of multiple servers.
[0054] In one embodiment, such as Figure 2 As shown, a hierarchical key management method is provided, which can be applied to... Figure 1 Taking terminal 102 as an example, the explanation includes the following steps:
[0055] Step 202: Obtain the master key, split the master key into a first set of master key components and a second set of master key components, and clear the plaintext master key from the chip memory.
[0056] In this embodiment, the master key can be generated by the cryptographic device using two physical noise source chips to perform an XOR operation.
[0057] The cryptographic device can split the master key into multiple key components. In this embodiment, the cryptographic device can split the master key into two 128-byte master key components using a knowledge splitting algorithm.
[0058] Step 204, as follows Figure 3 As shown, the first master key component and the second master key component are encrypted respectively to generate the ciphertext of the first master key component and the ciphertext of the second master key component. The ciphertext of the first master key component is stored in the chip's internal fast memory (FLASH), and the ciphertext of the second master key component is stored in the battery power protection safe storage area. The battery power protection safe storage area is connected to the chip through a serial peripheral interface.
[0059] In this embodiment, as Figure 3 As shown, the cryptographic device encrypts the first and second master key components using the BLOB mechanism. The BLOB mechanism is a mechanism that protects data by encapsulating it in a specific encrypted data structure, ensuring data confidentiality and integrity. It is typically used to protect data stored in non-volatile memory such as FLASH.
[0060] In this embodiment, the cryptographic device encrypts the first set of master key components and the second set of master key components and stores them in the chip's internal fast memory and battery-protected secure storage area, respectively. By encrypting and distributing the storage, the master key components are not easily obtained in their entirety during use. Even if they are obtained, only the ciphertext of the master key components is obtained, thereby improving the security of the master key.
[0061] Step 206: When the instruction to generate a key protection key is detected, a key protection key is generated. The key protection key is encrypted by the first set of master key component ciphertext and the second set of master key component ciphertext to obtain the ciphertext of the key protection key. The ciphertext of the key protection key is stored in the chip's internal fast memory.
[0062] In this embodiment, the instruction to generate the key protection key is sent from the server to the cryptographic device after the cryptographic device has split the master key component into two sets of master key components and stored them separately with encryption.
[0063] In this embodiment, the key protection key includes at least: a public-private key pair for signing and a public-private key pair for encryption.
[0064] In this embodiment, encrypting the key protection key using the first set of master key component ciphertext and the second set of master key component ciphertext means that after the cryptographic device receives the key protection key generation instruction issued by the server, it reads the two sets of master key component ciphertext stored in the chip's internal fast memory and battery power-saving security storage area, then recovers the master key using the two sets of master key component ciphertext, and encrypts the key protection key using the master key.
[0065] Step 208: When an instruction to generate a session key is detected, the ciphertext of the key protection key is decrypted, and the corresponding session key is generated based on the decrypted key protection key.
[0066] In this embodiment, the instruction to generate the session key is sent from the server to the cryptographic device after the cryptographic device generates the key protection key and stores it in encryption.
[0067] In this embodiment, after decrypting the ciphertext of the key protection key, the cryptographic device sends the resulting plaintext key protection key to the server. Upon receiving the plaintext key protection key from the cryptographic device, the server generates its own key protection key. Furthermore, the server encrypts the session key and sends it to the cryptographic device.
[0068] In this embodiment, after the cryptographic device sends the key protection key to the server, it clears the plaintext of the key protection key within the cryptographic device.
[0069] In the aforementioned hierarchical key management method, the master key is split into two master key components, generating two corresponding ciphertexts for each component. These are stored separately in the chip's internal memory and a battery-protected secure storage area. This allows the ciphertext of the key component in the battery-protected secure storage area to be destroyed even when the cryptographic device is not powered externally, thus achieving the function of destroying the master key and protecting it from leakage. Based on the master key, hierarchical key protection keys and session keys are generated. The decryption of lower-level keys does not affect the security of higher-level keys or keys at the same level.
[0070] In one embodiment, the first set of master key components and the second set of master key components are encrypted respectively to generate ciphertext of the first set of master key components and ciphertext of the second set of master key components. The ciphertext of the first set of master key components is stored in the internal fast memory of the chip, and the ciphertext of the second set of master key components is stored in the battery power protection safety storage area. This may include: obtaining a random number generated by a random number generator and using it as a data encryption key; encrypting the first set of master key components and the second set of master key components respectively using a national cryptographic algorithm based on the data encryption key to obtain ciphertext of the first set of master key components and ciphertext of the second set of master key components; encrypting the data encryption key to obtain an encryption key block; storing the ciphertext of the first set of master key components adjacent to the encryption key block in the internal fast memory of the chip, and storing the ciphertext of the second set of master key components adjacent to the encryption key block in the battery power protection safety storage area. The encryption key block is used to obtain the data encryption key to decrypt the ciphertext of the master key components.
[0071] In this embodiment, the cryptographic device encrypts the first set of master key components and the second set of master key components respectively in the Security Engine (SEC) module.
[0072] In this embodiment, the data encryption key can be a 128-bit random number generated by a random number generator.
[0073] In this embodiment, the national cryptographic algorithms used to encrypt the first and second master key components with the data encryption key can be SM4 (symmetric encryption) or CCM (counter with CBC-MAC) algorithms. The CCM algorithm is a combination of Cipher Block Chaining Message Authentication Code (CBC-MAC) and Counter modes.
[0074] In this embodiment, after receiving the first set of master key component ciphertext and the second set of master key component ciphertext, the cryptographic device obtains the key encryption key. Furthermore, the cryptographic device can use the key encryption key to encrypt the data encryption key, thereby obtaining an encryption key block.
[0075] In this embodiment, as Figure 4 , Figure 5 As shown, the data encapsulation and decapsulation processes of BLOB are both completed by hardware within the Security Engine Module (SEC).
[0076] In this embodiment, before encrypting the data encryption key, the cryptographic device needs to obtain the data encryption key (BKEK), and then encrypt the data encryption key using the data encryption key to obtain the encryption key block. The data encryption key (BKEK) is a 256-bit BLOB key derived from the security algorithm engine module inside the cryptographic device.
[0077] In this embodiment, since the first and second master key components are stored after being encrypted by the encryption key block, when decryption of the ciphertext of the first and second master key components is required, the plaintext of the encryption key block must first be obtained. Furthermore, since the encryption key block is stored in ciphertext form, when the cryptographic device needs to use the first and second master key components, it must first obtain the data key encryption key to decrypt the encryption key block. Furthermore, since the data key encryption key is uniquely associated with a specific chip and is isolated from data in different security states of the chip, the ciphertext cannot be obtained, descrambled, or otherwise processed by other chips or chips in different security states, thereby avoiding the risk of the data key encryption key being stolen.
[0078] In this embodiment, the security status of the chip is controlled by the internal security monitoring module. The above-mentioned BLOB encryption operation is performed when the chip is in a secure state. Under the same state (secure state), the cryptographic device can use the BLOB mechanism to decrypt the BLOB-encrypted data. When the cryptographic device is attacked (e.g., when abnormal states are detected by light detection, temperature detection, voltage detection, frequency detection, etc.), the security monitoring module controls the chip's security status to be displayed as insecure. Under this insecure state, the BLOB mechanism cannot be used to decrypt the BLOB-encrypted data under the secure state.
[0079] In one embodiment, such as Figure 6As shown, the key protection key is generated by encrypting the first and second sets of master key component ciphertexts to obtain the ciphertext of the key protection key. This process may include: calling the security algorithm engine module and a random number generator to generate the key protection key, which includes a public-private key pair for encryption and a public-private key pair for signing; reading the first and second sets of master key component ciphertexts into the security algorithm engine module within the chip; decrypting the encryption key block within the security algorithm engine module to obtain the data encryption key; then decrypting the two sets of master key component ciphertexts read using the data encryption key to obtain the plaintexts of the two sets of master key components; recovering the master key based on the plaintexts of the two sets of master key components; encrypting the key protection key based on the master key and a black-box key mechanism to obtain the ciphertext of the key protection key; encrypting the master key using the black-box key mechanism to obtain the master key memory ciphertext; storing the master key memory ciphertext in the chip memory; and clearing the plaintext of the master key from the security chip memory.
[0080] In this embodiment, after the cryptographic device decrypts the ciphertext of the first set of master key components and the ciphertext of the second set of master key components, it can recover the master key through a knowledge splitting algorithm within the security algorithm engine module based on the first set of master key components and the second set of master key components.
[0081] In this embodiment, the black-box key mechanism is a mechanism that dynamically encapsulates and decapsulates keys during the operation process. It is used to protect the keys stored in the chip memory from being detected during encryption and decryption operations.
[0082] In one embodiment, the two sets of ciphertext of the master key components are decrypted in the security algorithm engine module using a data encryption key to obtain the plaintext of the two sets of master key components. This may include: obtaining a key decryption key; decrypting the encryption key block in the security algorithm engine module based on the key decryption key to obtain a data encryption key; and decrypting the first set of ciphertext and the second set of ciphertext of the master key components in the security algorithm engine module based on the data encryption key to obtain the plaintext of the two sets of master key components.
[0083] In one embodiment, encrypting the master key using a black-box key mechanism to obtain the master key ciphertext in memory may include: obtaining the memory storage key stored in the chip's first memory; the memory storage key is generated by a random number generator and stored in the first memory after each chip power-on, the first memory being a register inaccessible to software; and encrypting the master key using the memory storage key in the security algorithm engine module based on the national cryptographic algorithm to obtain the master key ciphertext in memory.
[0084] In this embodiment, when the cryptographic device needs to use the master key, the cryptographic device needs to use the key stored in the memory of the first memory to decrypt the master key ciphertext in memory to obtain the master key.
[0085] In this embodiment, the first memory is a register inside the hardware algorithm module.
[0086] In this embodiment, to ensure that the user key (such as the master key) in the chip's memory is not stolen, the key can be stored in encrypted form in the chip's Static Random-Access Memory (SRAM). Each time the security chip powers on, the hardware automatically calls the internal random number module to generate a random number as the memory storage key and stores it in the first memory. Before the cryptographic device sends the user key from the security algorithm engine module to memory, the memory storage key encrypts the user key into ciphertext using the SM4 algorithm and then stores it in the chip's memory. Before using the user key, the hardware automatically decrypts it using the memory storage key; the plaintext key exists only in a register within the hardware algorithm module, which is inaccessible to software. The security chip uses a Black Key mechanism to ensure the security of key storage in memory.
[0087] In one embodiment, such as Figure 7 As shown, generating a session key based on the ciphertext of the key protection key can include: reading the ciphertext of the key protection key from the chip's internal fast memory; reading the ciphertext of the first and second master key components into the chip's internal security algorithm engine module; decrypting the two sets of master key components using encryption key blocks within the security algorithm engine module to obtain the plaintext of the two master key components; recovering the master key from the plaintext of the two master key components within the security algorithm engine module; decrypting the ciphertext of the public key of the key protection key using the master key within the security algorithm engine module to obtain the public key of the key protection key; sending the public key of the key protection key to the server; and clearing the plaintext of the public key of the key protection key from the security chip's memory; obtaining the corresponding session key ciphertext generated by the server; decrypting the ciphertext of the private key of the key protection key using the master key within the security algorithm engine module to obtain the private key of the key protection key; decrypting the session key ciphertext using the private key of the key protection key to obtain the session key; and clearing the plaintext of the private key of the key protection key from the security chip's memory.
[0088] In this embodiment, the session key is generated after the cryptographic device and the server exchange information.
[0089] In this embodiment, the server generates a session key and receives the public key of the key protection key sent by the cryptographic device. The server then encrypts the session key using the public key of the key protection key sent by the cryptographic device to obtain the ciphertext of the session key.
[0090] In this embodiment, the cryptographic device sends the public key of the key protection key to the server. This public key can be either the public key of the encryption key or the public key of the signature key. Further, if the cryptographic device sends the public key of the encryption key to the server, after obtaining the corresponding ciphertext of the session key generated by the server, the security algorithm engine module decrypts the ciphertext of the private key of the encryption key using the master key to obtain the private key of the encryption key. The session key ciphertext is then decrypted using the private key of the encryption key to obtain the session key. Similarly, if the cryptographic device sends the public key of the signature key to the server, after obtaining the corresponding ciphertext of the session key generated by the server, the security algorithm engine module decrypts the ciphertext of the private key of the signature key using the master key to obtain the private key of the signature key. The session key ciphertext is then decrypted using the private key of the signature key to obtain the session key.
[0091] In one embodiment, after the second set of master key component ciphertext is stored in the battery power-saving security storage area, when attacked, the security destruction mechanism is invoked to destroy the master key ciphertext stored in the chip memory and the second set of master key component ciphertext stored in the battery power-saving security storage area.
[0092] In this embodiment, the security monitoring module in the cryptographic device can be used to monitor whether the security chip is illegally accessed or tampered with (including through methods such as voltage, frequency, and light exposure). When the security monitoring module detects that the cryptographic device has been subjected to attacks such as illegal access or tampering, it sends a destruction signal to the security destruction mechanism in the cryptographic device. Furthermore, the security destruction mechanism destroys the master key ciphertext stored in the chip memory and the second set of master key component ciphertext stored in the battery power-saving security storage area, ensuring that the master key ciphertext in the chip memory and the second set of master key component ciphertext stored in the battery power-saving security storage area are not leaked.
[0093] In this embodiment, both the battery-protected secure storage area and the chip are located on the cryptographic device, and they are independent of each other, communicating via a Serial Peripheral Interface (SPI). Even when the cryptographic device is not powered, the battery-protected secure storage area can still be independently powered by an external button battery, meaning it remains operational. In the event of an anomaly (such as removing the shielding cover or triggering the destroy button), the cryptographic device can destroy the second set of master key components within the battery-protected secure storage area through a secure destruction mechanism, preventing key leakage.
[0094] In one embodiment, after generating the key protection key, the method further includes: when a preset key backup permission is obtained, calling a random number generator to generate a backup key; the preset key backup permission is obtained when logging in via a user management tool and the number of logged-in administrators is greater than half of the total number of administrators; splitting the backup key into multiple backup key components, storing the multiple backup key components in multiple authentication storage devices corresponding to multiple currently logged-in administrators, wherein the number of backup key components is consistent with the number of administrators logged in via the user management tool; encrypting the backup key using a black-box key mechanism to obtain the ciphertext of the backup key, storing the ciphertext of the backup key in the chip memory, and clearing the plaintext of the backup key in the chip memory; and encrypting the first master key component, the second master key component, and the ciphertext of the key protection key stored in the chip's internal fast memory using the ciphertext of the backup key, and then exporting them to the host computer for backup.
[0095] In this embodiment, the host computer can be a personal computer or a server, etc.
[0096] In this embodiment, before the cryptographic device encrypts the first set of master key components, the second set of master key components, and the ciphertext of the key protection key stored in the internal fast memory of the chip using the ciphertext of the backup key, the method further includes: the cryptographic device decrypting the ciphertext of the first set of master key components and the second set of master key components to obtain the first set of master key components and the second set of master key components.
[0097] In one embodiment, after encrypting the first set of master key components, the second set of master key components, and the key protection key stored in the chip's internal fast memory using the ciphertext of the backup key and exporting them to the host computer for backup, the method further includes: in the case of backup recovery, reading the backup key components from multiple administrator authentication storage devices, recovering the backup key in the security algorithm engine module using a knowledge splitting algorithm; encrypting the backup key using a black-box key mechanism, storing the encrypted backup key in the chip memory, and clearing the plaintext of the backup key in the security algorithm engine module; and reading the ciphertext of the first set of master key components, the ciphertext of the second set of master key components, and the ciphertext of the backup key backed up to the host computer into the security algorithm engine module, and using the ciphertext of the backup key to split the backup key... Decrypt the ciphertext of the first master key component and the ciphertext of the second master key component in the security algorithm engine module to obtain the first master key component and the second master key component; encrypt the first master key component and the second master key component to generate corresponding ciphertexts of the first master key component and the second master key component; store the ciphertext of the first master key component in the chip's internal fast memory; store the ciphertext of the second master key component in the battery power-saving safe storage area; clear the first master key component and the second master key component from the security chip's memory; decrypt the ciphertext of the encrypted key protection key stored in the host computer using the ciphertext of the backup key to obtain the ciphertext of the key protection key; store the ciphertext of the key protection key in the chip's internal fast memory.
[0098] In this embodiment, the cryptographic device may not need to read the backup key components in all the administrators' authentication storage devices. For example, when backing up the key, the cryptographic device splits the backup key into 6 backup key components and stores the 6 backup key components in the authentication storage devices corresponding to the 6 currently logged-in administrators. If only 4 backup key components are needed for backup and recovery, the cryptographic device may only need to read the backup key components in the authentication storage devices of 4 of the administrators.
[0099] In this embodiment, before backing up and restoring the cryptographic device, the administrator needs to ensure that the cryptographic device used for backup and restoration is in its initial state.
[0100] In this embodiment, when the cryptographic device reads the backup key components from the authentication storage devices of multiple administrators, it needs to read them sequentially according to the order in which the backup key components are stored in the authentication storage devices of multiple administrators.
[0101] In this embodiment, when the cryptographic device reads the backup key components in the authentication storage devices of multiple administrators, it needs to input the corresponding authentication information of the administrators' authentication storage devices.
[0102] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.
[0103] Based on the same inventive concept, this application also provides a hierarchical key management device for implementing the hierarchical key management method described above. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations in one or more hierarchical key management device embodiments provided below can be found in the limitations of the hierarchical key management method described above, and will not be repeated here.
[0104] In one embodiment, such as Figure 8 As shown, a hierarchical key management device is provided, comprising: a master key generation and splitting module 100, a master key component encryption and storage module 200, a key protection key generation module 300, and a session key generation module 400, wherein:
[0105] The master key generation and splitting module 100 is used to obtain the master key, split the master key into a first group of master key components and a second group of master key components, and clear the plaintext master key in the chip memory.
[0106] The master key component encryption storage module 200 is used to encrypt the first set of master key components and the second set of master key components respectively, and generate the first set of master key component ciphertext and the second set of master key component ciphertext accordingly. The first set of master key component ciphertext is stored in the chip's internal fast memory, and the second set of master key component ciphertext is stored in the battery power protection safety storage area. The battery power protection safety storage area is connected to the chip through a serial peripheral interface.
[0107] The key protection key generation module 300 is used to generate a key protection key when an instruction to generate a key protection key is detected. The key protection key is then encrypted using the first set of master key component ciphertext and the second set of master key component ciphertext to obtain the ciphertext of the key protection key, and the ciphertext of the key protection key is stored in the chip's internal fast memory.
[0108] The session key generation module 400 is used to decrypt the ciphertext of the key protection key when an instruction to generate a session key is detected, and generate the corresponding session key based on the decrypted key protection key.
[0109] In one embodiment, the master key component encryption storage module 200 may include:
[0110] The data encryption key generation submodule is used to obtain random numbers generated by the random number generator and use them as data encryption keys.
[0111] The master key component encryption submodule is used to encrypt the first master key component and the second master key component using the national cryptographic algorithm based on the data encryption key, so as to obtain the ciphertext of the first master key component and the ciphertext of the second master key component.
[0112] The data storage submodule is used to encrypt the data encryption key to obtain an encryption key block. The first set of master key component ciphertext is stored adjacent to the encryption key block in the chip's internal fast memory, and the second set of master key component ciphertext is stored adjacent to the encryption key block in the battery power protection safety storage area. The encryption key block is used to obtain the data encryption key to decrypt the master key component ciphertext.
[0113] In one embodiment, the key protection key generation module 300 may include:
[0114] The key protection key generation submodule is used to call the security algorithm engine module and the random number generator to generate key protection keys. Key protection keys include public and private key pairs for encryption and public and private key pairs for signature.
[0115] The master key secondary recovery submodule is used to read the ciphertext of the first and second master key components into the security algorithm engine module within the chip. The security algorithm engine module decrypts the encryption key block to obtain the data encryption key, and then uses the data encryption key to decrypt the two sets of master key components respectively to obtain the plaintext of the two sets of master key components. Based on the plaintext of the two sets of master key components, the master key is recovered.
[0116] The key protection key encryption submodule is used to encrypt the key protection key based on the master key and the black-box key mechanism to obtain the ciphertext of the key protection key.
[0117] The master key memory ciphertext storage submodule is used to encrypt the master key using a black-box key mechanism to obtain the master key memory ciphertext, store the master key memory ciphertext in the chip memory, and clear the plaintext of the master key from the secure chip memory.
[0118] In one embodiment, the master key recovery submodule may include:
[0119] The key decryption key unit is used to obtain the key decryption key.
[0120] The encryption key block decryption unit is used to decrypt the encryption key block in the security algorithm engine module based on the key decryption key to obtain the data encryption key.
[0121] The master key component acquisition unit is used to decrypt the ciphertext of the first set of master key components and the ciphertext of the second set of master key components respectively in the security algorithm engine module based on the data encryption key, so as to obtain the plaintext of the two sets of master key components.
[0122] In one embodiment, the master key memory ciphertext storage submodule may include:
[0123] The memory storage key acquisition unit is used to acquire the memory storage key stored in the chip's first memory. The memory storage key is generated by a random number generator and stored in the first memory after each power-on of the chip. The first memory is a register that is inaccessible to software.
[0124] The master key memory ciphertext acquisition unit is used to encrypt the master key in the security algorithm engine module based on the national cryptographic algorithm, by storing the key in memory, to obtain the master key memory ciphertext.
[0125] In one embodiment, the session key generation module 400 may include:
[0126] The key protection key reading submodule is used to read the ciphertext of the key protection key from the chip's internal fast memory.
[0127] The master key three-level recovery submodule is used to read the ciphertext of the first and second master key components into the security algorithm engine module within the chip. Within the security algorithm engine module, the two ciphertexts of the master key components are decrypted using encryption key blocks to obtain the plaintexts of the two master key components. Based on the plaintexts of the two master key components, the master key is recovered in the security algorithm engine module.
[0128] The Key Protection Key Public Key Sending Submodule is used in the security algorithm engine module to decrypt the ciphertext of the public key of the Key Protection Key using the master key, obtain the public key of the Key Protection Key, send the public key of the Key Protection Key to the server, and clear the plaintext of the public key of the Key Protection Key from the memory of the security chip.
[0129] The Session Key Ciphertext Acquisition Submodule is used to retrieve the corresponding session key ciphertext generated by the server.
[0130] In the security algorithm engine module, the ciphertext of the private key of the key protection key is decrypted using the master key to obtain the private key of the key protection key. The ciphertext of the session key is then decrypted using the private key of the key protection key to obtain the session key. Finally, the plaintext of the private key of the key protection key is cleared from the memory of the security chip.
[0131] In one embodiment, after the second set of master key component ciphertext is stored in the battery power-saving security storage area, when attacked, the security destruction mechanism is invoked to destroy the master key ciphertext stored in the chip memory and the second set of master key component ciphertext stored in the battery power-saving security storage area.
[0132] In one embodiment, after the key protection key generation module 300, a key backup module may also be included.
[0133] In this embodiment, the key backup module may include:
[0134] The key backup permission acquisition submodule is used to call a random number generator to generate a backup key when the preset key backup permission is obtained. The preset key backup permission is obtained when the number of logged-in administrators based on the user management tool is greater than half of the total number of administrators.
[0135] The backup key component storage submodule is used to split the backup key into multiple backup key components and store the multiple backup key components into the authentication storage devices corresponding to multiple currently logged-in administrators. The number of backup key components is consistent with the number of administrators who log in based on the user management tool.
[0136] The backup key encryption storage submodule is used to encrypt the backup key through a black-box key mechanism to obtain the ciphertext of the backup key, store the ciphertext of the backup key in the chip memory, and clear the plaintext of the backup key in the chip memory. The ciphertext of the backup key is used to encrypt the first set of master key components, the second set of master key components, and the ciphertext of the key protection key stored in the chip's internal fast memory, and then export them to the host computer for backup.
[0137] In one embodiment, after the backup key encryption storage module, a backup recovery module may also be included.
[0138] In this embodiment, the backup and recovery module may include:
[0139] The backup and recovery submodule is used to read backup key components from multiple administrator-authenticated storage devices during backup and recovery, and then recover the backup key using a knowledge splitting algorithm in the security algorithm engine module.
[0140] The backup key plaintext acquisition submodule is used to encrypt the backup key using a black-box key mechanism, store the encrypted backup key in the chip memory, and clear the plaintext of the backup key from the security chip memory.
[0141] The key encryption storage submodule is used to read the ciphertext of the first master key component, the ciphertext of the second master key component, and the ciphertext of the backup key backed up to the host computer into the security algorithm engine module. Using the ciphertext of the backup key, it decrypts the ciphertext of the first master key component and the ciphertext of the second master key component in the security algorithm engine module to obtain the first master key component and the second master key component. It then encrypts the first master key component and the second master key component to generate corresponding ciphertexts of the first master key component and the second master key component. The ciphertext of the first master key component is stored in the chip's internal fast memory, and the ciphertext of the second master key component is stored in the battery power-saving safe storage area. Finally, the first master key component and the second master key component are cleared from the security chip's memory.
[0142] The key protection key ciphertext storage submodule is used to decrypt the encrypted key protection key ciphertext stored in the host computer using the ciphertext of the backup key, obtain the key protection key ciphertext, and store the key protection key ciphertext in the chip's internal fast memory.
[0143] Each module in the aforementioned hierarchical key management device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the corresponding operations of each module.
[0144] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 9 As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores key encrypted data. The network interface communicates with external terminals via a network connection. When executed by the processor, the computer program implements a hierarchical key management method.
[0145] Those skilled in the art will understand that Figure 9The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0146] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.
[0147] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.
[0148] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.
[0149] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.
[0150] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.
[0151] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0152] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A hierarchical key management method, characterized in that, The method includes: Obtain the master key, split the master key into a first set of master key components and a second set of master key components, and clear the plaintext master key from the chip memory; The first set of master key components and the second set of master key components are encrypted respectively to generate ciphertext of the first set of master key components and ciphertext of the second set of master key components. The ciphertext of the first set of master key components is stored in the internal fast memory of the chip, and the ciphertext of the second set of master key components is stored in the battery power protection safe storage area. The battery power protection safe storage area is connected to the chip through a serial peripheral interface. When an instruction to generate a key protection key is detected, a key protection key is generated. The key protection key is then encrypted using the first set of master key component ciphertext and the second set of master key component ciphertext to obtain the ciphertext of the key protection key. The ciphertext of the key protection key is then stored in the chip's internal fast memory. When an instruction to generate a session key is detected, the ciphertext of the key protection key is decrypted, and the corresponding session key is generated based on the decrypted key protection key. In this process, after the second set of master key component ciphertext is stored in the battery power-saving security storage area, when attacked, the security destruction mechanism is invoked to destroy the master key ciphertext stored in the chip memory and the second set of master key component ciphertext stored in the battery power-saving security storage area.
2. The method according to claim 1, characterized in that, The steps of encrypting the first master key component and the second master key component respectively to generate ciphertext for the first master key component and ciphertext for the second master key component, storing the ciphertext for the first master key component in the chip's internal fast memory, and storing the ciphertext for the second master key component in the chip's battery power-saving security storage area include: Obtain the random number generated by the random number generator and use it as the data encryption key; Based on the data encryption key, the first group of master key components and the second group of master key components are encrypted using the national cryptographic algorithm to obtain the ciphertext of the first group of master key components and the ciphertext of the second group of master key components respectively. The data encryption key is encrypted to obtain an encryption key block. The first set of master key component ciphertext is stored adjacent to the encryption key block in the chip's internal fast memory. The second set of master key component ciphertext is stored adjacent to the encryption key block in the battery power protection and safety storage area. The encryption key block is used to obtain the data encryption key to decrypt the master key component ciphertext.
3. The method according to claim 2, characterized in that, The generated key protection key is obtained by encrypting the key protection key with the first set of master key component ciphertext and the second set of master key component ciphertext, resulting in the ciphertext of the key protection key, including: The security algorithm engine module and random number generator are invoked to generate a key protection key, which includes a public-private key pair for encryption and a public-private key pair for signing. The first set of master key component ciphertext and the second set of master key component ciphertext are read into the security algorithm engine module within the chip. The encryption key block is decrypted within the security algorithm engine module to obtain the data encryption key. A key decryption key is obtained. Based on the key decryption key, the encryption key block is decrypted within the security algorithm engine module to obtain the data encryption key. Based on the data encryption key, the first set of master key component ciphertext and the second set of master key component ciphertext are decrypted within the security algorithm engine module to obtain the plaintext of the two sets of master key components. The master key is then recovered from the plaintext of the two sets of master key components. The key protection key is encrypted based on the master key and the black-box key mechanism to obtain the ciphertext of the key protection key; Obtain the memory storage key stored in the first memory of the chip; the memory storage key is generated by a random number generator and stored in the first memory after each chip power-on, the first memory being a register that is inaccessible to software; based on the national cryptographic algorithm, the master key is encrypted in the security algorithm engine module using the memory storage key to obtain the master key memory ciphertext, the master key memory ciphertext is stored in the chip memory, and the plaintext of the master key in the security chip memory is cleared.
4. The method according to claim 3, characterized in that, The process of generating a session key based on the ciphertext of the key protection key includes: Read the ciphertext of the key protection key from the chip's internal fast memory; The first set of master key component ciphertext and the second set of master key component ciphertext are read into the security algorithm engine module within the chip. Within the security algorithm engine module, the two sets of master key component ciphertext are decrypted using the encryption key block to obtain the plaintext of the two sets of master key components. Based on the plaintext of the two sets of master key components, the master key is recovered in the security algorithm engine module. In the security algorithm engine module, the ciphertext of the public key of the key protection key is decrypted using the master key to obtain the public key of the key protection key. The public key of the key protection key is then sent to the server, and the plaintext of the public key of the key protection key is cleared from the memory of the security chip. Obtain the corresponding session key ciphertext generated by the server; In the security algorithm engine module, the ciphertext of the private key of the key protection key is decrypted using the master key to obtain the private key of the key protection key. The ciphertext of the session key is then decrypted using the private key of the key protection key to obtain the session key. Finally, the plaintext of the private key of the key protection key is cleared from the memory of the security chip.
5. The method according to claim 1, characterized in that, After generating the key protection key, the method further includes: When the preset key backup permission is obtained, a random number generator is invoked to generate a backup key; the preset key backup permission is obtained when the number of logged-in administrators based on the user management tool is greater than half of the total number of administrators. The backup key is split into multiple backup key components, and these components are stored separately on the authentication storage devices corresponding to multiple currently logged-in administrators. The number of backup key components corresponds to the number of administrators logged in via the user management tool. The backup key is encrypted using a black-box key mechanism to obtain the ciphertext of the backup key. The ciphertext of the backup key is stored in the chip memory, and the plaintext of the backup key in the chip memory is cleared. The ciphertext of the backup key is used to encrypt the ciphertext of the first master key component, the second master key component, and the key protection key stored in the chip's internal fast memory, and then exported to the host computer for backup.
6. The method according to claim 5, characterized in that, After encrypting the first set of master key components, the second set of master key components, and the key protection key stored in the chip's internal fast memory using the ciphertext of the backup key, and exporting them to the host computer for backup, the process further includes: In the case of backup and recovery, the backup key components are read from the authentication storage devices of multiple administrators, and the backup key is recovered in the security algorithm engine module using a knowledge splitting algorithm; the backup key is encrypted using a black-box key mechanism, the encrypted backup key is stored in the chip memory, and the plaintext of the backup key in the security chip memory is cleared; and, The ciphertext of the first master key component, the ciphertext of the second master key component, and the ciphertext of the backup key, which are backed up to the host computer, are read into the security algorithm engine module. Using the ciphertext of the backup key, the ciphertexts of the first and second master key components in the security algorithm engine module are decrypted to obtain the first and second master key components. The first and second master key components are then encrypted to generate corresponding ciphertexts. The ciphertext of the first master key component is stored in the chip's internal fast memory, and the ciphertext of the second master key component is stored in the battery power-saving security storage area. Finally, the first and second master key components are cleared from the security chip's memory. The encrypted key protection key stored in the host computer is decrypted using the encrypted backup key, and the encrypted key protection key is then stored in the chip's internal fast memory.
7. A hierarchical key management device, characterized in that, The device includes: The master key generation and splitting module is used to obtain the master key, split the master key into a first group of master key components and a second group of master key components, and clear the plaintext of the master key in the chip memory. The master key component encryption storage module is used to encrypt the first group of master key components and the second group of master key components respectively, and generate the first group of master key component ciphertext and the second group of master key component ciphertext accordingly. The first group of master key component ciphertext is stored in the chip's internal fast memory, and the second group of master key component ciphertext is stored in the battery power protection safety storage area. The battery power protection safety storage area is connected to the chip through a serial peripheral interface. The key protection key generation module is used to generate a key protection key when an instruction to generate a key protection key is detected, encrypt the key protection key with the first set of master key component ciphertext and the second set of master key component ciphertext to obtain the ciphertext of the key protection key, and store the ciphertext of the key protection key in the internal fast memory of the chip. The session key generation module is used to decrypt the ciphertext of the key protection key when an instruction to generate a session key is detected, and to generate a corresponding session key based on the decrypted key protection key.
8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.
10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.