Silicon wafers and epitaxial silicon wafers
By doping carbon into silicon single crystal ingots and performing high-temperature argon annealing, combined with controlling phosphorus and oxygen concentrations, the problems of dislocation loops and high SF density in 300 mm diameter silicon wafers were solved, and the stability and electrical performance of low resistivity silicon epitaxial layers were improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SUMCO CORP
- Filing Date
- 2022-11-03
- Publication Date
- 2026-06-12
AI Technical Summary
When growing silicon epitaxial layers, there are problems with dislocation loop defects and high stacking fault (SF) density in 300 mm diameter silicon wafers, especially under low resistivity conditions, and existing technologies are difficult to effectively suppress the generation of these defects.
By doping carbon into a silicon single crystal ingot and performing high-temperature argon annealing, combined with controlling the phosphorus doping concentration and oxygen concentration during the growth process, a low carbon concentration layer is formed to reduce dislocation ring defects. Argon annealing is performed before growth to reduce carbon diffusion, thus preparing a low resistivity silicon wafer with a diameter of 300 mm.
It significantly reduces the density of dislocation loop defects and SF density in silicon epitaxial layers, improves the withstand voltage and resistivity of devices, and meets the requirements of low resistivity silicon wafers.
Smart Images
Figure CN116072514B_ABST