Method, device, equipment and medium for detecting presence of external board

Abstract

The present invention relates to the field of board detection, and in particular to a method, device, equipment and medium for detecting the presence of an external board. The method comprises: correspondingly connecting the serial data pin and serial clock pin of a first controller on a mainboard to the second controller on an external board, and using a pull-up resistor to pull up both the serial data pin and the serial clock pin; setting both the first controller and the second controller to a detection mode and using the second controller to pull down one as a first target pin; in response to the first controller detecting that the first target pin is pulled down, using the first controller to pull down the other as a second target pin; in response to the second controller detecting that the second target pin is pulled down, respectively restoring the serial data pin and the serial clock pin to a high level, and setting both the first controller and the second controller to an I2C transmission mode. The solution of the present invention reuses I2C pins to complete the presence detection of the external board, thereby saving pins and reducing costs.

Description

Technical Field

[0001] The present invention relates to the field of board detection, and in particular to a method, device, equipment and medium for detecting the presence of an external board. Background Art

[0002] Add-in cards are a common feature in server systems. The motherboard must correctly detect the insertion of an add-in card and ensure a reliable connection. In hardware, two or more presence detection pins are typically required on both the card and the connector. This detection is aided by designing opposing voltage levels on the card and connector. In software, the GPIO (general-purpose input / output) of a CPLD (Complex Programmable Logic Device) or FPGA (Field Programmable Gate Array) typically reads the voltage level on the presence detection pins to determine if a card is inserted.

[0003] Currently, most server designs use GPIO pins to detect whether an external card is inserted. When the motherboard reads a low level, it means that the external card is inserted. Figure 1 As shown, the traditional external card presence detection uses additional IO pins to determine whether an external card is inserted, such as Figure 1 The presence signal in the motherboard is a pull-up resistor on this pin. When no external card is inserted, this pin is high. When an external card is inserted, this pin is grounded on the external card and pulled low. However, traditional methods for detecting the presence of external cards occupy too many pins, and pin resources are relatively limited on both the motherboard and the external card. Therefore, improvements are urgently needed. Summary of the Invention

[0004] In view of this, it is necessary to provide a method, device, equipment and medium for detecting the presence of an external board in order to address the above technical issues.

[0005] According to a first aspect of the present invention, a method for detecting the presence of an external board is provided, the method comprising:

[0006] Connect the serial data pin and serial clock pin of the first controller on the mainboard to the serial data pin and serial clock pin of the second controller on the external board, and use pull-up resistors to pull the serial data pin and serial clock pin high.

[0007] Setting both the first controller and the second controller to a detection mode, and using the second controller to pull down one of a serial data pin and a serial clock pin as a first target pin;

[0008] In response to the first controller detecting that the first target pin is pulled low, using the first controller to pull the other of the serial data pin and the serial clock pin low as a second target pin;

[0009] In response to the second controller detecting that the second target pin is pulled low, the serial data pin and the serial clock pin are restored to a high level respectively, and the first controller and the second controller are both set to I2C transmission mode.

[0010] In some embodiments, pulling both the serial data pin and the serial clock pin high using pull-up resistors includes:

[0011] Connecting the serial data pin and the serial clock pin of the first controller to a power supply through two pull-up resistors respectively;

[0012] The serial data pin and the serial clock pin of the second controller are connected to a power supply through two pull-up resistors respectively.

[0013] In some embodiments, the resistance of the pull-up resistor is greater than or equal to 1 kilo-ohm and less than or equal to 4.7 kilo-ohm.

[0014] In some embodiments, restoring the serial data pin and the serial clock pin to a high level respectively and setting both the first controller and the second controller to an I2C transmission mode includes:

[0015] causing the second controller to stop pulling the first target pin low;

[0016] In response to the first controller detecting that the first target pin returns to a high level, the first controller stops pulling the second target pin low and sets the first controller to an I2C transmission mode;

[0017] In response to the second controller detecting that the second target pin is restored to a high level, the second controller is set to an I2C transmission mode.

[0018] In some embodiments, the first target pin is a serial clock pin, and the second target pin is a serial data pin.

[0019] In some embodiments, the first target pin is a serial data pin, and the second target pin is a serial clock pin.

[0020] In some embodiments, the first controller is any one of a CPU, a CPLD, and a FPGA on a main board, and the second controller is any one of a CPU, a CPLD, and a FPGA on an external board.

[0021] According to a second aspect of the present invention, there is provided a device for detecting the presence of an external board, the device comprising:

[0022] A connection module configured to connect the serial data pin and serial clock pin of the first controller on the mainboard to the serial data pin and serial clock pin of the second controller on the external board, and to pull up both the serial data pin and the serial clock pin using pull-up resistors;

[0023] a first pull-down module configured to set both the first controller and the second controller to a detection mode, and use the second controller to pull down one of a serial data pin and a serial clock pin as a first target pin;

[0024] a second pull-down module configured to, in response to the first controller detecting that the first target pin is pulled low, use the first controller to pull down the other of the serial data pin and the serial clock pin as a second target pin;

[0025] A recovery module is configured to restore the serial data pin and the serial clock pin to a high level respectively in response to the second controller detecting that the second target pin is pulled low, and set both the first controller and the second controller to I2C transmission mode.

[0026] According to a third aspect of the present invention, a computer device is further provided, the computer device comprising:

[0027] at least one processor; and

[0028] The memory stores a computer program that can be run on the processor, and the processor executes the above-mentioned external board in-place detection method when executing the program.

[0029] According to a fourth aspect of the present invention, a computer-readable storage medium is further provided. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the aforementioned external board presence detection method is executed.

[0030] The above-mentioned method for detecting whether an external card is inserted reuses the I2C pins to detect whether the external card is inserted, which can not only save pins but also realize the mutual handshake function. Not only can the mainboard confirm that an external card is inserted, but the external card can also confirm whether it is connected to the mainboard, thereby saving pins on the mainboard and external card and reducing costs.

[0031] In addition, the present invention also provides an external board in-place detection device, a computer device and a computer-readable storage medium, which can also achieve the above-mentioned technical effects and will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other embodiments can be obtained based on these drawings without paying any creative work.

[0033] Figure 1 This is a schematic diagram of the wiring connection for detecting whether an external card is in place on a traditional motherboard;

[0034] Figure 2 A flow chart of a method for detecting the presence of an external board provided by one embodiment of the present invention;

[0035] Figure 3 A schematic diagram of the connection circuit between a mainboard and an external board provided in another embodiment of the present invention;

[0036] Figure 4 A schematic structural diagram of a device for detecting the presence of an external board provided in another embodiment of the present invention;

[0037] Figure 5 This is a diagram of the internal structure of a computer device in another embodiment of the present invention. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the embodiments of the present invention are further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0039] It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are for distinguishing two non-identical entities with the same name or non-identical parameters. It can be seen that "first" and "second" are only for the convenience of expression and should not be understood as limitations on the embodiments of the present invention. Subsequent embodiments will not explain this one by one.

[0040] In one embodiment, please refer to Figure 2 As shown, the present invention provides a method 100 for detecting the presence of an external board. Specifically, the method comprises the following steps:

[0041] Step 101: Connect the serial data pin and serial clock pin of the first controller on the mainboard to the serial data pin and serial clock pin of the second controller on the external board, and pull up the serial data pin and serial clock pin using pull-up resistors.

[0042] In this embodiment, the external board can be an external hard disk, an external computing board, an external graphics card, etc. on the server; Figure 3As shown, the first controller may be the CPU, CPLD and FPGA on the mainboard, and the second controller may be the CPU, CPLD and FPGA on the external board; it should be noted that for ease of understanding, Figure 3 In the example, the first controller and the second controller are both FPGA. In the specific implementation process, the first controller and the second controller can be flexibly selected according to the resources of the main board and the external card. The serial data pin is I2C_SDA, the serial clock pin is I2C_SCL; the pull-up resistor is Figure 3 R in.

[0043] Step 102: Set both the first controller and the second controller to a detection mode, and use the second controller to pull down one of a serial data pin and a serial clock pin as a first target pin;

[0044] Step 103: in response to the first controller detecting that the first target pin is pulled low, using the first controller to pull down the other of the serial data pin and the serial clock pin as a second target pin;

[0045] Step 104 : In response to the second controller detecting that the second target pin is pulled low, the serial data pin and the serial clock pin are restored to a high level respectively, and the first controller and the second controller are both set to I2C transmission mode.

[0046] The above-mentioned method for detecting whether an external card is inserted reuses the I2C pins to detect whether the external card is inserted, which can not only save pins but also realize the mutual handshake function. Not only can the mainboard confirm that an external card is inserted, but the external card can also confirm whether it is connected to the mainboard, thereby saving pins on the mainboard and external card and reducing costs.

[0047] In some embodiments, please combine again Figure 3 As shown, the aforementioned step 101 of pulling up both the serial data pin and the serial clock pin by using the pull-up resistor includes:

[0048] Connecting the serial data pin and the serial clock pin of the first controller to a power supply through two pull-up resistors respectively;

[0049] The serial data pin and the serial clock pin of the second controller are connected to a power supply through two pull-up resistors respectively.

[0050] In some embodiments, the resistance of the pull-up resistor is greater than or equal to 1 kilo-ohm and less than or equal to 4.7 kilo-ohm.

[0051] In some embodiments, the aforementioned step 104 of restoring the serial data pin and the serial clock pin to a high level and setting both the first controller and the second controller to an I2C transmission mode includes:

[0052] causing the second controller to stop pulling the first target pin low;

[0053] In response to the first controller detecting that the first target pin returns to a high level, the first controller stops pulling the second target pin low and sets the first controller to an I2C transmission mode;

[0054] In response to the second controller detecting that the second target pin is restored to a high level, the second controller is set to an I2C transmission mode.

[0055] In some embodiments, the first target pin is a serial clock pin, and the second target pin is a serial data pin.

[0056] In some embodiments, the first target pin is a serial data pin, and the second target pin is a serial clock pin.

[0057] In some embodiments, the first controller is any one of a CPU, a CPLD, and a FPGA on a main board, and the second controller is any one of a CPU, a CPLD, and a FPGA on an external board.

[0058] In another embodiment, the solution of the present invention is described in detail below using a commonly used hard disk as an external card as an example. It is assumed that both the motherboard and the hard disk are provided with FPGAs. This embodiment provides a method for detecting the presence of an external card for detecting the presence of the hard disk. The specific implementation steps are as follows:

[0059] Step 1: Initially, both the motherboard and the FPGA on the hard drive enter detection mode. In this mode, the FPGA on the hard drive outputs a low-level signal on the I2C_SCL pin. This state is equivalent to connecting the I2C_SCL pin to ground.

[0060] Step 2: In the detection mode, the FPGA of the motherboard will read the status of the I2C_SCL pin. If it reads a low level, it means that a hard drive is inserted. Otherwise, if it reads a high level, no hard drive is inserted.

[0061] Step 3: Once a hard drive is detected, the FPGA on the motherboard outputs a low level to the I2C_SDA pin.

[0062] Step 4: The FPGA of the hard drive detects that I2C_SDA drops from a high level to a low level, indicating that the FPGA on the mainboard has confirmed that the hard drive has been inserted, and then restores the I2C_SCL output to a high level.

[0063] Step 5: After the FPGA on the mainboard detects that I2C_SCL has returned from a low level to a high level, it restores the I2C_SDA output from a low level to a high level. The FPGA on the mainboard returns from detection mode to I2C transmission mode.

[0064] Step 6: After the hard disk's FPGA detects that I2C_SDA has returned to a high level, the hard disk's FPGA switches back to I2C transmission mode.

[0065] It should be noted that in the specific implementation process, after the hard disk is powered on, the FPGA on the hard disk can also first adjust the I2C_SDA and detect the I2C_SCL pin. Then, the FPGA of the mainboard will detect the I2C_SDA pin and adjust the I2C_SCL. The implementation principle is the same as steps 1 to 6 above, so it will not be repeated here.

[0066] The present embodiment provides a method for detecting the presence of an external board, which has at least the following beneficial technical effects: utilizing the existing pull-up resistors of the existing I2C interface and the characteristics of the FPGA actively transmitting and receiving signals to achieve the function of determining whether an external board is inserted, while saving connector pins. Furthermore, utilizing the characteristics of the FPGA actively transmitting and receiving signals allows the mainboard to confirm whether the external board is inserted and further allows the external board to confirm whether it is connected to the mainboard, thereby saving pins and reducing costs.

[0067] In some embodiments, please refer to Figure 4 As shown, the present invention also provides an external board in-place detection device 200, the device comprising:

[0068] A connection module 201 configured to connect the serial data pin and serial clock pin of the first controller on the mainboard to the serial data pin and serial clock pin of the second controller on the external board, and to pull up both the serial data pin and the serial clock pin using pull-up resistors;

[0069] A first pull-down module 202 is configured to set both the first controller and the second controller to a detection mode, and use the second controller to pull down one of a serial data pin and a serial clock pin as a first target pin;

[0070] a second pull-down module 203 configured to, in response to the first controller detecting that the first target pin is pulled low, use the first controller to pull down the other of the serial data pin and the serial clock pin as a second target pin;

[0071] The recovery module 204 is configured to restore the serial data pin and the serial clock pin to a high level respectively in response to the second controller detecting that the second target pin is pulled low, and set both the first controller and the second controller to I2C transmission mode.

[0072] The above-mentioned external board presence detection device reuses I2C pins to detect whether an external card is inserted, which can not only save pins but also realize the mutual handshake function. Not only can the main board confirm that an external card is inserted, but the external card can also confirm whether it is connected to the main board, thereby saving pins of the main board and the external board and reducing costs.

[0073] In some embodiments, the connection module 201 is further configured to:

[0074] Connecting the serial data pin and the serial clock pin of the first controller to a power supply through two pull-up resistors respectively;

[0075] The serial data pin and the serial clock pin of the second controller are connected to a power supply through two pull-up resistors respectively.

[0076] In some embodiments, the resistance of the pull-up resistor is greater than or equal to 1 kilo-ohm and less than or equal to 4.7 kilo-ohm.

[0077] In some embodiments, the recovery module 204 is further configured to:

[0078] causing the second controller to stop pulling the first target pin low;

[0079] In response to the first controller detecting that the first target pin returns to a high level, the first controller stops pulling the second target pin low and sets the first controller to an I2C transmission mode;

[0080] In response to the second controller detecting that the second target pin is restored to a high level, the second controller is set to an I2C transmission mode.

[0081] In some embodiments, the first target pin is a serial clock pin, and the second target pin is a serial data pin.

[0082] In some embodiments, the first target pin is a serial data pin, and the second target pin is a serial clock pin.

[0083] In some embodiments, the first controller is any one of a CPU, a CPLD, and a FPGA on a main board, and the second controller is any one of a CPU, a CPLD, and a FPGA on an external board.

[0084] It should be noted that the specific limitations of the external board presence detection device can be found in the limitations of the external board presence detection method described above and will not be elaborated upon here. Each module in the aforementioned external board presence detection device can be implemented in whole or in part through software, hardware, or a combination thereof. Each of the aforementioned modules can be embedded in or independent of a processor in a computer device in hardware form, or can be stored in a memory in the computer device in software form, so that the processor can call and execute the corresponding operations of each of the aforementioned modules.

[0085] According to another aspect of the present invention, a computer device is provided. The computer device may be a server. Figure 5 As shown. The computer device includes a processor, a memory, a network interface and a database connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store data. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, the above-mentioned external board in-place detection method is implemented. Specifically, the method includes the following steps:

[0086] Connect the serial data pin and serial clock pin of the first controller on the mainboard to the serial data pin and serial clock pin of the second controller on the external board, and use pull-up resistors to pull the serial data pin and serial clock pin high.

[0087] Setting both the first controller and the second controller to a detection mode, and using the second controller to pull down one of a serial data pin and a serial clock pin as a first target pin;

[0088] In response to the first controller detecting that the first target pin is pulled low, using the first controller to pull the other of the serial data pin and the serial clock pin low as a second target pin;

[0089] In response to the second controller detecting that the second target pin is pulled low, the serial data pin and the serial clock pin are restored to a high level respectively, and the first controller and the second controller are both set to I2C transmission mode.

[0090] In some embodiments, pulling both the serial data pin and the serial clock pin high using pull-up resistors includes:

[0091] Connecting the serial data pin and the serial clock pin of the first controller to a power supply through two pull-up resistors respectively;

[0092] The serial data pin and the serial clock pin of the second controller are connected to a power supply through two pull-up resistors respectively.

[0093] In some embodiments, the resistance of the pull-up resistor is greater than or equal to 1 kilo-ohm and less than or equal to 4.7 kilo-ohm.

[0094] In some embodiments, restoring the serial data pin and the serial clock pin to a high level respectively and setting both the first controller and the second controller to an I2C transmission mode includes:

[0095] causing the second controller to stop pulling the first target pin low;

[0096] In response to the first controller detecting that the first target pin returns to a high level, the first controller stops pulling the second target pin low and sets the first controller to an I2C transmission mode;

[0097] In response to the second controller detecting that the second target pin is restored to a high level, the second controller is set to an I2C transmission mode.

[0098] In some embodiments, the first target pin is a serial clock pin, and the second target pin is a serial data pin.

[0099] In some embodiments, the first target pin is a serial data pin, and the second target pin is a serial clock pin.

[0100] In some embodiments, the first controller is any one of a CPU, a CPLD, and a FPGA on a main board, and the second controller is any one of a CPU, a CPLD, and a FPGA on an external board.

[0101] According to another aspect of the present invention, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the method for detecting the presence of an external board described above is implemented. Specifically, the method comprises the following steps:

[0102] Connect the serial data pin and serial clock pin of the first controller on the mainboard to the serial data pin and serial clock pin of the second controller on the external board, and use pull-up resistors to pull the serial data pin and serial clock pin high.

[0103] Setting both the first controller and the second controller to a detection mode, and using the second controller to pull down one of a serial data pin and a serial clock pin as a first target pin;

[0104] In response to the first controller detecting that the first target pin is pulled low, using the first controller to pull the other of the serial data pin and the serial clock pin low as a second target pin;

[0105] In response to the second controller detecting that the second target pin is pulled low, the serial data pin and the serial clock pin are restored to a high level respectively, and the first controller and the second controller are both set to I2C transmission mode.

[0106] In some embodiments, pulling both the serial data pin and the serial clock pin high using pull-up resistors includes:

[0107] Connecting the serial data pin and the serial clock pin of the first controller to a power supply through two pull-up resistors respectively;

[0108] The serial data pin and the serial clock pin of the second controller are connected to a power supply through two pull-up resistors respectively.

[0109] In some embodiments, the resistance of the pull-up resistor is greater than or equal to 1 kilo-ohm and less than or equal to 4.7 kilo-ohm.

[0110] In some embodiments, restoring the serial data pin and the serial clock pin to a high level respectively and setting both the first controller and the second controller to an I2C transmission mode includes:

[0111] causing the second controller to stop pulling the first target pin low;

[0112] In response to the first controller detecting that the first target pin returns to a high level, the first controller stops pulling the second target pin low and sets the first controller to an I2C transmission mode;

[0113] In response to the second controller detecting that the second target pin is restored to a high level, the second controller is set to an I2C transmission mode.

[0114] In some embodiments, the first target pin is a serial clock pin, and the second target pin is a serial data pin.

[0115] In some embodiments, the first target pin is a serial data pin, and the second target pin is a serial clock pin.

[0116] In some embodiments, the first controller is any one of a CPU, a CPLD, and a FPGA on a main board, and the second controller is any one of a CPU, a CPLD, and a FPGA on an external board.

[0117] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0118] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0119] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A method for detecting the presence of an external board, characterized in that: The method comprises: Connect the serial data pin and serial clock pin of the first controller on the mainboard to the serial data pin and serial clock pin of the second controller on the external board, and use pull-up resistors to pull the serial data pin and serial clock pin high. Setting both the first controller and the second controller to a detection mode, and using the second controller to pull down one of a serial data pin and a serial clock pin as a first target pin; In response to the first controller detecting that the first target pin is pulled low, using the first controller to pull the other of the serial data pin and the serial clock pin low as a second target pin; In response to the second controller detecting that the second target pin is pulled low, the second controller restores the serial data pin and the serial clock pin to a high level respectively, and sets both the first controller and the second controller to an I2C transmission mode; Restoring the serial data pin and the serial clock pin to a high level respectively, and setting both the first controller and the second controller to an I2C transmission mode, comprising: causing the second controller to stop pulling the first target pin low; In response to the first controller detecting that the first target pin returns to a high level, the first controller stops pulling the second target pin low and sets the first controller to an I2C transmission mode; In response to the second controller detecting that the second target pin is restored to a high level, the second controller is set to an I2C transmission mode.

2. The method for detecting the presence of an external board according to claim 1, wherein: Using pull-up resistors to pull both the serial data pin and the serial clock pin high includes: Connecting the serial data pin and the serial clock pin of the first controller to a power supply through two pull-up resistors respectively; The serial data pin and the serial clock pin of the second controller are connected to a power supply through two pull-up resistors respectively.

3. The method for detecting the presence of an external board according to claim 1, wherein: The resistance of the pull-up resistor is greater than or equal to 1 kilo-ohm and less than or equal to 4.7 kilo-ohm.

4. The method for detecting the presence of an external board according to claim 1, wherein: The first target pin is a serial clock pin, and the second target pin is a serial data pin.

5. The method for detecting the presence of an external board according to claim 1, wherein: The first target pin is a serial data pin, and the second target pin is a serial clock pin.

6. The method for detecting the presence of an external board according to claim 1, wherein: The first controller is any one of the CPU, CPLD and FPGA on the main board, and the second controller is any one of the CPU, CPLD and FPGA on the external board.

7. A device for detecting the presence of an external board, characterized in that: The device comprises: A connection module configured to connect the serial data pin and serial clock pin of the first controller on the mainboard to the serial data pin and serial clock pin of the second controller on the external board, and to pull up both the serial data pin and the serial clock pin using pull-up resistors; a first pull-down module configured to set both the first controller and the second controller to a detection mode, and use the second controller to pull down one of a serial data pin and a serial clock pin as a first target pin; a second pull-down module configured to, in response to the first controller detecting that the first target pin is pulled low, use the first controller to pull down the other of the serial data pin and the serial clock pin as a second target pin; a recovery module configured to, in response to the second controller detecting that the second target pin is pulled low, restore the serial data pin and the serial clock pin to a high level respectively, and set both the first controller and the second controller to an I2C transmission mode; The recovery module is also configured to: cause the second controller to stop pulling down the first target pin; in response to the first controller detecting that the first target pin has returned to a high level, cause the first controller to stop pulling down the second target pin and set the first controller to I2C transmission mode; in response to the second controller detecting that the second target pin has returned to a high level, set the second controller to I2C transmission mode.

8. A computer device, characterized in that: include: at least one processor; as well as A memory storing a computer program that can be run in the processor, wherein the processor executes the external board in-place detection method according to any one of claims 1 to 6 when executing the program.

9. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method for detecting the presence of an external board according to any one of claims 1 to 6 is executed.

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