LED Display Driving Method and System

Abstract

The present invention provides a method and system for driving an LED display screen, including: dividing the gray-scale data of the LED display screen according to bits to form high-gray data and low-gray data, wherein the bits of the high-gray data are higher than those of the low-gray data; within the first sub-field time after frame switching, the input control unit sequentially stores the high-gray data in the on-chip memory according to the line scan sequence; within the sub-field time after the first sub-field time, the PWM processing unit reads the high-gray data from the on-chip memory; the input control unit inputs a part of the low-gray data into the PWM processing unit before each line scan; and the chip combines the read high-gray data and the newly input low-gray data from the controller and sends them to the control channel of the PWM processing unit for output driving.

Description

Technical Field

[0001] The present invention relates to the technical field of LEDs, and particularly to a method and system for driving an LED display screen. Background Art

[0002] LED display screens have the advantages of long available time, wide viewing angle, and can be assembled into any required size according to actual needs, so they are widely used in the media field and information release field. With the development of the domestic service industry, real-time advertising information and business promotion have become increasingly important, and they have become an irreplaceable medium in this field due to their high visualization degree and low cost.

[0003] With the wide application of LED display screens, LED display technology has developed greatly, and among them, display driving technology is the key technology. Currently, LED display driving methods can be roughly divided into DC-DC, resistor current limiting, and constant current driving. Among them, a multi-channel constant current LED driving chip combined with PWM technology can achieve precise current control and high gray-scale display, thus achieving a good display effect, so it is widely used in small-pitch LED driving chips.

[0004] Implementing multi-channel constant current LED chip display control through PWM technology is currently the best way to achieve display effects. This technology mainly lies in achieving different gray-scale brightness display effects by controlling the on / off time of the LEDs.

[0005] After years of iterative development, the constant current driving technology of LED display screens has now been subdivided into two driving control technologies with their own characteristics: general control type and built-in PWM control type. The two control technologies have undergone their respective derivative developments to meet the requirements of the market for technical parameters and display effects, and each has its own advantages and disadvantages. For example, the general control type driving chip has a lower cost, but the shooting refresh rate, color reproduction and other effects are relatively poor and the controller development is relatively complex, and it is generally used in outdoor low-end display occasions; the built-in PWM type control driving chip has a higher cost, the shooting refresh rate and color reproduction are relatively excellent, and the controller development is relatively simple, and most of them are used in occasions with higher display effect requirements. Summary of the Invention

[0006] The purpose of the present invention is to provide a method and system for driving an LED display screen to achieve the integration of the existing two driving control technologies and improve their respective disadvantages.

[0007] To solve the above technical problems, the present invention provides a method for driving an LED display screen, including:

[0008] Dividing the gray-scale data of the LED display screen according to bits to form high-gray data and low-gray data, where the bits of the high-gray data are higher than those of the low-gray data;

[0009] During the first sub-field time after frame switching, the input control unit sequentially stores the high-gray data in the on-chip memory according to the line scan order;

[0010] During the sub-field time after the first sub-field time, the PWM processing unit reads the high-gray data from the on-chip memory;

[0011] The input control unit inputs a part of the low-gray data into the PWM processing unit before each line scan; and

[0012] The chip combines the read high-gray data and the newly input low-gray data from the controller and sends them to the control channel of the PWM processing unit for output driving.

[0013] Optionally, in the LED display driving method, it further includes:

[0014] Generating a PWM pulse width according to the gray data and the gray clock to control the current output of the PWM processing unit; and

[0015] In multi-line scanning display, multiple sub-fields are scanned within one frame time, where scanning from the first line to the last line is regarded as one sub-field.

[0016] Optionally, in the LED display driving method, where:

[0017] Set the maximum gray level to F bits. Each pixel point needs to be turned on for a maximum of 2 F gray clock cycles within one frame time, where each sub-field completes gray level E bits, and each sub-field completes 2 E gray clock cycles, and the number of sub-fields is 2 P (where P = F - E);

[0018] The high H bits of the F-bit display data are called high-gray data, and the remaining F - H bits of the low-order display data are called low-gray data, where H must be less than the number of bits of the PWM processing unit of the chip. The high-gray data of all rows is sent to the PWM processing unit by the input control unit in the first sub-field and automatically stored in the on-chip memory, and the low-gray data is sent to the chip in advance before the next line is displayed.

[0019] Optionally, in the LED display driving method, where:

[0020] The high-gray data of all rows is sent to the PWM processing unit by the input control unit in the first sub-field and automatically stored in the on-chip memory, and the low-gray data needs to be sent to the chip in advance before the next line is displayed after being segmented.

[0021] Optionally, in the LED display driving method, it further includes:

[0022] The control timing transmits high-gray data and low-gray data through LATCH, DIN, and DCLK;

[0023] The input control unit first transmits the high-gray data of the first row. After receiving it, the PWM processing unit stores it in the SRAM, then transmits the high-gray data of the second row and stores it while displaying the high-gray data of the first row; and

[0024] After receiving the high-gray data and the low-gray data, the PWM processing unit combines them into E-bit data for PWM output.

[0025] Optionally, in the LED display driving method described above, it further includes:

[0026] Set the maximum gray level to F = 13 bits (that is, each pixel point needs to be turned on for a maximum of 2 F gray clock cycles within one frame time), and each subfield completes gray level E = 7 bits (each subfield completes 2 7 gray clock cycles, and E must be less than or equal to the number of bits of the PWM processing unit). Then the number of subfields is 2 P (where P = F - E), that is, 2 6 = 64.

[0027] If the high-gray data bit is set to 4 bits:

[0028] Then it is defined that: B12 to B9 are high-gray data, and B8 to B0 are low-gray data.

[0029] Among them, B12 to B9 are stored in the on-chip SRAM.

[0030] The high-gray data of all rows needs to be sent to the chip by the controller first and automatically stored in the SRAM. After being segmented, the low-gray data needs to be sent to the chip in advance before the next row is displayed.

[0031] The present invention also provides an LED display driving system, including:

[0032] The MIX-PWM driving module is configured to divide the gray data of the LED display to form high-gray data and low-gray data; where the bit of the high-gray data is higher than that of the low-gray data;

[0033] The input control unit is configured to sequentially store the high-gray data in cooperation with the line scanning sequence within the first subfield time after frame change, process the low-gray data, and input the low-gray data into the PWM processing unit in advance with each line scan;

[0034] The PWM processing unit is configured to perform the following actions:

[0035] In the subsequent subfield time, directly read the high-gray data from the SRAM for display;

[0036] Reading of high-gray data and processing of low-gray data by the input control unit; and

[0037] Completely outputting all grayscale data within one frame time.

[0038] Traditional built-in PWM driving technology such as Figure 1 As shown, traditional built-in PWM driving uses the ping-pong operation of built-in SRAM to store and read 16-bit data. The controller only needs to update the SRAM image data once within one frame time. The built-in PWM will automatically scatter and display the 16-bit channel grayscale data. At this time, the controller does not need to participate at all ( Figure 1 is the functional block diagram of a 32-scan PWM driving chip). After clearly understanding the advantages and disadvantages of the two driving technologies, the inventors of the present invention tried to fuse the two driving control technologies to achieve the purpose of having a medium cost and the shooting refresh rate and color restoration meeting the user's requirements.

[0039] In the LED display driving method and system provided by the present invention, a MIX-PWM driving scheme is proposed. By dividing the grayscale display data into high-gray and low-gray according to the grayscale threshold, the input control unit stores and displays the high-gray data in sequence with the line scan order in the first subfield after frame change, and directly reads the high-gray data from the SRAM during the display of the subsequent subfields. The low-gray data is processed by the input control unit and is input to the PWM processing unit in advance with each line scan. Due to the early reading of high-gray data by the PWM processing unit and the early processing of low-gray data by the input control unit, the PWM processing unit can still completely output all the display data within one frame time. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a schematic diagram of the functional block diagram of an existing 32-scan PWM driving chip;

[0041] Figure 2 is a schematic diagram of the LED display driving system according to an embodiment of the present invention;

[0042] Figure 3 is a schematic diagram of the principle of the MIX-PWM driving method of the LED display according to an embodiment of the present invention;

[0043] Figure 4 is a schematic diagram of the data stream corresponding to the control timing of the MIX-PWM driving method of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0044] The present invention will be further described below in conjunction with the specific embodiments with reference to the accompanying drawings.

[0045] It should be noted that the components in the respective drawings may be exaggerated for illustrative purposes and not necessarily drawn to scale. In the respective drawings, the same or functionally identical components are provided with the same reference numerals.

[0046] In the present invention, unless otherwise specified, "arranged on", "arranged above", and "arranged over" do not exclude the presence of intervening elements therebetween. In addition, "arranged on or above" merely represents the relative positional relationship between two components, and in certain cases, such as after reversing the product direction, it may also be converted to "arranged under or below", and vice versa.

[0047] In the present invention, the respective embodiments are merely intended to illustrate the solutions of the present invention and should not be construed as restrictive.

[0048] In the present invention, unless otherwise specified, the quantifiers "a" and "one" do not exclude the scenario of multiple elements.

[0049] It should also be noted here that in the embodiments of the present invention, for clarity and simplicity, only a part of the components or assemblies may be shown, but those of ordinary skill in the art can understand that, under the teachings of the present invention, the required components or assemblies can be added according to the specific scenario requirements. Additionally, unless otherwise stated, the features in different embodiments of the present invention can be combined with each other. For example, a certain feature in the second embodiment can be used to replace the corresponding or functionally identical or similar feature in the first embodiment, and the resulting embodiment also falls within the scope of disclosure or the scope of recording of this application.

[0050] It should also be noted here that within the scope of the present invention, the terms "same", "equal", "equals", etc. do not mean that the two values are absolutely equal, but allow for a certain reasonable error, that is, the said terms also cover "substantially the same", "substantially equal", "substantially equals". By analogy, in the present invention, the directional terms "perpendicular to", "parallel to", etc. also cover the meanings of "substantially perpendicular to" and "substantially parallel to".

[0051] In addition, the numbering of the steps of the respective methods of the present invention does not limit the execution order of the said method steps. Unless otherwise specified, the respective method steps can be executed in different orders.

[0052] The LED display driving method and system proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise scales, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0053] The object of the present invention is to provide an LED display driving method and system to achieve the integration of two existing driving control technologies and improve their respective disadvantages.

[0054] To achieve the above object, the present invention provides an LED display driving method and system, including: dividing the gray-scale data of the LED display to form high-gray data and low-gray data; wherein the bits of the high-gray data are higher than those of the low-gray data; within the first sub-field time after frame switching, the input control unit cooperates with the line scanning sequence to sequentially store the high-gray data; in the subsequent sub-field times, the PWM processing unit directly reads the high-gray data from the SRAM for display, the input control unit processes the low-gray data, and advances the low-gray data to the PWM processing unit with each line scan; the chip combines the read high-gray data and the newly input low-gray data from the controller and sends them to the control channel output drive of the PWM processing unit. Through the reading of the high-gray data by the PWM processing unit and the processing of the low-gray data by the input control unit, the PWM processing unit completely outputs all the gray-scale data within one frame time.

[0055] The innovations of the present invention include:

[0056] 1. The controller first sends the high-gray data of the first row. After receiving it, the chip stores it in the SRAM, then sends the high-gray data of the second row and stores it while displaying the high-gray data of the first row;

[0057] 2. The chip combines the high-gray data in the SRAM and the received low-gray data into PWM data and sends it to the data processing unit for control output;

[0058] 3. The division of the high-gray data bits and the low-gray data bits can be customized, and it is required that the high-gray data is less than the number of bits of the PWM processing unit.

[0059] Figure 2 - 3 The first embodiment of the present invention is provided, which shows the overall scheme of the LED display driving method. Figure 2 It is a functional block diagram of a MIX-PWM 32-scan driving chip. The MIX-PWM driving scheme divides the gray-scale display data into high-gray and low-gray. The input control unit sequentially stores and displays the high-gray data in cooperation with the line scanning sequence in the first sub-field after frame switching. When displaying in the subsequent sub-fields, the high-gray data is directly read from the SRAM, and the low-gray data is processed by the input control unit and advanced to the PWM processing unit with each line scan. Through the reading of the high-gray data by the PWM processing unit and the processing of the low-gray data by the input control unit, the PWM processing unit can still completely output all the display data within one frame time.

[0060] The principle of MIX-PWM driving technology includes: the gray level of the chip is realized by generating PWM pulse width through gray level data and gray level clock to control the current output of the PWM processing unit (as Figure 3 shown). In multi-line scanning display, to improve the display refresh rate, multiple fields of scanning are performed within one frame time (scanning from the first line to the last line is called a sub-field).

[0061] For example: set the maximum gray level F = 13 bits (that is, each pixel point needs to be turned on for a maximum of 2 F gray level clock cycles within one frame time), and each sub-field completes gray level E = 7 bits (each sub-field completes 2 7 gray level clock cycles, and E must be less than or equal to the number of bits of the PWM processing unit). Then the number of sub-fields is 2 P (where P = F - E), that is, 2 6 = 64.

[0062] The present invention will be further elaborated through multiple specific examples below.

[0063] If the high gray data bit is set to 4 bits:

[0064] Then it is defined that: B12 to B9 are high gray data, and B8 to B0 are low gray data.

[0065] Among them, B12 to B9 are stored in the on-chip SRAM.

[0066] The high gray data of all rows needs to be sent to the chip by the controller and automatically stored in the SRAM. The low gray data needs to be sent to the chip in advance before the next line display after being segmented.

[0067] Example 1: The display data X = 666 (binary 00010 1001 1010),

[0068] Then: the high gray data XH = 0x0001, and the low gray data XL = 0x010011010

[0069] XH = 0x0001 needs to be sent to the chip first and stored in the SRAM.

[0070] PWM data processing unit

[0071] bit bit6 bit5 bit4 bit3 bit2 bit1 bit0 data "0”(B12) "0”(B11) "0”(B10) "1”(B9) BL2 BL1 BL0 bit weight P+6 P+5 P+4 P+3 P+2 P+1 P

[0072] The high gray display period is: 1 * 2 6+3 = 512

[0073] The low gray display period is: 666 - 512 = 154

[0074] The controller needs to send 154 by splitting the data according to the bit weights of BL2 to BL0 in 63 sub-fields, and there are multiple splitting methods. For example, if 2 is sent in 35 sub-fields and 3 is sent in 28 sub-fields, then: 35x2 + 28x3 = 154;

[0075] For example: Set the maximum gray level to F = 13 bits (that is, each pixel point needs to be turned on for a maximum of 2 F gray scale clock cycles within one frame time), and each sub-field completes gray scale E = 8 bits (each sub-field completes 2 8 gray scale clock cycles, and E must be less than or equal to the number of bits of the PWM processing unit). Then the number of sub-fields is 2 P (where P = F - E), that is, 2 5 = 32.

[0076] If the high gray data bit is set to 5 bits:

[0077] Then define: B12 to B8 are high gray data, and B7 to B0 are low gray data.

[0078] Among them, B12 to B8 are stored in the on-chip SRAM.

[0079] The high gray data of all rows needs to be sent to the chip by the controller and automatically stored in the SRAM. The low gray data needs to be sent to the chip in advance before the next line display after being split and processed.

[0080] Example 1: The display data X = 888 (binary 00011 0111 1000)

[0081] Then: The high gray data XH = 0x00011, and the low gray data XL = 0x01111000

[0082] XH = 0x00011 needs to be sent to the chip first and stored in the SRAM.

[0083] PWM data processing unit

[0084] bit bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 data "0”(B12) "0”(B11) "0”(B10) "1”(B9) "1”(B8) BL2 BL1 BL0 bit weight P+7 P+6 P+5 P+4 P+3 P+2 P+1 P

[0085] The high gray display cycle is: 1*2 5+3 +1*2 5+4 = 768

[0086] The low gray display cycle is: 888 - 768 = 120

[0087] The controller needs to send 120 by splitting the data according to the bit weights of BL2 to BL0 in 31 sub-fields, and there are multiple splitting methods. For example, if 3 is sent in 4 sub-fields and 4 is sent in 27 sub-fields, then: 4x3 + 27x4 = 120;

[0088] Figure 4The data flow of the LED display driving method is shown. High-gray data and low-gray data are sent through LATCH, DIN, and DCLK. Figure 4 In this, M is the number of scans. The input control unit first sends the high-gray data of the first row. After receiving it, the PWM processing unit stores it in the SRAM. Then, it sends the high-gray data of the second row and stores it while displaying the high-gray data of the first row. The data flow is as Figure 4 shown. After receiving the high-gray data and low-gray data, the PWM processing unit combines them into PWM data for PWM output.

[0089] In summary, the above embodiments have described in detail different configurations of the LED display driving method and system. Of course, the present invention includes but is not limited to the configurations listed in the above embodiments. Any content obtained by transformation based on the configurations provided in the above embodiments belongs to the scope protected by the present invention. Those skilled in the art can draw inferences from one instance to another based on the content of the above embodiments.

[0090] Each embodiment in this specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other. For the system disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple. For the relevant parts, reference can be made to the description in the method part.

[0091] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention in any way. Any changes and modifications made by those of ordinary skill in the art of the present invention based on the above disclosure belong to the scope of protection of the claims.

Claims

1. A method for driving an LED display screen, characterized in that, Including: Dividing the grayscale data of the LED display screen according to bits to form high-grayscale data and low-grayscale data, where the bits of the high-grayscale data are higher than those of the low-grayscale data; During the first subfield time after frame switching, the input control unit sequentially stores the high-grayscale data in the on-chip memory according to the line scan order; During the subfield time after the first subfield time, the PWM processing unit reads the high-grayscale data from the on-chip memory; The input control unit inputs a part of the low-grayscale data into the PWM processing unit before each line scan; The chip combines the read high-grayscale data and the newly sent low-grayscale data from the controller and sends them to the control channel of the PWM processing unit for output driving; Wherein: Set the maximum gray level to F bits. Each pixel needs to be turned on for a maximum of 2 F gray clock cycles within one frame time. Each subfield completes E bits of gray level, and each subfield completes 2 E gray clock cycles. The number of subfields is 2 P , where P = F - E; The high H bits of the F-bit display data are called high-grayscale data, and the remaining F - H bits of the low-bit display data are called low-grayscale data, where H must be less than the number of bits of the PWM processing unit of the chip; the high-grayscale data of all rows is sent to the PWM processing unit by the input control unit in the first subfield and automatically stored in the on-chip memory, and the low-grayscale data is sent to the chip in advance before the next line is displayed.

2. The LED display driving method according to claim 1, wherein Also including: Generating PWM pulse widths according to the grayscale data and the grayscale clock to control the current output of the PWM processing unit; And In multi-line scanning display, multiple subfields are scanned within one frame time, where scanning from the first line to the last line is regarded as one subfield.

3. The LED display driving method according to claim 1, characterized in that, Wherein: The high-grayscale data of all rows is sent to the PWM processing unit by the input control unit in the first subfield and automatically stored in the on-chip memory, and the low-grayscale data needs to be sent to the chip in advance before the next line is displayed after being segmented.

4. The LED display driving method according to claim 1, wherein Also including: Controlling the timing to send high-grayscale data and low-grayscale data through LATCH, DIN, and DCLK; The input control unit first sends the high-grayscale data of the first row, and after the PWM processing unit receives it, it stores it in the SRAM, then sends the high-grayscale data of the second row and stores it while displaying the high-grayscale data of the first row; and After receiving the high-grayscale data and the low-grayscale data, the PWM processing unit combines them into E-bit data for PWM output.

5. An LED display driving system, characterized in that, Including: A MIX-PWM driving module configured to divide the grayscale data of the LED display screen to form high-grayscale data and low-grayscale data; where the bits of the high-grayscale data are higher than those of the low-grayscale data; An input control unit configured to sequentially store the high-grayscale data in cooperation with the line scan order during the first subfield time after frame switching, process the low-grayscale data, and input the low-grayscale data into the PWM processing unit in advance with each line scan; A PWM processing unit configured to perform the following actions: During the subsequent subfield time, directly read the high-grayscale data from the SRAM for display; Reading the high-grayscale data and processing the low-grayscale data by the input control unit; And Completely outputting all the grayscale data within one frame time; Wherein: Set the maximum gray level to F bits. Each pixel needs to be turned on for a maximum of 2 F gray clock cycles within one frame time. Each subfield completes E bits of gray level, and each subfield completes 2 E gray clock cycles. The number of subfields is 2 P , where P = F - E; The high H bits of the F-bit display data are called high-grayscale data, and the remaining F - H bits of the low-bit display data are called low-grayscale data, where H must be less than the number of bits of the PWM processing unit of the chip; the high-grayscale data of all rows is sent to the PWM processing unit by the input control unit in the first subfield and automatically stored in the on-chip memory, and the low-grayscale data is sent to the chip in advance before the next line is displayed.

Images