Preparation method of GaN HEMT thin film based on hybrid etching

Abstract

This invention discloses a method for fabricating a diamond thin film GaN HEMT based on hybrid etching, comprising: sequentially growing a SiN dielectric layer, a diamond thin film, and a SiN hard mask on an epitaxial wafer; cyclically etching away the SiN hard mask and diamond thin film in the source region, drain region, gate region, and mesa electrically isolated region using a cyclic etching process; etching the exposed SiN dielectric and the remaining SiN hard mask using wet etching; fabricating source and drain electrodes on an AlGaN barrier layer; and fabricating a gate electrode on the AlGaN barrier layer; wherein the etching solution comprises a mixed solution of hydrofluoric acid, ammonium fluoride, and water. This invention can effectively remove micromasks and diamond burrs while protecting the AlGaN barrier layer from damage.

Description

Technical Field

[0001] This invention belongs to the field of GaN (gallium nitride) HEMT (High Electron Mobility Transistor), specifically relating to a method for preparing diamond thin film GaN HEMT based on hybrid etching. Background Technology

[0002] In recent years, third-generation semiconductor materials, led by gallium nitride (GaN), have gradually replaced first- and second-generation semiconductors as the main semiconductor materials for realizing new high-power, high-frequency devices due to their characteristics such as large bandgap, high breakdown electric field, high thermal conductivity, high electron saturation drift velocity, and low dielectric constant. Their superior performance has led to their widespread application in industries such as wireless communication and radar, which require high frequency, high bandwidth, and high power.

[0003] When GaN and AlGaN (aluminum gallium nitride) materials form a heterostructure, the superior power characteristics of GaN can be better utilized. Due to the strong polarization effect of nitride materials, a high-density two-dimensional electron gas can be formed at the interface of the GaN heterostructure. This type of heterojunction device is called GaN HEMT.

[0004] The self-heating effect that HEMT devices generate under prolonged high-power operation is a key reason limiting the development of GaNHEMTs to higher frequency devices. As the channel temperature increases with power dissipation, the high-temperature operating environment during long-term operation damages the gate metal, causing gate leakage current. This reduces carrier electron mobility, lowers power density, and ultimately leads to a decline in device performance.

[0005] HEMTs exhibit significant self-heating effects due to the low thermal conductivity of the materials themselves, high interfacial thermal resistance, and device structure design. These effects can be mitigated by reducing interfacial thermal resistance, introducing materials with high thermal conductivity, and optimizing the device structure. For example, SiC (silicon carbide) substrates can replace traditional Si substrates to alleviate self-heating. However, with increasingly higher power requirements for devices, SiC substrates can no longer meet current device needs. Consequently, diamond materials have gradually come into focus. Diamond materials possess a high thermal conductivity of 2200 W / m·K, which is 2-5 times that of SiC. Compared to using a diamond substrate for heat dissipation, engineers prefer a top-layer diamond structure for device heat dissipation. This is because when diamond is used as a substrate, multiple layers of material separate the diamond material from the heat source, resulting in less than ideal heat dissipation. Furthermore, due to the nature of the substrate structure, bottom-layer diamond heat dissipation only provides a single vertical heat dissipation channel. In contrast, the top-layer diamond structure is closer to the heat source and increases the heat dissipation channels on the upper layer of the device, making the heat distribution more uniform and achieving dual-path heat conduction. Therefore, the top-layer diamond heat dissipation can better alleviate the self-heating effect of the device.

[0006] Regarding the fabrication methods of diamond thin-film GaN HEMTs, the existing technology proposes the Diamond-before-gate concept, which advocates growing diamond before fabricating the gate. However, during the fabrication process of diamond thin-film GaN HEMT devices based on the Diamond-before-gate concept, imperfections in diamond fabrication technology (uniform diamond grain size) lead to problems such as SiN micromasks and diamond burrs during diamond etching. Furthermore, the F-based etching technique used can damage the device barrier layer, resulting in reduced performance in DC, high-frequency, and reliability aspects. Summary of the Invention

[0007] To address the aforementioned problems in the prior art, this invention provides a method for preparing GaN HEMT thin films based on hybrid etching.

[0008] The technical problem to be solved by this invention is achieved through the following technical solution:

[0009] A method for preparing GaN HEMT thin films based on hybrid etching, comprising:

[0010] Step 1: Sequentially grow a SiN dielectric layer, a diamond film, and a SiN hard mask on an AlGaN / GaN epitaxial wafer; the top layer of the AlGaN / GaN epitaxial wafer is an AlGaN barrier layer;

[0011] Step 2: The SiN hard mask and diamond film in the patterned area are etched alternately in a cyclic etching process; the patterned area includes the source region, drain region, gate region and mesa electrically isolated region;

[0012] Step 3: Use wet etching process to etch the SiN dielectric exposed in the patterned area to remove the SiN dielectric in the patterned area and etch away the remaining SiN hard mask.

[0013] Step 4: Fabricate device mesa isolation in the mesa electrical isolation region, and fabricate source and drain electrodes on the AlGaN barrier layers exposed in the source and drain regions, respectively;

[0014] Step 5: Fabricate the gate electrode on the exposed AlGaN barrier layer in the gate region;

[0015] In step three, the mixing concentration and immersion time of the etching solution are controlled to completely remove the remaining SiN hard mask and SiN dielectric in the patterned area; the etching solution includes a mixed solution of hydrofluoric acid, ammonium fluoride and water.

[0016] Optionally, controlling the mixing concentration and immersion time of the etching solution includes: controlling the volume ratio of hydrofluoric acid aqueous solution to ammonium fluoride aqueous solution, and controlling the immersion time according to the ratio of hydrogen ions and fluoride ions in the solution.

[0017] Optionally, the gate electrode is a metal stack structure composed of Ni and Au from bottom to top.

[0018] Optionally, both the source electrode and the drain electrode are metal stack structures composed of Ti, Al, Ni and Au from bottom to top.

[0019] Optionally, step two includes:

[0020] Source region, drain region, gate region and mesa isolation region are photolithographically etched on the SiN hard mask;

[0021] A mixture of CF4 and O2 gas was used as the reactive gas to etch the SiN hard mask in the source region, drain region, gate region and mesa isolation region, so that the diamond film in the patterned region was exposed.

[0022] O2 is used as the reactive gas to etch the diamond film in the patterned area, and the surface of the etched area is inspected after each etching. If there are diamond burrs on the surface of the etched area, the remaining SiN hard mask and diamond film in the patterned area are etched in a cycle. If there are no diamond burrs on the surface of the etched area, the cycle etching is ended, and the remaining diamond film in the patterned area is etched away until the SiN dielectric layer in the patterned area is completely exposed.

[0023] Optionally, step one includes:

[0024] A SiN dielectric layer with a thickness of 5 nm to 20 nm is grown on the AlGaN barrier layer.

[0025] A diamond film with a thickness of 1 μm to 5 μm is grown on the SiN dielectric layer.

[0026] A SiN hard mask with a thickness of 200 nm to 400 nm is grown on the diamond film.

[0027] The present invention provides a method for preparing GaN thin-film diamond HEMTs based on hybrid etching, employing a hybrid approach of cyclic etching and wet etching. First, a cyclic etching process is used to etch the SiN hard mask and diamond, removing the SiN micromask and diamond burrs to obtain a smooth dielectric surface. Then, a wet etching process is used to perform pure chemical etching on the SiN dielectric layer beneath the diamond. By controlling the mixing concentration and immersion time of the etching solution, more precise contact between the etching solution and the SiN dielectric can be achieved, resulting in a stable chemical reaction rate. This allows for the rapid and effective etching away of the SiN dielectric, while simultaneously removing any remaining SiN hard mask. Furthermore, using an etching solution to etch the SiN dielectric allows for immediate stopping of etching after the current SiN dielectric is etched, ensuring complete removal of the SiN dielectric with minimal impact on the underlying AlGaN barrier layer. Furthermore, the etching solution used in this invention to etch the SiN dielectric layer includes a mixed solution of hydrofluoric acid, ammonium fluoride, and water, which reacts only with Si elements, thus further protecting the AlGaN barrier layer from damage.

[0028] The present invention will now be described in further detail with reference to the accompanying drawings. Attached Figure Description

[0029] Figure 1(a) is a schematic diagram of the structure of a diamond thin film GaN HEMT device;

[0030] Figure 1(b) is a flowchart of a method for preparing a diamond thin film GaN HEMT based on hybrid etching according to an embodiment of the present invention;

[0031] Figures 2(a) to 2(e) These are the effect diagrams of each step in the method shown in Figure 1(b). Detailed Implementation

[0032] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0033] In the process of developing this invention, the inventors discovered that the main reason for the weak performance of existing diamond thin-film GaN HEMT devices in terms of DC, high frequency, and reliability lies in diamond burrs and damage to the AlGaN barrier layer. Specifically, Figure 1(a) shows a schematic diagram of a diamond thin-film GaN HEMT device; there is a SiN dielectric layer between the diamond thin film and the underlying AlGaN barrier layer. During the fabrication of the source, drain, and gate regions of the device, the diamond and SiN dielectric in the source, drain, and gate regions need to be etched away. During the etching of the diamond thin film, a SiN hard mask needs to be grown on top of the diamond thin film to protect the diamond in other areas that do not need to be etched. Therefore, before patterning the diamond thin film, the SiN hard mask covering the diamond in the patterned area needs to be etched away first. Due to the high roughness of diamond and the overlapping structure between its grains, the diamond surface grown during the diamond thin film growth process is uneven. During the etching of SiN hard masks, the uneven surface of the diamond prevents some SiN hard mask from being completely etched away, thus protecting the underlying diamond. This results in diamond burrs being formed as the diamond burrs remain hidden beneath the hard mask during the etching process. Consequently, when the SiN dielectric layer is subsequently etched using a mixture of CF4 (tetrafluoromethane) and O2 (oxygen) for ICP etching, the SiN dielectric covered by these diamond burrs cannot directly contact the reactive gas and cannot be completely removed, affecting the subsequent deposition of source, drain, and gate metals.

[0034] Understandably, the deposition of source and drain electrodes on the AlGaN barrier layer forms ohmic contacts, while the deposition of gate metal on the AlGaN barrier layer forms Schottky contacts, thus generating a two-dimensional electron gas beneath the AlGaN barrier layer. This two-dimensional electron gas is a key reason why HEMT devices outperform other devices. Therefore, the presence of diamond burrs deteriorates both the ohmic and Schottky contacts, resulting in reduced heat dissipation performance and ultimately weakened DC and high-frequency performance.

[0035] Furthermore, to achieve effective etching, the ICP etching process typically involves an over-etching of the reactive gas (usually 50%). Therefore, during ICP etching of the SiN dielectric layer beneath the diamond film, this over-etching causes CF4 to be injected into the AlGaN barrier layer in the form of F-, corroding the AlGaN barrier layer, affecting the device's transconductance, and leading to a decrease in gate control capability. Simultaneously, it causes positive threshold voltage drift. Reduced transconductance weakens the device's control over the channel current, increases the gate reverse current, and lowers the gate forward turn-on voltage. This allows electrons to flow out of the gate when a large positive voltage is applied, causing device failure. Decreased gate control capability results in reduced output current, increased knee voltage, and reduced output power, severely impacting the device's DC high-frequency characteristics, causing current collapse, and degrading the device's DC and power characteristics.

[0036] Therefore, to solve the above problems, this invention provides a method for preparing GaN HEMT thin films based on hybrid etching. Referring to Figure 1(b), the method includes the following steps:

[0037] Step 1: A SiN dielectric layer, a diamond film, and a SiN hard mask are sequentially grown on the AlGaN / GaN epitaxial wafer; the top layer of the AlGaN / GaN epitaxial wafer is an AlGaN barrier layer.

[0038] Referring to Figure 2(a), step one specifically includes:

[0039] (1) A SiN dielectric layer is grown on the AlGaN barrier layer, and the thickness of the SiN dielectric layer is preferably 5nm to 20nm.

[0040] Specifically, a 5nm to 20nm thick SiN dielectric layer is grown on the AlGaN barrier layer using PECVD (Plasma Enhanced Chemical Vapor Deposition) technology. The growth process conditions include: using NH3 (ammonia) and SiH4 (silane) as reaction gases, a substrate temperature of 200℃ to 300℃, a reaction chamber pressure of 600mTorr to 800mTorr, and an RF power of 20W to 22W.

[0041] (2) A diamond film is grown on the SiN dielectric layer, wherein the thickness of the diamond film is preferably 1 μm to 5 μm.

[0042] Specifically, a seed crystal is spin-coated onto the SiN dielectric layer as a diamond nucleation layer. Then, a diamond layer with a thickness of 1 μm to 5 μm is grown using MPCVD (Microwave Plasma Chemical Vapor Deposition). During growth, CH4 with a volume concentration of 0.2% to 0.4% is used as the carbon source, diluted with H2. The growth process parameters include: gas pressure 20 torr to 30 torr, total gas flow rate 400 sccm to 500 sccm, microwave power 700 W to 800 W, and substrate temperature 700℃ to 1000℃.

[0043] (3) A SiN hard mask is grown on a diamond film, wherein the thickness of the SiN hard mask is preferably 200 nm to 400 nm.

[0044] Specifically, a SiN layer with a thickness of 200nm to 400nm is grown on the surface of a diamond film using PECVD technology as a SiN hard mask. The growth process conditions include: using NH3 and SiH4 as reaction gases, substrate temperature of 200℃ to 300℃, reaction chamber pressure of 600mTorr to 800mTorr, and RF power of 20W to 22W.

[0045] In addition, before step (1) above, the AlGaN / GaN epitaxial wafer can be cleaned first. The specific cleaning process includes: first, immersing the AlGaN / GaN epitaxial wafer in acetone solution for ultrasonic cleaning for 3 min to 5 min, with an ultrasonic intensity not exceeding 2.5; then, immersing the AlGaN / GaN epitaxial wafer in a stripping solution at a temperature of 50℃ to 60℃ for 3 min to 5 min; next, immersing the AlGaN / GaN epitaxial wafer in acetone solution and ethanol solution in sequence for ultrasonic cleaning for 3 min to 5 min, with an ultrasonic intensity not exceeding 2.5; finally, rinsing the AlGaN / GaN epitaxial wafer with ultrapure water and drying it with nitrogen gas.

[0046] Step 2: The SiN hard mask and diamond film in the patterned area are etched alternately in a cyclic etching process; the patterned area includes the source region, drain region, gate region and mesa electrically isolated region.

[0047] Specifically, the source region, drain region, gate region, and mesa isolation region are photolithographically etched on the SiN hard mask. A mixture of CF4 and O2 gas is used as the reactive gas for ICP etching of the SiN hard mask within the source region, drain region, gate region, and mesa isolation region, exposing the diamond film within the patterned area. O2 is used as the reactive gas for ICP etching of the diamond film within the patterned area, and the surface of the etched area is inspected after each etching cycle. If diamond burrs are present on the surface of the etched area, the remaining SiN hard mask and diamond film within the patterned area are etched repeatedly. If there are no diamond burrs on the surface of the etched area, the cyclic etching is stopped, and the remaining diamond film within the patterned area is etched away until the SiN dielectric layer of the patterned area is completely exposed.

[0048] In the photolithography process, the source region, drain region, gate region, and mesa electrically isolated region are lithographically lithographically separated. The specific process of each photolithography step includes: first, baking the current sample on a hot plate at 200°C for 3 to 5 minutes; then, applying and spinning the photoresist, with a spinning thickness of 0.70 μm to 0.80 μm, and baking the sample on a hot plate at 90°C for 1 to 2 minutes; placing the sample with the completed photoresist coating and spinning into the photolithography machine to expose the photoresist on the area to be lithographically lithographically oriented; placing the exposed sample in the developer to remove the photoresist on the hard mask corresponding to that area, and rinsing the sample with ultrapure water and drying it with nitrogen to expose the SiN hard mask in that area.

[0049] The SiN hard mask etching process for the patterned area specifically includes: using a mixture of CF4 and O2 as the reactive gas, performing ICP etching on the SiN hard mask after photolithography exposure and development, thereby revealing the diamond in the source region, drain region, gate region, and mesa electrically isolated region. The ICP etching process conditions include: upper power 80W–100W, lower power 5W–15W, bias voltage 40V–50V, He drain 3–5, pressure 5mTorr–10mTorr, and reactive gas flow rate 30sccm–40sccm, or 5sccm–15sccm.

[0050] After etching the SiN hard mask, SiN residue will remain, and the residual SiN will form a SiN micromask on the diamond heat dissipation layer.

[0051] The diamond cyclic etching process in the patterned area includes: etching the exposed diamond film using ICP etching technology in a room temperature O2 environment. The etching conditions are: upper power 800-900W, lower power 50-60W, self-bias voltage 60-70V, O2 flow rate 40-50sccm, pressure 5-10mTorr, and etching time 2-3 minutes.

[0052] Since the morphologies of diamond and SiN micromasks differ under a microscope, the surface of the etched area is observed under a microscope after each diamond etching step. If SiN residue remains in the etched area, it indicates that the residual SiN will form the diamond micromask, resulting in diamond burrs. In this case, the SiN micromask and diamond heat dissipation layer need to be etched repeatedly until the SiN is completely removed. If no SiN residue remains on the surface of the etched area, the etching cycle ends. To ensure complete removal of the SiN micromask and diamond burrs, 1-2 etching cycles are typically required.

[0053] During the cyclic etching, the SiN micromask was etched again using an F-based process. The etching conditions were as follows: CF4 / O2 as the reactant gas, upper power of 80-100W, lower power of 5-15W, bias voltage of 40-50V, He gas flow rate of 3-5 sccm, pressure of 5-10 mTorr, CF4 gas flow rate of 30-40 sccm, and O2 gas flow rate of 5-15 sccm. The etching conditions for diamond were as described above.

[0054] Residual diamond film etching: The exposed diamond film was etched using ICP etching at room temperature under O2 conditions. The etching conditions were: upper power 800-900W, lower power 50-60W, self-bias voltage 60-70V, O2 flow rate 40-50sccm, pressure 5-10mTorr, and etching time 2-3 minutes.

[0055] Specifically, after the etching cycle ends, the exposed surface in the etched area may be a diamond surface or a dielectric layer surface. If it is a diamond surface, the remaining diamond heat dissipation layer is etched away.

[0056] Figure 2(b) shows the result after performing step two, where the diamond burrs and SiN hard mask in the patterned area have been completely removed.

[0057] Step 3: Use a wet etching process to etch the SiN dielectric exposed in the patterned area, remove the SiN dielectric in the patterned area, and etch away the remaining SiN hard mask.

[0058] In this step, the mixing concentration and immersion time of the etching solution are controlled to completely remove the remaining SiN hard mask and SiN dielectric in the patterned area; the etching solution includes a mixed solution of hydrofluoric acid, ammonium fluoride and water.

[0059] It is understandable that controlling the mixing concentration and immersion time of the etching solution mentioned here includes controlling the volume ratio of hydrofluoric acid aqueous solution to ammonium fluoride aqueous solution, and controlling the immersion time according to the ratio of hydrogen ions and fluoride ions in the solution. The concentration of the mixed solution can be appropriately increased according to the thickness of the SiN protective layer. Throughout the etching process, the etching rate can be adjusted according to the fluoride ion concentration in the solution to completely remove the remaining SiN hard mask and the SiN protective layer in the patterned area.

[0060] In addition, by using a wet etching process to remove the remaining SiN hard mask, the diamond film on top of the device can be directly exposed to the outside air, which enhances the cooling effect and alleviates the performance degradation caused by the device's self-heating effect.

[0061] Figure 2(c) shows the result after performing step three, from which it can be seen that the SiN hard mask and the SiN dielectric in the patterned area have been etched clean.

[0062] Step 4: Fabricate device mesa isolation in the mesa electrical isolation region, and fabricate source and drain electrodes on the AlGaN barrier layers exposed in the source and drain regions, respectively.

[0063] The fabrication of devices in the mesa electrically isolated region mainly includes two sub-steps: mesa photolithography and mesa etching.

[0064] Mesa lithography: First, bake the sample on a hot plate at 200°C for 3 to 5 minutes; then, apply and spin-dry the photoresist to a thickness of 0.70 μm to 0.80 μm, and bake the sample on a hot plate at 90°C for 1 to 2 minutes; then, expose the sample to the photoresist in the lithography machine; after exposure, immerse the sample in the developer to remove the photoresist in the mesa electrical isolation area, and then rinse the sample with ultrapure water and dry it with nitrogen.

[0065] Mesa etching: A mixture of BCl3 (boron trichloride) and Cl2 (chlorine) was used as the reactant gas to perform ICP etching on the AlGaN barrier layer in the mesa electrically isolated region and the GaN buffer layer in the upper half of the device. The ICP etching process conditions included: ICP top power 40W-60W, bottom power 5-20W, He drain 6-8, bias voltage 204V, gas flow rate 15sccm-20sccm or 5sccm-20sccm, and pressure 5mTorr. After ICP etching, the sample was sequentially immersed in acetone solution, stripping solution, acetone solution, and ethanol solution for cleaning to remove residual photoresist; finally, the sample was rinsed with ultrapure water and dried with nitrogen.

[0066] In addition, both the source and drain electrodes are metal stack structures composed of Ti, Al, Ni, and Au from bottom to top.

[0067] In practice, the process of fabricating source and drain electrodes mainly includes three sub-steps: source / drain region photolithography, ohmic metal evaporation, and annealing, as shown below:

[0068] Source / drain region photolithography: First, bake the current sample on a hot plate at 200℃ for 3-5 minutes; then, apply and spin-dry the release agent to a thickness of 0.30μm-0.40μm, and bake the sample on a hot plate at 200℃ for 3-5 minutes; apply and spin-dry the photoresist onto the release agent to a thickness of 0.70μm-0.80μm, and bake the sample on a hot plate at 90℃ for 1-2 minutes; place the sample with the completed coating and spin-drying into the photolithography machine to expose the photoresist in the source and drain regions; place the exposed sample in the developing solution to remove the photoresist and release agent in the source and drain regions, and rinse the sample with ultrapure water and dry it with nitrogen.

[0069] Ohmic metal evaporation: First, the sample after photolithography exposure and development of the source and drain areas is placed in a plasma stripper for bottom film treatment, which takes 3 to 5 minutes. Then, the sample is placed in an electron beam evaporation stage, and the vacuum degree of the reaction chamber of the electron beam evaporation stage reaches 2 × 10⁻⁶. -6 Following the torsion process, ohmic metals are evaporated onto the SiN dielectric layer within the source and drain regions, as well as onto the photoresist outside the source and drain regions. Specifically, Ti, Al, Ni, and Au are evaporated sequentially from bottom to top to form a metal stack structure. Next, the sample after ohmic metal evaporation is stripped to remove the ohmic metals, photoresist, and release adhesive outside the source and drain regions. Finally, the sample is rinsed with ultrapure water and dried with nitrogen gas.

[0070] Annealing: The sample after ohmic metal evaporation and stripping is placed in a rapid thermal annealing furnace for annealing treatment, so that the ohmic metal in the source and drain regions sinks to the GaN buffer layer of the epitaxial wafer, thereby forming an ohmic contact between the ohmic metal and the heterojunction channel. The annealing process conditions include: annealing atmosphere is N2 (nitrogen), annealing temperature is 800℃~850℃, and annealing time is 30s~50s.

[0071] Figure 2(d) shows a schematic diagram of performing step four, where “source” represents the source electrode and “drain” represents the drain electrode.

[0072] Step 5: Fabricate the gate electrode on the AlGaN barrier layer exposed in the gate region.

[0073] Here, the gate electrode is a metal stack structure composed of Ni and Au from bottom to top.

[0074] In practice, the process of fabricating gate electrodes mainly includes two sub-processes: gate region photolithography and gate metal evaporation, as shown below:

[0075] Gate area photolithography: First, bake the sample on a hot plate at 200℃ for 3-5 minutes. Then, apply and spin-spray the release agent to a thickness of 0.30μm-0.40μm, and bake the sample on a hot plate at 200℃ for 3-5 minutes. Apply and spin-spray the photoresist onto the release agent to a thickness of 0.70μm-0.80μm, and bake the sample on a hot plate at 90℃ for 1-2 minutes. Place the coated and spin-sprayed sample into the photolithography machine to expose the photoresist in the gate area. Place the exposed sample in the developer to remove the photoresist and release agent in the gate area, and rinse the sample with ultrapure water and dry it with nitrogen.

[0076] Evaporation of gate metal: First, the sample after photolithography exposure and development of the gate area is placed in a plasma resist stripper for bottom film treatment, which takes 3 to 5 minutes; then, the sample is placed in an electron beam evaporation stage, and the vacuum degree of the reaction chamber of the electron beam evaporation stage reaches 2 × 10⁻⁶. -6 After Torr, the gate metal is evaporated on the photoresist inside and outside the gate region, that is, the Ni and Au double-layer metals are evaporated sequentially from bottom to top to form a metal stack structure. Next, the sample after the gate metal evaporation is completed is stripped to remove the gate metal, photoresist and stripping adhesive outside the gate region. Finally, the sample is rinsed with ultrapure water and dried with nitrogen.

[0077] Figure 2(e) shows the result after performing step seven, where “gate” represents the gate electrode.

[0078] The present invention provides a method for preparing GaN thin-film diamond HEMTs based on hybrid etching, employing a hybrid approach of cyclic etching and wet etching. First, a cyclic etching process is used to etch the SiN hard mask and diamond, removing the SiN micromask and diamond burrs to obtain a smooth dielectric surface. Then, a wet etching process is used to perform pure chemical etching on the SiN dielectric layer beneath the diamond. By controlling the concentration and immersion time of the etching solution, the reaction between the etching solution and the SiN dielectric can be made more complete and the chemical reaction rate more stable, allowing for rapid and effective etching away of the SiN dielectric while simultaneously removing any remaining SiN hard mask. Furthermore, using an etching solution to etch the SiN dielectric allows etching to be stopped immediately after the current SiN dielectric is etched, ensuring complete removal of the SiN dielectric with minimal impact on the underlying AlGaN barrier layer. Furthermore, the etching solution used in this invention to etch the SiN dielectric layer includes a mixed solution of hydrofluoric acid, ammonium fluoride, and water, which reacts only with Si elements, thus further protecting the AlGaN barrier layer from damage.

[0079] In stark contrast to the embodiments of this invention, the prior art typically employs F-based etching for ICP etching of the SiN dielectric layer, that is, using a mixture of CF4 and O2 reactive gases to perform ICP etching on the SiN dielectric. Furthermore, during the F-based etching process, to ensure etching effectiveness, an excess of the reactive gases (CF4 and O2) is often added, causing CF4 to be injected into the AlGaN barrier layer in the form of F-.

[0080] Therefore, the embodiments of the present invention not only solve the problems of SiN micromask and diamond burrs, but also avoid damage to the AlGaN barrier layer, thus ensuring the electrical characteristics of the device such as transconductance and threshold voltage.

[0081] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0082] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings and the disclosure, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the description of this invention, the word "comprising" does not exclude other components or steps, "a" or "an" does not exclude a plurality, and "a plurality" means two or more, unless otherwise explicitly specified. Furthermore, while different embodiments may describe certain measures, this does not mean that these measures cannot be combined to produce good results.

[0083] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0084] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0085] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method for preparing GaN thin film HEMT based on hybrid etching, characterized in that, include: Step 1: Sequentially grow a SiN dielectric layer, a diamond film, and a SiN hard mask on an AlGaN / GaN epitaxial wafer; the top layer of the AlGaN / GaN epitaxial wafer is an AlGaN barrier layer; Step 2: A cyclic etching process is used to alternately etch the SiN hard mask and diamond film within the patterned area. The patterned area includes a source region, a drain region, a gate region, and a mesa-isolated region. Step 2 includes: photolithographically etching the source region, drain region, gate region, and mesa-isolated region onto the SiN hard mask; using a mixture of CF4 and O2 as the reactive gas to etch the SiN hard mask within the source region, drain region, gate region, and mesa-isolated region, exposing the diamond film within the patterned area; using O2 as the reactive gas to etch the diamond film within the patterned area, and inspecting the surface of the etched area after each etching step; if diamond burrs are present on the surface of the etched area, the remaining SiN hard mask and diamond film within the patterned area are cyclically etched; if there are no diamond burrs on the surface of the etched area, the cyclic etching is terminated, and the remaining diamond film within the patterned area is etched away until the SiN dielectric layer of the patterned area is completely exposed. Step 3: Use wet etching process to etch the SiN dielectric exposed in the patterned area to remove the SiN dielectric in the patterned area and etch away the remaining SiN hard mask. Step 4: Fabricate device mesa isolation in the mesa electrical isolation region, and fabricate source and drain electrodes on the AlGaN barrier layers exposed in the source and drain regions, respectively; Step 5: Fabricate the gate electrode on the exposed AlGaN barrier layer in the gate region; In step three, the mixing concentration and immersion time of the etching solution are controlled to completely remove the remaining SiN hard mask and SiN dielectric in the patterned area. The etching solution includes a mixed solution of hydrofluoric acid, ammonium fluoride and water. Controlling the mixing concentration and immersion time of the etching solution includes controlling the volume ratio of hydrofluoric acid aqueous solution to ammonium fluoride aqueous solution and controlling the immersion time according to the ratio of hydrogen ions and fluoride ions in the solution.

2. The method for preparing GaN HEMT thin films based on hybrid etching according to claim 1, characterized in that, The gate electrode is a metal stack structure composed of Ni and Au from bottom to top.

3. The method for preparing GaN HEMT thin films based on hybrid etching according to claim 1, characterized in that, Both the source electrode and the drain electrode are metal stack structures composed of Ti, Al, Ni and Au from bottom to top.

4. The method for preparing GaN HEMT thin films based on hybrid etching according to claim 1, characterized in that, Step one includes: A SiN dielectric layer with a thickness of 5 nm to 20 nm is grown on the AlGaN barrier layer. A diamond film with a thickness of 1 μm to 5 μm is grown on the SiN dielectric layer. A SiN hard mask with a thickness of 200 nm to 400 nm is grown on the diamond film.

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