Display panel and display device

Abstract

The embodiment of the present invention discloses a display panel and a display device, the display panel includes a pixel driving circuit and a light-emitting element; the pixel driving circuit includes a driving transistor, a data writing module and an adjustment module; the driving transistor is configured to provide a driving current to the light-emitting element; the data writing module is electrically connected to the first pole of the driving transistor, and is configured to write a data signal to the gate of the driving transistor in the data writing stage; the adjustment module is electrically connected to the first pole of the driving transistor, and is configured to write an adjustment signal to the first pole of the driving transistor in the first adjustment signal writing stage before the data writing stage of the same display frame; and / or, the adjustment module is electrically connected to the second pole of the driving transistor, and is configured to write an adjustment signal to the second pole of the driving transistor in the first adjustment signal writing stage. The technical solution provided by the embodiment of the present invention can solve the problem of afterimages that may exist in the display panel when the screen is switched.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the continuous development of display panel technology, Organic Light-Emitting Diode (OLED) display panels have gradually entered the market. OLED display panels have the advantages of low energy consumption, self-luminescence, wide viewing angle, fast response speed, and easy application to flexible display technology.

[0003] However, OLED display panels usually have an afterimage problem when switching between screens. This problem is more serious when the previous screen lasts for a long time, affecting the display effect of the display panel. Summary of the invention

[0004] Embodiments of the present invention provide a display panel and a display device, which improve the stability of the transfer characteristic curve of a driving transistor under various operating voltages and reduce the influence on the data signal written to the gate of the driving transistor, so as to solve the afterimage problem of screen switching in the display panel in the prior art.

[0005] In a first aspect, an embodiment of the present invention provides a display panel, including a pixel driving circuit and a light-emitting element;

[0006] The pixel driving circuit includes a driving transistor, a data writing module and a regulating module; the driving transistor is configured to provide a driving current to the light emitting element; the data writing module is electrically connected to the first electrode of the driving transistor and is configured to write a data signal to the gate of the driving transistor in a data writing phase;

[0007] The regulating module is electrically connected to the first electrode of the driving transistor and is configured to write a regulating signal to the first electrode of the driving transistor at least in a first regulating signal writing phase before a data writing phase of the same display frame; and / or,

[0008] The regulating module is electrically connected to the second electrode of the driving transistor, and is configured to write the regulating signal into the second electrode of the driving transistor during the first regulating signal writing phase.

[0009] In a second aspect, an embodiment of the present invention provides a display device, comprising the display panel described in the first aspect.

[0010] An embodiment of the present invention provides a display panel, wherein a pixel driving circuit includes an adjustment module, wherein in a first adjustment signal writing phase before a data writing phase, the adjustment module is configured to write an adjustment signal to a first electrode of a driving transistor and / or a second electrode of the driving transistor, and by writing the adjustment signal, a transfer characteristic curve of the driving transistor can be adjusted to improve the stability of the transfer characteristic curve of the driving transistor under various operating voltages. In the first adjustment signal writing phase before the data writing phase, the adjustment signal written to the first electrode of the driving transistor and / or the second electrode of the driving transistor by the adjustment module will not affect the data signal written to the gate of the driving transistor thereafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0012] Figure 1 A schematic diagram of a circuit structure of a pixel driving circuit provided by an embodiment of the present invention;

[0013] Figure 2 A schematic diagram of the circuit structure of another pixel driving circuit provided by an embodiment of the present invention;

[0014] Figure 3 A schematic diagram of a transfer characteristic curve of a driving transistor provided by an embodiment of the present invention;

[0015] Figure 4 A driving timing diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0016] Figure 5 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0017] Figure 6 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0018] Figure 7 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0019] Figure 8 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0020] Fig. 9 A schematic diagram of the circuit structure of another pixel driving circuit provided by an embodiment of the present invention;

[0021] Fig.10 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0022] Fig.11 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0023] Fig.12 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0024] Fig.13 A top view of a display panel provided by an embodiment of the present invention;

[0025] Fig.14 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0027] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a system, product or device comprising a series of units is not necessarily limited to those steps or units clearly listed, but may include other units that are not clearly listed or inherent to these products or devices.

[0028] Figure 1 A schematic diagram of a circuit structure of a pixel driving circuit provided by an embodiment of the present invention, Figure 2 A schematic diagram of the circuit structure of another pixel driving circuit provided by an embodiment of the present invention is shown. Figure 3 A schematic diagram of a transfer characteristic curve of a driving transistor provided in an embodiment of the present invention, Figure 4 A driving timing diagram of a pixel driving circuit provided by an embodiment of the present invention, referring to Figures 1 to 4As shown, an embodiment of the present invention provides a display panel 10, which includes a pixel driving circuit 100 and a light-emitting element 200. The pixel driving circuit 100 includes a driving transistor M0, a data writing module 110 and an adjustment module 120. The driving transistor M0 is configured to provide a driving current to the light-emitting element 200. The data writing module 110 is electrically connected to the first pole of the driving transistor 200, and is configured to write a data signal to the gate of the driving transistor M0 in the data writing phase T2. The adjustment module 120 is electrically connected to the first pole of the driving transistor M0, and is configured to write an adjustment signal to the first pole of the driving transistor M0 in the first adjustment signal writing phase T31 before the data writing phase T2 of the same display frame T. And / or, the adjustment module 120 is electrically connected to the second pole of the driving transistor M0, and is configured to write an adjustment signal to the second pole of the driving transistor M0 in the first adjustment signal writing phase T31.

[0029] refer to Figure 1 and Figure 2 , the gate of the driving transistor M0 is connected to the first node N1, the second end of the data writing module 110 and the first electrode of the driving transistor M0 are both connected to the second node N2, and the second electrode of the driving transistor M0 is connected to the third node N3. In one embodiment, the regulating module 120 can be connected to the second node N2 to apply a regulating signal to the second node N2; in another embodiment, the regulating module 120 can be connected to the third node N3 to apply a regulating signal to the third node N3; in another embodiment, the same regulating module 120 is connected to both the second node N2 and the third node N3 to apply a regulating signal to the second node N2 and the third node N3; in another embodiment, two regulating modules 120 are provided, one regulating module 120 is connected to the second node N2, and the other regulating module 120 is connected to the third node N3, and the two regulating modules 120 apply regulating signals to the second node N2 and the third node N3 respectively, and the regulating signals applied by the two regulating modules 120 to the second node N2 and the third node N3 respectively can be the same or different.

[0030] If necessary, Figure 1 and Figure 2 The display panel 10 shown only illustrates the pixel driving circuit 100 and the light emitting element 200, and the display panel 10 may also include other known structures, such as a substrate. The display panel 10 may include a plurality of light emitting elements 200 arranged in rows and columns, so that the display of a preset pattern can be achieved by controlling the light emitting brightness of each light emitting element 200.

[0031] refer to Figure 3As shown, the horizontal axis is the grayscale value, and the vertical axis is the driving current Ids. a2 is the transfer characteristic curve of the driving transistor M0 at the grayscale of 127, and the figure only takes the grayscale of 127 as an example. The adjustment signal written by the adjustment module 120 can pull or change the transfer characteristic curve at the position of a1 or a3, so that the transfer characteristic curve at the position of a1 or a3 is shifted to a2, thereby ensuring the stability of the transfer characteristic curve of the driving transistor M0 at various operating voltages, thereby avoiding the display afterimage of the display panel 10, and ensuring the display effect of the display panel 10.

[0032] refer to Figure 4 As shown, in the same display frame, the first adjustment signal writing stage T31 is located before the data writing stage T2 in timing, and the adjustment module 120 first writes the adjustment signal to the first electrode of the driving transistor M0 and / or the second electrode of the driving transistor M0, and then the data writing module 110 writes the data signal to the gate of the driving transistor M0. After the data signal is written to the gate of the driving transistor M0, the adjustment module 120 can be in a closed state. When the adjustment module 120 is in a closed state, the adjustment signal at the input end of the adjustment module 120 and the first node N1 are closed (or called cut-off) to reduce or even avoid the leakage current of the adjustment signal to the first node N1, thereby improving the voltage stability of the first node N1.

[0033] The embodiment of the present invention provides a display panel 10, the pixel driving circuit 100 includes an adjustment module 120, and in the first adjustment signal writing stage T31 before the data writing stage T2, the adjustment module 120 is configured to write an adjustment signal to the first pole of the driving transistor M0 and / or the second pole of the driving transistor M0. By writing the adjustment signal, the transfer characteristic curve of the driving transistor M0 can be adjusted to improve the stability of the transfer characteristic curve of the driving transistor M0 under various operating voltages. In the first adjustment signal writing stage T31 before the data writing stage T2, the adjustment signal written to the first pole of the driving transistor M0 and / or the second pole of the driving transistor M0 by the adjustment module 120 will not affect the data signal written to the gate of the driving transistor M0 thereafter.

[0034] refer to Figure 1 , Figure 2 and Figure 4As shown, the pixel driving circuit 100 further includes a first reset transistor M1, a gate of the first reset transistor M1 receives the first scanning signal SCN(n-1), a first electrode of the first reset transistor M1 is electrically connected to the first reset terminal Vref1, and a second electrode of the first reset transistor M1 is electrically connected to the anode of the light-emitting element 200. The first reset transistor M1 is turned on under the control of the enable segment of the first scanning signal SCN(n-1), and transmits the first reset voltage of the first reset terminal Vref1 to the anode of the light-emitting element 200, thereby resetting the anode of the light-emitting element 200. In the same display frame T, the first adjustment signal writing phase T31 overlaps with the enable segment of the first scanning signal SCN(n-1).

[0035] For example, reference Figure 1 , Figure 2 and Figure 4 As shown, the pixel driving circuit 100 also includes a second reset transistor M2, and the gate of the second reset transistor M2 receives the second scanning signal SCP(n-1). The first electrode of the second reset transistor M2 is electrically connected to the second reset terminal Vref2, and the second electrode of the second reset transistor M2 is electrically connected to the gate of the driving transistor M0. The second reset transistor M2 is turned on under the control of the enable segment of the second scanning signal SCP(n-1), and the second reset voltage of the second reset terminal Vref2 is transmitted to the first node N1, so as to reset the gate of the driving transistor M0. In the same display frame T, the enable segment of the second scanning signal SCP(n-1) is located within the enable segment of the first scanning signal SCN(n-1), and the first adjustment signal writing stage T31 overlaps with the enable segment of the second scanning signal SCP(n-1). Therefore, the first adjustment signal writing stage T31 overlaps with both the enable segment of the second scanning signal SCP(n-1) and the enable segment of the first scanning signal SCN(n-1).

[0036] Figure 5 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention, Figure 6 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention is shown in FIG. Figures 1 to 6 As shown, reference Figure 1 , Figure 2 , Figure 5 and Figure 6As shown, in the same display frame T, the enable segment of the second scanning signal SCP(n-1) is located within the enable segment of the first scanning signal SCN(n-1), and the first adjustment signal writing stage T31 does not overlap with the enable segment of the second scanning signal SCP(n-1). The first adjustment signal writing stage T31 overlaps with the time period within the enable segment of the first scanning signal SCN(n-1) and outside the enable segment of the second scanning signal SCP(n-1). Therefore, by not overlapping the enable segment of the second scanning signal SCP(n-1) during the first adjustment signal writing stage T31, when the second reset transistor M2 is turned on and resets the gate of the driving transistor M0, the adjustment module 120 does not write the adjustment signal, which can avoid affecting the voltage of the first node N1, improve the working stability of the pixel driving circuit 100, and ensure the stable light emission of the light-emitting element 200.

[0037] Figure 7 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention is shown in FIG. Figure 1 , Figure 2 and Figure 7 As shown, the pixel driving circuit 10 further includes a first reset transistor M1, the gate of the first reset transistor M1 receives the first scanning signal SCN(n-1), the first electrode of the first reset transistor M1 is electrically connected to the first reset terminal Vref1, and the second electrode of the first reset transistor M1 is electrically connected to the anode of the light-emitting element 200. In the same display frame T, the first adjustment signal writing stage T31 is located before the enabling segment of the first scanning signal SCN(n-1). The first adjustment signal writing stage T31 does not overlap with the enabling segment of the first scanning signal SCN(n-1). When the first reset transistor M1 is turned on and resets the anode of the light-emitting element 200, the adjustment module 120 does not write the adjustment signal, which can avoid affecting the voltage of the anode of the light-emitting element 200, improve the working stability of the pixel driving circuit 100, and ensure the stable light emission of the light-emitting element 200.

[0038] Continue to refer Figure 1 , Figure 2 , Figures 4 to 7As shown, the pixel driving circuit 10 further includes a threshold compensation transistor M3. The gate of the threshold compensation transistor M3 receives the third scanning signal SCN(n), and the first electrode of the threshold compensation transistor M3 is electrically connected to the gate of the driving transistor M0, that is, the first electrode of the threshold compensation transistor M3 is connected to the first node N1. The second electrode of the threshold compensation transistor M3 is electrically connected to the second electrode of the driving transistor M0, that is, the second electrode of the threshold compensation transistor M3 is connected to the third node N3. The data writing stage T2 is located in the enabling section of the third scanning signal SCN(n), so that when the enabling section of the third scanning signal SCN(n) controls the threshold compensation transistor M3 to be turned on, in the data writing stage T2, the data writing module 110 can write a data signal to the first electrode of the driving transistor M0, and the data signal is transmitted to the second electrode of the driving transistor M0 after passing through the turned-on driving transistor M0, and then transmitted to the gate of the driving transistor M0 through the turned-on threshold compensation transistor M3, completing the process of writing the data signal to the gate of the driving transistor M0. The first adjustment signal writing stage T31 is located before the enabling section of the third scanning signal SCN(n). The first adjustment signal writing phase T31 does not overlap with the enabling segment of the third scanning signal SCN(n). When the adjustment module 120 writes the adjustment signal to the third node N3, the threshold compensation transistor M3 is turned off (or called cut-off), and will not be written to the first node N1, which can avoid affecting the voltage of the first node N1, ensure the stability of the pixel driving circuit 100, and ensure the stable light emission of the light emitting element 200.

[0039] Continue to refer Figure 1 , Figure 2 , Figures 4 to 7 As shown, the pixel driving circuit 10 also includes a light emitting control transistor M4. The gate of the light emitting control transistor M4 receives the light emitting control signal EM(n), the first electrode of the light emitting control transistor M4 is electrically connected to the second electrode of the driving transistor M0, and the second electrode of the light emitting control transistor M4 is electrically connected to the anode of the light emitting element 200. The first adjustment signal writing stage T31 and the data writing stage T2 are both located in the non-enable segment of the light emitting control signal EM(n). The enabling segment of the light emitting control signal EM(n) is after the non-enable segment of the light emitting control signal EM(n), that is, after the first adjustment signal writing stage T31 and the data writing stage T2. Therefore, before controlling the light emitting element 200 to emit light, the transfer characteristic curve of the driving transistor M0 is first adjusted in the first adjustment signal writing stage T31 to improve the stability of the transfer characteristic curve of the driving transistor M0 under various operating voltages. And before controlling the light emitting element 200 to emit light, the data signal is written to the gate of the driving transistor M0 to control the light emitting brightness of the light emitting element 200.

[0040] The first electrode of the light emitting control transistor M4 is connected to the third node N3, and the second electrode of the light emitting control transistor M4 is electrically connected to the anode of the light emitting element 200. When the light emitting control transistor M4 is turned on by the enable segment of the light emitting control signal EM(n), the driving transistor M0 drives the light emitting element 200 to emit light.

[0041] For example, reference Figure 7 The driving timing of the pixel driving circuit also includes a reset phase T1, which corresponds to the enabling segment of the second scanning signal SCP(n-1). In the same display frame T, the reset phase T1 is located before the data writing phase T2, and the reset phase T1 is located in the non-enabling segment of the light emitting control signal EM(n).

[0042] For example, if the transistor is a P-type transistor, the low-level signal stage is the enabling stage of the P-type transistor, and the high-level signal stage is the non-enabling stage of the P-type transistor. Similarly, if the transistor is an N-type transistor, the low-level signal stage is the non-enabling stage of the N-type transistor, and the high-level signal stage is the enabling stage of the N-type transistor.

[0043] In the non-enabled section of the light-emitting control signal EM(n), that is, in the stage when the light-emitting control transistor M4 does not drive the light-emitting element 200 to emit light, the adjustment module 120 writes the adjustment signal, and the data writing module 110 writes the data signal to the gate of the driving transistor M0, thereby ensuring that the writing of the adjustment signal and the data signal will not affect the light-emitting element 200, thereby achieving orderly light emission of the light-emitting element 200 in the display panel 10 and ensuring the display effect of the display panel 10.

[0044] Figure 8 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention is shown in FIG. Figure 1 , Figure 2 and Figure 8 As shown, the display frame T also includes a second adjustment signal writing stage T32, and the second adjustment signal writing stage T32 is located after the data writing stage T2. In the second adjustment signal writing stage T32, the adjustment module 120 writes an adjustment signal to the first pole of the driving transistor M0 or the second pole of the driving transistor M0. The second adjustment signal writing stage T2 is located in the non-enabled segment of the light emitting control signal EM(n). In an embodiment of the present invention, the adjustment module 120 adjusts the first pole of the driving transistor M0 and / or the second pole of the driving transistor M0 in the first adjustment signal writing stage T31 and the second adjustment signal writing stage T32, respectively, so as to improve the accuracy of adjusting the transfer characteristic curve of the driving transistor M0 by adding the second adjustment signal writing stage T32, thereby better solving the problem of display afterimage of the display panel 10 and ensuring the display effect of the display panel 10.

[0045] Continue to refer Figure 1 , Figure 2 and Figure 8 As shown, the pixel driving circuit 100 also includes a threshold compensation transistor M3, the gate of the threshold compensation transistor M3 receives the third scanning signal SCN(n), the first electrode of the threshold compensation transistor M3 is electrically connected to the gate of the driving transistor M0, and the second electrode of the threshold compensation transistor M3 is electrically connected to the second electrode of the driving transistor M0. The data writing stage T2 is located within the enabling segment of the third scanning signal SCN(n), and the second adjustment signal writing stage T32 is located after the enabling segment of the third scanning signal SCN(n). The second adjustment signal writing stage T32 does not overlap with the enabling segment of the third scanning signal SCN(n). When the adjustment module 120 writes the adjustment signal to the third node N3, the threshold compensation transistor M3 is turned off (or called cut-off), and will not be written to the first node N1, which can avoid affecting the voltage of the first node N1, ensuring the stability of the operation of the pixel driving circuit 100 and ensuring the stable light emission of the light-emitting element 200.

[0046] Fig. 9 A schematic diagram of the circuit structure of another pixel driving circuit provided by an embodiment of the present invention is shown. Fig.10 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention is shown in FIG. Fig. 9 and Fig.10 As shown, the pixel driving circuit 10 further includes a light emitting control transistor M4, the gate of which receives a light emitting control signal EM(n), a first electrode of the light emitting control transistor M4 is electrically connected to a second electrode of the driving transistor M0, and a second electrode of the light emitting control transistor M4 is electrically connected to an anode of the light emitting element 200. The display frame T includes a data writing subframe Ta1 and a maintaining subframe Ta2 ( Fig. 9In the example, the same display frame T includes a data writing subframe Ta1 and a maintaining subframe Ta2. The embodiment of the present invention does not specifically limit the number of data writing subframes Ta1 and maintaining subframes Ta2. The maintaining subframe Ta2 is located after the data writing subframe Ta1. The data writing subframe Ta1 and the maintaining subframe Ta2 both include at least one non-enabled segment of the light emitting control signal EM(n). The data writing subframe Ta1 and the maintaining subframe Ta2 may also each include at least one enabled segment of the light emitting control signal EM(n). It can be understood that the enabled segment of the light emitting control signal EM(n) is located after the non-enabled segment of the light emitting control signal EM(n), and the number of the enabled segments of the light emitting control signal EM(n) is the same as the number of the non-enabled segments of the light emitting control signal EM(n). The data signal is written in the data writing subframe Ta1 to the gate of the driving transistor M0. In the sustain subframe Ta2 , no data signal is written to the gate of the driving transistor M0 , but the data signal written to the gate of the driving transistor M0 in the data writing subframe Ta1 is used to control the light emission brightness of the light emitting element 200 .

[0047] In the data writing subframe Ta1, the data writing stage T2 and the first adjustment signal writing stage T31 are both located in the non-enabled segment of the light emitting control signal EM(n). The maintaining subframe Ta2 includes a third adjustment signal writing stage T33, in which the adjustment module 120 writes an adjustment signal to the first pole of the driving transistor M0 and / or the second pole of the driving transistor M0. In the maintaining subframe Ta2, the third adjustment signal writing stage T33 is located in the non-enabled segment of the light emitting control signal EM(n). In an embodiment of the present invention, in the third adjustment signal writing stage T33 of the maintaining subframe Ta2, by writing the adjustment signal to the first pole of the driving transistor M0 and / or the second pole of the driving transistor M0, the transfer characteristic curve of the driving transistor M0 can be adjusted, thereby improving the stability of the transfer characteristic curve of the driving transistor M0 under various operating voltages. In the maintenance subframe Ta2, the third adjustment signal writing stage T33 is located in the non-enabled segment of the light-emitting control signal EM(n), that is, the stage in which the light-emitting control transistor M4 does not drive the light-emitting element 200 to display light. The adjustment module 120 writes the adjustment signal, and the data writing module 110 writes the data signal to the gate of the driving transistor M0, ensuring that the writing of the adjustment signal and the data signal will not affect the light emission of the light-emitting element 200.

[0048] For example, reference Fig. 9 and Fig.10In the data writing phase T2, the data writing module 110 is turned on under the control of the enabling segment of the fourth scanning signal SCP(n), and writes the data signal to the gate of the driving transistor M0. The data writing phase T2 corresponds to the enabling segment of the fourth scanning signal SCP(n).

[0049] For example, reference Fig. 9 and Fig.10 , the gate of the first reset transistor M1 receives the fourth scan signal SCP(n). In the sustain sub-frame Ta2, the non-enabling section of the fourth scan signal SCP(n) controls the first reset transistor M1 to be turned off.

[0050] Fig.11 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention is shown in FIG. Fig. 9 and Fig.11 The maintenance subframe Ta2 also includes a virtual data writing phase T21, which corresponds to the enable segment of the fourth scan signal SCP(n). Although the data writing module 110 is turned on, the third scan signal SCN(n) is a non-enable segment in the virtual data writing phase T21, and the threshold compensation transistor M3 is controlled to be turned off, and the data signal cannot be written to the gate of the driving transistor M0. In the virtual data writing phase T21, the enable segment of the fourth scan signal SCP(n) controls the first reset transistor M1 to be turned on, and the first reset voltage is written to the anode of the light-emitting element 200 to achieve the reset of the anode of the light-emitting element 200. The third adjustment signal writing phase T33 is located before the virtual data writing phase T21, and / or the third adjustment signal writing phase T33 is located after the virtual data writing phase T21. The third adjustment signal writing phase T33 does not overlap with the virtual data writing phase T21, and will not affect the reset of the anode of the light-emitting element 200 in the maintenance subframe Ta2.

[0051] Fig.12 A driving timing diagram of another pixel driving circuit provided by an embodiment of the present invention is shown in FIG. Fig.12 As shown, in the sustaining subframe Ta2, the length of the third adjustment signal writing phase T33 is equal to the length of the non-enabling segment of the light emitting control signal EM(n). In the sustaining subframe Ta2, since it is not necessary to write the data signal to the gate of the driving transistor M0, the length of the third adjustment signal writing phase T33 can be adjusted to be the same as the length of the non-enabling segment of the light emitting control signal EM(n), thereby increasing the adjustment time of the characteristic curve of the driving transistor M0 and ensuring the accuracy of the adjustment.

[0052] Continue to refer Figure 1 and Figure 2As shown, the data writing module 110 includes a data writing transistor M5, and the regulating module 120 includes an regulating transistor M6. The pixel driving circuit 100 also includes a power supply voltage writing transistor M7, a light emitting control transistor M4, a threshold compensation transistor M3, a first reset transistor M1 and a second reset transistor M2. The gate of the power supply voltage writing transistor M7 receives the light emitting control signal EM(n), the first electrode of the power supply voltage writing transistor M7 is electrically connected to the power supply voltage terminal PVDD, and the second electrode of the power supply voltage writing transistor M7 is electrically connected to the first electrode of the driving transistor M0. The gate of the light emitting control transistor M4 receives the light emitting control signal EM(n), the first electrode of the light emitting control transistor M4 is electrically connected to the second electrode of the driving transistor M0, and the second electrode of the light emitting control transistor M4 is electrically connected to the anode of the light emitting element 200. The gate of the threshold compensation transistor M3 receives the third scanning signal SCN(n), the first electrode of the threshold compensation transistor M3 is electrically connected to the gate of the driving transistor M0, and the second electrode of the threshold compensation transistor M3 is electrically connected to the second electrode of the driving transistor M0. The gate of the first reset transistor M1 receives the first scanning signal SCN(n-1), the first electrode of the first reset transistor M1 is electrically connected to the first reset terminal Vref1, and the second electrode of the first reset transistor M1 is electrically connected to the anode of the light emitting element 200. The gate of the second reset transistor M2 receives the second scanning signal SCP(n-1), the first electrode of the second reset transistor M2 is electrically connected to the second reset terminal Vref2, and the second electrode of the second reset transistor M2 is electrically connected to the gate of the driving transistor M0.

[0053] For further reference, Figure 1 and Figure 2 As shown, the pixel driving circuit 100 further includes a storage capacitor C, which is connected between the first node N1 and the power supply voltage terminal PVDD and is used to store the voltage of the first node N1. The cathode of the light emitting element 200 is connected to the common power supply voltage terminal PVEE. The actual pixel driving circuit 100 can adaptively adjust the type, quantity and position of the transistor, and the embodiment of the present invention is not specifically limited to this.

[0054] For further reference, Figure 1 and Figure 2 As shown, the power supply voltage writing transistor M7, the driving transistor M0, the light emission control transistor M4, the data writing transistor M5, the second reset transistor M2 and the regulating transistor M6 are all P-type transistors. The threshold compensation transistor M3 and the first reset transistor M1 are both N-type transistors.

[0055] Among them, the N-type transistor has the advantage of good anti-leakage effect, and the P-type transistor has the advantage of high carrier mobility. Based on the advantages of the P-type transistor and the N-type transistor, the transistors in some positions of the pixel driving circuit 100 are partially P-type transistors and partially N-type transistors. Specifically, the threshold compensation transistor M3 and the first reset transistor M1 are set as N-type transistors to prevent leakage and ensure that the potential of the first node N1 or the anode affecting the light-emitting element 200 is not affected by leakage. Further, the power supply voltage writing transistor M7, the driving transistor M0, the light-emitting control transistor M4, the data writing transistor M5, the second reset transistor M2 and the regulating transistor M6 are set as P-type transistors, which can ensure good carrier mobility effect and ensure the high efficiency of the pixel driving circuit 100. In general, the working stability and high efficiency of the pixel driving circuit 100 in the display panel 10 are guaranteed.

[0056] In other implementations, in order to further reduce the leakage current to the first node N1, the second reset transistor M2 may be configured as an N-type transistor.

[0057] Fig.13 A top view of a display panel provided by an embodiment of the present invention, referring to Figure 1 , Figure 2 and Fig.13As shown, the light emitting element 200 includes a red light emitting element 201, a green light emitting element 202 and a blue light emitting element 203. The red light emitting element 201 emits red light, the green light emitting element 202 emits green light, and the blue light emitting element 203 emits blue light. The red light emitting element 201, the green light emitting element 202 and the blue light emitting element 203 are driven by three different pixel driving circuits 100, respectively. That is, the red light emitting element 201 is driven by one pixel driving circuit 100, the green light emitting element 202 is driven by another pixel driving circuit 100, and the blue light emitting element 203 is driven by another pixel driving circuit 100. The driving transistor M0 driving the red light emitting element 201 is a red driving transistor, the driving transistor M0 driving the green light emitting element is a green driving transistor, and the driving transistor M0 driving the blue light emitting element is a blue driving transistor. The channel width-to-length ratio of the blue driving transistor is greater than the channel width-to-length ratio of the red driving transistor, and the channel width-to-length ratio of the blue driving transistor is greater than the channel width-to-length ratio of the green driving transistor. It is understandable that the larger the channel width is, the larger the driving transistor needs to be made, and a larger adjustment signal needs to be set for a larger driving transistor. Therefore, in an embodiment of the present invention, the voltage value of the adjustment signal of the blue driving transistor is set to be greater than the voltage value of the adjustment signal of the red driving transistor, and the voltage value of the adjustment signal of the blue driving transistor is greater than the voltage value of the adjustment signal of the green driving transistor. Based on driving light-emitting elements 200 of different colors, there are differences in the channel width-to-length ratios of driving transistors of different colors. The voltage value of the adjustment signal written by the adjustment module 120 is adaptively adjusted to ensure that the transfer characteristic curves of driving transistors of different colors are stable, so as to better solve the display afterimage problem that may exist in the display panel 10.

[0058] For example, reference Fig.13 The display panel 10 further includes a substrate 204, and the red light emitting element 201, the green light emitting element 202, and the blue light emitting element 203 are located on one side of the substrate 204. The embodiment of the present invention does not limit the arrangement order of the red light emitting element 201, the green light emitting element 202, and the blue light emitting element 203, and the pattern formed by the red light emitting element 201, the green light emitting element 202, and the blue light emitting element 203.

[0059] Continue to refer Figures 1 to 3 As shown, when the grayscale value of the data signal is less than or equal to the preset grayscale value G, the adjustment signal is recorded as the first adjustment signal, and the voltage value of the first adjustment signal is greater than the voltage value of the data signal. When the grayscale value of the data signal is greater than the preset grayscale value G, the adjustment signal is recorded as the second adjustment signal, and the voltage value of the second adjustment signal is less than the voltage value of the data signal.

[0060] For example, reference Figures 1 to 3As shown, the preset grayscale value G can be set to 127 grayscales, i.e., G127. The value of the preset grayscale value G in the embodiment of the present invention can be adjusted, and no specific limitation is made thereto. When the grayscale value of the data signal is less than or equal to the preset grayscale value G (e.g., 0 grayscale, displaying black), the adjustment module 120 inputs a first adjustment signal, and the voltage value of the first adjustment signal is greater than the voltage value of the data signal, so that the transfer characteristic curve at the position a3 is shifted to a2, and the characteristic transfer curve of the driving transistor M0 is shifted. Similarly, when the grayscale value of the data signal is greater than or equal to the preset grayscale value G (e.g., 255 grayscale, displaying white), the adjustment module 120 inputs a second adjustment signal, and the voltage value of the second adjustment signal is less than the voltage value of the data signal, so that the transfer characteristic curve at the position a1 is shifted to a2, and the characteristic transfer curve of the driving transistor M0 is shifted. Based on the comparison between the grayscale value of the transmitted data signal and the preset grayscale value, the adjustment module 120 writes different adjustment signals to realize dynamic adjustment of the driving transistor M0 in the pixel driving circuit 100. Furthermore, the process may be adjusted by relying on a comparison table of grayscale values ​​of data signals and adjustment signal values ​​pre-stored in a driver chip (not specifically shown in the figure), which is not specifically limited in the embodiment of the present invention.

[0061] For further information, please refer to Figures 1 to 3 As shown, the greater the difference between the grayscale value of the data signal and the preset grayscale value G, the greater the difference between the voltage value of the first adjustment signal and the voltage value of the data signal, and the greater the difference between the voltage value of the second adjustment signal and the voltage value of the data signal.

[0062] Exemplarily, taking the grayscale values ​​of two data signals as an example, if the grayscale values ​​of the data signals are 0 and 50 respectively, the differences between the grayscale values ​​of the data signals and the preset grayscale value G are 127 and 77 respectively. In comparison, when the grayscale value of the data signal is 0, the difference between the data signal and the preset grayscale value G is larger, and the difference between the voltage value of the adjustment signal and the voltage value of the data signal is larger, thereby ensuring that the adjustment effect of the adjustment module 120 is very good and the display effect of the display panel 10 is guaranteed.

[0063] Based on the same inventive concept, an embodiment of the present invention further provides a display device, Fig.14 is a schematic diagram of the structure of a display device provided by an embodiment of the present invention, such as Fig.14 As shown, the display device 1 includes the display panel described in any of the above embodiments. Therefore, the display device 1 provided in the embodiment of the present invention has the corresponding beneficial effects in the above embodiments, which will not be repeated here. Exemplarily, the display device 1 can be an electronic device such as a mobile phone, a computer, a smart wearable device (for example, a smart watch), and a vehicle-mounted display device, which is not limited in the embodiment of the present invention.

[0064] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: including a pixel driving circuit and a light emitting element; The pixel driving circuit includes a driving transistor, a data writing module and a regulating module; the driving transistor is configured to provide a driving current to the light emitting element; the data writing module is electrically connected to the first electrode of the driving transistor and is configured to write a data signal to the gate of the driving transistor in a data writing phase; The regulating module is electrically connected to the first electrode of the driving transistor and is configured to write a regulating signal to the first electrode of the driving transistor at least in a first regulating signal writing phase before a data writing phase of a same display frame; and / or, The regulating module is electrically connected to the second electrode of the driving transistor and is configured to write a regulating signal to the second electrode of the driving transistor at least in a first regulating signal writing phase before a data writing phase of a same display frame; Among them, the gate of the driving transistor is connected to the first node, the second end of the data writing module and the first electrode of the driving transistor are both connected to the second node, and the second electrode of the driving transistor is connected to the third node; the writing of the adjustment signal adjusts the transfer characteristic curve of the driving transistor.

2. The display panel according to claim 1, characterized in that: The pixel driving circuit further includes a first reset transistor, a gate of the first reset transistor receives a first scanning signal, a first electrode of the first reset transistor is electrically connected to a first reset terminal, and a second electrode of the first reset transistor is electrically connected to an anode of the light emitting element; In the same display frame, the first adjustment signal writing phase overlaps with the enabling segment of the first scanning signal.

3. The display panel according to claim 2, characterized in that: The pixel driving circuit further includes a second reset transistor, a gate of the second reset transistor receives a second scanning signal, a first electrode of the second reset transistor is electrically connected to a second reset terminal, and a second electrode of the second reset transistor is electrically connected to the gate of the driving transistor; In the same display frame, the enabling segment of the second scanning signal is located within the enabling segment of the first scanning signal, and the first adjustment signal writing phase does not overlap with the enabling segment of the second scanning signal.

4. The display panel according to claim 1, characterized in that: The pixel driving circuit further includes a first reset transistor, a gate of the first reset transistor receives a first scanning signal, a first electrode of the first reset transistor is electrically connected to a first reset terminal, and a second electrode of the first reset transistor is electrically connected to an anode of the light emitting element; In the same display frame, the first adjustment signal writing phase is located before the enabling phase of the first scanning signal.

5. The display panel according to claim 1, characterized in that: The pixel driving circuit further includes a threshold compensation transistor, a gate of the threshold compensation transistor receives a third scanning signal, a first electrode of the threshold compensation transistor is electrically connected to the gate of the driving transistor, and a second electrode of the threshold compensation transistor is electrically connected to the second electrode of the driving transistor; The data writing phase is located within the enabling section of the third scanning signal, and the first adjustment signal writing phase is located before the enabling section of the third scanning signal.

6. The display panel according to claim 1, characterized in that: The pixel driving circuit further includes a light emitting control transistor, a gate of which receives a light emitting control signal, a first electrode of the light emitting control transistor is electrically connected to a second electrode of the driving transistor, and a second electrode of the light emitting control transistor is electrically connected to an anode of the light emitting element; The first adjustment signal writing phase and the data writing phase are both located within the non-enabling section of the light emitting control signal.

7. The display panel according to claim 6, characterized in that: The display frame further includes a second adjustment signal writing phase, and the second adjustment signal writing phase is located after the data writing phase; In the second adjustment signal writing stage, the adjustment module writes the adjustment signal to the first electrode of the driving transistor or the second electrode of the driving transistor; The second adjustment signal writing stage is located in the non-enable section of the light emitting control signal.

8. The display panel according to claim 7, characterized in that: The pixel driving circuit further includes a threshold compensation transistor, a gate of the threshold compensation transistor receives a third scanning signal, a first electrode of the threshold compensation transistor is electrically connected to the gate of the driving transistor, and a second electrode of the threshold compensation transistor is electrically connected to the second electrode of the driving transistor; The data writing phase is located within the enabling section of the third scanning signal, and the second adjustment signal writing phase is located after the enabling section of the third scanning signal.

9. The display panel according to claim 1, characterized in that: The pixel driving circuit further includes a light emitting control transistor, a gate of which receives a light emitting control signal, a first electrode of the light emitting control transistor is electrically connected to a second electrode of the driving transistor, and a second electrode of the light emitting control transistor is electrically connected to an anode of the light emitting element; The display frame includes a data writing subframe and a maintaining subframe, the maintaining subframe is located after the data writing subframe, and the data writing subframe and the maintaining subframe each include at least one non-enabling segment of the light emitting control signal; In the data writing subframe, the data writing phase and the first adjustment signal writing phase are both located within the non-enabling segment of the light emitting control signal; The sustain subframe includes a third adjustment signal writing phase, during which the adjustment module writes the adjustment signal to the first electrode of the driving transistor or the second electrode of the driving transistor; In the sustaining subframe, the third adjustment signal writing phase is located within the non-enabling section of the light emitting control signal.

10. The display panel according to claim 9, characterized in that: In the sustaining subframe, the length of the third adjustment signal writing phase is equal to the length of the non-enabling segment of the light emitting control signal.

11. The display panel according to claim 1, characterized in that: The data writing module includes a data writing transistor, and the regulating module includes a regulating transistor; The pixel driving circuit further includes: A power supply voltage writing transistor, wherein a gate of the power supply voltage writing transistor receives a light emitting control signal, a first electrode of the power supply voltage writing transistor is electrically connected to a power supply voltage terminal, and a second electrode of the power supply voltage writing transistor is electrically connected to a first electrode of the driving transistor; a light emitting control transistor, wherein a gate of the light emitting control transistor receives the light emitting control signal, a first electrode of the light emitting control transistor is electrically connected to a second electrode of the driving transistor, and a second electrode of the light emitting control transistor is electrically connected to an anode of the light emitting element; a threshold compensation transistor, wherein a gate of the threshold compensation transistor receives a third scanning signal, a first electrode of the threshold compensation transistor is electrically connected to the gate of the driving transistor, and a second electrode of the threshold compensation transistor is electrically connected to the second electrode of the driving transistor; a first reset transistor, wherein a gate of the first reset transistor receives a first scanning signal, a first electrode of the first reset transistor is electrically connected to a first reset terminal, and a second electrode of the first reset transistor is electrically connected to an anode of the light emitting element; A second reset transistor, wherein a gate of the second reset transistor receives a second scanning signal, a first electrode of the second reset transistor is electrically connected to a second reset terminal, and a second electrode of the second reset transistor is electrically connected to the gate of the driving transistor.

12. The display panel according to claim 11, characterized in that: The power supply voltage writing transistor, the driving transistor, the light emission control transistor, the data writing transistor, the second reset transistor and the regulating transistor are all P-type transistors; The threshold compensation transistor and the first reset transistor are both N-type transistors.

13. The display panel according to claim 1, characterized in that: The light-emitting elements include a red light-emitting element, a green light-emitting element and a blue light-emitting element, wherein the red light-emitting element emits red light, the green light-emitting element emits green light, and the blue light-emitting element emits blue light; The driving transistor driving the red light emitting element is a red driving transistor, the driving transistor driving the green light emitting element is a green driving transistor, and the driving transistor driving the blue light emitting element is a blue driving transistor; The channel width-to-length ratio of the blue driving transistor is greater than that of the red driving transistor, and the channel width-to-length ratio of the blue driving transistor is greater than that of the green driving transistor; the voltage value of the adjustment signal of the blue driving transistor is greater than the voltage value of the adjustment signal of the red driving transistor, and the voltage value of the adjustment signal of the blue driving transistor is greater than the voltage value of the adjustment signal of the green driving transistor.

14. The display panel according to claim 1, characterized in that: When the grayscale value of the data signal is less than or equal to the preset grayscale value, the adjustment signal is recorded as a first adjustment signal, and the voltage value of the first adjustment signal is greater than the voltage value of the data signal; When the grayscale value of the data signal is greater than the preset grayscale value, the adjustment signal is recorded as a second adjustment signal, and a voltage value of the second adjustment signal is less than a voltage value of the data signal.

15. The display panel according to claim 14, characterized in that: The greater the difference between the grayscale value of the data signal and the preset grayscale value, the greater the difference between the voltage value of the first adjustment signal and the voltage value of the data signal, and the greater the difference between the voltage value of the second adjustment signal and the voltage value of the data signal.

16. A display device, characterized in that: A display panel comprising any one of claims 1-15.

Images