A phase-locked loop performance optimization method and system based on a sliding average filter

Abstract

The application discloses a phase-locked loop performance optimization method and system based on a sliding average filter, and comprises the following steps: obtaining a relative reference phase change amount in real time through a phase-locked loop based on a sliding average filter; traversing each time, and predicting a power grid fundamental frequency positive sequence phase jump amount at a current traversal time according to the relative reference phase change amount at the current traversal time and the relative reference phase change amount at a first time before the current traversal time; in a time period after a response delay of the filter in a fault and a time period after the filter is removed from the fault and the system restores to a steady state, analyzing a phase compensation amount at each time according to the relative reference phase change amount and the power grid fundamental frequency positive sequence phase jump amount at each time, and compensating the phase of an output signal of the filter by using all the phase compensation amounts. The application considers the response delay of the filter in the case that the fault causes the power grid phase jump, so as to alleviate the problems of phase-locked loop disconnection and slow phase-locked speed.

Description

Technical Field

[0001] This invention relates to the field of high-voltage DC phase-locked loop performance optimization, and in particular to a method and system for optimizing phase-locked loop performance based on a moving average filter. Background Technology

[0002] Synchronous triggering control is the control foundation for line commutated converter high voltage direct current (LCC-HVDC) transmission systems based on grid commutated converters. It consists of two parts: synchronization and triggering. The synchronization part tracks the grid frequency and phase, transmitting the synchronization phase to the triggering part. The triggering part uses the synchronization phase as a reference phase, and, in conjunction with the trigger angle command output by the pole controller, determines the triggering time for each commutation cycle through internal phase or time comparison, generating the corresponding trigger pulse. In engineering, the synchronization part of synchronous triggering control relies on a phase-locked loop (PLL) to track the positive-sequence phase of the grid's fundamental frequency. The synchronous reference frame phase-locked loop (SRF-PLL) is a widely used PLL in engineering, and its loop filter uses a PI controller. However, apart from the loop filter, the SRF-PLL does not introduce other filtering stages, resulting in a very narrow bandwidth. This narrow bandwidth characteristic degrades the dynamic performance of the PLL; when an AC fault causes a phase jump in the AC bus voltage, the unlocking time of the SRF-PLL may be as long as hundreds of milliseconds. Furthermore, under AC faults, there is a phase shift between the three-phase voltage on the grid side and the commutation voltage on the valve side. The phase-locked loop (PLL) always lags in tracking the phase of the voltage at the AC bus on the grid side and the commutation voltage on the valve side. When the phase of the commutation voltage changes ahead of the phase, the error between the synchronous phase output by the PLL and the actual phase of the commutation voltage causes a delay in the trigger pulse, which reduces the turn-off angle and the turn-off margin, thus leading to commutation failure. In severe cases, it may even cause the interruption of DC power transmission.

[0003] To improve the dynamic performance of SRF-PLL, existing technologies propose methods such as adding filters or reconstructing three-phase symmetrical voltage to extract the fundamental positive-sequence phase and improve the high-voltage DC synchronization link. Specifically, this involves: improving the dual second-order generalized integrator phase-locked loop using the orthogonal harmonic elimination method to filter out harmonics and fundamental negative-sequence components; using a decoupled dual-synchronization reference coordinate system phase-locked loop to separate positive and negative-sequence components, although this involves complex computational modules; constructing a virtual three-phase symmetrical voltage during faults; and using a moving average filter (MAF) with linear phase-frequency characteristics and a delay signal canceller to notch harmonics other than the fundamental frequency. While these existing technologies no longer rely on loop filters for filtering and can increase the PLL bandwidth by increasing the PI control parameters to achieve a faster response speed, the response delay of various filters during phase transitions is always inevitable, and larger PI parameters increase the burden of negative feedback control in the PLL. The filter response delay and negative feedback control burden still constrain the synchronization performance of synchronous trigger control, affecting the accuracy of the converter valve pulse sequence phase and the stability of DC control. Summary of the Invention

[0004] This invention provides a method and system for optimizing the performance of a phase-locked loop (PLL) based on a moving average filter, which alleviates the problems of PLL lockout and slow phase-locking speed when a fault causes a phase jump in the power grid.

[0005] To address the aforementioned technical problems, embodiments of the present invention provide a method for optimizing the performance of a phase-locked loop based on a moving average filter, comprising:

[0006] The phase-locked loop based on the moving average filter is used to obtain the change in phase relative to the reference phase in real time.

[0007] By iterating through each time point, the positive-sequence phase jump variable of the power grid base frequency at the current time point is predicted based on the relative reference phase change at the current time point and the relative reference phase change at the first time point before the current time point.

[0008] During the first and second time periods, the phase compensation amount at each time is obtained by analyzing the relative reference phase change amount and the positive sequence phase jump of the power grid base frequency at each time. Then, the phase of the output voltage signal of the moving average filter is compensated by using all the phase compensation amounts, thereby optimizing the performance of the phase-locked loop based on the moving average filter.

[0009] The phase-locked loop based on the moving average filter is used to construct a high-voltage direct current transmission synchronous triggering control system. The first time period is the time period of response delay of the moving average filter after the fault is connected, and the second time period is the time period between the moment the moving average filter clears the fault and the moment when the high-voltage direct current transmission synchronous triggering control system returns to steady state.

[0010] By implementing embodiments of the present invention, a moving average filter in a phase-locked loop (PLL) based on a moving average filter is used to predict the positive-sequence phase jump of the power grid fundamental frequency at various times. Furthermore, phase compensation amounts are calculated at different times to compensate for phase disturbances caused by fault access and fault clearing. This compensation is used to compensate for the phase of the output voltage signal of the moving average filter in real time, shortening the response delay time of the moving average filter during phase jumps. This ensures that the tracking speed of the PLL is not constrained by the filter's response delay, thereby alleviating the problems of PLL lockout and slow phase-locking speed caused by power grid phase jumps under AC fault disturbances, and promoting rapid recovery of the moving average filter's output signal after fault clearing. Additionally, performance optimization of the PLL used to construct a synchronous triggering control system for high-voltage direct current (HVDC) transmission can reduce the probability of commutation failure in HVDC transmission systems based on grid commutation converters.

[0011] As a preferred embodiment, after optimizing the performance of the phase-locked loop based on the moving average filter by compensating the phase of the output voltage signal using all the phase compensation amounts, the method further includes:

[0012] The input terminal of the PI controller of the phase-locked loop based on the moving average filter, after compensation, is connected to the input terminal of the feedforward channel, and the output of the feedforward channel is superimposed on the output terminal of the PI controller of the phase-locked loop based on the moving average filter, after compensation.

[0013] The feedforward channel is an integral negative feedback structure, which is a linearized structure of a first-order phase-locked loop.

[0014] In a preferred embodiment of the present invention, the input terminal of the PI controller based on the moving average filter-based phase-locked loop (PLL) that has completed compensation is connected to the input terminal of the feedforward channel. This allows for feedforward compensation of the PLL using the principle of invariance, and the differential element of the feedforward channel is replaced by an integral negative feedback structure. This results in a composite correction control system composed of feedforward compensation and negative feedback from the PLL. Based on the above modification of the PLL loop structure, the transient time of the PLL is effectively shortened, and the fluctuation of the PLL angular frequency is corrected. This enables the composite correction control system to improve the synchronization speed and reduce the burden of negative feedback control when the PI controller parameters are relatively small.

[0015] As a preferred embodiment, the step of traversing each time point, based on the relative reference phase change at the current traversal time point and the relative reference phase change at the first time point before the current traversal time point, predicts the positive-sequence phase jump variable of the power grid fundamental frequency at the current traversal time point, specifically as follows:

[0016] Based on the transfer function and time-domain response expression of the moving average filter, the linear characteristic diagram of the phase transient response of the moving average filter is derived, and based on the linear characteristic diagram, the transient response time and corresponding delay time of the moving average filter are analyzed.

[0017] By iterating through each time point, the phase change of the output voltage signal of the moving average filter at the current time point is calculated based on the relative reference phase change at the current time point and the relative reference phase change at the first time point before the current time point. Based on the phase change, the positive sequence phase jump of the power grid base frequency at the current time point is predicted. The difference between the current time point and the first time point before the current time point is equal to the delay time.

[0018] A preferred embodiment of the present invention utilizes the transient linearity of the moving average filter to predict the changes in the fundamental positive sequence phase of the power grid. This allows for better response to the impact of phase jumps under different short-circuit ratios based on the changes in the fundamental positive sequence phase of the power grid, thereby mitigating the phase lockout problem under fault access.

[0019] As a preferred embodiment, the phase compensation amount at each time point is analyzed and obtained based on the relative reference phase change and the positive sequence phase jump of the power grid fundamental frequency at each time point during the first and second time periods, specifically as follows:

[0020] The fault detection device is used to detect faults in the phase-locked loop based on the moving average filter in order to determine the time when the fault occurs.

[0021] The response delay time length of the moving average filter is obtained, and the first time period is determined according to the fault occurrence time and the response delay time length. Then, the phase compensation amount at each time in the first time period is analyzed and obtained according to the relative reference phase change amount and the positive sequence phase jump variable of the power grid base frequency at each time.

[0022] The voltage amplitude information corresponding to the output voltage signal of the moving average filter is acquired in real time. When the voltage amplitude information reaches a preset threshold, the current time is taken as the fault clearing time, and the steady-state recovery time of the moving average filter is acquired.

[0023] Based on the fault clearing time and the steady-state recovery time, the second time period is determined, and based on the relative reference phase change at each time point within the second time period, the phase compensation amount at each time point within the second time period is analyzed and obtained.

[0024] In a preferred embodiment of the present invention, phase compensation analysis is performed during both the first time period after fault access and the second time period after fault clearance. This allows for the analysis of the performance of the phase-locked loop (PLL) based on the moving average filter, addressing the phase disturbances caused by fault access and clearance, rather than simply analyzing the phase change of the output signal during the period after fault access. This improves the optimization effect of phase compensation on the performance of the PLL based on the moving average filter. Furthermore, by comparing real-time voltage amplitude information with a preset threshold, the fault clearance time is estimated, improving the accuracy of determining whether the fault has been cleared and thus optimizing the effectiveness of phase compensation.

[0025] As a preferred embodiment, the step of using all the aforementioned phase compensation amounts to compensate for the phase of the output voltage signal of the moving average filter, thereby optimizing the performance of the phase-locked loop based on the moving average filter, specifically involves:

[0026] By using the Park transform module, the phase compensation amount at each time step is superimposed on the phase of the output voltage signal of the moving average filter at the corresponding time step, so as to achieve phase compensation of the output voltage signal of the moving average filter and optimize the performance of the phase-locked loop based on the moving average filter.

[0027] In a preferred embodiment of the present invention, the phase compensation amount at each time moment is equivalent to the dq coordinate system, and then the equivalent results are superimposed on the phase of the output voltage signal of the moving average filter at the corresponding time moment, so as to better compensate the phase of the output voltage signal of the moving average filter.

[0028] As a preferred embodiment, the step of obtaining the relative reference phase change in real time through a phase-locked loop based on a moving average filter specifically involves:

[0029] The two-phase voltage signals corresponding to the phase-locked loop based on the moving average filter are acquired in real time.

[0030] According to the preset algorithm, based on the per-unit values ​​corresponding to the two-phase voltage signals and combined with the positive-sequence reference phase of the power grid fundamental frequency, the relative reference phase change corresponding to the moving average filter is calculated.

[0031] In a preferred embodiment of the present invention, the two-phase voltage signals are converted into corresponding per-unit values, which facilitates intuitive judgment of the correctness of the current two-phase voltage signals and simplifies the subsequent calculation process, thereby improving the calculation efficiency of the relative reference phase change.

[0032] To address the same technical problem, embodiments of the present invention also provide a phase-locked loop performance optimization system based on a moving average filter, comprising:

[0033] The jump variable prediction module is used to obtain the relative reference phase change in real time through a phase-locked loop based on a moving average filter; it iterates through each time moment and predicts the positive sequence phase jump variable of the power grid base frequency at the current time moment based on the relative reference phase change at the current time moment and the relative reference phase change at the first time moment before the current time moment.

[0034] The first performance optimization module is used to analyze and obtain the phase compensation amount at each time step based on the relative reference phase change and the positive sequence phase jump of the power grid fundamental frequency at each time step during the first and second time steps. It then uses all the phase compensation amounts to compensate the phase of the output voltage signal of the moving average filter, thereby optimizing the performance of the phase-locked loop based on the moving average filter. The moving average filter-based phase-locked loop is used to construct a high-voltage direct current (HVDC) transmission synchronous triggering control system. The first time step is the response delay period of the moving average filter after a fault is connected, and the second time step is the time between the moment the moving average filter clears the fault and the moment the HVDC transmission synchronous triggering control system returns to steady state.

[0035] As a preferred embodiment, the phase-locked loop performance optimization system based on a moving average filter further includes:

[0036] The second performance optimization module is used to connect the input terminal of the compensated phase-locked loop PI controller based on the moving average filter to the input terminal of the feedforward channel, and to superimpose the output of the feedforward channel onto the output terminal of the compensated phase-locked loop PI controller; wherein the feedforward channel is an integral negative feedback structure, and the integral negative feedback structure is a linearized structure of a first-order phase-locked loop.

[0037] As a preferred embodiment, the jump variable prediction module specifically includes:

[0038] The data acquisition unit is used to acquire the two-phase voltage signals corresponding to the phase-locked loop based on the moving average filter in real time; according to the preset algorithm, based on the per-unit value corresponding to the two-phase voltage signals and combined with the positive sequence reference phase of the power grid fundamental frequency, the relative reference phase change corresponding to the moving average filter is calculated.

[0039] The transient response analysis unit is used to derive the linear characteristic map of the phase transient response of the moving average filter based on the transfer function and time-domain response expression of the moving average filter, and to analyze the transient response time and corresponding delay time of the moving average filter based on the linear characteristic map.

[0040] The jump variable prediction unit is used to traverse each time moment, calculate the phase change of the output voltage signal of the moving average filter at the current traversal time moment based on the relative reference phase change at the current traversal time moment and the relative reference phase change at the first time moment before the current traversal time moment, and predict the positive sequence phase jump variable of the power grid base frequency at the current traversal time moment based on the phase change amount; wherein, the difference between the current traversal time moment and the first time moment before the current traversal time moment is equal to the delay time.

[0041] As a preferred embodiment, the first performance optimization module specifically includes:

[0042] The first fault analysis unit is used to perform fault detection on the phase-locked loop based on the moving average filter through a fault detection device to determine the fault occurrence time; obtain the response delay time length of the moving average filter, and determine the first time period according to the fault occurrence time and the response delay time length; and then analyze and obtain the phase compensation amount at each time in the first time period according to the relative reference phase change amount and the positive sequence phase jump variable of the power grid base frequency at each time in the first time period.

[0043] The second fault analysis unit is used to acquire the voltage amplitude information corresponding to the output voltage signal of the moving average filter in real time. When the voltage amplitude information reaches a preset threshold, the current time is taken as the fault clearing time, and the steady-state recovery time of the moving average filter is acquired. Based on the fault clearing time and the steady-state recovery time, the second time period is determined, and based on the relative reference phase change at each time in the second time period, the phase compensation amount at each time in the second time period is analyzed and obtained.

[0044] The phase compensation unit is used to superimpose the phase compensation amount at each time moment onto the phase of the output voltage signal of the moving average filter at the corresponding time moment using the Park transform module, so as to achieve phase compensation of the output voltage signal of the moving average filter and optimize the performance of the phase-locked loop based on the moving average filter. Attached Figure Description

[0045] Figure 1This is a flowchart illustrating a phase-locked loop performance optimization method based on a moving average filter, provided in Embodiment 1 of the present invention.

[0046] Figure 2 : A schematic diagram of the front-ring type MAF-PLL provided in Embodiment 1 of the present invention;

[0047] Figure 3 : Linear characteristic diagram of the phase transient response of MAF provided in Embodiment 1 of the present invention;

[0048] Figure 4 : A schematic diagram of the phase compensation structure for handling fault access and fault clearing provided in Embodiment 1 of the present invention;

[0049] Figure 5 : A schematic diagram of the pre-loop MAF-PLL structure considering MAF delay provided in Embodiment 1 of the present invention;

[0050] Figure 6 : A schematic diagram of the high-voltage DC fast phase-locked loop considering MAF delay and feedforward compensation provided in Embodiment 1 of the present invention;

[0051] Figure 7 This is a schematic diagram of a phase-locked loop performance optimization system based on a moving average filter, provided in Embodiment 1 of the present invention. Detailed Implementation

[0052] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0053] Example 1:

[0054] Please refer to Figure 1 This invention provides a method for optimizing the performance of a phase-locked loop based on a moving average filter. The method includes steps S1 to S2, each of which is detailed below:

[0055] Step S1: The relative phase change is obtained in real time through a phase-locked loop based on a moving average filter.

[0056] Among them, the moving average filter phase-locked loop (MAF-PLL) is used to construct the synchronous triggering control system for high-voltage direct current transmission. For the structure of the front-loop type MAF-PLL, please refer to [reference needed]. Figure 2 .

[0057] As a preferred embodiment, step S1 includes steps S11 to S12, each of which is detailed below:

[0058] Step S11: Real-time acquisition of the two-phase voltage signals corresponding to the phase-locked loop based on the moving average filter.

[0059] Step S12, refer to equation (1), using the per-unit values ​​corresponding to the two-phase voltage signals. Know The arctangent of the ratio indicates the change in the fundamental positive-sequence phase of the moving average filter (MAF) output, and is compared with the fundamental positive-sequence reference phase of the power grid. The difference is calculated to obtain the relative reference phase change detected by MAF.

[0060] It should be noted that, and They are orthogonal, and the former's phase leads the latter's by 90°.

[0061]

[0062] Wherein, ω0 represents the rated angular frequency and ω0 = 314 rad / s; This represents the reference initial phase, obtained by sampling voltage information during steady state.

[0063] Step S2: Iterate through each time point and predict the positive-sequence phase jump variable of the power grid base frequency at the current time point based on the relative reference phase change at the current time point and the relative reference phase change at the first time point before the current time point.

[0064] As a preferred embodiment, step S2 includes steps S21 to S22, each of which is detailed below:

[0065] Step S21: Based on the transfer function and time-domain response expression of the MAF, the linear characteristic diagram of the phase transient response of the MAF is derived, and the transient response time T of the MAF is analyzed based on the linear characteristic diagram. w and the corresponding delay time T w / m. Where m represents the number of intervals in a power grid cycle.

[0066] Specifically, the transfer function G of MAF MAF (s) Please refer to equation (2), and when the phase angle of the MAF input signal is θ jump When the transition occurs, the time-domain response expression c of the MAF output is... MAF (t) Please refer to equation (3). Based on the derivation of equations (2) and (3), it can be seen that after the phase jump occurs, MAF needs to go through Tw The transient response delay in time, and T from the moment the phase transition occurs. w The transient phase response increases linearly with time over a given period.

[0067] Please refer to Figure 3 Based on the linear characteristics of the phase transient response of the MAF, it can be known that the transient response time T of the MAF is... w =0.02s. Given the linear characteristic of the MAF's phase transient response, the time interval from the occurrence of the phase jump to the phase stabilization point is divided into m equally spaced parts. The phase change δ corresponding to each time interval is equal. Therefore, the delay time is 0.02 / m.

[0068]

[0069]

[0070] Where, θ jump (t) represents the actual value of the input phase jump variable, while θ is calculated in step S22. pre (t) represents the predicted value of the input phase jump variable.

[0071] Step S22, iterate through each time point, refer to equation (4), and calculate the relative reference phase change based on the current iterated time t. And the relative reference phase change at the first moment before the current traversal time (t-0.02 / m). The phase change δ(t) of the MAF output voltage signal at the current traversal time is calculated and referred to Equation (5). Based on the phase change δ(t), the positive sequence phase jump variable θ of the power grid fundamental frequency at the current traversal time t is predicted. pre (t); where the difference between the current traversal time and the first time before the current traversal time is equal to the delay time 0.02 / m.

[0072]

[0073] θ pre (t)=m·δ(t) (5)

[0074] It should be noted that, considering harmonic injection, the actual transient response of the MAF is not strictly linear with time. Due to the influence of harmonics, the phase jump variable θ predicted by equation (5) is affected. pre (t) may oscillate, so it is passed through a first-order inertial element with a time constant of 0.001 s (seconds), and the output of the first-order inertial element is used as the final predicted value of the phase jump variable. The predicted phase jump variable in equation (5) is then updated to finally determine θ. pre(t) makes the predicted phase jump variable smoother, thereby improving the predicted value θ. pre (t) and actual value θ jump The degree of consistency is shown. The response of the first-order inertial element indicates that its output can reach 98.2% of the predicted phase jump variable in only 4ms, which will not cause too much difference to the output of the linear transient response of the MAF. Among them, the first-order inertial element is a low-pass filter, and its transfer function is 1 / (1+0.001s) when the time constant is 0.001s.

[0075] Step S3: During the first and second time periods, based on the relative reference phase change and the positive sequence phase jump of the grid base frequency at each time, the phase compensation amount at each time is analyzed and obtained. Then, using all the phase compensation amounts, the phase of the output voltage signal of the moving average filter is compensated, thereby optimizing the performance of the phase-locked loop based on the moving average filter. The first time period is the time period of response delay of the moving average filter after the fault is connected, and the second time period is the time period between the moment the moving average filter clears the fault and the moment when the high-voltage direct current transmission synchronous trigger control system recovers to steady state.

[0076] As a preferred embodiment, step S3 includes steps S31 to S35, each of which is detailed below:

[0077] Step S31: Use a fault detection device to perform fault detection on the front-ring MAF-PLL to determine the time when the fault occurs.

[0078] In this embodiment, a continuous three-point sampling comparison method is used to detect faults. After a fault is detected, the fault detection device outputs a high-level signal (Ctrl=1) and maintains it for a relatively long time until the high-voltage direct current transmission synchronous trigger control system fully recovers to a steady state. The moment when the level signal switches from 0 to 1 is recorded and taken as the fault occurrence time t. fault .

[0079] Step S32: Obtain the response delay time length of MAF, and determine the first time period based on the fault occurrence time and the response delay time length. Then, determine the relative reference phase change at each moment within the first time period. and the positive-sequence phase jump variable θ of the power grid fundamental frequency obtained in step S22 pre (t), and the phase compensation amount at each moment in the first time period is obtained by analysis.

[0080] In this embodiment, the response delay time of MAF is 20ms, therefore the first time period is [t]. fault , t fault +20ms], then refer to equation (6) to calculate [t fault , tfault Phase compensation θ at various times within the +20ms time period comp1 (t).

[0081]

[0082] It should be noted that, considering that the transient response of MAF under a weak short-circuit ratio is not absolutely linear, and that other factors, including harmonics, will cause the calculation results of equations (5) and (6) to oscillate, in order to prevent the oscillation from causing misjudgment of the predicted phase jump direction and the fluctuation of the positive and negative signs of the compensation amount, the relative reference phase change detected by equation (1) is used. As a criterion for determining the sign of the compensation amount. When the grid phase jumps ahead, Only keep θ comp1 The non-negative part of (t) is forced to be 0; when the grid phase lags and jumps. Only keep θ comp1 The non-positive part of (t) is forced to be 0. For the specific structure of the phase compensation method for handling fault access, please refer to [reference needed]. Figure 4 (a).

[0083] Step S33: Real-time acquisition of voltage amplitude information corresponding to the output voltage signal of MAF. When the voltage amplitude information reaches a preset threshold, the current time is taken as the fault clearing time t. rec And obtain the steady-state recovery time of MAF.

[0084] It should be noted that while the fault detection device can quickly detect the occurrence of a fault, it cannot determine the fault clearing time. Therefore, the fault clearing time is estimated using voltage amplitude information in the αβ coordinate system. When the voltage amplitude information is determined to recover to 0.9 pu, a pulse signal is immediately emitted, and the time corresponding to this pulse is recorded as the fault clearing time t. rec Without considering the possibility of secondary failures occurring within a short period of time, from t rec The output phase of the MAF is compensated starting from time t. Since the purpose of this compensation method is to force the initial phase of the MAF output voltage to be consistent with the steady-state phase after fault clearing, even if the compensation time exceeds the MAF's own 20ms response delay time, it will not interfere with the phase-locked loop's (PLL) phase-locking speed and accuracy. Considering that the phase return in a weak short-circuit ratio system is not absolutely instantaneous, it is assumed that the system operates until time t... rec The system can fully recover to a steady state at +60ms, at which point compensation stops.

[0085] Step S34, based on the fault clearing time t rec Based on the steady-state recovery time, the second time period is determined, and the relative reference phase change at each moment within the second time period is calculated. The phase compensation amount θ at each moment in the second time period was obtained through analysis. comp2 (t).

[0086] In this embodiment, the steady-state recovery time of MAF is 60ms, therefore the second time period is [t]. rec , t rec +60ms]. To prevent misjudgment of the compensation method during startup, the compensation amount is only used during the high-level period of the fault detection output. Therefore, please refer to equation (7) to obtain the phase compensation amount θ at each moment in the second time period. comp2 (t). For the specific structure of the phase compensation method for handling fault access, please refer to [reference needed]. Figure 4 (b)

[0087]

[0088] In this embodiment, based on equations (6) and (7), the complete expression for the phase compensation amount at each moment after the fault occurs (see equation (8)) is derived.

[0089]

[0090] Step S35, please refer to Figure 5 By using the Park transform module αβ to dq, the phase compensation amount at each time step is superimposed on the phase of the output voltage signal of the moving average filter at the corresponding time step, so as to achieve phase compensation of the output voltage signal of the moving average filter and optimize the performance of the phase-locked loop based on the moving average filter.

[0091] in, Figure 5 The Park transform module αβ to dq within the dashed box no longer performs coordinate transformation; instead, it superimposes the compensation amount onto the phase of the original MAF output voltage. Therefore, the output of this Park transform module... and It is a set of orthogonal signals in the αβ coordinate system. Figure 5 The Park transformation module αβ to dq within the dashed box performs coordinate transformation, converting αβ to dq coordinates.

[0092] In this embodiment, θ comp (t) The compensation to the voltage phase of the MAF output can be achieved using the Park converter module, as detailed below:

[0093] ①Assuming that before compensation, the output expression of MAF is:

[0094]

[0095] Where θ represents the tracked phase of the MAF output before compensation.

[0096] Specifically, the Park transformation matrix C park for:

[0097]

[0098] Where, θ park This represents the phase quantity input to the Park matrix.

[0099] ② θ comp Feeding this back into the Park matrix, we get:

[0100]

[0101] Where, θ comp This represents the phase compensation amount that needs to be compensated to the MAF, obtained from equation (8), and is then sent to the Park transformation module, i.e., θ. comp That is θ park .

[0102] As a preferred embodiment, after step S3, the phase-locked loop performance optimization method based on a moving average filter provided in this embodiment of the invention further includes step S4, which is as follows:

[0103] Step S4, please refer to Figure 6 The input terminal of the PI controller of the phase-locked loop based on the moving average filter, which has completed compensation, is connected to the input terminal of the feedforward channel. The output of the feedforward channel is then superimposed on the output terminal of the PI controller of the phase-locked loop based on the moving average filter, which has completed compensation, to obtain a high-voltage DC fast phase-locked loop that takes into account MAF delay and feedforward compensation. The feedforward channel is an integral negative feedback structure, which is a linearized structure of a first-order phase-locked loop.

[0104] Please refer to Figure 7 This is a schematic diagram of a phase-locked loop performance optimization system based on a moving average filter, provided by an embodiment of the present invention. The system includes a jump variable prediction module M1 and a first performance optimization module M2, and the specific details of each module are as follows:

[0105] The jump variable prediction module M1 is used to obtain the relative reference phase change in real time through a phase-locked loop based on a moving average filter; it iterates through each time moment and predicts the positive sequence phase jump variable of the power grid base frequency at the current time moment based on the relative reference phase change at the current time moment and the relative reference phase change at the first time moment before the current time moment.

[0106] The first performance optimization module M2 is used to analyze and obtain the phase compensation amount at each time step based on the relative reference phase change and the positive sequence phase jump of the grid base frequency at each time step during the first and second time steps. It then uses all the phase compensation amounts to compensate the phase of the output voltage signal of the moving average filter, thereby optimizing the performance of the phase-locked loop based on the moving average filter. The moving average filter-based phase-locked loop is used to construct the high-voltage direct current transmission synchronous triggering control system. The first time step is the response delay of the moving average filter after a fault is connected, and the second time step is the time between the moment the moving average filter clears the fault and the moment the high-voltage direct current transmission synchronous triggering control system returns to steady state.

[0107] For the preferred option, please refer to Figure 7 The phase-locked loop performance optimization system based on a moving average filter provided in this embodiment of the invention further includes a second performance optimization module M3, which is specifically as follows:

[0108] The second performance optimization module M3 is used to connect the input terminal of the compensated phase-locked loop PI controller based on the moving average filter to the input terminal of the feedforward channel, and to superimpose the output of the feedforward channel onto the output terminal of the compensated phase-locked loop PI controller based on the moving average filter; wherein, the feedforward channel is an integral negative feedback structure, and the integral negative feedback structure is a linearized structure of a first-order phase-locked loop.

[0109] As a preferred embodiment, the jump variable prediction module M1 specifically includes a data acquisition unit 11, a transient response analysis unit 12, and a jump variable prediction unit 13, with each unit described in detail below:

[0110] The data acquisition unit 11 is used to acquire the two-phase voltage signals corresponding to the phase-locked loop based on the moving average filter in real time; according to the preset algorithm, based on the per-unit value of the two-phase voltage signals and combined with the positive sequence reference phase of the power grid fundamental frequency, the relative reference phase change corresponding to the moving average filter is calculated.

[0111] The transient response analysis unit 12 is used to derive the linear characteristic diagram of the phase transient response of the moving average filter based on the transfer function and time-domain response expression of the moving average filter, and to analyze the transient response time and corresponding delay time of the moving average filter based on the linear characteristic diagram.

[0112] The jump variable prediction unit 13 is used to traverse each time moment, calculate the phase change of the output voltage signal of the moving average filter at the current traversal time moment based on the relative reference phase change at the current traversal time moment and the relative reference phase change at the first time moment before the current traversal time moment, and predict the positive sequence phase jump variable of the power grid base frequency at the current traversal time moment based on the phase change amount; wherein, the difference between the current traversal time moment and the first time moment before the current traversal time moment is equal to the delay time.

[0113] As a preferred embodiment, the first performance optimization module M2 specifically includes a first fault analysis unit 21, a second fault analysis unit 22, and a phase compensation unit 23, the details of which are as follows:

[0114] The first fault analysis unit 21 is used to perform fault detection on the phase-locked loop based on the moving average filter through the fault detection device to determine the fault occurrence time; obtain the response delay time length of the moving average filter, and determine the first time period according to the fault occurrence time and the response delay time length; and then analyze and obtain the phase compensation amount at each moment in the first time period based on the relative reference phase change amount and the positive sequence phase jump variable of the power grid base frequency at each moment in the first time period.

[0115] The second fault analysis unit 22 is used to acquire the voltage amplitude information corresponding to the output voltage signal of the moving average filter in real time. When the voltage amplitude information reaches the preset threshold, the current time is taken as the fault clearing time, and the steady-state recovery time of the moving average filter is acquired. Based on the fault clearing time and the steady-state recovery time, the second time period is determined, and the phase compensation amount at each time in the second time period is analyzed based on the relative reference phase change at each time in the second time period.

[0116] Phase compensation unit 23 is used to superimpose the phase compensation amount at each time moment onto the phase of the output voltage signal of the moving average filter at the corresponding time moment using the Park transform module, so as to achieve phase compensation of the output voltage signal of the moving average filter and optimize the performance of the phase-locked loop based on the moving average filter.

[0117] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the system described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0118] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0119] This invention proposes a method and system for optimizing the performance of a phase-locked loop (PLL) based on a moving average filter. By using a moving average filter within the PLL, the positive-sequence phase jump of the power grid's fundamental frequency is predicted at various times. Furthermore, for phase disturbances caused by fault access and fault clearing, phase compensation amounts are calculated at different times to compensate the phase of the output voltage signal of the moving average filter in real time. This shortens the response delay time of the moving average filter during phase jumps, ensuring that the tracking speed of the PLL is not constrained by the filter's response delay. This alleviates the problems of PLL lockout and slow phase-locking speed caused by power grid phase jumps under AC fault disturbances and promotes rapid recovery of the moving average filter's output signal after fault clearing. Additionally, performance optimization of the PLL used to construct a synchronous triggering control system for high-voltage direct current (HVDC) transmission can reduce the probability of commutation failure in HVDC transmission systems based on grid-commutated converters.

[0120] Furthermore, the input terminal of the PI controller based on the moving average filter-based phase-locked loop (PLL) after compensation is connected to the input terminal of the feedforward channel. This allows for feedforward compensation of the PLL using the principle of invariance, and the differential element of the feedforward channel is replaced by an integral negative feedback structure. This results in a composite correction control system composed of feedforward compensation and negative feedback from the PLL. Based on the above modifications to the PLL loop structure, the transient time of the PLL is effectively shortened, and the fluctuation of the PLL angular frequency is corrected. This enables the composite correction control system to improve the synchronization speed and reduce the burden of negative feedback control when the PI controller parameters are relatively small.

[0121] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention for those skilled in the art.

Claims

1. A method for optimizing the performance of a phase-locked loop based on a sliding average filter, characterized in that, include: The phase-locked loop based on the moving average filter is used to obtain the change in phase relative to the reference phase in real time. By iterating through each time point, and based on the relative reference phase change at the current time point and the relative reference phase change at the first time point before the current time point, the positive-sequence phase jump variable of the power grid fundamental frequency at the current time point is predicted. Specifically, based on the transfer function and time-domain response expression of the moving average filter, a linear characteristic graph of the phase transient response of the moving average filter is derived, and based on the linear characteristic graph, the transient response time and corresponding delay time of the moving average filter are analyzed. By iterating through each time point, and based on the relative reference phase change at the current time point and the relative reference phase change at the first time point before the current time point, the phase change of the output voltage signal of the moving average filter at the current time point is calculated, and based on the phase change, the positive-sequence phase jump variable of the power grid fundamental frequency at the current time point is predicted. The difference between the current time point and the first time point before the current time point is equal to the delay time. Within the first and second time periods, the phase compensation amount at each moment is analyzed based on the relative reference phase change and the positive-sequence phase jump of the power grid fundamental frequency at each moment. Using all the phase compensation amounts, the phase of the output voltage signal of the moving average filter is compensated, thus optimizing the performance of the phase-locked loop based on the moving average filter. Specifically, the process of analyzing and obtaining the phase compensation amount at each moment based on the relative reference phase change and the positive-sequence phase jump of the power grid fundamental frequency within the first and second time periods involves: performing fault detection on the moving average filter-based phase-locked loop using a fault detection device to determine the fault occurrence time; and obtaining the response delay time length of the moving average filter. Based on the fault occurrence time and the response delay time, a first time period is determined. Then, based on the relative reference phase change and the positive sequence phase jump of the power grid base frequency at each moment within the first time period, the phase compensation amount at each moment within the first time period is analyzed and obtained. The voltage amplitude information corresponding to the output voltage signal of the moving average filter is acquired in real time. When the voltage amplitude information reaches a preset threshold, the current moment is taken as the fault clearing moment, and the steady-state recovery time of the moving average filter is acquired. Based on the fault clearing moment and the steady-state recovery time, a second time period is determined. Based on the relative reference phase change at each moment within the second time period, the phase compensation amount at each moment within the second time period is analyzed and obtained. The phase-locked loop based on the moving average filter is used to construct a high-voltage direct current transmission synchronous triggering control system. The first time period is the time period of response delay of the moving average filter after the fault is connected, and the second time period is the time period between the moment the moving average filter clears the fault and the moment when the high-voltage direct current transmission synchronous triggering control system returns to steady state.

2. The method for optimizing the performance of a phase-locked loop based on a moving average filter according to claim 1, wherein, After optimizing the performance of the phase-locked loop based on the moving average filter by compensating the phase of the output voltage signal using all the phase compensation amounts, the method further includes: The input terminal of the PI controller of the phase-locked loop based on the moving average filter, after compensation, is connected to the input terminal of the feedforward channel, and the output of the feedforward channel is superimposed on the output terminal of the PI controller of the phase-locked loop based on the moving average filter, after compensation. The feedforward channel is an integral negative feedback structure, which is a linearized structure of a first-order phase-locked loop.

3. The method for optimizing the performance of a phase-locked loop based on a moving average filter according to claim 1, wherein, The step of using all the aforementioned phase compensation amounts to compensate for the phase of the output voltage signal of the moving average filter, thereby optimizing the performance of the phase-locked loop based on the moving average filter, specifically involves: By using the Park transform module, the phase compensation amount at each time step is superimposed on the phase of the output voltage signal of the moving average filter at the corresponding time step, so as to achieve phase compensation of the output voltage signal of the moving average filter and optimize the performance of the phase-locked loop based on the moving average filter.

4. The method for optimizing the performance of a phase-locked loop based on a moving average filter according to claim 1, wherein, The step of acquiring the relative reference phase change in real time through a phase-locked loop based on a moving average filter is as follows: The two-phase voltage signals corresponding to the phase-locked loop based on the moving average filter are acquired in real time. According to the preset algorithm, based on the per-unit values ​​corresponding to the two-phase voltage signals and combined with the positive-sequence reference phase of the power grid fundamental frequency, the relative reference phase change corresponding to the moving average filter is calculated.

5. A system for optimizing the performance of a phase-locked loop based on a sliding average filter, characterized in that, include: The jump variable prediction module is used to obtain the relative reference phase change in real time through a phase-locked loop based on a moving average filter; The process iterates through each time point, predicting the positive-sequence phase jump variable of the power grid fundamental frequency at the current time point based on the relative reference phase change at the current time point and the relative reference phase change at the first time point before the current time point. Specifically, the jump variable prediction module includes: a data acquisition unit, used to acquire the two-phase voltage signals corresponding to the phase-locked loop based on the moving average filter in real time; and, according to a preset algorithm, calculates the relative reference phase change corresponding to the moving average filter based on the per-unit values ​​of the two-phase voltage signals and the positive-sequence reference phase of the power grid fundamental frequency; and a transient response analysis unit, used to analyze the transfer function and time-domain response expression of the moving average filter. A linear characteristic map of the phase transient response of the moving average filter is derived, and the transient response time and corresponding delay time of the moving average filter are analyzed based on the linear characteristic map. A jump variable prediction unit is used to traverse each time step, calculate the phase change of the output voltage signal of the moving average filter at the current traversal time step based on the relative reference phase change at the current traversal time step and the relative reference phase change at the first time step before the current traversal time step, and predict the positive-sequence phase jump variable of the power grid fundamental frequency at the current traversal time step based on the phase change. The difference between the current traversal time step and the first time step before the current traversal time step is equal to the delay time. The first performance optimization module is used to analyze and obtain the phase compensation amount at each time step based on the relative reference phase change and the positive sequence phase jump of the power grid base frequency at each time step during the first and second time steps. It then uses all the phase compensation amounts to compensate the phase of the output voltage signal of the moving average filter, thereby optimizing the performance of the phase-locked loop based on the moving average filter. The moving average filter-based phase-locked loop is used to construct a high-voltage direct current (HVDC) transmission synchronous triggering control system. The first time step is the response delay period of the moving average filter after a fault is connected, and the second time step is the time between the moment the moving average filter clears the fault and the moment the HVDC transmission synchronous triggering control system returns to steady state. The first performance optimization module specifically includes: The first fault analysis unit is used to perform fault detection on the phase-locked loop based on the moving average filter through a fault detection device to determine the fault occurrence time; obtain the response delay time length of the moving average filter, and determine the first time period according to the fault occurrence time and the response delay time length; and then analyze and obtain the phase compensation amount at each time in the first time period according to the relative reference phase change amount and the positive sequence phase jump variable of the power grid base frequency at each time in the first time period. The second fault analysis unit is used to acquire the voltage amplitude information corresponding to the output voltage signal of the moving average filter in real time. When the voltage amplitude information reaches a preset threshold, the current time is taken as the fault clearing time, and the steady-state recovery time of the moving average filter is acquired. Based on the fault clearing time and the steady-state recovery time, the second time period is determined, and based on the relative reference phase change at each time in the second time period, the phase compensation amount at each time in the second time period is analyzed and obtained. The phase compensation unit is used to superimpose the phase compensation amount at each time moment onto the phase of the output voltage signal of the moving average filter at the corresponding time moment using the Park transform module, so as to achieve phase compensation of the output voltage signal of the moving average filter and optimize the performance of the phase-locked loop based on the moving average filter.

6. A phase locked loop performance optimization system based on a sliding average filter as claimed in claim 5, wherein, Also includes: The second performance optimization module is used to connect the input terminal of the compensated phase-locked loop PI controller based on the moving average filter to the input terminal of the feedforward channel, and to superimpose the output of the feedforward channel onto the output terminal of the compensated phase-locked loop PI controller; wherein the feedforward channel is an integral negative feedback structure, and the integral negative feedback structure is a linearized structure of a first-order phase-locked loop.

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