Display module, display substrate and driving method thereof

Abstract

The present disclosure provides a display module, a display substrate and a driving method thereof. The display substrate includes: a plurality of pixels, each pixel includes a plurality of sub-pixels, and one sub-pixel includes a plurality of light-emitting elements of the same luminous color; a plurality of pixel circuits are configured to provide signals to the plurality of light-emitting elements, and the pixel circuit includes: a driving sub-circuit for controlling the light-emitting element to be connected to the first power supply terminal under the control of the potential of the control node; a data writing sub-circuit for controlling the control node to be connected to the data signal terminal under the control of the potential of the scan signal terminal; a detection sub-circuit for detecting the light-emitting element; wherein the data writing sub-circuits in the plurality of pixel circuits corresponding to the plurality of light-emitting elements in one sub-pixel are connected to different scan signal terminals. The present disclosure can improve the display effect.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display module, a display substrate and a driving method thereof. Background Art

[0002] OLED (Organic Light-Emitting Diode) display modules have the advantages of self-luminescence, high contrast and wide color gamut, as well as simple preparation process, low cost, low power consumption and easy realization of flexible display. They have been increasingly used in new generation display devices and have broad application prospects. However, the display module needs to be further improved. Summary of the invention

[0003] The purpose of the present disclosure is to provide a display module, a display substrate and a driving method thereof, which can improve the display effect.

[0004] According to one aspect of the present disclosure, there is provided a display substrate, comprising:

[0005] A plurality of pixels, each pixel comprising a plurality of sub-pixels, wherein one of the sub-pixels comprises a plurality of light-emitting elements having the same light-emitting color;

[0006] A plurality of pixel circuits, configured to provide signals to the plurality of light-emitting elements, the pixel circuits comprising a driving subcircuit, a data writing subcircuit and a detection subcircuit;

[0007] The driving subcircuit is connected to the first power supply terminal, the light emitting element and a control node, and is used to control the light emitting element to be connected to the first power supply terminal under the control of the potential of the control node;

[0008] The data writing sub-circuit is connected to the data signal terminal, the control node and the scan signal terminal, and the data writing sub-circuit is used to control the control node to be connected to the data signal terminal under the control of the potential of the scan signal terminal;

[0009] The detection subcircuit is connected to the light emitting element and is used to detect the light emitting element;

[0010] The data writing sub-circuits in the plurality of pixel circuits corresponding to the plurality of light emitting elements in one sub-pixel are connected to different scanning signal terminals.

[0011] Furthermore, the plurality of pixel circuits connected to the plurality of light emitting elements in one pixel are distributed along the first direction.

[0012] Furthermore, one of the sub-pixels includes two light-emitting elements with the same light-emitting color, and the multiple pixel circuits connected to the multiple light-emitting elements in one pixel constitute two circuit groups, each of the circuit groups includes multiple pixel circuits, the multiple pixel circuits in one circuit group are connected to the same scanning signal terminal, the multiple pixel circuits in the other circuit group are connected to the same scanning signal terminal, the pixel circuits in the two circuit groups are connected to different scanning signal terminals, and the two circuit groups are distributed along the first direction.

[0013] Furthermore, the pixel circuit is connected to the scanning signal end through a scanning signal line, and the extension direction of the scanning signal line is perpendicular to the first direction; the pixel circuits in the two circuit groups are connected to different scanning signal lines, and the two circuit groups are located between the two scanning signal lines.

[0014] Further, the display substrate includes a substrate;

[0015] The light emitting element comprises a first electrode and a second electrode which are arranged opposite to each other and a light emitting material layer located between the first electrode and the second electrode, wherein the second electrode is located on a side of the first electrode which is away from the substrate;

[0016] The pixel circuit further includes a conductive connection layer, wherein the conductive connection layer is disposed between the substrate and the first electrode, and the conductive connection layer is connected to the first electrode;

[0017] The driving subcircuit includes a driving transistor, which is located between the conductive connection layer and the first electrode, a first electrode of the driving transistor is connected to the first power supply terminal, a second electrode of the driving transistor is connected to the conductive connection layer, and a control electrode of the driving transistor is connected to the control node.

[0018] Furthermore, the conductive connection layer includes a main body and an extension arm connected to each other, the extension direction of the extension arm is different from the first direction, the orthographic projection of one end of the extension arm away from the main body on the substrate is spaced apart from the orthographic projection of the first electrode on the substrate, and the end of the extension arm away from the main body is connected to the first electrode.

[0019] Furthermore, the extending arm is perpendicular to the first direction, and in the first direction, the extending directions of the extending arms of two adjacent pixel circuits are opposite.

[0020] Furthermore, one pixel includes four sub-pixels, and the four sub-pixels are distributed in a rectangular shape.

[0021] Furthermore, a plurality of the light emitting elements in one sub-pixel are arranged adjacent to each other.

[0022] Furthermore, one of the sub-pixels includes two light-emitting elements emitting light of the same color.

[0023] Furthermore, the driving subcircuit comprises:

[0024] A driving transistor, wherein a first electrode of the driving transistor is connected to the first power supply terminal, a second electrode of the driving transistor is connected to the light emitting element, and a control electrode of the driving transistor is connected to the control node.

[0025] Furthermore, the data writing subcircuit comprises:

[0026] A data writing transistor, wherein a first electrode of the data writing transistor is connected to the data signal end, a second electrode of the data writing transistor is connected to the control node, and a control electrode of the data writing transistor is connected to the scanning signal end.

[0027] Furthermore, the detection subcircuit comprises:

[0028] A detection transistor, wherein a first electrode of the detection transistor is connected to the light emitting element, a second electrode of the detection transistor is connected to the detection signal terminal, and a control electrode of the detection transistor is connected to the scanning signal terminal.

[0029] According to one aspect of the present disclosure, a display module is provided, comprising the display substrate.

[0030] According to one aspect of the present disclosure, a method for driving a display substrate is provided. The method for driving a display substrate adopts the display substrate, and the method for driving a display substrate comprises:

[0031] The driving subcircuit controls the light emitting element to be connected to the first power supply terminal under the control of the potential of the control node;

[0032] The data writing subcircuit controls the control node to be connected to the data signal terminal under the control of the potential of the scanning signal terminal;

[0033] The detection sub-circuit is enabled to detect the light-emitting element.

[0034] The display module, display substrate and driving method disclosed herein, a sub-pixel includes multiple light-emitting elements with the same light-emitting color, and the data writing sub-circuits in the multiple pixel circuits corresponding to the multiple light-emitting elements in the sub-pixel are connected to different scanning signal terminals. During use, the corresponding light-emitting element is turned on through a scanning signal terminal. When it is detected that the light-emitting element fails to light up (there is a dark spot), the light-emitting element is turned off through the scanning signal terminal, and another light-emitting element is turned on through another scanning signal terminal to achieve normal display. Compared with a display substrate with dark spots, the display effect can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a circuit diagram of a pixel circuit connected to different scan signal terminals in an embodiment of the present disclosure.

[0036] Figure 2 is a circuit diagram of a pixel circuit in an embodiment of the present disclosure.

[0037] Figure 3 is a circuit diagram of a pixel circuit corresponding to one pixel in an embodiment of the present disclosure.

[0038] Figure 4(a) and Figure 4(b) are Figure 1 The working timing diagram of the circuit shown.

[0039] Figure 5 It is a schematic diagram showing a substrate in a cross-sectional direction in an embodiment of the present disclosure.

[0040] Figure 6 Schematic diagram of a conductive connection layer in an embodiment of the present disclosure.

[0041] Figure 7 is a schematic diagram of an active layer in an embodiment of the present disclosure.

[0042] Figure 8 Schematic diagram of the first conductive layer in an embodiment of the present disclosure.

[0043] Fig. 9 is a schematic diagram of the second conductive layer in an embodiment of the present disclosure.

[0044] Fig.10 Schematic diagram of the fifth connection line in the embodiment of the present disclosure.

[0045] Fig.11 Schematic diagram of the distribution of the first electrode in the embodiment of the present disclosure.

[0046] Fig.12 is a schematic diagram showing a substrate in an embodiment of the present disclosure.

[0047] Fig.13 Schematic diagram of the distribution of sub-pixels in the embodiment of the present disclosure.

[0048] Description of the accompanying drawings: 1. driving subcircuit; 2. data writing subcircuit; 3. detection subcircuit; 4. storage subcircuit; 5. conductive connection layer; 501. main body; 502. extension arm; 6. active layer; 601. first active area; 602. second active area; 603. third active area; 7. first conductive layer; 701. scanning signal line; 702. first routing line; 703. second routing line; 704. third routing line; 8. second conductive layer; 801. data writing signal line; 802. first conductive layer; Source line; 803, detection signal line; 804, conductive connection block; 805, auxiliary cathode; 806, first connection line; 9, planarization layer; 10, fifth connection line; 11, first electrode; 12, pixel definition layer; 13, light-emitting material layer; 14, second electrode; 15, substrate; 16, buffer layer; 17, gate insulation layer; 18, control electrode; 19, first electrode; 20, second electrode; 21, interlayer insulation layer; 22, planarization layer; 100, pixel circuit; 200, sub-pixel; 300, circuit group. DETAILED DESCRIPTION

[0049] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices consistent with some aspects of the present disclosure as detailed in the appended claims.

[0050] The terms used in this disclosure are only for the purpose of describing specific embodiments and are not intended to limit the disclosure. Unless otherwise defined, the technical terms or scientific terms used in this disclosure should be understood by people with ordinary skills in the field to which the disclosure belongs. "First", "second" and similar words used in this disclosure specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, "one" or "one" and other similar words do not indicate quantity restrictions, but indicate that there is at least one. "Multiple" or "several" means two and more than two. "Including" or "including" and other similar words mean that the elements or objects appearing in front of "including" or "including" include the elements or objects listed after "including" or "including" and their equivalents, and do not exclude other elements or objects. "Connected" or "connected" and other similar words are not limited to physical or mechanical connections, and can include electrical connections, whether direct or indirect. The singular forms of "one", "said" and "the" used in this disclosure specification and the attached claims are also intended to include plural forms unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0051] The transistors used in the present disclosure can be triodes, thin film transistors or field effect transistors or other devices with the same characteristics. In the embodiments of the present disclosure, in order to distinguish the two electrodes of the transistor except the control electrode, one of the electrodes is called the first electrode and the other is called the second electrode.

[0052] In actual operation, when the transistor is a triode, the control electrode may be a base, the first electrode may be a collector, and the second electrode may be an emitter; or, the control electrode may be a base, the first electrode may be an emitter, and the second electrode may be a collector.

[0053] In actual operation, when the transistor is a thin film transistor or a field effect transistor, the control electrode can be a gate, the first electrode can be a drain, and the second electrode can be a source; or, the control electrode can be a gate, the first electrode can be a source, and the second electrode can be a drain.

[0054] In the related art, the top-emitting display substrate needs to adopt the sputtering process to prepare the cathode. This process is easy to produce metal particles. The metal particles are easy to cause the anode and cathode of the display substrate to short-circuit, thereby causing the top-emitting display substrate to form dark spots here, affecting the display effect.

[0055] The present disclosure provides a display substrate. Figure 1As shown, the display substrate may include a plurality of pixels and a plurality of pixel circuits 100, wherein:

[0056] The pixel includes a plurality of sub-pixels 200. One sub-pixel 200 includes a plurality of light-emitting elements (light-emitting elements L0 and L1) emitting the same light-emitting color. The plurality of pixel circuits 100 correspond one-to-one to the plurality of light-emitting elements (light-emitting elements L0 and L1). The plurality of pixel circuits 100 are configured to provide signals to the plurality of light-emitting elements. Figure 2 As shown, the pixel circuit 100 includes a driving subcircuit 1, a data writing subcircuit 2 and a detection subcircuit 3. The driving subcircuit 1 is connected to the first power supply terminal VDD, the light emitting element L0 and the control node N1, and is used to control the light emitting element L0 to be connected to the first power supply terminal VDD under the control of the potential of the control node N1. The data writing subcircuit 2 is connected to the data signal terminal DATA, the control node N1 and the scan signal terminal G1, and is used to control the control node N1 to be connected to the data signal terminal DATA under the control of the potential of the scan signal terminal G1. The detection subcircuit 3 is connected to the light emitting element L0, and is used to detect the light emitting element L0. Among them, the data writing subcircuits 2 in the multiple pixel circuits 100 corresponding to the multiple light emitting elements (light emitting elements L0, L1) in a sub-pixel 200 are connected to different scan signal terminals (scan signal terminals G1, G2).

[0057] In the display substrate of the embodiment of the present disclosure, a sub-pixel 200 includes a plurality of light-emitting elements with the same light-emitting color, and the data writing sub-circuit 2 in the plurality of pixel circuits 100 corresponding to the plurality of light-emitting elements in the sub-pixel 200 is connected to different scanning signal terminals. During use, the corresponding light-emitting element is turned on through a scanning signal terminal, and when it is detected that the light-emitting element fails to light up (there is a dark spot), the light-emitting element is turned off through the scanning signal terminal, and another light-emitting element is turned on through another scanning signal terminal to achieve normal display. Compared with a display substrate with dark spots, the display effect can be improved.

[0058] The display substrate of the embodiment of the present disclosure is described in detail below:

[0059] like Figure 5As shown, the display substrate may include a substrate 15. The substrate 15 may be a rigid substrate. The rigid substrate may be a glass substrate or a PMMA (Polymethyl methacrylate) substrate. Of course, the substrate 15 may also be a flexible substrate. The flexible substrate may be a PET (Polyethyleneterephthalate) substrate, a PEN (Polyethylene naphthalate twoformic acid glycol ester) substrate or a PI (Polyimide) substrate.

[0060] The pixel may be disposed on a substrate 15. Fig.13 As shown, a pixel may include multiple sub-pixels 200. Among them, a pixel may include three sub-pixels 200. Of course, a pixel may also include four sub-pixels 200, but the present disclosure does not specifically limit this. The luminous colors of multiple sub-pixels 200 may be different. Taking a pixel including three sub-pixels 200 as an example, the three sub-pixels 200 may include a red sub-pixel, a green sub-pixel and a blue sub-pixel. Taking a pixel including four sub-pixels 200 as an example, the four sub-pixels 200 may include a red sub-pixel, a green sub-pixel, a blue sub-pixel and a white sub-pixel. The four sub-pixels 200 in a pixel may be distributed in a rectangular shape. In other embodiments of the present disclosure, the luminous colors of multiple sub-pixels 200 may be the same.

[0061] A sub-pixel 200 may include a plurality of light-emitting elements. For example, a sub-pixel 200 may include two light-emitting elements. The plurality of light-emitting elements in a sub-pixel 200 may be arranged adjacent to each other. The light-emitting colors of the plurality of light-emitting elements in a sub-pixel 200 are the same. Fig.13 In the figure, W1 and W2 represent two light-emitting elements that can emit white light; B1 and B2 represent two light-emitting elements that can emit blue light; G1 and G2 represent two light-emitting elements that can emit green light; R1 and R2 represent two light-emitting elements that can emit red light. Figure 5 As shown, each light-emitting element may include a first electrode 11 and a second electrode 14 disposed opposite to each other and a light-emitting material layer 13 located between the first electrode 11 and the second electrode 14. The light-emitting material layer 13 may be an organic electroluminescent material layer, but the present disclosure does not specifically limit this. The second electrode 14 may be disposed on the side of the first electrode 11 facing away from the substrate 15. The first electrode 11 may be an anode, and the second electrode 14 may be a cathode.

[0062] The pixel circuit 100 may be disposed on the substrate 15. Taking the display substrate as a top-emitting device as an example, the pixel circuit 100 may be disposed between the light-emitting element and the substrate 15. A plurality of pixel circuits 100 correspondingly connected to a plurality of light-emitting elements in a pixel may be distributed along a first direction. The first direction may be a pixel column direction. Figure 2 and Fig. 9 As shown, the pixel circuit 100 may include a driving subcircuit 1, a data writing subcircuit 2 and a detection subcircuit 3. The driving subcircuit 1 is connected to a first power supply terminal VDD, a light-emitting element (light-emitting elements L0 and L1) and a control node N1, and is used to control the light-emitting element (light-emitting elements L0 and L1) to be connected to the first power supply terminal VDD under the control of the potential of the control node N1. The driving subcircuit 1 includes a driving transistor T1. A first electrode of the driving transistor T1 is connected to the first power supply terminal VDD, a second electrode of the driving transistor T1 is connected to the light-emitting element (light-emitting elements L0 and L1), and a control electrode of the driving transistor T1 is connected to the control node N1. The first electrode of the driving transistor T1 can be connected to the first power supply line 802 (see Fig. 9 The first power line 802 may extend in the same direction as the first direction Y.

[0063] like Figure 2 As shown, the data writing sub-circuit 2 is connected to the data signal terminal DATA, the control node N1 and the scanning signal terminal (scanning signal terminals G1, G2), and is used to control the control node N1 to be connected to the data signal terminal DATA under the control of the potential of the scanning signal terminal (scanning signal terminals G1, G2). The data writing sub-circuit 2 includes a data writing transistor T2. The first electrode of the data writing transistor T2 is connected to the data signal terminal DATA, the second electrode of the data writing transistor T2 is connected to the control node N1, and the control electrode of the data writing transistor T2 is connected to the scanning signal terminal (scanning signal terminals G1, G2). The first electrode of the data writing transistor T2 can be connected to the scanning signal terminal (scanning signal terminals G1, G2) through the data writing signal line 801 (see Fig. 9 ) is connected to the data signal terminal DATA, and the control electrode of the data writing transistor T2 can be connected to the data signal terminal DATA through the scanning signal line 701 (see Fig. 9) is connected to the scan signal terminal (scan signal terminal G1, G2). The extension direction of the data write signal line 801 can be the same as the first direction Y. The scan signal line 701 can extend along the second direction X, and the second direction X can be perpendicular to the first direction Y. Taking a sub-pixel 200 including two light-emitting elements as an example, the data write sub-circuit 2 in the two pixel circuits 100 corresponding to the two light-emitting elements in the sub-pixel 200 is connected to different scan signal terminals (scan signal terminals G1, G2). In addition, the data write sub-circuit 2 in the multiple pixel circuits 100 corresponding to the multiple light-emitting elements in the sub-pixel 200 can be connected to the same data signal terminal DATA.

[0064] like Figure 2 As shown, the detection subcircuit 3 is connected to the light-emitting element (light-emitting element L0 and L1) for detecting the light-emitting element (light-emitting element L0 and L1). The detection subcircuit 3 includes a detection transistor T3. The first electrode of the detection transistor T3 is connected to the light-emitting element (light-emitting element L0 and L1), the second electrode of the detection transistor T3 is connected to the detection signal terminal SENSE, and the control electrode of the detection transistor T3 is connected to the scanning signal terminal (scanning signal terminals G1, G2). Among them, the second electrode of the detection transistor T3 can be connected to the detection signal terminal SENSE through the detection signal line 803, and the control electrode of the detection transistor T3 can be connected to the scanning signal terminal (scanning signal terminals G1, G2) through the scanning signal line 701.

[0065] like Figure 1 and Figure 3 As shown, taking a sub-pixel 200 including two light-emitting elements of the same light-emitting color as an example, a plurality of pixel circuits 100 connected to a plurality of light-emitting elements in a pixel constitute two circuit groups 300, each circuit group 300 includes a plurality of pixel circuits 100, a plurality of pixel circuits 100 in one circuit group 300 are connected to the same scanning signal terminal G1, a plurality of pixel circuits 100 in another circuit group 300 are connected to the same scanning signal terminal G2, the pixel circuits 100 in the two circuit groups 300 are connected to different scanning signal terminals (divided into G1 and G2), and the two circuit groups 300 are distributed along the first direction Y. Specifically, as Fig. 9 As shown, the pixel circuits 100 in the two circuit groups 300 are connected to different scanning signal lines 701 , and the two circuit groups 300 are located between the two scanning signal lines 701 .

[0066] like Figure 5 and Figure 6As shown, each pixel circuit 100 may include a conductive connection layer 5. The conductive connection layer 5 may be provided on the substrate 15 and located on the side of the first electrode 11 facing the substrate 15. The conductive connection layer 5 may include a main body 501 and an extension arm 502 connected to each other. The extension direction of the extension arm 502 may be different from the first direction Y. For example, the extension arm 502 may be perpendicular to the first direction Y, that is, the extension arm 502 is parallel to the second direction X. The orthographic projection of one end of the extension arm 502 away from the main body 501 on the substrate 15 may be spaced apart from the orthographic projection of the first electrode 11 on the substrate 15. In addition, for a plurality of pixel circuits 100 connected to a plurality of light-emitting elements in a pixel, the extension directions of the extension arms 502 of two adjacent pixel circuits 100 in the first direction Y are opposite.

[0067] like Figure 5 and Figure 7 As shown, each pixel circuit 100 may include a buffer layer 16, an active layer 6 and a gate insulating layer 17. The buffer layer 16 may be provided on the side of the conductive connection layer 5 facing away from the substrate 15. The active layer 6 may be provided on the side of the buffer layer 16 facing away from the substrate 15. The active layer 6 may include a first active area 601, a second active area 602 and a third active area 603. The first active area 601 is the active area of ​​the data writing transistor T2, the second active area 602 is the active area of ​​the driving transistor T1, and the third active area 603 is the active area of ​​the detection transistor T3. Among them, the first active area 601, the second active area 602 and the third active area 603 are spaced apart in the second direction X. The gate insulating layer 17 may be provided on the side of the active layer 6 facing away from the substrate 15.

[0068] like Figure 5 and Figure 8 As shown, each pixel circuit 100 may include a first conductive layer 7 and an interlayer insulating layer 21. The first conductive layer 7 may be provided on the side of the gate insulating layer 17 facing away from the substrate 15. The first conductive layer 7 may include a scan signal line 701, a first routing line 702, a second routing line 703, and a third routing line 704. The portion where the scan signal line 701 overlaps with the first active area 601 constitutes the control electrode 18 of the data writing transistor T2. The portion where the scan signal line 701 overlaps with the third active area 603 constitutes the control electrode 18 of the detection transistor T3. The portion where the first routing line 702 overlaps with the second active area 602 constitutes the control electrode 18 of the driving transistor T1. In the second direction X, the second routing line 703 is located on the side of the first active area 601 away from the second active area 602. The interlayer insulating layer 21 may be provided on the side of the first conductive layer 7 facing away from the substrate 15.

[0069] like Figure 5 and Fig. 9As shown, each pixel circuit 100 may include a second conductive layer 8. The second conductive layer 8 may include a first connection line 806, a second connection line, a third connection line, a fourth connection line, a data write signal line 801, a first power line 802, a detection signal line 803, a conductive connection block 804, and an auxiliary cathode 805. The data write signal line 801 is connected to the second wiring 703 via a hole. The first connection line 806 is connected to the second wiring 703 via a hole, and the first connection line 806 is also connected to the first active area 601 via a hole, so that the data write signal line 801 is connected to the first active area 601, that is, the data write signal line 801 is connected to the first electrode 19 of the data write transistor T2. The second connection line is connected to the first active area 601 via a hole, and the second connection line is also connected to the first wiring 702 via a hole, so that the second electrode 20 of the data write transistor T2 is connected to the control electrode 18 of the driving transistor T1. The first power line 802 is connected to the second active area 602 via a hole, so that the first electrode 19 of the driving transistor T1 is connected to the first power line 802. The third connection line is connected to the second active area 602 via a hole, and the third connection line is also connected to the above-mentioned conductive connection layer 5 via a hole, so that the second electrode 20 of the driving transistor T1 is connected to the conductive connection layer 5. The fourth connection line is connected to the third active area 603 via a hole, and the fourth connection line is also connected to the above-mentioned conductive connection layer 5 via a hole, so that the first electrode 19 of the detection transistor T3 is connected to the conductive connection layer 5. The detection signal line 803 is connected to the third active area 603 via a hole, so that the second electrode 20 of the detection transistor T3 is connected to the detection signal line 803. The conductive connection block 804 can be connected to the extension arm 502 of the conductive connection layer 5 via a hole. Specifically, the conductive connection block 804 can be connected to the end of the extension arm 502 away from the main body 501 via a hole. The auxiliary cathode 805 may be connected to the third wiring 704 through a via hole, thereby reducing the resistance of the auxiliary cathode 805. The auxiliary cathode 805 may be electrically connected to the cathode of the light emitting element.

[0070] like Figure 5 As shown, the display substrate of the present disclosure may further include a planarization layer 229. The planarization layer 229 may be disposed on the side of the second conductive layer 8 facing away from the substrate 15. The first electrode 11 of the light emitting element may be disposed on the side of the planarization layer 229 facing away from the substrate 15. Figure 5 and Fig.10As shown, the display substrate of the present disclosure may further include a fifth connection line 10. The fifth connection line 10 may be disposed in the same layer as the first electrode 11 and connected to the first electrode 11 layer. The fifth connection line 10 may also be connected to the above-mentioned conductive connection block 804 via a via hole. Since the conductive connection block 804 may be connected to the extension arm 502 of the conductive connection layer 5 via a via hole, the conductive connection layer 5 is connected to the first electrode 11. Since the conductive connection layer 5 is connected to the second electrode 20 of the driving transistor T1 and the first electrode 19 of the detection transistor T3, the first electrode 11 is connected to the second electrode 20 of the driving transistor T1 and the first electrode 19 of the detection transistor T3. Fig.11 FIG. 8 is a schematic diagram showing the distribution of the first electrode 11, the main body 501 of the conductive connection layer 5, and the conductive connection block 804. Fig.11 In the figure, the solid line frame represents the first electrode 11, the dashed line frame represents the main body 501 of the conductive connection layer 5, the dotted line frame represents the conductive connection block 804, and the meanings of W1, W2, B1, B2, G1, G2, R1 and R2 are the same as those in FIG. Fig.13 The meaning is the same as in. Fig.12 As shown, the display substrate of the present disclosure may further include a pixel defining layer 12 . The orthographic projection of the fifth connection line 10 on the substrate 15 is located within the orthographic projection area of ​​the pixel defining layer 12 on the substrate 15 .

[0071] The timing diagram shown in FIG4(a) is a timing diagram for normal operation of the display substrate of the embodiment of the present disclosure. The timing diagram shown in FIG4(b) is a timing diagram for operation when a dark spot appears on the display substrate of the embodiment of the present disclosure (for example, the first electrode 11 and the second electrode 14 of the light emitting element L0 are short-circuited due to particles generated by the sputtering process). The following is a comparison of the operation timing diagrams shown in FIG4(a) and FIG4(b) Figure 1 The working process of the pixel circuit 100 in the embodiment is described in detail. A sub-pixel 200 includes two light-emitting elements of the same light-emitting color, namely, light-emitting element L0 and light-emitting element L1, and light-emitting element L0 and light-emitting element L1 are respectively connected to a pixel circuit 100. For example, all the above transistors are N-type thin film transistors, and the conduction levels of all transistors are high.

[0072] like Figure 1 As shown in FIG. 4( a), in stage S1, the scan signal terminal G1, the scan signal terminal G2, and the data signal terminal DATA all output high levels, the data writing transistors T2 in the two pixel circuits 100 are all turned on, the data signal terminal DATA is connected to the control node N1, the driving transistors T1 in the two pixel circuits 100 are all turned on, and the light emitting element L0 and the light emitting element L1 both emit light. In stage S2, the scan signal terminal G2 and the data signal terminal DATA all output high levels, the data writing transistor T2 in the pixel circuit 100 connected to the scan signal terminal G2 is turned on, and the light emitting element L1 keeps emitting light.

[0073] like Figure 1 As shown in Figure 4(b), in stage S1, the scanning signal terminal G1 and the scanning signal terminal G2 both output high levels, the data writing transistors T2 in the two pixel circuits 100 are turned on, the data signal terminal DATA outputs a low level, and the driving transistors T1 in the two pixel circuits 100 are turned off, thereby writing L0 and the light-emitting element L1 to black; in stage S2, the scanning signal terminal G2 outputs a high level and compensates the signal output by the data signal terminal DATA (its potential is higher than that during normal display), the driving transistor T1 in the pixel circuit 100 corresponding to the scanning signal terminal G2 is turned on, and the light-emitting element L1 emits light.

[0074] The disclosed embodiment further provides a display module, which may include the display substrate of any of the above embodiments.

[0075] The embodiment of the present disclosure also provides a method for driving a display substrate. The driving method can use the display substrate described in any of the above embodiments, and the driving method can include: enabling the driving subcircuit 1 to control the light-emitting element to be connected to the first power supply terminal under the control of the potential of the control node; enabling the data writing subcircuit 2 to control the control node to be connected to the data signal terminal under the control of the potential of the scanning signal terminal; and enabling the detection subcircuit 3 to detect the light-emitting element.

[0076] The display module, display substrate and driving method thereof provided in the embodiments of the present disclosure belong to the same inventive concept, and the descriptions of relevant details and beneficial effects can be referred to each other and will not be repeated here.

[0077] The above is only a preferred implementation mode of the present disclosure, and does not limit the present disclosure in any form. Although the present disclosure has been disclosed as a preferred implementation mode as above, it is not used to limit the present disclosure. Any technician familiar with this profession can make some changes or modify the technical contents disclosed above into equivalent implementation modes without departing from the scope of the technical solution of the present disclosure. However, any simple modification, equivalent change and modification made to the above implementation modes based on the technical essence of the present disclosure without departing from the content of the technical solution of the present disclosure still fall within the scope of the technical solution of the present disclosure.

Claims

1. A display substrate, characterized in that: include: A plurality of pixels, each pixel comprising a plurality of sub-pixels, wherein one of the sub-pixels comprises at least two light-emitting elements having the same light-emitting color; A plurality of pixel circuits, configured to provide signals to at least two of the light-emitting elements, the pixel circuits comprising a driving subcircuit, a data writing subcircuit and a detection subcircuit; The driving subcircuit is connected to the first power supply terminal, the light emitting element and a control node, and is used to control the light emitting element to be connected to the first power supply terminal under the control of the potential of the control node; The data writing subcircuit is connected to the data signal terminal, the control node and the scan signal terminal, and the data writing subcircuit is used to control the control node to be connected to the data signal terminal under the control of the potential of the scan signal terminal; The detection subcircuit is connected to the light emitting element and is used to detect the light emitting element; Wherein, the data writing subcircuits in the plurality of pixel circuits corresponding to at least two light emitting elements in one subpixel are connected to different scanning signal terminals; Different scanning signal ends corresponding to at least two light-emitting elements in one sub-pixel are arranged adjacent to each other.

2. The display substrate according to claim 1, characterized in that: The plurality of pixel circuits connected to at least the two light emitting elements in one pixel are distributed along a first direction.

3. The display substrate according to claim 2, characterized in that: One of the sub-pixels includes two light-emitting elements with the same light-emitting color, and the multiple pixel circuits connected to at least the two light-emitting elements in one pixel constitute two circuit groups, each of the circuit groups includes multiple pixel circuits, the multiple pixel circuits in one circuit group are connected to the same scanning signal terminal, the multiple pixel circuits in the other circuit group are connected to the same scanning signal terminal, the pixel circuits in the two circuit groups are connected to different scanning signal terminals, and the two circuit groups are distributed along the first direction.

4. The display substrate according to claim 3, characterized in that: The pixel circuit is connected to the scanning signal end through a scanning signal line, and the extension direction of the scanning signal line is perpendicular to the first direction; the pixel circuits in the two circuit groups are connected to different scanning signal lines, and the two circuit groups are located between the two scanning signal lines.

5. The display substrate according to claim 2, characterized in that: The display substrate comprises a substrate; The light emitting element comprises a first electrode and a second electrode which are arranged opposite to each other and a light emitting material layer located between the first electrode and the second electrode, wherein the second electrode is located on a side of the first electrode which is away from the substrate; The pixel circuit further includes a conductive connection layer, wherein the conductive connection layer is disposed between the substrate and the first electrode, and the conductive connection layer is connected to the first electrode; The driving subcircuit includes a driving transistor, which is located between the conductive connection layer and the first electrode, a first electrode of the driving transistor is connected to the first power supply terminal, a second electrode of the driving transistor is connected to the conductive connection layer, and a control electrode of the driving transistor is connected to the control node.

6. The display substrate according to claim 5, characterized in that: The conductive connection layer includes a main body and an extension arm connected to each other, the extension direction of the extension arm is different from the first direction, the orthographic projection of one end of the extension arm away from the main body on the substrate is spaced apart from the orthographic projection of the first electrode on the substrate, and the end of the extension arm away from the main body is connected to the first electrode.

7. The display substrate according to claim 6, characterized in that: The extending arm is perpendicular to the first direction. In the first direction, the extending directions of the extending arms of two adjacent pixel circuits are opposite.

8. The display substrate according to any one of claims 1 to 7, characterized in that: One pixel includes four sub-pixels, and the four sub-pixels are distributed in a rectangular shape.

9. The display substrate according to claim 1, characterized in that: At least the two light emitting elements in one sub-pixel are arranged adjacent to each other.

10. The display substrate according to claim 9, characterized in that: One sub-pixel includes two light-emitting elements that emit the same light color.

11. The display substrate according to claim 1, characterized in that: The driving subcircuit comprises: A driving transistor, wherein a first electrode of the driving transistor is connected to the first power supply terminal, a second electrode of the driving transistor is connected to the light emitting element, and a control electrode of the driving transistor is connected to the control node.

12. The display substrate according to claim 1, characterized in that: The data writing sub-circuit comprises: A data writing transistor, wherein a first electrode of the data writing transistor is connected to the data signal end, a second electrode of the data writing transistor is connected to the control node, and a control electrode of the data writing transistor is connected to the scanning signal end.

13. The display substrate according to claim 1, characterized in that: The detection subcircuit comprises: A detection transistor, wherein a first electrode of the detection transistor is connected to the light emitting element, a second electrode of the detection transistor is connected to a detection signal terminal, and a control electrode of the detection transistor is connected to the scanning signal terminal.

14. A display module, characterized in that: A display substrate comprising any one of claims 1-13.

15. A method for driving a display substrate, characterized in that: The driving method adopts the display substrate according to any one of claims 1 to 13, and the driving method comprises: The driving subcircuit controls the light emitting element to be connected to the first power supply terminal under the control of the potential of the control node; The data writing subcircuit controls the control node to be connected to the data signal terminal under the control of the potential of the scanning signal terminal; The detection sub-circuit is enabled to detect the light-emitting element.

Images