Method and apparatus for information editing of a process library

Abstract

The embodiment of the present application discloses a kind of information editing method and device of process library.The information editing method of process library includes: obtaining the description of process parameter in the beginning of file in lib file, and obtains grid unit from the specified file in PDK path;Process parameter description and grid unit are filled into PDK path and standard cell library path;The determined metal layer and thickness are filled to layermap path in PDK path;According to layermap path, fill in the rule file in PDK path;Information under each process angle is extracted by lib script, and information is filled.The scheme provided by the present application can realize the technical effect of improving the work efficiency of agile development and reducing the possible error rate.

Description

TECHNICAL FIELD

[0001] The present application relates to the chip technology application field, and particularly relates to a process library information editing method and device. BACKGROUND

[0002] The script language (Tool Command Language, referred to as TCL) script of the interpretive execution in the traditional back-end design flow basically mixes three aspects of information: one is the Electronic Design Automation (referred to as EDA) tool command and the specific command option; two is the process library related information such as the metal level and the spacing; three is the design information such as the design constraint and the layout constraint. In different projects, even if the same design is changed, the tool or the process, the reusability of the Tcl script is extremely low, so the Very Large Scale Integrated Circuit (referred to as VLSI) flow of each project needs to be reconstructed.

[0003] Taking the digital back-end agile development platform Hammer as an example, the above three parts are separated, the EDA tool related and the process library related information can have a high reusability, and once completed, the modification is no longer needed, and only more work focus needs to be placed on the design, the layout, the performance and other constraints. Therefore, the process library information plug-in has a high accuracy requirement, and the manual extraction of the related information from a large number of standard cell library files and process design kit (referred to as PDK) library files and the filling are tedious and prone to errors.

[0004] In view of the above problem that the process library plug-in has a high writing difficulty in the prior art, needs a large amount of manual writing work, and leads to a low work efficiency of the process library plug-in, currently, no effective solution has been proposed. SUMMARY

[0005] To solve the above technical problems, the embodiments of the present application expect to provide a process library information editing method and device, so as to at least solve the problem that the process library plug-in has a high writing difficulty in the prior art, needs a large amount of manual writing work, and leads to a low work efficiency of the process library plug-in.

[0006] The technical scheme of the present application is implemented as follows:

[0007] In a first aspect, the embodiments of the present application provide a method for editing information of a process library, comprising: obtaining a description of process parameters in the beginning of a lib file, and obtaining a grid unit from a specified file in a PDK path; filling the description of the process parameters and the grid unit into the PDK path and a standard cell library path; filling a determined number of metal layers and thickness into a layermap path in the PDK path; filling a rule file in the PDK path according to the layermap path; and extracting information under each process angle through a lib script and filling the information.

[0008] Optionally, the extracting information under each process angle through the lib script and filling the information comprises: extracting lib information under each process angle through the lib script and filling the lib information; filling layer stack information through manual filling of instructions, wherein the layer stack information comprises: minimum width, pitch, offset and power_strap; and extracting bit information and special cell information through the lib script and filling the bit information and the special cell information, wherein the bit information is located in a lef file of the standard cell library.

[0009] Optionally, the extracting information under each process angle through the lib script comprises: determining a PDK path and a standard cell library path of a target process library; determining a root directory of a lib file, and selecting a required delay model; traversing all lib files under each VT type, and establishing groups according to the VT type and process angle information; obtaining a path of a specified file in a corresponding directory according to the VT type of each group; extracting a transistor model, a driving voltage and a temperature through a file name of the lib file; and extracting names of all special cells in the lib file and bit information in a lef file according to a special cell type list.

[0010] Optionally, the method further comprises: sorting files corresponding to SRAM according to sizes of the SRAM to obtain classified files according to the sizes of the SRAM; and classifying the files according to file types to obtain classified files.

[0011] Further, optionally, a naming rule of the SRAM is SRAM{ports}RW{depth}x{width}, wherein ports refers to whether the SRAM is single-port or double-port, depth refers to a depth of the SRAM, and width refers to a data bit width of the SRAM.

[0012] Optionally, the name of the SRAM is renamed to obtain a renamed name of the SRAM, wherein the renamed name of the SRAM is in the format of SRAM{ports}RW{depth}x{width}_PVT_{voltage}V_{temperature}C.lib, wherein ports refers to whether the SRAM is single-port or double-port, depth refers to the depth of the SRAM, width refers to the data bit width of the SRAM, voltage refers to the voltage in the process corner, the decimal point is replaced by P, temperature refers to the temperature in the process corner, and negative temperature is replaced by -.

[0013] Optionally, the method further comprises reading the port definition in the SRAM through the lib script, wherein the port definition comprises a port name and a port polarity.

[0014] Optionally, the method further comprises generating the sram-cache.jason file of the structured information according to the name of the SRAM through the lib script.

[0015] Optionally, the method further comprises configuring the control port of the SRAM and the value of the control port in the mem.v file.

[0016] In a second aspect, an embodiment of the present application provides an information editing device of a process library, comprising: an acquisition module configured to acquire a description of a process parameter in a file header of a lib file and a grid unit from a specified file in a PDK path; a first editing module configured to fill the description of the process parameter and the grid unit into the PDK path and a standard cell library path; a second editing module configured to fill a determined number of metal layers and thickness into a layermap path in the PDK path; a third editing module configured to fill a rule file in the PDK path according to the layermap path; and a fourth editing module configured to extract information under each process corner through a lib script and fill the information.

[0017] Embodiments of the present application provide an information editing method and device of a process library. The description of a process parameter in a file header of a lib file is acquired, and a grid unit is acquired from a specified file in a PDK path. The description of the process parameter and the grid unit are filled into the PDK path and a standard cell library path. A determined number of metal layers and thickness are filled into a layermap path in the PDK path. A rule file in the PDK path is filled according to the layermap path. Information under each process corner is extracted through a lib script, and the information is filled, thereby achieving the technical effects of improving the work efficiency of agile development and reducing the possible error rate. BRIEF DESCRIPTION OF DRAWINGS

[0018] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application. In the drawings:

[0019] Figure 1 A flowchart of a process library information editing method provided for the first embodiment of the present application;

[0020] Figure 2 A flowchart of tech.json file filling in the process library information editing method provided for the first embodiment of the present application;

[0021] Figure 3 A flowchart of lib information extraction script in the process library information editing method provided for the first embodiment of the present application;

[0022] Figure 4 A flowchart of SRAM plug-in generation script in the process library information editing method provided for the first embodiment of the present application;

[0023] Figure 5 A schematic diagram of a process library information editing device provided for the second embodiment of the present application. DETAILED DESCRIPTION

[0024] In order to enable persons skilled in the art to better understand the technical scheme of the present application, the technical scheme in the embodiments of the present application will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by persons skilled in the art without creative work should fall within the protection scope of the present application.

[0025] It should be noted that the terms "first", "second" and the like in the specification and claims of the present application and the accompanying drawings are used to distinguish different objects, rather than to limit a specific sequence.

[0026] It should also be noted that the various embodiments described below can be executed independently, and the various embodiments can also be executed in combination with each other, and the embodiments of the present application do not specifically limit this.

[0027] Embodiment one

[0028] In a first aspect, the embodiments of the present application provide a process library information editing method, Figure 1 A flowchart of a process library information editing method provided for the first embodiment of the present application; as Figure 1 shown, the process library information editing method provided by the embodiments of the present application comprises:

[0029] In step S100, the description of the process parameters in the beginning of the lib file is obtained, and the grid unit is obtained from the specified file in the PDK path.

[0030] In step S102, the description of the process parameters and the grid unit are filled into the PDK path and the standard cell library path.

[0031] In step S104, the determined metal layer number and thickness are filled into the layermap path in the PDK path.

[0032] In step S106, the rule file in the PDK path is filled according to the layermap path.

[0033] In step S108, the information under each process angle is extracted by the lib script, and the information is filled.

[0034] Optionally, in step S108, the information under each process angle is extracted by the lib script, and the information is filled, including: extracting the lib information under each process angle by the lib script, and filling the lib information; filling the layer stack information by manually filling the instructions, wherein the layer stack information includes: minimum width, pitch, offset and power_strap; extracting the bit information and special cell information extracted by the lib script, and filling the bit information and special cell information, wherein the bit information is located in the lef file of the standard cell library.

[0035] Specifically, Figure 2 A flowchart of filling a tech.json file in a process library information editing method provided by Embodiment One of the application is shown in Figure 2 As shown in the figure, the process library information editing method provided by the application selects a json format file to store the information related to the process library. The json is a text format completely independent of the programming language, which is convenient for multiple programming languages to read and improves its application scope.

[0036] The largest proportion of the structural information of the standard cell library is the configuration of all process angles, which is used for selection by the back-end design. Each process angle configuration is a group, and the group includes the lib file path (usually one of the three models of CCS, NLDM and ECSM, the lib file contains the process angle information, which is used as the grouping basis), the corresponding lef file path, the spice file path, the gds file path, the qrc file path, the verilog file path, the tplus file path and the power_grid file path, etc.

[0037] The entire tech.json file filling process is shown in Figure 2

[0038] ​Step1: Determine the target process, set the PDK path and Stdcelll library (standard cell library) path of the process library as an environment variable for subsequent use;

[0039] Step2: Read an arbitrary lib file, grab the description of the units (i.e., process parameters in the embodiment of the application) about capacitance, time and power consumption at the beginning of the file, and simultaneously grab the grid unit from the techfile in the PDK;

[0040] Step3: Fill in the PDK path and Stdcelll library (standard cell library) path;

[0041] Step4: Determine the required number of metal layers and thickness, and fill in the corresponding layermap path in the PDK;

[0042] Step5: According to the determined layermap, fill in the drc and lvs rule files consistent with it in the PDK;

[0043] Step6: Fill in the lib information about each process angle extracted through the lib script;

[0044] Step7: Manually fill in the units not needed in the synthesis process and the layer stacking information expected in the design, including min_width (minimum width), pitch, offset and power_strap, etc.;

[0045] Step8: Fill in the site information (located in the cell library lef file) and special cell information (some standard cells only exist in physical design) extracted through the script.

[0046] According to the above process, it can be found that most of the content of the file can be generated through the lib script, and only a small part of the information related to different design purposes needs to be filled in manually, which greatly improves the efficiency of the entire process.

[0047] Optionally, the information under each process angle extracted through the lib script includes: determining the PDK path and standard cell library path of the target process library; determining the root directory of the lib file, selecting the required delay model; traversing all lib files under each VT type, establishing grouping according to the VT type and process angle information; according to the VT type of each group, obtaining the path of the specified file under the corresponding directory; extracting the transistor model, driving voltage and temperature through the file name of the lib file; extracting the names of all special cells in the lib file and the bit information in the lef file according to the special cell type list.

[0048] Specifically, all lib files need to be traversed for backend design selection, each lib file has corresponding VT type and process corner information. Common VT types include LVT, SVT, HVT, etc. From the process angle, different gate oxide thicknesses will affect the threshold voltage of the device, so the response speed, power consumption, etc. of the device will also be different. In actual synthesis and layout routing work, lib files of multiple VT types may be used at the same time. Process corner information includes temperature, drive voltage, etc. In addition, it also includes different transistor models, common ones are ff, ss, tt, ffg, ssg, etc. Process corner information can be extracted through the lib file name. The above contents can be obtained in the complete standard cell library directory.

[0049] The script for extracting the above information is not limited to a programming language, and the main workflow of the lib information extraction script is as shown in Figure 3 Figure 3 The process diagram of the lib information extraction script in the information editing method of the process library provided in Embodiment One of the present application.

[0050] Step 1: Determine the PDK path and Stdcell library path of the target process library;

[0051] Step 2: Determine the lib file root directory and select the required delay model (CCS, NLDM or ECSM);

[0052] Step 3: Traverse all lib files under each VT type, and establish grouping according to the VT type and process corner information;

[0053] Step 4: According to the VT type of each group, find the path of other required files in the corresponding directory (for example, related files are stored in the Backend or Frontend folder under a fab factory process library);

[0054] Step 5: Extract transistor models, drive voltage, temperature, etc. from the file name of the lib file;

[0055] Step 6: Extract the names of all special cells in the lib according to the special cell type list (the lib file is too large, so it can be extracted from the lef), and the site information in the lef file.

[0056] Optionally, the information editing method of the process library provided in the embodiments of the present application further includes: sorting the files corresponding to the SRAM according to the size of the SRAM to obtain files classified according to the size of the SRAM; classifying the files according to the file type to obtain the classified files.

[0057] ​Further, optionally, the naming rule of the SRAM is SRAM{ports}RW{depth}x{width}, wherein the ports refer to single-port or double-port of the SRAM, the depth refers to the depth of the SRAM, and the width refers to the data bit width of the SRAM.

[0058] Optionally, the naming of the SRAM is renamed to obtain the naming of the renamed SRAM, wherein the naming of the renamed SRAM is in the format of SRAM{ports}RW{depth}x{width}_PVT_{voltage}V_{temperature}C.lib, wherein the ports refer to single-port or double-port of the SRAM, the depth refers to the depth of the SRAM, the width refers to the data bit width of the SRAM, the voltage refers to voltage in the process corner, the decimal point is replaced by P, the temperature refers to temperature in the process corner, and the negative temperature is replaced by -.

[0059] Optionally, the information editing method of the process library provided in the embodiment of the application further includes: reading port definition in the SRAM through a lib script, wherein the port definition includes: port name and port polarity.

[0060] Optionally, the information editing method of the process library provided in the embodiment of the application further includes: generating a sram-cache.jason file of structured information through a lib script according to the name of the SRAM.

[0061] Optionally, the information editing method of the process library provided in the embodiment of the application further includes: configuring a control port of the SRAM and a value of the control port in a mem.v file.

[0062] Specifically, in addition to the content of the standard cell library and the PDK library, it is also necessary to organize the SRAM related files into a structured directory structure. The SRAM is usually generated by a Memory Compiler or the like, and all files of each size of the SRAM are placed under a file, and it is necessary to convert the file structure into a classification according to file types.

[0063] The main workflow of the SRAM plug-in script is as shown in Figure 4 The flowchart of the SRAM plug-in generation script in the information editing method of the process library provided in the embodiment one of the application is shown in Figure 4

[0064] ​Step1: using Memory Compiler and other tools to generate the required SRAM, SRAM naming rules are SRAM{ports}RW{depth}x{width}, wherein ports refers to SRAM for single or double port, single port is 1, double port is 2, depth is the depth of SRAM, width is the data bit width of SRAM;

[0065] Step2: rename all size SRAM lib files under different process corners to SRAM{ports}RW{depth}x{width}_PVT_{voltage}V_{temperature}C.lib format, wherein ports refers to SRAM for single or double port, single port is 1, double port is 2, depth is the depth of SRAM, width is the data bit width of SRAM, voltage is the voltage in the process corner, replace the decimal point with P, temperature is the temperature in the process corner, replace the negative temperature with-;

[0066] Step3: classify the generated files of different size SRAM according to file type, such as behavioral model files into the behavioral folder, gds files into the gds folder, and lib files of the same size and different process corners into the same folder as the secondary directory of the lib file;

[0067] Step4: use a script to read the port definition in SRAM, mainly including port name (such as read-write enable port, address data port) and port polarity (such as high active, low active, rising edge or falling edge, etc.);

[0068] Step5: generate sram-cache.json file of structured information according to the required SRAM name using a script, including the name, width, depth, single or double end, port name and polarity of SRAM, etc.

[0069] Step6: for the control port of SRAM, add control port and configure the corresponding value in the instantiated SRAM in mem.v.

[0070] In summary, the basic content of the process library plug-in has been generated completely. The manual modification steps of the whole process are very few, and the automatic configuration and generation are basically realized by the script. In addition, for the process library of the same foundry, since the file structure under different process sizes is consistent, the information editing method of the process library provided by the embodiment of the application can be directly reused.

[0071] In addition, the standard cell library information is automatically converted into structured information by using scripts, so as to improve work efficiency and reduce error rate caused by manual writing.

[0072] The embodiment of the present application provides a process library information editing method.

[0073] Embodiment two

[0074] In the second aspect, the embodiment of the present application provides a process library information editing device, Figure 5 A schematic diagram of the process library information editing device provided in the embodiment two of the present application is shown in the figure. Figure 5 The process library information editing device provided by the embodiment of the present application includes: an acquisition module 50, which is used to acquire the description of process parameters in the beginning of a file in a lib file and acquire a grid unit from a specified file in a PDK path; a first editing module 52, which is used to fill the description of process parameters and the grid unit into the PDK path and a standard cell library path; a second editing module 54, which is used to fill a determined metal layer number and thickness into a layermap path in the PDK path; a third editing module 56, which is used to fill a rule file in the PDK path according to the layermap path; and a fourth editing module 58, which is used to extract information under each process angle by using a lib script and fill the information.

[0075] The embodiment of the present application provides a process library information editing device. Wherein, the description of process parameters in the beginning of a file in a lib file is acquired, and a grid unit is acquired from a specified file in a PDK path; the description of process parameters and the grid unit are filled into the PDK path and a standard cell library path; a determined metal layer number and thickness are filled into a layermap path in the PDK path; a rule file in the PDK path is filled according to the layermap path; information under each process angle is extracted by using a lib script, and the information is filled, so as to realize the technical effect of improving work efficiency of agile development and reducing possible error rate.

[0076] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 means for functionally implementing the steps in one or more flow or blocks

[0077] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 means for functionally implementing the steps in one or more flow or blocks

[0078] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 means for functionally implementing the steps in one or more flow or blocks

[0079] The above description is only preferred embodiments of the present application, and not intended to limit the protection scope of the present application.

Claims

1. A method for editing information in a process library, characterized in that, include: Retrieve the description of the process parameters at the beginning of the lib file and obtain the grid units from the specified file in the PDK path; Fill the description of the process parameters and the grid unit into the PDK path and the standard cell library path; Fill the determined number and thickness of metal layers into the layermap path in the PDK path; Fill in the rule file in the PDK path according to the layermap path; wherein, fill in the drc and lvs rule files in the PDK that are consistent with the determined layermap. Extract information for each process corner using the lib script and fill in the information; The information related to the process library is stored in JSON format. Each process corner is configured as a group, which contains the paths to the lib file, the corresponding lef file, spice file, gds file, qrc file, verilog file, tplus file, and power_grid file. The path to the lib file is selected from one of the three models: CCS, NLDM, and ECSM. The lib file contains process corner information, which serves as the basis for grouping.

2. The method for editing information in a process library according to claim 1, characterized in that, The process of extracting information from each process corner using the lib script and filling in that information includes: Extract lib information for each process corner using lib scripts and fill in the lib information; Layer stacking information is filled in manually using instructions. This layer stacking information includes: minimum width, spacing, offset, and power_strap. The bit information and special unit information are extracted through the lib script and filled in, wherein the bit information is located in the lef file of the standard unit library.

3. The method for editing information in a process library according to claim 2, characterized in that, The extraction of information for each process corner using the lib script includes: Determine the PDK path and standard cell library path of the target process library; Determine the root directory of the lib file and select the desired delay model; Iterate through all lib files under each VT type and create groups based on the VT type and process corner information; Based on the VT type of each group, obtain the path of the specified file in the corresponding directory; The transistor model, driving voltage, and temperature are extracted from the filename of the lib file. Extract the names of all special units in the lib file and the bit information in the lef file based on the special unit type list.

4. The method for editing information in a process library according to claim 1, characterized in that, The method further includes: The files corresponding to the SRAM are organized according to the size of the SRAM to obtain files classified according to the size of the SRAM; The files are classified according to their file types to obtain the classified files.

5. The method for editing information in a process library according to claim 4, characterized in that, The naming convention for the SRAM is SRAM{ports}RW{depth}x{width}, where ports refers to whether the SRAM is single-port or dual-port, depth is the depth of the SRAM, and width is the data bit width of the SRAM.

6. The method for editing information in a process library according to claim 5, characterized in that, The name of the SRAM is renamed to obtain the renamed name of the SRAM. The renamed SRAM is named in the format SRAM{ports}RW{depth}x{width}_PVT_{voltage}V_{temperature}C.lib, where ports refers to whether the SRAM is single-port or dual-port, depth is the depth of the SRAM, width is the data bit width of the SRAM, voltage is the voltage in the process corner, the decimal point is replaced with P, and temperature is the temperature in the process corner, negative temperatures are replaced with -.

7. The method for editing information in a process library according to claim 4, characterized in that, The method further includes: The port definitions in the SRAM are read using the lib script, where the port definitions include: port name and port polarity.

8. The method for editing information in a process library according to claim 4, characterized in that, The method further includes: Based on the name of the SRAM, a structured information file named sram-cache.json is generated using the lib script.

9. The method for editing information in a process library according to claim 4, characterized in that, The method further includes: Configure the control port of the SRAM and the value of the control port in the mem.v file.

10. An information editing device for a process library, characterized in that, include: The acquisition module is used to obtain the description of the process parameters at the beginning of the lib file and to obtain the grid units from the specified file in the PDK path; The first editing module is used to fill in the description of the process parameters and the grid units into the PDK path and the standard cell library path; The second editing module is used to fill in the determined number and thickness of metal layers into the layermap path in the PDK path; The third editing module is used to fill in the rule files in the PDK path according to the layermap path; wherein, according to the determined layermap, the drc and lvs rule files in the PDK that are consistent with it are filled in; The fourth editing module is used to extract information from each process corner using the lib script and fill in the information. The information related to the process library is stored in JSON format. Each process corner is configured as a group, which contains the paths to the lib file, the corresponding lef file, spice file, gds file, qrc file, verilog file, tplus file, and power_grid file. The path to the lib file is selected from one of the three models: CCS, NLDM, and ECSM. The lib file contains process corner information, which serves as the basis for grouping.

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