An XORE module configuration system and method for generating NAND check data

By employing ID number binding and two sets of configuration interfaces in the NAND memory, the XORE module and the NAND controller are efficiently paired, solving the data error correction problem under cost constraints, improving performance, and reducing chip area and cost.

CN116189747BActive Publication Date: 2026-03-13SHANDONG SINOCHIP SEMICON CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-03-01
Publication Date
2026-03-13

AI Technical Summary

Technical Problem

Under cost constraints, how can we efficiently configure the XORE module and NAND controller in NAND memory to generate verification data, ensure data error correction capability, and reduce chip area and tape-out cost?

Method used

The configuration system employs N NAND controllers, M XORE modules, and an arbitration module. Through ID number binding and two sets of identical configuration interfaces, it enables flexible pairing and XOR operations of XORE modules, ensuring efficient utilization and a seamless workflow for XORE modules.

Benefits of technology

It improves the utilization rate of the XORE module, reduces chip area and tape-out cost, while also being flexible enough to adapt to various scenario requirements and significantly improves performance.

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Abstract

This invention discloses an XORE module configuration system and method for generating NAND verification data. The configuration system includes a NAND controller, an XORE module, and an arbitration module. Each NAND controller and XORE module is assigned an ID number, and all NAND controllers and XORE modules are connected to the arbitration module. During system operation, the NAND controller and XORE module are bound by their ID numbers, allowing data from the NAND controller to be sent to the corresponding XORE module via the arbitration module to generate verification data. Each XORE module has two identical configuration interfaces to receive configuration information from the NAND controller. When an XORE is started via interface 1, interface 2 receives and caches the configuration information required for the next round of operations. After the current round of calculation is completed, the next round of operation begins immediately. This invention achieves the generation of verification information and the writing of NAND data as efficiently as possible, given a limited number of XORE modules.
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Description

Technical Field

[0001] This invention relates to the field of storage, specifically to an XORE module configuration system and method for generating NAND verification data. Background Technology

[0002] Due to the limitations of NAND flash memory technology, there is a certain probability of errors occurring after data is written. A data error correction mechanism is needed to ensure that the original information can still be recovered even when a small number of errors occur. The XORE module implements such a function. It generates verification information by XORing multiple sets of data written to NAND flash memory and also writes it to NAND flash memory. When an error occurs in a set of data, the error content can be recovered by XORing the verification information with other data.

[0003] To achieve the above process, the NAND controller module responsible for writing data and the XORE module responsible for generating verification information need to work together. However, since a chip may integrate multiple NAND controllers and XOREs, and considering production costs and actual needs, the number of XORE modules required is often less than that of NAND controllers. Therefore, a flexible and efficient way is needed to pair the two, generate verification information, and write it into the NAND memory along with the protected data. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide an XORE module configuration system and method for generating NAND verification data, which flexibly connects and configures the XORE module with the NAND controller, and realizes the generation of verification information and the writing of NAND data as efficiently as possible under the premise of a limited number of XORE modules.

[0005] To solve the aforementioned technical problem, the present invention adopts the following technical solution: an XORE module configuration system for generating NAND verification data, comprising N NAND controllers, M XORE modules, and an arbitration module connected between the N NAND controllers and the M XORE modules, where N and M are both positive integers, and N ≥ 2M; each NAND controller and XORE module is assigned a set of ID numbers, and all NAND controllers and XORE modules are connected to the arbitration module. When the system is working, the NAND controllers and XORE modules are bound by ID numbers, so that the data of the NAND controllers is sent to the XORE modules with the corresponding ID numbers through the arbitration module to generate verification data; each XORE module is configured with two identical configuration interfaces to receive configuration information sent by the NAND controllers. When an XORE module is started through interface 1, interface 2 receives and caches the configuration information required for the next round of operation. After the current round of calculation is completed, the next round of operation is started immediately.

[0006] Furthermore, this system only implements data transmission between the NAND controller with the specified ID number and the XORE module. Specifically, after the NAND controller determines the XORE module it is currently working with and its configuration interface, when sending data to the arbitration module, the NAND controller writes the XORE module's ID number and interface number to a specified location in the data stream, causing the data to be sent to the specified interface of the XORE module with the specified ID number. After the XORE module determines the ID number of the NAND controller it is working with, data from other NAND controllers is not processed. When the XORE module determines the idle interface status, and this interface is configured, it determines the ID number of the NAND controller it is working with and stops receiving new configuration information. When performing the next round of operations through this interface, data from other NAND controllers is not processed.

[0007] Furthermore, this system implements the function of generating verification data of different lengths. That is, after the NAND controller determines the length of the verification data and the total length of the data stream that needs to generate verification data, the NAND controller checks the data stream. When it finds that enough data has been sent to the XORE module, it stops sending data and then retrieves the generated verification data from the XORE module and writes it into the NAND memory. After the XORE module determines the length of the verification data and the total length of the data stream that needs to generate verification data, it XORs the length of the verification data with the next group of data until the length of the received data reaches the total length of the data stream that needs to generate verification data. Then it stops receiving data and stores the generated verification data in a designated location. The next round of data generation will begin after the NAND controller retrieves the data.

[0008] Furthermore, this system achieves seamless startup of the next round of work through two identical configuration interfaces of the XORE module. Specifically, after the current data is sent, the NAND controller determines whether it has been paired with the new XORE module's idle interface in advance. If paired, the new round of operation starts immediately after the current round of operation ends, and the ID number and interface number of the new XORE module are written to the specified position in the data stream. After processing a round of data, the XORE module checks whether new configuration information has been pre-loaded into the idle interface. If so, the new round of operation starts immediately.

[0009] This invention also discloses a method for configuring an XORE module to generate NAND verification data, comprising the following steps:

[0010] S01) A certain NAND controller obtains the data to be written from the DDR memory through the bus and sends the data to the NAND memory through the PHY interface;

[0011] S02) The NAND controller queries its own software configuration information to confirm the XORE module ID number and interface number that it works with. Then, it sends the above data along with the XORE module ID number and interface number to the arbitration module.

[0012] S03) The arbitration module forwards the data to the corresponding interface of the corresponding XORE module based on the XORE module ID number and interface number;

[0013] S04) After the XORE module confirms that the data comes from the specified NAND controller, it begins to perform an XOR operation according to the specified length.

[0014] S05) When the length of the data stream sent by the NAND controller reaches the preset total length, retrieve the verification data from the designated position corresponding to the XORE module ID number and write it to the NAND controller.

[0015] S06) The generation process of a set of verification data is now complete. If the NAND controller finds a new XORE module ID number and interface number that has been configured in advance, it will immediately start the next round of operation according to step S01).

[0016] Furthermore, during the execution of steps S01) to S06), the status of the NAND controller and XORE module is monitored in real time, and the configuration information of the NAND controller and XORE module is updated in real time to ensure that when the NAND controller sends data, the corresponding XORE module has completed the configuration in advance and the computing unit is in an idle state. Otherwise, the NAND controller is paused to start a new round of data transmission process until the computing unit of the XORE module returns to an idle state.

[0017] Furthermore, the matching method between the NAND controller and the XORE module interface is as follows: Assuming that the M XOR modules are numbered from 1 to M respectively, and each XORE module has 2 interfaces numbered 1 and 2 respectively, then the XORE module interfaces are used in the following order: 1-1, 2-1, ..., M-1, 1-2, 2-2, ..., M-2.

[0018] The beneficial effects of this invention are as follows: This invention provides a method for improving performance under cost constraints. By maximizing the utilization of XORE computing units, it enables the same performance as before with a smaller number of XORE modules, significantly reducing chip area and tape-out costs. Furthermore, due to real-time software monitoring, the pairing between modules offers considerable flexibility, capable of handling various scenarios. This invention offers significant advantages over the traditional design where each NAND controller is fixed with one XORE. Attached Figure Description

[0019] Figure 1This is a schematic diagram of the system described in Example 1. Detailed Implementation

[0020] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0021] Example 1

[0022] This embodiment discloses an XORE module configuration system for generating NAND verification data, such as... Figure 1 As shown, the system includes N NAND controllers, M XORE modules, and an arbitration module connecting the N NAND controllers and M XORE modules, where N and M are positive integers, and N ≥ 2M. Each NAND controller and XORE module is assigned an ID number, and all NAND controllers and XORE modules are connected to the arbitration module. During system operation, the NAND controllers and XORE modules are bound by their ID numbers, allowing data from the NAND controllers to be sent to the corresponding XORE module via the arbitration module to generate verification data. To ensure the continuity of XORE operation and minimize the idle time of the XORE computing units, each XORE module is equipped with two identical configuration interfaces to receive configuration information sent by the NAND controllers. When an XORE module is started through interface 1, interface 2 receives and caches the configuration information required for the next round of operation. After the current round of calculation is completed, the next round of operation begins immediately.

[0023] In this embodiment, the NAND controller module and the XORE module are connected via an arbitration module. Each NAND controller can independently write bus data into the NAND memory. Each NAND controller can send data to the software-specified XORE module via the arbitration module and can read generated verification data from the specified XORE module. Each XORE module can independently generate verification data. Each XORE module can receive data from all NAND controllers via the arbitration module. Although each XORE module contains only one set of data calculation units, it contains two completely identical configuration interfaces. When the XORE is started through interface 1, it can cache the configuration information required for the next round of operation in advance through interface 2. After the current round of operation is completed, the next round of calculation can start immediately.

[0024] This system has the following functions:

[0025] This system only enables data transmission between a NAND controller with a specified ID number and an XORE module. Specifically, after the NAND controller determines its partner XORE module and its configuration interface, when sending data to the arbitration module, it writes the XORE module's ID number and interface number to a specified location in the data stream, ensuring the data is sent to the specified interface of the XORE module with the specified ID number. Once the XORE module determines its partner NAND controller ID number, data from other NAND controllers is ignored. When an XORE module determines an idle interface status, and this interface is configured, it determines its partner NAND controller ID number and stops receiving new configuration information. During the next round of operations through this interface, data from other NAND controllers is ignored.

[0026] This system implements the function of generating check data of different lengths. Specifically: After the NAND controller determines the length of the check data and the total length of the data stream to be used to generate check data, the NAND controller checks the data stream. When it finds that enough data has been sent to the XORE module, it stops sending data and then retrieves the generated check data from the XORE module and writes it to the NAND memory. After the XORE module determines the length of the check data and the total length of the data stream to be used to generate check data, it XORs the length of the check data with the next group of data, until the length of the received data reaches the total length of the data stream to be used to generate check data. The XORE module checks the length of the data stream. When it finds that enough data has been received, it stops receiving data and stores the generated check data in a designated location. The next round of data generation begins after the NAND controller retrieves the stored data.

[0027] This system achieves seamless initiation of the next round of operations through two identical configuration interfaces. Specifically: after the current data transmission is completed, the NAND controller determines whether it has pre-paired with a new XORE module's idle interface. If paired, the new round of operations begins immediately after the current round ends, and the ID number and interface number of the new XORE module are written to the designated location in the data stream. After processing a round of data, the XORE module checks whether new configuration information has been pre-loaded into the idle interface. If so, the new round of operations begins immediately.

[0028] Example 2

[0029] This invention also discloses a method for configuring an XORE module to generate NAND verification data, comprising the following steps:

[0030] S01) A certain NAND controller obtains the data to be written from the DDR memory through the bus and sends the data to the NAND memory through the PHY interface;

[0031] S02) The NAND controller queries its own software configuration information to confirm the XORE module ID number and interface number that it works with. Then, it sends the above data along with the XORE module ID number and interface number to the arbitration module.

[0032] S03) The arbitration module forwards the data to the corresponding interface of the corresponding XORE module based on the XORE module ID number and interface number;

[0033] S04) After the XORE module confirms that the data comes from the specified NAND controller, it begins to perform an XOR operation according to the specified length.

[0034] S05) When the length of the data stream sent by the NAND controller reaches the preset total length, retrieve the verification data from the designated position corresponding to the XORE module ID number and write it to the NAND controller.

[0035] S06) The generation process of a set of verification data is now complete. If the NAND controller finds a new XORE module ID number and interface number that has been configured in advance, it will immediately start the next round of operation according to step S01).

[0036] In this embodiment, during the execution of steps S01) to S06), the status of the NAND controller and the XORE module is monitored in real time, and the configuration information of the NAND controller and the XORE module is updated in real time to ensure that when the NAND controller sends data, the corresponding XORE module has completed the configuration in advance and the computing unit is in an idle state. Otherwise, the NAND controller is paused to start a new round of data transmission process until the computing unit of the XORE module returns to an idle state.

[0037] In this embodiment, the matching method between the NAND controller and the XORE module interface is as follows: Assuming that there are M XOR modules numbered 1 to M respectively, and each XORE module has two interfaces numbered 1 and 2 respectively, the order in which the XORE module interfaces are used is 1-1, 2-1, ..., M-1, 1-2, 2-2, ..., M-2. That is, when a NAND controller needs to use an XORE module, it will first occupy interface 1 of the XORE1 module. When another NAND controller needs to use an XORE module and finds that interface 1 of the XORE1 module is occupied, it will use interface 1 of the next XORE module, namely the XORE2 module, and so on. When all interfaces are occupied or the computing units are not idle, the software should pause the NAND controller and start a new round of operations until the interfaces and computing units return to an idle state.

[0038] The above description is merely the basic principle and preferred embodiment of the present invention. Improvements and substitutions made by those skilled in the art based on the present invention are within the scope of protection of the present invention.

Claims

1. A configuration system for an XORE module used to generate NAND verification data, characterized in that: The system comprises N NAND controllers, M XORE modules, and an arbitration module connecting the N NAND controllers and M XORE modules, where N and M are positive integers and N ≥ 2M. Each NAND controller and XORE module is assigned an ID number, and all NAND controllers and XORE modules are connected to the arbitration module. During system operation, the NAND controllers and XORE modules are bound by their ID numbers, allowing data from the NAND controllers to be sent to the corresponding XORE module via the arbitration module to generate verification data. Each XORE module has two identical configuration interfaces to receive configuration information sent by the NAND controllers. When an XORE module is started through interface 1, interface 2 receives and caches the configuration information required for the next round of operation. After the current round of calculation is completed, the next round of operation begins immediately.

2. The XORE module configuration system for generating NAND verification data according to claim 1, characterized in that: This system only enables data transmission between a NAND controller with a specified ID number and an XORE module. Specifically: after the NAND controller determines the XORE module it is currently working with and its configuration interface, when sending data to the arbitration module, the NAND controller writes the XORE module's ID number and interface number to a specified location in the data stream, ensuring the data is sent to the specified interface of the XORE module with the specified ID number. Once the XORE module determines the ID number of its working NAND controller, data from other NAND controllers is ignored. When the XORE module determines the idle interface status, and this interface is configured, it determines the ID number of its working NAND controller and stops receiving new configuration information. When performing the next round of operations through this interface, data from other NAND controllers is ignored.

3. The XORE module configuration system for generating NAND verification data according to claim 1, characterized in that: This system has the function of generating verification data of different lengths. Specifically, after the NAND controller determines the length of the verification data and the total length of the data stream that needs to generate the verification data, the NAND controller checks the data stream. When it finds that enough data has been sent to the XORE module, it stops sending data and then retrieves the generated verification data from the XORE module and writes it into the NAND memory. After the XORE module determines the length of the verification data and the total length of the data stream that needs to generate the verification data, it XORs the length of the verification data with the next group of data until the length of the received data reaches the total length of the data stream that needs to generate the verification data. Then it stops receiving data and stores the generated verification data in a designated location. The next round of data generation will begin after the NAND controller retrieves the data.

4. The XORE module configuration system for generating NAND verification data according to claim 1, characterized in that: This system achieves seamless startup of the next round of work through two identical configuration interfaces of the XORE module. Specifically, after the current data is sent, the NAND controller determines whether it has been paired with the new XORE module's idle interface in advance. If paired, the new round of operation starts immediately after the current round of operation ends, and the ID number and interface number of the new XORE module are written to the specified position in the data stream. After processing a round of data, the XORE module checks whether new configuration information has been pre-loaded into the idle interface. If so, the new round of operation starts immediately.

5. A method for configuring an XORE module to generate NAND verification data, characterized in that: Includes the following steps: S01) A certain NAND controller obtains the data to be written from the DDR memory through the bus and sends the data to the NAND memory through the PHY interface; S02) The NAND controller queries its own software configuration information to confirm the XORE module ID number and interface number that it works with. Then, it sends the above data along with the XORE module ID number and interface number to the arbitration module. S03) The arbitration module forwards the data to the corresponding interface of the corresponding XORE module based on the XORE module ID number and interface number; S04) After the XORE module confirms that the data comes from the specified NAND controller, it begins to perform an XOR operation according to the specified length. S05) When the length of the data stream sent by the NAND controller reaches the preset total length, retrieve the verification data from the designated position corresponding to the XORE module ID number and write it to the NAND controller. S06) The generation process of a set of verification data is now complete. If the NAND controller finds a new XORE module ID number and interface number that has been configured in advance, it will immediately start the next round of operation according to step S01).

6. The XORE module configuration method for generating NAND verification data according to claim 5, characterized in that: During the execution of steps S01) to S06), the status of the NAND controller and XORE module is monitored in real time, and the configuration information of the NAND controller and XORE module is updated in real time to ensure that when the NAND controller sends data, the corresponding XORE module has completed the configuration in advance and the computing unit is in an idle state. Otherwise, the NAND controller is paused to start a new round of data transmission process until the computing unit of the XORE module returns to an idle state.

7. The XORE module configuration method for generating NAND verification data according to claim 5, characterized in that: The matching method between the NAND controller and the XORE module interface is as follows: Assuming that there are M XOR modules numbered from 1 to M, and each XORE module has 2 interfaces numbered 1 and 2 respectively, the XORE module interfaces are used in the following order: 1-1, 2-1, ..., M-1, 1-2, 2-2, ..., M-2.

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