A backplane test method and device, electronic equipment and storage medium

Abstract

The application provides a backboard testing method and device, electronic equipment and a storage medium, comprising: obtaining testing task configuration information of each of the plurality of backboards to be tested; obtaining testing resource information of the mainboard; sending the testing resource information and the testing task configuration information of each of the plurality of backboards to be tested to the mainboard; receiving resource allocation information sent by the mainboard, wherein the resource allocation information represents testing resources corresponding to each of the plurality of backboards to be tested; and controlling the plurality of backboards to be tested to use the testing resources corresponding to each of the plurality of backboards to be tested, and execute testing tasks according to the testing task configuration information of each of the plurality of backboards to be tested. Since the plurality of backboards to be tested can be connected to the same mainboard to perform testing at the same time through the expansion board, the utilization rate of the mainboard resources is greatly improved, and the occupancy rate of the testing space is reduced.

Description

Technical Field

[0001] This invention relates to the field of server testing technology, and in particular to a backplane testing method, apparatus, electronic device, and storage medium. Background Technology

[0002] With the continuous development of server technology, the demand for servers is gradually increasing for traditional information services and the increasingly powerful cloud computing services. Before a server leaves the factory, it needs to undergo a series of server tests, such as stress tests, stability tests, and performance tests, to ensure that all functions of the server operate up to standard.

[0003] Current server testing is usually conducted by connecting one motherboard to one backplane due to the limitation of the number of motherboard interfaces. However, testing a single backplane cannot fully utilize all the resources of the motherboard, resulting in a large test space occupation and low motherboard resource utilization. Summary of the Invention

[0004] In view of this, the present invention aims to provide a backplane testing method, apparatus, electronic device and storage medium to solve the problem of low utilization of motherboard resources in current server testing.

[0005] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0006] A backplane testing method is applied to an expansion board, wherein the expansion board is connected to a motherboard and is respectively connected to multiple backplanes to be tested; the method includes:

[0007] Obtain the test task configuration information for each of the multiple backplanes to be tested, and obtain the test resource information for the motherboard;

[0008] Receive resource allocation information sent by the motherboard, wherein the resource allocation information represents the test resources corresponding to each of the plurality of backplanes to be tested;

[0009] Control the multiple backplanes under test to use their respective test resources and execute their respective test tasks according to their respective test task configuration information.

[0010] Furthermore, the expansion board includes multiple configuration interfaces, which are respectively connected to the multiple backplanes to be tested; obtaining the test task configuration information of each of the multiple backplanes to be tested includes:

[0011] Identify the backplane to be tested connected to each of the configuration interfaces;

[0012] Send a command to retrieve test task configuration information to each of the backplanes to be tested;

[0013] Receive and parse the data packets sent by each of the backplanes under test to obtain the test task configuration information of each of the backplanes under test.

[0014] Furthermore, obtaining the test resource information of the motherboard includes:

[0015] Send a command to retrieve test resource information to the motherboard;

[0016] The system receives and parses data packets sent by the motherboard to obtain the motherboard's test resource information.

[0017] Furthermore, after receiving the resource allocation information sent by the motherboard, the method further includes: generating a cloud control panel, which is used to create a test environment for the multiple backplanes under test by utilizing the test resources corresponding to each of the multiple backplanes under test according to the test task configuration information of each of the multiple backplanes under test;

[0018] Controlling the multiple backplanes under test to use their respective corresponding test resources and execute their respective test tasks according to their respective test task configuration information includes:

[0019] Control the multiple backplanes under test to execute their respective test tasks in their respective test environments.

[0020] Furthermore, the plurality of backplanes under test include: test indicator lights; the control of the plurality of backplanes under test to perform their respective test tasks in their respective test environments includes:

[0021] The test indicator lights up when the multiple backplanes under test are executing their respective test tasks in their respective test environments, and turns off after the test is completed.

[0022] After the test indicator light on the target backplane goes out, the test resource allocation of the target backplane is released, and the test resources are recycled and returned to the motherboard.

[0023] Compared with existing technologies, the backplane testing method provided by this invention has the following advantages:

[0024] This invention obtains test task configuration information for each of the multiple backplanes under test; obtains test resource information for the motherboard; sends the test resource information and the test task configuration information for each of the multiple backplanes under test to the motherboard; receives resource allocation information sent by the motherboard, the resource allocation information representing the test resources corresponding to each of the multiple backplanes under test; and controls the multiple backplanes under test to use their respective test resources and execute their respective test tasks according to their respective test task configuration information. Because the expansion board allows multiple backplanes under test to be connected to the same motherboard for simultaneous testing, it greatly improves the utilization rate of motherboard resources and reduces the occupancy rate of test space.

[0025] Another objective of this invention is to provide a backplane testing method to solve the problem of low motherboard resource utilization in current server testing.

[0026] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0027] A backplane testing method is applied to a motherboard, wherein the motherboard is connected to an expansion board, and the expansion board is respectively connected to multiple backplanes to be tested; the method includes:

[0028] In response to a command to retrieve test resource information, the test resource information is sent to the expansion board.

[0029] Receive the test task configuration information of each of the multiple backplanes to be tested sent by the expansion board, and allocate test resources for the multiple backplanes to be tested;

[0030] The test resource allocation results are sent to the expansion board.

[0031] The backplane testing method described above has the same advantages over existing technologies, and will not be elaborated further here.

[0032] Another objective of this invention is to provide a backplane testing method to solve the problem of low motherboard resource utilization in current server testing.

[0033] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0034] A backplane testing method is applied to a backplane under test, wherein multiple backplanes under test are respectively connected to an expansion board; the method includes:

[0035] In response to a command to retrieve test task configuration information, multiple test task configuration information items are sent to the expansion board.

[0036] Receive resource allocation information sent by the expansion board;

[0037] According to the resource allocation information, each entity uses its corresponding test resources and executes its respective test tasks according to its test task configuration information.

[0038] The backplane testing method described above has the same advantages over existing technologies, and will not be elaborated further here.

[0039] Another objective of this invention is to provide a backplane testing device to solve the problem of low resource utilization of current server testing motherboards.

[0040] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0041] A backplane testing device is applied to an expansion board, the expansion board being connected to a motherboard and to multiple backplanes to be tested; the device includes:

[0042] The acquisition module is used to acquire the test task configuration information of each of the multiple backplanes to be tested, and to acquire the test resource information of the motherboard;

[0043] The first sending module is used to receive resource allocation information sent by the motherboard, wherein the resource allocation information represents the test resources corresponding to each of the plurality of backplanes to be tested;

[0044] The control module is used to control the multiple backplanes under test to use their respective test resources and execute their respective test tasks according to their respective test task configuration information.

[0045] The backplane testing device and the backplane testing method described above have the same advantages over the prior art, and will not be elaborated here.

[0046] Another objective of this invention is to provide a backplane testing device to solve the problem of low resource utilization of current server testing motherboards.

[0047] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0048] A backplane testing device is applied to a motherboard, the motherboard being connected to an expansion board, and the expansion board being connected to multiple backplanes to be tested; the device includes:

[0049] The second sending module is used to send the test resource information to the expansion board in response to the command to retrieve the test resource information;

[0050] The allocation module is used to receive the test task configuration information of each of the multiple backplanes to be tested sent by the expansion board, and to allocate test resources for the multiple backplanes to be tested.

[0051] The third sending module is used to send the test resource allocation results to the expansion board.

[0052] The backplane testing device and the backplane testing method described above have the same advantages over the prior art, and will not be elaborated here.

[0053] Another objective of this invention is to provide a backplane testing device to solve the problem of low resource utilization of current server testing motherboards.

[0054] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0055] A backplane testing device is applied to a backplane under test, wherein multiple backplanes under test are respectively connected to an expansion board; the device includes:

[0056] The fourth sending module is used to send multiple test task configuration information to the expansion board in response to a command to retrieve test task configuration information;

[0057] The second receiving module is used to receive resource allocation information sent by the expansion board;

[0058] The testing module is used to execute its respective test tasks according to the resource allocation information, using its corresponding test resources and according to its respective test task configuration information.

[0059] The backplane testing device and the backplane testing method described above have the same advantages over the prior art, and will not be elaborated here.

[0060] Another objective of this invention is to provide an electronic device to solve the problem of low resource utilization of current server test motherboards.

[0061] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0062] An electronic device, comprising:

[0063] A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the backplane testing method described in any of the preceding claims.

[0064] The electronic device described above has the same advantages as the backplane testing method described above compared to the prior art, and will not be elaborated here.

[0065] Another objective of this invention is to provide a computer-readable storage medium to address the problem of low resource utilization on current server test motherboards.

[0066] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0067] A computer-readable storage medium comprising:

[0068] When the instructions in the storage medium are executed by the processor of the electronic device, the electronic device is able to perform the backplane testing method described in any of the preceding claims.

[0069] The computer-readable storage medium described above has the same advantages as the backplane testing method described above compared to the prior art, and will not be elaborated here. Attached Figure Description

[0070] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0071] Figure 1 A flowchart illustrating the steps of a backplane testing method according to Embodiment 1 of the present invention is shown.

[0072] Figure 2 A flowchart illustrating the steps of obtaining test task configuration information in a backplane testing method according to another embodiment of the present invention is shown.

[0073] Figure 3 A flowchart illustrating the steps of obtaining test resource information in a backplane testing method according to another embodiment of the present invention is shown.

[0074] Figure 4 A flowchart illustrating the steps of a backplane testing method according to another embodiment of the present invention is shown.

[0075] Figure 5 A flowchart illustrating the steps of controlling the test indicator light in a backplane testing method according to another embodiment of the present invention is shown.

[0076] Figure 6 A flowchart illustrating the steps of a backplane testing method according to Embodiment 2 of the present invention is shown.

[0077] Figure 7 A flowchart illustrating the steps of a backplane testing method according to Embodiment 3 of the present invention is shown.

[0078] Figure 8 A flowchart of a backplane testing method according to another embodiment of the present invention is shown;

[0079] Figure 9 A schematic diagram of a backplane testing device according to Embodiment 4 of the present invention is shown;

[0080] Figure 10 A schematic diagram of a backplane testing device according to Embodiment 5 of the present invention is shown;

[0081] Figure 11A schematic diagram of a backplane testing device according to Embodiment Six of the present invention is shown;

[0082] Figure 12 A schematic diagram showing the connection between the expansion board, the motherboard, and multiple backplanes to be tested is shown.

[0083] Figure 13 A schematic diagram showing the connection between the expansion board and the backplane under test is shown.

[0084] Figure 14 This diagram illustrates the process of the expansion board sending a retrieval command. Detailed Implementation

[0085] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0086] It should be noted that, without conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0087] Example 1

[0088] Reference Figure 1 , Figure 1 A flowchart illustrating the steps of a backplane testing method according to Embodiment 1 of the present invention is shown. This method is applied to an expansion board connected to a motherboard, and the expansion board is connected to multiple backplanes to be tested. Figure 1 As shown, it includes:

[0089] Step S101: Obtain the test task configuration information of each of the multiple backplanes to be tested, and obtain the test resource information of the motherboard.

[0090] A server is a computer that manages computing resources, including a motherboard and a backplane.

[0091] Before leaving the factory, servers typically undergo a series of tests to ensure their operation and performance meet standards. These tests include system function testing, system stress testing, interface testing, and load testing.

[0092] Current server testing is limited by the number of motherboard interfaces, and usually uses a method of connecting one motherboard to one backplane under test. However, testing one backplane under test cannot fully utilize all the resources of the motherboard, which leads to a large test space occupation and low motherboard resource utilization.

[0093] With the continuous development of server technology, the demand for servers is gradually increasing from traditional IT services and the increasingly powerful cloud computing services. To meet the growing demand for server testing, it is extremely important to find a way to cover multiple backplanes on the same motherboard for testing tasks.

[0094] In an embodiment of the present invention, a backplane testing method is provided for a test task that covers multiple backplanes on the same motherboard.

[0095] First, configure the expansion board, refer to... Figure 12 , Figure 12 A schematic diagram showing the connection between the expansion board, the motherboard, and multiple backplanes under test is shown, such as... Figure 12 As shown, the expansion board includes a motherboard interface, multiple configuration interfaces, and an expansion board processor.

[0096] In one specific implementation, the motherboard interface includes a power interface, an I2C interface, and a SAS interface; each configuration interface includes a power interface, an I2C interface, and a SAS interface; the expansion board processor can be an ARM Advanced RISC Machine (ARM) processor.

[0097] The expansion board connects to the motherboard via the motherboard interface and to multiple backplanes under test via multiple configuration interfaces.

[0098] When testing multiple backplanes, connect the expansion board's motherboard interface to the motherboard, and connect the expansion board's multiple configuration interfaces to the multiple backplanes under test respectively.

[0099] For example, the first configuration interface of the expansion board is connected to the first backplane under test; the second configuration interface of the expansion board is connected to the second backplane under test; and the third configuration interface of the expansion board is connected to the third backplane under test.

[0100] The expansion board processor retrieves the test task configuration information for each of the multiple backplanes under test. The test task configuration information may include resource information required for the test tasks of each backplane under test, such as memory resources, running resources, bandwidth resources, etc.; it may also include information on the functions that each backplane under test needs to be tested, such as storage functions, data transmission functions, etc.

[0101] For example, retrieve the first test task configuration information of the first backplane to be tested; retrieve the second test task configuration information of the second backplane to be tested; retrieve the third test task configuration information of the third backplane to be tested.

[0102] Next, the test resource information of the motherboard is retrieved through the expansion board processor. The test resource information is used to characterize the resources that the motherboard can provide to each backplane under test for testing, such as memory resources, running resources, bandwidth resources, etc.

[0103] After integrating the test task configuration information of each of the multiple backplanes to be tested with the test resource information of the motherboard, the information is sent to the motherboard.

[0104] Then proceed to step S102.

[0105] Step S102: Receive resource allocation information sent by the motherboard, wherein the resource allocation information represents the test resources corresponding to each of the multiple backplanes to be tested.

[0106] After the expansion board sends the test task configuration information of each of the multiple backplanes to be tested and the test resource information of the motherboard to the motherboard, the motherboard allocates test resources for each backplane to be tested based on the information and sends the test resource allocation information to the expansion board processor.

[0107] In one specific implementation, the allocation of test resources may include: allocation of memory resources, allocation of runtime resources, allocation of bandwidth resources, etc.

[0108] For example, a first test resource is assigned to a first backplane to be tested, a second test resource is assigned to a second backplane to be tested, and a third test resource is assigned to a third backplane to be tested. The first, second, and third test resources may be the same or different.

[0109] The expansion board receives the resource allocation information for each backplane under test from the motherboard and sends the resource allocation information to the corresponding backplane under test.

[0110] For example, the allocation information of the first test resource is sent to the first backplane under test; the allocation information of the second test resource is sent to the second backplane under test; and the allocation information of the third test resource is sent to the third backplane under test.

[0111] Then proceed to step S103.

[0112] Step S103: Control the multiple backplanes under test to use their respective test resources and execute their respective test tasks according to their respective test task configuration information.

[0113] After the expansion board sends the resource allocation information of each backplane to be tested to the corresponding backplane, it controls each backplane to use the allocated test resources, execute its own test tasks according to its own test task configuration information, and output the test results.

[0114] For example, the expansion board controls the first backplane under test to use the first test resources to perform corresponding function tests according to the information of the functions to be tested in the first test task configuration information; controls the second backplane under test to use the second test resources to perform corresponding function tests according to the information of the functions to be tested in the second test task configuration information; and controls the third backplane under test to use the third test resources to perform corresponding function tests according to the information of the functions to be tested in the third test task configuration information.

[0115] This invention, in its embodiments, acquires test task configuration information for each of the plurality of backplanes under test; acquires test resource information for the motherboard; sends the test resource information and the test task configuration information for each of the plurality of backplanes under test to the motherboard; receives resource allocation information sent by the motherboard, the resource allocation information representing the test resources corresponding to each of the plurality of backplanes under test; and controls the plurality of backplanes under test to use their respective corresponding test resources and execute their respective test tasks according to their respective test task configuration information. Because the expansion board allows multiple backplanes under test to be connected to the same motherboard for simultaneous testing, it greatly improves the utilization rate of motherboard resources and reduces the occupancy rate of test space.

[0116] Reference Figure 2 , Figure 2 A flowchart illustrating the steps of obtaining test task configuration information in a backplane testing method according to another embodiment of the present invention is shown, as follows: Figure 2 As shown, it includes:

[0117] Step S201: Identify the backplane to be tested connected to each of the configuration interfaces.

[0118] Reference Figure 13 , Figure 13 A schematic diagram showing the connection between the expansion board and the backplane under test is shown, such as... Figure 13 As shown, the expansion board includes a motherboard interface, multiple configuration interfaces, and an expansion board processor. Each configuration interface includes a power interface, an I2C interface, and a SAS interface. The multiple configuration interfaces of the expansion board are connected to multiple backplanes under test.

[0119] Among them, multiple configuration interfaces carry corresponding numbered tag information.

[0120] For example, the first configuration interface carries tag information numbered one, the second configuration interface carries tag information numbered two, and the third configuration interface carries tag information numbered three.

[0121] Each backplane under test includes a power interface, an I2C interface, and a SAS interface. The backplane under test connects to the corresponding interface of the expansion board configuration interface through these three interfaces to achieve connection with the expansion board configuration interface.

[0122] When acquiring the test task configuration information of each backplane to be tested, the expansion board processor first identifies the backplane to be tested connected to each configuration interface, and then associates the number tag information carried by the configuration interface with the backplane to be tested connected to the corresponding configuration interface.

[0123] For example, the first configuration interface's tag information is associated with the backplane to be tested connected to the first configuration interface to obtain the first backplane to be tested; the second configuration interface's tag information is associated with the backplane to be tested connected to the second configuration interface to obtain the second backplane to be tested; and the third configuration interface's tag information is associated with the backplane to be tested connected to the third configuration interface to obtain the third backplane to be tested.

[0124] Then proceed to step S202.

[0125] Step S202: Send the command to retrieve the test task configuration information to each of the backplanes to be tested.

[0126] Reference Figure 14 , Figure 14 A schematic diagram showing the expansion board sending a retrieval command is shown, such as... Figure 14 As shown, after the expansion board processor identifies multiple backplanes to be tested connected to the configuration interface, it generates a command to retrieve the test task configuration information for each backplane to be tested, and sends the retrieval command to each backplane to be tested through the I2C interface.

[0127] For example, the expansion board processor generates a retrieval command for the test task configuration information of the first backplane to be tested, the second backplane to be tested, and the third backplane to be tested, and sends the retrieval command to the first backplane to be tested, the second backplane to be tested, and the third backplane to be tested simultaneously.

[0128] After receiving the call command, each backplane under test packages its own test task configuration information into a data packet and sends it to the expansion board processor through the SAS interface.

[0129] In one specific implementation, the test task configuration information may include resource information for the test task requirements of each backplane under test, such as memory resources, runtime resources, bandwidth resources, etc.; it may also include information on the functions that each backplane under test needs to be tested, such as storage functions, data transmission functions, etc.

[0130] Then proceed to step S203.

[0131] Step S203: Receive and parse the data packets sent by each of the backplanes under test to obtain the test task configuration information of each of the backplanes under test.

[0132] After receiving the data packets containing the test task configuration information sent by each backplane under test through the SAS interface, the expansion board processor parses each data packet to obtain the test task configuration information data of each backplane under test.

[0133] For example, the system receives and parses a first data packet sent by a first backplane under test to obtain first test task configuration information; simultaneously receives and parses a second data packet sent by a second backplane under test to obtain second test task configuration information; and simultaneously receives and parses a third data packet sent by a third backplane under test to obtain third test task configuration information.

[0134] This invention identifies the backplanes under test connected to each of the configuration interfaces; sends a command to retrieve the test task configuration information to each of the backplanes under test; receives and parses data packets sent by each of the backplanes under test to obtain the test task configuration information of each backplane under test. Obtaining the test task configuration information of each backplane under test provides a data foundation for the allocation of test resources.

[0135] Reference Figure 3 , Figure 3 A flowchart illustrating the steps of obtaining test resource information in a backplane testing method according to another embodiment of the present invention is shown, as follows: Figure 3 As shown, it includes:

[0136] Step S301: Send a command to retrieve test resource information to the motherboard.

[0137] The expansion board includes a motherboard interface, which includes a power connector, an I2C connector, and a SAS connector. The expansion board connects to the motherboard by connecting these three connectors to their corresponding interfaces on the motherboard.

[0138] When retrieving test resource information from the motherboard, the expansion board processor first identifies the connected motherboard and generates a command to retrieve the motherboard's test resource information.

[0139] The retrieval command is sent to the motherboard via the I2C interface.

[0140] After receiving the retrieval command, the motherboard packages the test resource information into a data packet and sends it to the expansion board processor via the SAS interface.

[0141] Then proceed to step S302.

[0142] Step S302: Receive and parse the data packet sent by the motherboard to obtain the test resource information of the motherboard.

[0143] The expansion board processor receives data packets containing test resource information sent by the motherboard through the SAS interface, parses them, and obtains the motherboard's test resource information.

[0144] In one specific implementation, test resource information is used to characterize the resource information that the motherboard can provide to each backplane under test for testing, such as memory resources, runtime resources, bandwidth resources, etc.

[0145] In this embodiment of the invention, a command to retrieve the test resource information is sent to the motherboard; the data packet sent by the motherboard is received and parsed to obtain the motherboard's test resource information. Obtaining the motherboard's test resource information provides a data foundation for the allocation of test resources.

[0146] Reference Figure 4 , Figure 4 A flowchart illustrating the steps of a backplane testing method according to another embodiment of the present invention is shown, as follows: Figure 4 As shown, it includes:

[0147] Step S401: Generate the cloud control panel.

[0148] After receiving the test task configuration information from each backplane under test and the test resource information from the motherboard, the expansion board processor generates a cloud control panel. This cloud control panel is used to create test environments for the multiple backplanes under test, utilizing their respective test resources, based on their individual test task configuration information.

[0149] In one specific implementation, creating a test environment for multiple backplanes to be tested may include installing an operating system on the multiple backplanes to be tested, which is used to perform test tasks on the backplanes to be tested.

[0150] A cloud control panel is a virtual control panel that can create test environments for multiple backplanes under test and control them to perform their respective test tasks.

[0151] Then proceed to step S402.

[0152] Step S402: Control the multiple backplanes to be tested to execute their respective test tasks in their respective test environments.

[0153] After generating the cloud control panel, the expansion board processor will synchronize the test task configuration information of each backplane to be tested, the test resource information of the motherboard, and the resource allocation information for each backplane to be tested to the cloud control panel.

[0154] After receiving this information, the cloud control panel sends the resource allocation information to the corresponding backplane under test. It then controls multiple backplanes under test to execute their respective test tasks using their allocated resources within their respective operating systems.

[0155] For example, the cloud control panel controls the first backplane under test to perform its test tasks in its operating system using the first test resources; at the same time, it controls the second backplane under test to perform its test tasks in its operating system using the second test resources; and at the same time, it controls the third backplane under test to perform its test tasks in its operating system using the third test resources.

[0156] This invention provides a cloud control panel that generates a test environment for multiple backplanes under test based on their respective test task configuration information and the corresponding test resources. The control panel then controls the multiple backplanes to execute their respective test tasks within their respective test environments. This cloud control panel enables simultaneous testing of multiple backplanes on a single motherboard, significantly improving motherboard resource utilization and reducing test space occupancy.

[0157] Reference Figure 5 , Figure 5 A flowchart illustrating the steps of controlling the test indicator light in a backplane testing method according to another embodiment of the present invention is shown, as follows: Figure 5 As shown, it includes:

[0158] Step S501: When the multiple backplanes under test are executing their respective test tasks in their respective test environments, the test indicator lights up, and the test indicator lights turn off after the test is completed.

[0159] Each backplane under test is equipped with a test indicator light. When the test indicator light is on, it means that the backplane is currently performing a test task; when the test indicator light is off, it means that the backplane is not currently performing a test task.

[0160] In one specific implementation, the test indicator light being off can indicate that the current test task for the backplane has been completed, or it can indicate that the current test task for the backplane has been interrupted.

[0161] After the expansion board processor generates the cloud control panel, the cloud control panel can also control the lighting and extinguishing of the test indicator lights on each backplane to be tested.

[0162] Specifically, the cloud control panel can control the test indicator lights of each backplane under test to illuminate when the corresponding backplane under test is performing a test task, and to turn off when the corresponding backplane under test is no longer performing a test task. The statement that the test task is no longer being performed can include either the test task being completed or the test task being interrupted.

[0163] After the test indicator light on the target backplane goes out, proceed to step S502.

[0164] Step S502: After the test indicator light on the target backplane goes out, the test resource allocation of the target backplane is released, and the test resources are recycled and returned to the motherboard.

[0165] After the test indicator light on the target backplane goes out, the cloud control panel determines that the target backplane is no longer performing test tasks, releases the allocation of test resources to the target backplane, and reclaims the test resources originally allocated to the target backplane and returns them to the motherboard.

[0166] In this embodiment of the invention, test indicator lights are illuminated when the multiple backplanes under test perform their respective test tasks in their respective test environments, and the test indicator lights are turned off after the test is completed. After the test indicator light on the target backplane is turned off, the resource allocation of the target backplane is released, and the resources are reclaimed and returned to the motherboard. By controlling the illumination and extinguishing of the test indicator lights, the test status of the backplanes under test is visualized, and the corresponding test resources are reclaimed after the test indicator light on the target backplane is turned off through the cloud control panel, which greatly improves the utilization rate of motherboard test resources.

[0167] Example 2

[0168] Reference Figure 6 , Figure 6 A flowchart illustrating the steps of a backplane testing method according to Embodiment 2 of the present invention is shown. This method is applied to a motherboard connected to an expansion board, which is then connected to multiple backplanes to be tested. Figure 6 As shown, it includes:

[0169] Step S601: In response to the command to retrieve test resource information, send the test resource information to the expansion board.

[0170] The motherboard is connected to an expansion board, which in turn is connected to multiple backplanes to be tested.

[0171] When testing multiple backplanes, the expansion board first generates a command to retrieve test resource information from the motherboard and sends the command to the motherboard.

[0172] In response to the retrieval command, the motherboard packages the test resource information into a data packet and sends it to the expansion board.

[0173] In one specific implementation, test resource information is used to characterize the resource information that the motherboard can provide to each backplane under test for testing, such as memory resources, runtime resources, bandwidth resources, etc.

[0174] Next, the expansion board retrieves the test task configuration information of each of the multiple backplanes to be tested, and packages the multiple test task configuration information into a data packet and sends it to the motherboard.

[0175] In one specific implementation, the test task configuration information may include resource information for the test task requirements of each backplane under test, such as memory resources, runtime resources, bandwidth resources, etc.; it may also include information on the functions that each backplane under test needs to be tested, such as storage functions, data transmission functions, etc.

[0176] Then proceed to step S602.

[0177] Step S602: Receive the test task configuration information of each of the multiple backplanes to be tested sent by the expansion board, and allocate test resources for the multiple backplanes to be tested.

[0178] The motherboard receives and parses data packets containing the test task configuration information of each of the multiple backplanes under test sent by the expansion board, thus obtaining the test task configuration information of each of the multiple backplanes under test.

[0179] Based on the resource information of the test task requirements of each of the multiple backplanes under test, the motherboard allocates test resources to each backplane under test.

[0180] For example, based on the test task configuration information of the first backplane to be tested, a first test resource is allocated to the first backplane to be tested; based on the test task configuration information of the second backplane to be tested, a second test resource is allocated to the second backplane to be tested; and based on the test task configuration information of the third backplane to be tested, a third test resource is allocated to the third backplane to be tested.

[0181] Then proceed to step S603.

[0182] Step S603: Send the test resource allocation results to the expansion board.

[0183] The motherboard sends the test resource allocation information for each backplane under test to the expansion board, which then sends the same information to the corresponding backplane under test. This allows each backplane under test to use its allocated test resources and execute its respective test tasks.

[0184] In this embodiment of the invention, in response to a command to retrieve test resource information of the motherboard, the test resource information is sent to the expansion board; test task configuration information for each of the multiple backplanes to be tested is received from the expansion board, and test resources are allocated to the multiple backplanes to be tested; the result of the test resource allocation is sent to the expansion board. Because the expansion board allows multiple backplanes to be tested to be connected to the same motherboard for simultaneous testing, the utilization rate of motherboard resources is greatly improved, and the occupancy rate of test space is reduced.

[0185] Example 3

[0186] Reference Figure 7 , Figure 7 A flowchart illustrating the steps of a backplane testing method according to Embodiment 3 of the present invention is shown. This method is applied to backplanes under test, and multiple backplanes under test are respectively connected to an expansion board. Figure 7 As shown, it includes:

[0187] Step S701: In response to the command to retrieve test task configuration information, send multiple test task configuration information to the expansion board.

[0188] Multiple backplanes to be tested are connected to multiple configuration interfaces of an expansion board, which in turn is connected to the motherboard.

[0189] Among them, multiple configuration interfaces carry corresponding numbered tag information.

[0190] For example, the first configuration interface carries tag information numbered one, the second configuration interface carries tag information numbered two, and the third configuration interface carries tag information numbered three.

[0191] When testing multiple backplanes under test, the expansion board first identifies the backplanes under test connected to each configuration interface, and then associates the number tag information carried by the configuration interface with the backplane under test connected to the corresponding configuration interface.

[0192] For example, the first configuration interface's tag information is associated with the backplane to be tested connected to the first configuration interface to obtain the first backplane to be tested; the second configuration interface's tag information is associated with the backplane to be tested connected to the second configuration interface to obtain the second backplane to be tested; and the third configuration interface's tag information is associated with the backplane to be tested connected to the third configuration interface to obtain the third backplane to be tested.

[0193] Next, the expansion board generates a command to retrieve the test task configuration information for each backplane under test, and sends the command to each backplane under test.

[0194] For example, the expansion board processor generates a retrieval command for the test task configuration information of the first backplane to be tested, the second backplane to be tested, and the third backplane to be tested, and sends the retrieval command to the first backplane to be tested, the second backplane to be tested, and the third backplane to be tested simultaneously.

[0195] Each backplane under test responds to the call command by packaging its own test task configuration information into a data packet and sending it to the expansion board processor.

[0196] In one specific implementation, the test task configuration information may include resource information for the test task requirements of each backplane under test, such as memory resources, runtime resources, bandwidth resources, etc.; it may also include information on the functions that each backplane under test needs to be tested, such as storage functions, data transmission functions, etc.

[0197] Next, the expansion board retrieves the motherboard's test resource information and integrates the test task configuration information of multiple backplanes under test with the motherboard's test resource information before sending it to the motherboard. The motherboard then allocates test resources for each backplane under test and sends this resource allocation information to the expansion board.

[0198] In one specific implementation, test resource information is used to characterize the resource information that the motherboard can provide to each backplane under test for testing, such as memory resources, runtime resources, bandwidth resources, etc.

[0199] For example, a first test resource is assigned to a first backplane to be tested, a second test resource is assigned to a second backplane to be tested, and a third test resource is assigned to a third backplane to be tested. The first, second, and third test resources may be the same or different.

[0200] The expansion board receives the resource allocation information for each backplane under test from the motherboard and sends the resource allocation information to the corresponding backplane under test.

[0201] For example, the allocation information of the first test resource is sent to the first backplane under test; the allocation information of the second test resource is sent to the second backplane under test; and the allocation information of the third test resource is sent to the third backplane under test.

[0202] Then proceed to step S702.

[0203] Step S702: Receive resource allocation information sent by the expansion board.

[0204] After receiving the data packet containing resource allocation information sent by the expansion board, each backplane under test parses it to obtain its own resource allocation information.

[0205] Then proceed to step S703.

[0206] Step S703: According to the resource allocation information, each party uses its corresponding test resources and executes its respective test tasks according to its test task configuration information.

[0207] Each backplane to be tested uses its corresponding test resources according to the resource allocation information, executes its own test tasks according to the information of the functions to be tested in its test task configuration information, tests the functions to be tested, and outputs its own test results.

[0208] For example, the first backplane to be tested uses the first test resource to execute the test task according to the first test task configuration information and outputs the first test result; the second backplane to be tested uses the second test resource to execute the test task according to the second test task configuration information and outputs the second test result; the third backplane to be tested uses the third test resource to execute the test task according to the third test task configuration information and outputs the third test result.

[0209] In this embodiment of the invention, in response to a command to retrieve test task configuration information for each of the plurality of backplanes under test, multiple test task configuration information is sent to the expansion board; resource allocation information is received from the expansion board; and according to the resource allocation information, each backplane uses its corresponding test resources and executes its respective test task according to its test task configuration information. Because the expansion board allows multiple backplanes under test to be connected to the same motherboard for simultaneous testing, the utilization rate of motherboard resources is greatly improved, and the occupancy rate of test space is reduced.

[0210] The following example illustrates the overall process of the backplane testing method of the present invention in detail:

[0211] Reference Figure 8 , Figure 8 A flowchart illustrating the overall process of a backplane testing method according to another embodiment of the present invention is shown, as follows: Figure 8 As shown, it includes:

[0212] First, the expansion board generates a command to retrieve the test task configuration information for each of the multiple backplanes under test, and then sends the command to each backplane under test.

[0213] After receiving the call command, multiple backplanes under test will package their respective test task configuration information into a data packet and send it to the expansion board.

[0214] The expansion board receives and parses the test task configuration information data packets of each backplane under test to obtain the test task configuration information of each backplane under test.

[0215] In one specific implementation, the test task configuration information may include resource information for the test task requirements of each backplane under test, such as memory resources, runtime resources, bandwidth resources, etc.; it may also include information on the functions that each backplane under test needs to be tested, such as storage functions, data transmission functions, etc.

[0216] Next, the expansion board generates a command to retrieve test resource information from the motherboard and sends the command to the motherboard. Upon receiving the command, the motherboard packages the test resource information into a data packet and sends it to the expansion board.

[0217] The expansion board receives and parses the data packets containing test resource information sent by the motherboard to obtain the motherboard's test resource information.

[0218] In one specific implementation, test resource information is used to characterize the resource information that the motherboard can provide to each backplane under test for testing, such as memory resources, runtime resources, bandwidth resources, etc.

[0219] The expansion board integrates the test task configuration information of each of the multiple backplanes to be tested with the test resource information of the motherboard and sends it to the motherboard, which then allocates the test resources.

[0220] Simultaneously, the expansion board generates a cloud control panel, which is used to create a test environment for multiple backplanes under test based on their respective test task configuration information and the corresponding test resources.

[0221] The expansion board processor synchronizes the test task configuration information of each of the multiple backplanes under test and the test resource information of the motherboard to the cloud control panel. The cloud control panel receives the test resource allocation information of the motherboard and sends the resource allocation information to the corresponding backplane under test.

[0222] Multiple backplanes under test receive resource allocation information, each uses the allocated test resources, executes test tasks according to their respective test task configuration information, and outputs test results.

[0223] Example 4

[0224] Reference Figure 9 , Figure 9 A schematic diagram of a backplane testing device according to Embodiment 4 of the present invention is shown. This device is applied to an expansion board, which is connected to a motherboard and to multiple backplanes to be tested; it includes:

[0225] The acquisition module 901 is used to acquire the test task configuration information of each of the multiple backplanes to be tested, and to acquire the test resource information of the motherboard;

[0226] The first sending module 902 is used to receive resource allocation information sent by the motherboard, wherein the resource allocation information represents the test resources corresponding to each of the plurality of backplanes to be tested;

[0227] The control module 903 is used to control the multiple backplanes under test to use their respective test resources and execute their respective test tasks according to their respective test task configuration information.

[0228] In an optional embodiment, the acquisition module 901 includes:

[0229] The identification module is used to identify the backplane to be tested connected to each of the configuration interfaces;

[0230] The first sending module is used to send a command to retrieve test task configuration information to each of the backplanes to be tested.

[0231] The first parsing module is used to receive and parse the data packets sent by each of the backplanes under test to obtain the test task configuration information of each of the backplanes under test.

[0232] In an optional embodiment, the acquisition module 901 further includes:

[0233] The second sending module is used to send a command to retrieve test resource information to the motherboard;

[0234] The second parsing module is used to receive and parse the data packets sent by the motherboard to obtain the test resource information of the motherboard.

[0235] In an optional embodiment, the control module 903 includes:

[0236] The generation module is used to generate a cloud control panel, which is used to create a test environment for the multiple backplanes to be tested by utilizing the test resources corresponding to the multiple backplanes to be tested, based on the test task configuration information of each of the multiple backplanes to be tested.

[0237] The first control submodule is used to control the multiple backplanes under test to execute their respective test tasks in their respective test environments.

[0238] In an optional embodiment, the control module 903 further includes:

[0239] The second control submodule is used to control the test indicator lights to illuminate when the multiple backplanes under test perform their respective test tasks in their respective test environments, and to turn off the test indicator lights after the test is completed.

[0240] The recycling module is used to release the test resource allocation of the target backplane after the test indicator light on the target backplane is turned off, and to recycle the test resources and return them to the motherboard.

[0241] Example 5

[0242] Reference Figure 10 , Figure 10 This diagram illustrates a backplane testing device according to Embodiment 5 of the present invention. The device is applied to a motherboard, which is connected to an expansion board, and the expansion board is connected to multiple backplanes to be tested. Figure 10 As shown, it includes:

[0243] The second sending module 1001 is used to send the test resource information to the expansion board in response to the command to retrieve the test resource information;

[0244] The allocation module 1002 is used to receive the test task configuration information of each of the multiple backplanes to be tested sent by the expansion board, and to allocate test resources for the multiple backplanes to be tested.

[0245] The third sending module 1003 is used to send the test resource allocation results to the expansion board.

[0246] Example 6

[0247] Reference Figure 11 , Figure 11 This diagram illustrates a backplane testing device according to Embodiment Six of the present invention. The device is applied to a backplane to be tested, and multiple backplanes to be tested are respectively connected to an expansion board; as shown... Figure 11 As shown, it includes:

[0248] The fourth sending module 1101 is used to send multiple test task configuration information to the expansion board in response to a command to retrieve test task configuration information;

[0249] The second receiving module 1102 is used to receive resource allocation information sent by the expansion board;

[0250] The test module 1103 is used to execute its respective test tasks according to the resource allocation information, using its corresponding test resources and according to its respective test task configuration information.

[0251] Based on the same inventive concept, embodiments of the present invention also provide an electronic device, comprising:

[0252] A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the backplane testing method described in any of the above embodiments.

[0253] Based on the same inventive concept, embodiments of the present invention also provide a computer-readable storage medium, comprising:

[0254] When the instructions in the storage medium are executed by the processor of the electronic device, the electronic device is able to perform the backplane testing method described in any of the above embodiments.

[0255] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0256] For the sake of simplicity, the method embodiments are described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, as some steps can be performed in other orders or simultaneously according to the present invention. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and components involved are not necessarily essential to the present invention.

[0257] The foregoing has provided a detailed description of a backplane testing method, apparatus, electronic device, and storage medium provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A backplane testing method, characterized in that, The method is applied to an expansion board, which is connected to a motherboard and to multiple backplanes to be tested; the method includes: Obtain the test task configuration information for each of the multiple backplanes to be tested, and obtain the test resource information for the motherboard; The test resource information and the test task configuration information of each of the multiple backplanes to be tested are sent to the motherboard; Receive resource allocation information sent by the motherboard, wherein the resource allocation information represents the test resources corresponding to each of the plurality of backplanes to be tested; Control the multiple backplanes under test to use their respective test resources and execute their respective test tasks according to their respective test task configuration information.

2. The method according to claim 1, characterized in that, The expansion board includes multiple configuration interfaces, which are respectively connected to the multiple backplanes to be tested; obtaining the test task configuration information of each of the multiple backplanes to be tested includes: Identify the backplane to be tested connected to each of the configuration interfaces; Send a command to retrieve test task configuration information to each of the backplanes to be tested; Receive and parse the data packets sent by each of the backplanes under test to obtain the test task configuration information of each of the backplanes under test.

3. The method according to claim 1, characterized in that, The process of obtaining the test resource information of the motherboard includes: Send a command to retrieve test resource information to the motherboard; The system receives and parses data packets sent by the motherboard to obtain the motherboard's test resource information.

4. The method according to claim 1, characterized in that, After receiving the resource allocation information sent by the motherboard, the method further includes: generating a cloud control panel, which is used to create a test environment for the multiple backplanes to be tested by utilizing the test resources corresponding to each of the multiple backplanes to be tested according to the test task configuration information of each of the multiple backplanes to be tested. Controlling the multiple backplanes under test to use their respective corresponding test resources and execute their respective test tasks according to their respective test task configuration information includes: Control the multiple backplanes under test to execute their respective test tasks in their respective test environments.

5. The method according to claim 4, characterized in that, The plurality of backplanes under test include: test indicator lights; controlling the plurality of backplanes under test to perform their respective test tasks in their respective test environments includes: The test indicator lights up when the multiple backplanes under test are executing their respective test tasks in their respective test environments, and turns off after the test is completed. After the test indicator light on the target backplane goes out, the test resource allocation of the target backplane is released, and the test resources are recycled and returned to the motherboard.

6. A backplane testing method, characterized in that, The method is applied to a motherboard, which is connected to an expansion board, and the expansion board is connected to multiple backplanes to be tested, respectively; the method includes: In response to a command to retrieve test resource information, the test resource information is sent to the expansion board. Receive the test task configuration information of each of the multiple backplanes to be tested sent by the expansion board, and allocate test resources for the multiple backplanes to be tested; The test resource allocation results are sent to the expansion board.

7. A backplane testing method, characterized in that, The method is applied to a backplane under test, wherein multiple backplanes under test are respectively connected to an expansion board; the method includes: In response to a command to retrieve test task configuration information, multiple test task configuration information items are sent to the expansion board. Receive resource allocation information sent by the expansion board; According to the resource allocation information, each entity uses its corresponding test resources and executes its respective test tasks according to its test task configuration information.

8. A backplane testing device, characterized in that, An expansion board is used, the expansion board being connected to a motherboard and to multiple backplanes to be tested; the device includes: The acquisition module is used to acquire the test task configuration information of each of the multiple backplanes to be tested, and to acquire the test resource information of the motherboard; The first sending module is used to send the test resource information and the test task configuration information of each of the multiple backplanes to be tested to the motherboard. The first receiving module is used to receive resource allocation information sent by the motherboard, wherein the resource allocation information represents the test resources corresponding to each of the plurality of backplanes to be tested; The control module is used to control the multiple backplanes under test to use their respective test resources and execute their respective test tasks according to their respective test task configuration information.

9. A backplane testing device, characterized in that, Applied to a motherboard, the motherboard is connected to an expansion board, and the expansion board is respectively connected to multiple backplanes to be tested; the device includes: The second sending module is used to send the test resource information to the expansion board in response to the command to retrieve the test resource information; The allocation module is used to receive the test task configuration information of each of the multiple backplanes to be tested sent by the expansion board, and to allocate test resources for the multiple backplanes to be tested. The third sending module is used to send the test resource allocation results to the expansion board.

10. A backplane testing device, characterized in that, Applied to backplanes under test, wherein multiple backplanes under test are respectively connected to an expansion board; the device includes: The fourth sending module is used to send multiple test task configuration information to the expansion board in response to a command to retrieve test task configuration information; The second receiving module is used to receive resource allocation information sent by the expansion board; The testing module is used to execute its respective test tasks according to the resource allocation information, using its corresponding test resources and according to its respective test task configuration information.

11. An electronic device, characterized in that, include: A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the backplane testing method according to any one of claims 1 to 5, or claim 6, or claim 7.

12. A computer-readable storage medium, characterized in that, When the instructions in the storage medium are executed by the processor of the electronic device, the electronic device is able to perform the backplane testing method according to any one of claims 1 to 5, or claim 6, or claim 7.

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