Apparatus for optimizing multi-stage processing of product units
By receiving object data, analyzing fingerprint commonalities, and optimizing the processing device, and using principal component analysis and computing equipment to decompose and synthesize fingerprints, the problem of alignment and overlay correction in multi-layer processes in photolithography technology has been solved, achieving rapid and accurate overall optimization and increased production.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ASML NETHERLANDS BV
- Filing Date
- 2018-02-22
- Publication Date
- 2026-05-29
AI Technical Summary
In existing photolithography technologies, it is difficult to perform alignment and overlay correction quickly and accurately in multi-layer processes, resulting in yield loss. Furthermore, traditional analysis methods are time-consuming and labor-intensive, making it difficult to detect problems in the early stages.
By receiving object data, analyzing fingerprint commonalities and optimizing the processing device, using principal component analysis (PCA) and computing equipment to decompose and synthesize fingerprints, perform real-time alignment and overprint correction, and combine contextual data for overall optimization.
It enables rapid and accurate alignment and overlay correction in multi-layer lithography processes, improving production efficiency, reducing yield loss, and simplifying the overall optimization process.
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Figure CN116224725B_ABST
Abstract
Description
[0001] Related application citation
[0002] This application is a divisional application of the invention patent application with international application number PCT / EP2018 / 054360, international application date of February 22, 2018, entry into the Chinese national phase date of September 25, 2019, Chinese national application number 201880021072.0, and invention title "Apparatus for Optimizing Multi-Stage Processing for Product Units". Technical Field
[0003] This invention relates to a method for optimizing an apparatus for multi-stage processing of a product cell, the apparatus being used, for example, to manufacture devices via photolithography. An example of a multi-stage process for which this method has been developed is a multilayer photolithography process, which includes one or more steps of transferring a pattern from a patterning apparatus onto a substrate product cell using photolithography equipment. The invention also relates to related computer programs and computer program products, as well as computer devices. Background Technology
[0004] A photolithography apparatus is a machine that applies a desired pattern onto a substrate (typically onto a target portion of the substrate). For example, photolithography apparatus can be used to fabricate integrated circuits (ICs). In this case, a patterning apparatus (alternatively called a mask or photomask) can be used to generate a circuit pattern to be formed on a single layer of the IC. This pattern can then be transferred to a target portion (e.g., comprising a portion, one or more dies) on a substrate (e.g., a silicon wafer). Pattern transfer is typically performed by imaging onto a layer of radiation-sensitive material (resist) disposed on the substrate. Typically, a single substrate will contain a network of adjacent target portions that are patterned sequentially. These target portions are often referred to as “fields.” Wafers are processed in batches or lots using various equipment in a semiconductor manufacturing facility (fab). Integrated circuits are built layer by layer, with photolithography steps performed by the photolithography apparatus at each layer and other manufacturing processes performed between the photolithography steps.
[0005] Prior to the imaging step, various chemical and / or physical processing steps are used to form and prepare layers for patterning. After the imaging step defines the pattern, further chemical and / or physical processing steps process the pattern to produce the functional features of the integrated circuit. The imaging and processing steps are repeated in a multilayer process to build the integrated circuit.
[0006] Precise pattern placement on a substrate is a major challenge in reducing the size of circuit components and other products that can be produced by photolithography. In particular, accurately measuring the features already laid on the substrate is a key step in aligning successive feature layers with sufficient precision to produce high-yield working devices. Typically, so-called overlay should be achieved within tens of nanometers in today's submicron semiconductor devices, and can be reduced to a few nanometers in the most critical layers.
[0007] Therefore, modern lithography equipment involves extensive measurement or “mapping” operations prior to the step of actually exposing or otherwise patterning the substrate at the target location. So-called advanced alignment models have been and will continue to be developed to more accurately model and correct the nonlinear distortion of the wafer “grid” caused by processing steps and / or the lithography equipment itself. However, not all distortions are correctable during exposure, and it remains important to trace and eliminate as many of the causes of such distortions as possible.
[0008] Modern multilayer lithography processes and products are so complex that problems arising from the process are difficult to trace back to their root cause. Therefore, monitoring wafer integrity and designing appropriate correction strategies is a time-consuming and labor-intensive task.
[0009] International patent application WO 2015049087 discloses a method for obtaining diagnostic information related to an industrial process, which is incorporated herein by reference in its entirety. During a stage of the photolithography process, alignment data or other measurements are performed to obtain object data, which represents positional deviations or other parameters measured at points distributed across each wafer in space. Overlay and alignment residuals typically show a pattern across the wafer, referred to as fingerprints. This object data is used to obtain diagnostic information by performing multivariate analysis to decompose the vector set representing the wafer in multidimensional space into one or more component vectors. Diagnostic information about the industrial process is extracted using the component vectors. The performance of subsequent wafer industrial processes can be controlled based on the extracted diagnostic information.
[0010] Even with this approach, understanding the sources of yield losses remains challenging. Traditional analytical methods involve trial and error. In multilayer processes, the substrate is processed through each layer as quickly as possible. The phenomena causing yield losses can change rapidly over time, and the severity of their impact can also vary. If the analysis takes a long time, or because obtaining product performance or yield data is time-consuming, or simply because the analysis itself is time-consuming, the impact on yield can become very significant.
[0011] Therefore, the limitation of current performance monitoring, control, and processing optimization systems lies in the trade-off between the amount of time and equipment dedicated to performance monitoring and the speed and accuracy at which corrections can be achieved.
[0012] The expectation is for a performance monitoring system that can detect problems at an early stage, rather than only when certain performance parameters exceed permissible limits.
[0013] In addition to per-batch or per-chuck, process corrections can also be performed at the wafer level. Therefore, it is important to make holistic choices regarding interdependent alignment and overlay correction strategies, as alignment is essentially a wafer-level correction mechanism. This holistic optimization is a challenging task and is typically performed in isolation, for example, for alignment and overlay at each layer. This can also be applied to the joint optimization of overlay / alignment, focus / leveling, and critical dimension (CD).
[0014] Interlayer complexity makes it difficult to optimize alignment and overlay correction strategies holistically. Furthermore, multiple control loops operate concurrently, and these loops increasingly interact (e.g., lens heating, mask write errors, and wafer shape feedforward combined with wafer alignment, leveling, wafer-level control, and advanced process control). Additionally, traditional simulation and modeling methods often operate in isolation, lacking a holistic flow that connects the components to form an optimized system. For example, after introducing a new alignment mark type, overlay correction simulations must be re-performed. Or, for instance, after introducing different wafer-level control strategies (which also correct wafer-to-wafer variations), the benefits of different alignment strategies need to be recalculated. Alternatively, fingerprints may be completely removed from the data after introducing specific processing changes (e.g., fixed annealing options) or alignment strategy changes (moving to a higher-order model, different alignment illumination colors, or different sampling schemes). A flow that allows for simulating the benefits of overlay (focusing and CD) using hypothetical scenarios is desired, taking into account the complexity of interlayer and inter-control loops. Summary of the Invention
[0015] The inventors have devised a method to provide real-time, context-driven root cause analysis and corrective recommendations. This can be used to optimize apparatus for multilayer processing of substrates while avoiding or at least mitigating one or more of the aforementioned related problems.
[0016] The present invention provides, in a first aspect, a method for optimizing multi-stage processing of a product unit, the method comprising: (a) receiving object data, the object data representing one or more parameters measured at different processing stages across multiple product units; (b) determining fingerprints of variations in the object data across the multiple product units, the fingerprints being associated with corresponding different processing stages; (c) analyzing commonalities of the fingerprints across different processing stages to generate commonalities; and (d) optimizing means for processing the product unit based on the commonalities.
[0017] In a second aspect, the present invention provides a computer program including computer-readable instructions that, when run on a suitable computer device, cause the computer device to perform the method of the first aspect.
[0018] The present invention provides a computer program product in a third aspect, comprising the computer program of the second aspect.
[0019] The present invention provides, in a fourth aspect, an apparatus particularly suitable for performing the steps of the method of the first aspect. Attached Figure Description
[0020] Embodiments of the invention will now be described by way of example with reference to the accompanying drawings, in which:
[0021] Figure 1 It describes photolithography equipment and other apparatus in the production facilities for forming semiconductor devices.
[0022] Figure 2 This is a flowchart of a method according to an embodiment of the present invention.
[0023] Figure 3 A control panel for in-layer fingerprint analysis based on principal component analysis (PCA) is shown.
[0024] Figure 4 An example of a composition-based synthesis method for generating simulations of overlay effects is shown.
[0025] Figure 5 The control panel for in-layer fingerprint analysis based on principal component analysis (PCA) is shown after applying simulated correction actions.
[0026] Figure 6 A two-dimensional density plot is shown for evaluating the effectiveness of control strategies.
[0027] Figure 7 Computational device hardware that can be used to implement the methods disclosed herein is shown. Detailed Implementation
[0028] Before describing the embodiments of the present invention in detail, it is beneficial to provide an example environment in which the embodiments of the present invention can be implemented.
[0029] Figure 1 The 100 in the diagram represents the lithography equipment LA as part of an industrial facility that enables high-volume lithography manufacturing processes. In this example, the manufacturing process is suitable for producing semiconductor products (integrated circuits) on substrates such as semiconductor wafers. Those skilled in the art will understand that a variety of products can be manufactured by processing different types of substrates in variations of this process. The production of semiconductor products is used purely as an example of significant commercial implications today.
[0030] Within the lithography apparatus (or simply "lithography tool" 100), the measurement station MEA is shown at 102, and the exposure station EXP is shown at 104. The control unit LACU is shown at 106. In this example, each substrate accesses the measurement station and exposure station where patterning is to be applied. In optical lithography apparatus, for example, a projection system is used to transfer a product pattern from the patterning apparatus MA onto the substrate using a regulated radiation and projection system. This is accomplished by forming an image of the pattern in a radiation-sensitive resist material layer.
[0031] The term "projection system" as used herein should be interpreted broadly to include any type of projection system, including refractive, reflective, reflective-refractive, magnetic, electromagnetic, and electrostatic optical systems, or any combination thereof, depending on the exposure radiation used or other factors such as the use of immersion or vacuum. The patterning MA device can be a mask or stencil that imparts a pattern to a radiation beam transmitted or reflected by the patterning apparatus. Well-known operating modes include step mode and scan mode. It is well known that projection systems can cooperate in various ways with the support and positioning systems of the substrate and the patterning apparatus to apply a desired pattern to many target portions of the substrate. Programmable patterning apparatuses can be used instead of masks with fixed patterns. For example, the radiation can include electromagnetic radiation in the deep ultraviolet (DUV) or extreme ultraviolet (EUV) bands. This disclosure also applies to other types of lithography processes, such as imprint lithography and direct-write lithography, for example, by electron beam.
[0032] The photolithography equipment control unit (LACU) controls all movements and measurements of various actuators and sensors, enabling the equipment to receive the substrate W and the mask MA and perform patterning operations. The LACU also includes signal processing and computational capabilities to perform desired calculations related to the operation of the equipment. In practice, the LACU is implemented as a system of many sub-units, each handling real-time data acquisition, processing, and control of subsystems or components within the equipment.
[0033] Before the pattern is applied to the substrate at the Exposure Station (EXP), the substrate is processed at the Measurement Station (MEA), allowing for various preparation steps. These steps may include plotting the surface height of the substrate using a leveling sensor and measuring the position of alignment marks on the substrate using an alignment sensor. The alignment marks are nominally arranged in a regular grid pattern. However, due to inaccuracies in mark generation and substrate deformation that occurs throughout the processing, the marks deviate from the ideal grid. Therefore, in addition to measuring the substrate's position and orientation, the alignment sensor must actually measure the position of many marks across a large area of the substrate in detail if the equipment is to print product features in the correct location with very high precision.
[0034] A lithography apparatus LA can be a so-called dual-platform type, having two substrate stages, each with a positioning system controlled by a control unit LACU. While one substrate on one stage is being exposed at the exposure station EXP, another substrate can be loaded onto the other substrate stage at the measurement station MEA, allowing various preparation steps to be performed. Therefore, the measurement of alignment marks is very time-consuming, and the provision of two substrate stages can significantly improve the throughput of the apparatus. If the position sensor IF cannot measure the position of the substrate stage when it is at both the measurement and exposure stations, a second position sensor can be provided to enable tracking of the substrate stage position at both stations. When the lithography apparatus LA is a so-called dual-platform type with two substrate stages, the exposure station and measurement station can be different positions of the substrate stages that can be exchanged between them. However, this is only one possible arrangement, and the measurement and exposure stations do not need to be so different. For example, it is known to have a single substrate stage to which the measurement station is temporarily coupled during the pre-exposure measurement phase. This disclosure is not limited to any type of system.
[0035] Within the production facility, equipment 100 forms part of a "lithography unit" or "lithography cluster," which also includes coating equipment 108 for applying photoresist and other coatings to a substrate W for patterning by equipment 100. On the output side of equipment 100, baking equipment 110 and developing equipment 112 are provided for developing the exposed pattern into a physical resist pattern. Between all these devices, a substrate handling system is responsible for supporting the substrates and transferring them from one device to the next. These devices (generally referred to collectively as "tracks") are controlled by a track control unit, which in turn is controlled by a monitoring system SCS, which also controls the lithography equipment via a lithography equipment control unit (LACU). Therefore, different devices can be operated to maximize throughput and processing efficiency. The monitoring system SCS receives configuration information R, which provides in great detail the constraints of the steps to be performed to create each patterned substrate.
[0036] Once the pattern has been applied and developed in the photolithography unit, the patterned substrate 120 is transferred to other processing equipment, such as 122, 124, and 126. Various processing steps are implemented by various devices in a typical manufacturing facility. For example, device 122 in this embodiment is an etching station, and device 124 performs a post-etch annealing step. Further physical and / or chemical processing steps are applied to other devices 126, etc. Many types of operations may be required to fabricate actual devices, such as material deposition, modification of surface material properties (oxidation, doping, ion implantation, etc.), chemical mechanical polishing (CMP), etc. In practice, device 126 can represent a series of different processing steps performed in one or more devices.
[0037] As is well known, the fabrication of semiconductor devices involves many repetitions of this process to build device structures with appropriate materials and patterns layer by layer on a substrate. Therefore, the substrate 130 arriving at the photolithographic cluster can be a newly fabricated substrate or a substrate that has already been fully processed in that cluster or in another apparatus. Similarly, depending on the required processing, substrates 132 leaving apparatus 126 can be returned for subsequent patterning operations in the same photolithographic cluster, they can be used for patterning operations in different clusters, or they can be finished products to be sent for dicing and packaging.
[0038] Each layer of the product structure requires a different set of processing steps, and the type of equipment 126 used in each layer can be completely different. Furthermore, even when the processing steps applied to equipment 126 are nominally the same, in large facilities, there may be several machines, presumably identical, operating in parallel to perform steps 126 on different substrates. Minor differences in setup or malfunction between these machines may indicate that they affect different substrates in different ways. Even steps that are relatively common for each layer (such as etching (equipment 122)) can be achieved by several nominally identical but parallel-operating etching apparatuses to maximize throughput. Moreover, in practice, depending on the details of the material to be etched, different layers require different etching processes (e.g., chemical etching, plasma etching) and special requirements (e.g., anisotropic etching).
[0039] As mentioned earlier, prior and / or subsequent processing can be performed in other lithography equipment, and even in different types of lithography equipment. For example, some layers in device fabrication processes that are very demanding on parameters such as resolution and overlay can be performed in more advanced lithography tools than other layers with less demanding requirements. Thus, some layers can be exposed in immersion lithography tools, while others are exposed in "dry" tools. Some layers can be exposed in tools operating at DUV wavelengths, while others are exposed using EUV wavelength radiation.
[0040] To ensure correct and consistent exposure of substrates by photolithography equipment, it is desirable to inspect the exposed substrates to measure properties such as overlay error between subsequent layers, line thickness, and critical dimension (CD). Therefore, the manufacturing equipment within the photolithography unit (LC) also includes a metrology system (MET), which receives some or all of the substrates (W) already processed in the photolithography unit. The measurement results are provided directly or indirectly to a monitoring system (SCS) 138. If an error is detected, the exposure of subsequent substrates can be adjusted, especially when the metrology can be completed quickly enough that other substrates in the same batch are still awaiting exposure. Furthermore, exposed substrates can be stripped and reprocessed to increase yield, or discarded, thus avoiding further processing of substrates known to be defective. In cases where only some target portions of the substrate are defective, further exposure can be performed only on those good target portions.
[0041] Figure 1 The diagram also shows a measurement device 140, which is provided for measuring parameters of the product at a desired stage in the manufacturing process. A common example of a measurement device in modern lithography production facilities is a scatterometer, such as an angle-resolved scatterometer or a spectral scatterometer, which can be applied at 120 to measure the properties of the developed substrate before etching in device 122. Using measurement device 140, for example, it can be determined that important performance parameters such as overlay or critical dimension (CD) do not meet specified accuracy requirements in the developed resist. Prior to the etching step, there is an opportunity to strip the developed resist and reprocess the substrate 120 through the lithography cluster. It is known that the measurement results 142 from device 140 can be used to maintain the accuracy of patterning operations in the lithography cluster by making small adjustments 166 over time through the monitoring system SCS and / or control unit LACU 106, thereby minimizing the risk of products going out of specification and requiring reprocessing. Of course, measurement device 140 and / or other measurement devices (not shown) can be applied to measure the properties of the processed substrates 132, 134 and the incoming substrate 130.
[0042] Embodiments of the present invention provide the ability to characterize the entire layer stack throughout the lifecycle of an integrated circuit by using a photolithography apparatus with built-in sensors to capture fingerprints in the layer stack. This characterization is related to the processing steps that define the exposure between each layer. Analysis of fingerprints in the layer stack provides the ability to correct for phenomena in complex and time-varying multilayer processes. For example, new equipment and process options continuously generate new fingerprints.
[0043] In addition to alignment sensors, lithography equipment has many in-line sensors. These in-line sensors include leveling sensors, sensors for aligning the mask with the wafer stage chuck (e.g., "transmission image sensors" or "parallel integrated lens interferometer" type sensors), and sensors related to actuator stability. Sensors in lithography equipment are examples of sensors that can measure parameter values spatially distributed across a substrate. Besides fingerprints representing spatial distribution across the substrate, fingerprints can also represent the distribution of process parameters across different wafers in a wafer batch. For example, fingerprints obtained from a "parallel integrated lens interferometer" sensor can represent mask heating signatures across a wafer batch. Embodiments of the present invention utilize these sensors to characterize many or all of the individual processes (e.g., etching, deposition, development tracks). This is possible because a scanner is involved at least once during layer fabrication on the wafer. The scanner can apply its sensors to all wafers passed through the lithography process at least once per layer.
[0044] The scanner sensors used to determine fingerprints can be dynamic. For example, for one layer, an alignment sensor might be found to be most useful for determining fingerprints representing processing steps, while for another layer, a leveling sensor might provide more information. The use of sensors and the combination of sensor signals that produce the most representative results (e.g., the most information for process control and processing equipment optimization) can vary, and machine learning methods can be used to converge to the optimal cluster of sensor signals for each layer (e.g., Layer 1: Alignment Color 1, Layer 2: Alignment Color 2 + Leveling, ...).
[0045] As described above, when processing wafers in a layer stack, lithography equipment can capture fingerprints at all different steps. Fingerprint patterns can be correlated with each other by performing in-stack analysis, and common fingerprints across layers can be associated with events and phenomena occurring in each layer. This allows for appropriate optimization of the processing equipment for subsequent processing steps. These subsequent processing steps performed by the optimized equipment can be applied to the wafer from which fingerprints were obtained. In this case, corrections are applied within the wafer's layer stack during processing, as a form of real-time correction. This is an example of optimizing equipment for processing product cells for measuring object data in a later stage of multi-stage processing. Subsequent processing steps performed by the optimized equipment can be applied to the entire processing steps of other wafers, including those to be processed later. Optimized equipment can be used to perform processing steps in earlier and later stages of the processing flow, rather than in stages where analysis and optimization are performed. Optimization can involve fixing the identified processing equipment and / or processing options. It may also involve using a dedicated scanner for corrections via alignment or overlay corrections.
[0046] Embodiments of the present invention provide a means of associating fingerprints with each other in a stack of processing stages (e.g., layers) and identifying them based on changes in the underlying fingerprints, which can then be linked back to the process context.
[0047] Figure 2 This is a flowchart illustrating a method for optimizing a multi-stage processing apparatus for a product cell according to an embodiment of the present invention. In this example, the product cell is a substrate, particularly a wafer. In this example, the stage corresponds to a layer of the wafer. In some processes, such as dual patterning, each layer can be exposed in two separate lithography stages.
[0048] The multilayer process begins with manufacturing process 202 on the original wafer (not shown). This may include, for example, processes 202. Figure 1 The process involves deposition and annealing, followed by coating, exposure, baking, and development. This produces a wafer 204 with a patterned first layer.
[0049] Further manufacturing processes 222 are performed on the wafer 204, which may include, for example, such as Figure 1 The etching and annealing steps shown are followed by coating, exposure, baking, and development steps to pattern the second layer. This produces a wafer 224 with a patterned second layer.
[0050] The process continues with further manufacturing processes 242 for subsequent layers, which may include a photolithography step (not shown), resulting in a subsequent manufacturing process 262 producing a wafer 264 with patterned subsequent layers.
[0051] The apparatus for manufacturing processes 202, 222, 242, and 262 includes one or more photolithography devices, also referred to as scanners, for performing exposures. The scanner has sensors for sensing one or more parameters 206, 226, and 266 across the wafer. An example of such a sensor is an alignment sensor. Other examples of sensors for cross-wafer measurements are discussed below. Furthermore, for each layer shown, measurements 208, 228, and 268 are performed on the patterned wafer (e.g., as shown in the image). Figure 1 (As shown in 140).
[0052] The sensing and measurement steps generate object data for each layer 210, 230, and 270.
[0053] Therefore, considering layers 1 and 2, computing devices (e.g., Figure 1 The SCS in the chip receives object data 210 and 230, which represent one or more parameters that are measured across wafers 204 and 224 and associated with different processing stages 202 and 222 of the wafer.
[0054] The computing device decomposes object data 210, 230 into components 212, 232 for each corresponding different layer. The computing device thereby determines fingerprints of the variations in object data across each wafer 214, 234. Therefore, the fingerprints are associated with corresponding different processing stages of the wafer, corresponding to the corresponding layers of the wafer. In this example, decompositions 212, 232 use principal component analysis (PCA) of object data 210, 230 to obtain orthogonal principal components.
[0055] The computing device analyzes the commonalities of fingerprints 214 and 234 across different layers to produce commonality results. This analysis may include identifying at least one fingerprint common across different layers. Analyzing the commonalities of fingerprints may involve user interaction. This can be accomplished by rendering a dashboard that displays the fingerprints arranged in layers and receiving user input identifying one or more fingerprints common across different layers. This visualization of fingerprint progression in the layer stack allows the user to interactively optimize and participate in the optimization method. Commonity analysis can be partially or fully automated. This automation may involve using the computing device to group fingerprints. A fingerprint library 248 can be used to perform automatic grouping. The fingerprint library 248 may consist of historical fingerprints. Grouping may be based on the differences (or distances) between the fingerprints identified by the analysis and historical fingerprints.
[0056] If the commonality analysis does not identify any shared characteristics, the result itself is useful information. It suggests that further optimization can be performed by using alternative methods to refine the root cause analysis, impact analysis, or modeling, in order to provide corrective actions.
[0057] The computing device uses common results to optimize the apparatus used to process subsequent layers of 262, as described below.
[0058] In this example, the computing device receives context data 244, which represents one or more parameters for processing 202, 222, and 242 at different layers of wafers 204 and 224. Then, optimization of the apparatus for processing subsequent layers is performed based on one or more fingerprints identified 246 and the context data 244. This is achieved by associating one or more common fingerprints identified with the context data.
[0059] Optimization can involve identifying the root cause by associating one or more fingerprints identified 246 with context data 244 250 to identify specific devices 252 that should be optimized (e.g., fixed) before subsequent processing stages. In practice, this is done by tagging fingerprints through context matching. This process can be automated.
[0060] Optimization may involve impact analysis 254, which can predict measurement results, probe measurements, voltage contrast measurements, or even product yield. This can be performed by predicting changes in product performance across wafers based on one or more identified fingerprints 246 and received context data 244 to determine process corrections 258 to be applied to the apparatus for subsequent stages of processing 262. As a specific example, when the object data includes alignment data, the fingerprints include alignment fingerprints, and the predicted changes include overlay changes between layers including subsequent layers. In this way, embodiments of the invention provide improved alignment / overlay control optimization by using predictive measurements based on selectively synthesized overlay predictions.
[0061] Optimization may involve computing devices modeling or simulating the processing of subsequent layers 256 based on one or more common fingerprints identified 246 and context data 244 to determine process corrections to be applied to the apparatus for processing 262 in subsequent stages.
[0062] Optimization of the apparatus for processing subsequent layers involves determining correction 258. This correction is applied as a correction action to the processing equipment of manufacturing process 262. The correction action may be, for example, equipment repair, equipment shutdown, configuration change, or equipment setting change.
[0063] Figure 3 A control panel for in-layer fingerprint analysis based on principal component analysis (PCA) is shown.
[0064] Three rows of fingerprints are shown. Each row contains fingerprints from different layers L1, L2, and L3. The PCA provides a set of orthogonal fingerprints for each layer. These can be obtained as described in WO2015049087 mentioned above. Each fingerprint is shown as a circle corresponding to a wafer, with arrows indicating variations at locations across a set of wafers. A fingerprint is not such a measurement. It originates from object data obtained from many wafers. A fingerprint is a pattern of variations that occur more frequently within a set of wafers. For example, it can represent the average variation across a set of wafers. This variation may occur in some, but not all, wafers in the set. In this example, the principal components are arranged so that the most important components remain. The orthogonality of the basis used to represent the fingerprints is advantageous because it minimizes the dependencies between correction strategies used for processing device optimization.
[0065] Dashed lines indicate fingerprint grouping. Grouping can be performed manually, semi-automatically, or automatically. Fingerprints marked C (“Type C”) are scaled fingerprints, common to layers L1, L2, and L3. Fingerprints marked A and AA are similar to each other and are known double-vortex patterns, typically linked to annealing steps. Double vortices can appear at slightly different angles and can be sampled differently by a scanner sensor. Instead of performing per-layer optimization, similar fingerprint groups that may be associated with the same root cause can be identified. For example, looking at fingerprints marked A and AA, the fingerprints can be linked back to an annealing device. It is useful to understand what would happen if the annealing device could be adjusted so that common fingerprints disappear in layer L1 and subsequent layers. This would impact the alignment strategy for layer L1.
[0066] As an example, when applied to photolithography processes, the following steps can be used in a synthesis-based optimized workflow:
[0067] A. Decompose alignments in layer stacking, such as Figure 3 As shown. This method uses alignment and overlay trees and utilizes irrelevant or other informative components (fingerprints) decomposed into measurement data below (e.g., wafer alignment).
[0068] B. Assign common components across layers to the context (i.e., root cause analysis). Data mining methods can be used to automatically correlate processing contexts (steps / options, tool usage, inline tool measurements) with fingerprint occurrences on the wafer.
[0069] C. Map alignment and context to overlay (i.e., predictive measurement). See below for reference. Figure 4 To describe this in more detail, this predictive measurement method can be used to synthesize overprints using selective use of alignment fingerprints, along with additional overprint exposure and measurement effects. Selective use stems from different alignment and / or overprint controls and the measurement strategy to be evaluated. This can be accomplished, for example, through a generative model (probabilistic generative model, deep neural network, etc.) trained to map alignment and leveling data to overprints under different (processing) context conditions.
[0070] D. Simulate different alignments (considering models, markers, sampling, and alignment trees).
[0071] E. Predicting the overlay effects of different alignment models. (See below for reference.) Figure 5 Describe this step and the previous step in more detail.
[0072] F. Predict the overlay effects from different APC (Advanced Process Control) models.
[0073] Figure 4An example of a composition-based synthetic method for simulating the effects of (overlay) is shown. This generative method is very useful for component decomposition in stacks and provides a basis for predictive measurements.
[0074] Figure 4 The predicted overlay effect analysis shown predicts the overlay pattern 444 based on the expected fingerprint occurrence on the wafer. The final overlay wafer pattern 444 is synthesized from fingerprints expected to occur on the wafer, given contextual measurements 418 and 420 describing the wafer's processing and exposure conditions, by including different fingerprints for effects on wafers 426, 428, and field 430. Fingerprints can be learned from data (including a noise model to prevent measurement noise from interfering with fingerprint learning), for example, through PCA decomposition, or from prior knowledge, such as the fact that field magnification drift in transmission image sensors typically results in in-field fingerprint patterns associated with mask heating.
[0075] The training data includes manufacturing routing and alignment data 418 from various processing tools 402, 404, and 406. Other training data 420 includes servo performance, wafer stage temperature, application-specific calibration (ASCAL) data (used to predict lens heating effects by measuring wavefront drift), focus monitoring data, wafer leveling data, and matching and scanner control data. This additional training data 420 is from the servo 408, mask 410, scanner lens 412, wafer stage 414, and wafer stage 416.
[0076] The dashed arrows indicate the probabilistic relationship between context, fingerprints, and overprinting.
[0077] To map the manufacturing context 418 to inter-field fingerprints 426, 428, co-occurrence mapping 422 can be used as described in WO2015049087. To map the scanner context 420 to intra-field fingerprints 430, regression 424 can be used, such as partial least squares (PLS) regression and principal component regression (PCR).
[0078] Inter-field fingerprint 428 corresponds to Figure 3 The “C-type” fingerprint shown is for layer 1. Interfield fingerprint 426 is another variant of the “A-type” fingerprint (e.g., “Type AAA”).
[0079] Maps 432 and 434, used to predict the overprinting effects from intermediate fingerprint layers 426 to 430, can be learned empirically from the data. When exposure and processing conditions remain unchanged, these maps can be used to assess the overprinting effects related to the presence of certain scanner-measured fingerprints in the data. For lithography process simulation schemes, these empirical maps can be used to assess the overprinting effects of removing / remediating certain fingerprints through simulated correction actions.
[0080] In its simplest form, mappings 432 and 434 can be deterministic mappings (e.g., linear or nonlinear functions) used to calculate overlay values at the wafer from inter- and intra-field fingerprints, as disclosed in WO 2015049087. Here, we utilize it for synthesis (“prediction”) rather than contextual analysis (“root cause analysis” or “diagnosis”).
[0081] Inter-field PCA can be used to obtain the predicted inter-field overlay 436 from fingerprints 426 and 428. Intra-field PCA drift model can be used to obtain the predicted intra-field overlay 438 from fingerprint 430. Suitable empirical mapping methods are described in International Patent Application WO2015024783, which is incorporated herein by reference in its entirety.
[0082] The predicted fingerprints 436 and 438 are combined with the noise model 440 442 to produce the final overlay wafer pattern 444.
[0083] Therefore, the measured overlays are used to teach the system. Once the system has been trained, it is used to predict overlays based on a subset of the remaining fingerprints in the stack (or their residuals). Figure 5 As shown in the other steps, the predicted overlay gradually decreases because more correction actions are applied.
[0084] Figure 5 The control panel for in-layer fingerprint analysis based on principal component analysis (PCA) is shown after applying simulated correction actions.
[0085] One advantage of using orthogonal fingerprints is that by simulating the absence of fingerprints to pinpoint one of the sources of mutation, it is as if identifying and fixing the root cause is also removing fingerprints from the stack, potentially simplifying the control simulation.
[0086] Figure 5 It shows Figure 3 The control panel shown uses common reference numerals A, B, C, AA, L1, L2, and L3 to denote the same features. However, Figure 5 Simulated fingerprint removal is also shown through process adjustment 502 and evaluation of different alignment strategies 504. Process adjustment removed most of the "Type A" and "Type AA" fingerprints. Alignment strategy evaluation removed all "Type C" fingerprints. An evaluation of the resulting overprinting effect of corrective actions to remove those fingerprints is shown at 506.
[0087] As an example of alignment strategy evaluation, if a fingerprint of "Type C" originates from a deformed mark, an alignment strategy using a different alignment color (wavelength) can resolve the issue, thereby removing the "Type C" fingerprint. Another approach could be to use a different mark layout that is less sensitive to edge mark deformation.
[0088] In other steps (not shown), more fingerprints can be removed from the control panel to further improve the expected overprinting effect. For example, after simulating a higher-order alignment model, more fingerprint variations can be captured, resulting in fewer fingerprint variations in the overprint. Considering the empirical mapping between the trained alignment and overprint, the higher-order alignment model can be considered as another alignment strategy to be evaluated, further improving the expected overprinting effect.
[0089] Therefore, embodiments of the present invention can provide overall optimization of alignment and overlay through per-wafer correction in the stack via a synthetic fingerprint control board. This example of a synthetic-based optimization method centers on a fingerprint development control board in the stack, as referenced above. Figures 3 to 5 As stated above.
[0090] Embodiments of the present invention achieve overall optimization of alignment and overlay strategies through user interaction. Since overlay prediction can be achieved through knowledge-based and fingerprint synthesis, training a monolithic mapping from context to the overlay map (e.g., via a neural network) can be avoided. A predictive metric is provided that effectively summarizes contextual conditions not present in the training set. The mapping between variables is divided into locally connected subsets of variables; these “sub-mappings” can be implemented using black-box models (e.g., neural networks), white-box models (e.g., knowledge-based), or gray-box models (e.g., a hybrid Bayesian network using physical modeling, neural networks, and probabilistic combinations). This enables predictive metrics that can adapt to changing data characteristics or at least detect significant deviations from the characteristics of the training data.
[0091] like Figure 3 As shown, object data fingerprinting is decomposed at each layer (each layer applied during a separate stage of processing the product unit). Components can be categorized based on their relevance, such that the most relevant components (e.g., those explaining most of the variation in object data across the product unit) are on the left, while the least relevant components are on the right. Components are then effectively ranked according to their availability in predicting object data fingerprinting across the product unit.
[0092] In addition to the ranking of components (regarding relevance), other attributes can be assigned to each component. For example, attribute data can include indicators of the reliability (accuracy and / or reproducibility) of the identified components or the expected criticality of the components for process yield.
[0093] Typically, the components and their order associated with the first processing stage match the components and their order associated with the second processing stage following the first. This observation can be used to derive correction 258 to the apparatus used to perform the aforementioned second processing stage based on knowledge of the fingerprints associated with the first processing stage. In the example, an apparatus configured to pattern the second layer after the first layer can use object data associated with the first layer to control the patterning of the second layer. For example, optimization of the apparatus used during the aforementioned second processing stage can take the fingerprints associated with the first processing stage as input.
[0094] Components may be similar across layers, but their order may differ. For example, a first component associated with a second processing stage may be ordered as first, while when associated with a first processing stage, it may be ordered as second. Therefore, there are certainly commonalities among components across processing stages (e.g., layers), but they may have different properties, such as their order. Typically, components are associated with fingerprints that include object data comprising one or more performance parameters (overprinting, focus, CD, etc.).
[0095] Controlling the second processing stage based on knowledge of the components associated with the first processing stage remains possible, but differences in ranking may need to be considered to provide accurate corrections for the second processing stage. In one embodiment, control of the second processing stage is based on a set of weighted components associated with the first processing stage. If the first component associated with the second level is ranked lower than the first level, control of the second processing stage needs to assign less weight to the first component because it represents less variation in the object data than another higher-level component.
[0096] Typically, the concept of feeding information associated with the first processing stage forward to the second processing stage is based on the commonalities of the components and the attributes associated with those components. As mentioned above, this attribute can refer to a measure of relevance (ranking), a measure of reliability (accuracy, reproducibility), or a measure of the expected impact on the overall process output (impact on the final product).
[0097] Then, the control of the second processing stage can be based on a weighted sum of the components associated with the first processing stage. Alternatively, the control of the second processing stage can be based on a weighted sum of processing corrections associated with the first processing stage.
[0098] Weighting is performed by multiplying each component "Ci" associated with the first processing stage by a weighting factor "Wi" based on the value of an attribute of interest typically associated with the second processing stage. When the attribute of interest is the relevance of the component, the weighting factor can be selected based on the ranking number. For example, if a component ranks second in the first processing stage and fourth in the second processing stage, the weighting factor associated with that component can be chosen as the ratio between the rankings (2:4 = 0.5). Subsequent optimization of the apparatus or process used in performing the second processing stage can then be based on a weighted sum of components, where each component has only a weighting factor of 0.5.
[0099] Then, after identifying all (or a subset thereof) common components between the first and second processing stages of a given substrate (wafer), a relevant weighting factor for each component can be determined based on the properties of the common components between the first and second processing stages. The weighted sum of the components is considered to represent a fingerprint of the object data across the substrate to be controlled. Based on the obtained weighted sum of the components, optimization of the device and / or control actions such as process corrections can be determined.
[0100] One or more weighting factors can be set to zero, for example, when a component has a relevant reliability metric below a certain minimum (threshold). Similarly, components ranked below third can be set to zero. Then, components that are effectively less reliable (constant) and / or relevant are filtered out to improve the robustness of the second processing stage.
[0101] In addition to optimizing the processing equipment and control actions, it is also possible to monitor properties associated with the components. Changes in these properties can indicate variations within one or more processing steps and / or stages. These variations may be offsets, drifts, or abrupt changes (e.g., due to sudden changes in the configuration of the processing equipment).
[0102] In addition to optimization / control strategies based on feeding information from the first layer to the second layer of process control, more general feedforward strategies can be employed. Typically, commonalities between fingerprints (or components associated with fingerprints) across the entire layer stack can be identified for control purposes. This concept can be readily extended by including analysis of attribute data associated with each layer included in the entire layer stack. Control of any processing stage can then be based on the commonalities of components across the stack, while also considering the attributes associated with these common components in each individual processing stage.
[0103] Then, general process control for the processing stage is based on a) the commonalities among the components across any subset of layers applied to the substrate, and b) attribute data associated with the common components across the aforementioned subsets of layers applied to the substrate.
[0104] In one example, the fifth processing stage is controlled based on two components associated with it, which are common to all four preceding processing stages. The attributes of these components are available for all five processing stages, and the attribute data relates to the order (correlation) of the components. In this example, control of the processing substrate during the fifth processing stage is based on a first common component and a second common component, each weighted based on attribute data from all four preceding layers.
[0105] In one embodiment, the components are weighted by multiple weighting factors "Wij", each of which is associated with a component "Ci" and a processing stage "j". The weighted component "Cweighted" can be represented as: "Cweighted" = sum(Wij * Ci).
[0106] In addition to providing optimized alignment and / or overlay (wafer) strategies, it is often necessary to determine the effectiveness of such optimization (compared to strategies that do not achieve such optimization). Typically, a first performance dataset (e.g., alignment data, overlay data, or any other data type indicating the performance of a semiconductor manufacturing process) obtained by measuring product cells processed before achieving the correction, and a second performance dataset obtained by measuring product cells processed after achieving the optimization, are available. Typically, key performance indicators (KPIs) are evaluated on both the first and second performance datasets. Comparing KPI values is then generally a preferred strategy for evaluating the effectiveness of the optimization (correction) on the manufacturing process. However, performance datasets can be heterogeneous; for example, the first and second performance parameter datasets may be obtained from different data sources and may have statistically different distributions (symmetry of the distribution, sample points constituting the distribution). Therefore, the KPIs of the first performance dataset may be insufficient to evaluate the quality of the second performance parameter dataset. Thus, directly comparing KPI values may not be an effective method when evaluating the effectiveness of the optimization.
[0107] In another embodiment, a method is proposed to compare the first and second performance datasets based on their underlying probability density functions (PDFs). This approach is better suited for determining the effectiveness of optimizations. For example, kernel density estimation methods are used to derive the first PDF associated with the first performance parameter dataset and the second PDF associated with the second performance parameter dataset.
[0108] A first performance parameter dataset is associated with a first control strategy, which is associated with a first type of alignment or overlay correction applied to a semiconductor manufacturing process (e.g., before process and / or tooling optimization), and a second performance parameter dataset is associated with a second control strategy, which is associated with a second type of alignment or overlay correction applied to a semiconductor manufacturing process. The change from the first type of correction to the second type of correction is referred to as a change in control strategy.
[0109] Once the first and second PDFs are determined, a two-dimensional density map is constructed. Figure 6 A two-dimensional density plot is depicted, where the x-axis represents the values of the performance parameters associated with the first dataset, and the y-axis represents the values of the performance parameters associated with the second dataset. The density plot is generated by evaluating the product of the first PDF and the second PDF, corresponding to the (x, y) values of the performance parameters. The two-dimensional density plot represents the probability of occurrence of a certain combination of performance parameter values associated with the first control policy and performance parameter values associated with the second control policy.
[0110] If the first and second control policies are equally effective, the 2D density plot will be symmetrical about the line Y=X. If the second control policy is more effective, the second PDF will return a higher probability value for lower values on the Y-axis, thus making the 2D density plot asymmetrical; in this case, the centroid of the density plot will shift below the Y=X line. This latter property can be used to evaluate the effectiveness of the control policy, or alternatively, to rank multiple performance datasets. The integral values of the first region of the 2D density plot above the Y=X line can be compared with the integral values of the second region of the 2D density plot below the Y=X line. The ratio between the integral values can infer which of the two performance datasets is associated with the most effective control policy. Subsequently, the most effective control policy can be selected for further processing.
[0111] In one embodiment, an apparatus for processing product units is optimized according to any of the prior embodiments disclosed in this document. Further evaluation of the effectiveness of the apparatus optimization is achieved by performing a method including a step of ranking a performance dataset, the step of ranking the performance dataset comprising: (a) determining a first probability density function associated with a first performance dataset, the first performance dataset being obtained by measuring product units processed before optimizing the apparatus for processing product units based on commonalities; (b) determining a second probability density function associated with a second performance dataset, the second performance dataset being obtained by measuring product units processed after optimizing the apparatus for processing product units based on commonalities; and (c) ranking the aforementioned performance datasets based on the first probability density function and the second probability density function. Based on the ranking, the effectiveness of the apparatus optimization can be determined.
[0112] In one embodiment, a kernel density estimation method is used to determine a first probability density function and a second probability density function.
[0113] In one embodiment, step (c) includes generating coordinate distributions, wherein a first distribution of the first coordinates is derived from sampling of a first probability density function, and a second distribution of the second coordinates is derived from sampling of a second probability density function.
[0114] In one embodiment, step (c) further includes mapping a first distribution of the first coordinates and a second distribution of the second coordinates to a two-dimensional density map having a first axis associated with the values of the performance data of the first performance dataset and a second axis associated with the values of the performance data of the second performance dataset.
[0115] In one embodiment, step (c) further includes integrating the values of the density map across a first region of the two-dimensional density map and integrating the values of a second region of the two-dimensional density map, wherein the first region is associated with coordinate values of the second axis that are greater than or equal to the coordinate values of the first axis, and the second region is associated with coordinate values of the second axis that are less than or equal to the coordinate values of the first axis.
[0116] In one embodiment, the integral values of the first and second regions are used to sort the performance data.
[0117] In one embodiment, sorting is used to select a first control strategy or a second control strategy applied to the semiconductor manufacturing process for subsequent processing.
[0118] Embodiments of the invention can be implemented using a computer program containing one or more machine-readable instruction sequences describing a method for optimizing an apparatus for multi-stage processing of a product unit, as described above. This computer program can execute within a computing device, such as... Figure 1 The control unit LACU, or some other controller, may also be provided. A data storage medium (e.g., semiconductor memory, magnetic disk, or optical disk) in which such a computer program is stored may also be provided.
[0119] The control unit LACU may include, for example: Figure 7 The computer component shown is a dedicated computer in the form of a control unit according to an embodiment of the component based on the invention, or alternatively, a central computer for controlling the lithography apparatus. The computer component can be arranged to load a computer program product including computer-executable code. This allows the computer component to control the lithography apparatus for the aforementioned purposes by leveling and aligning embodiments of sensors AS and LS when downloading the computer program product.
[0120] The memory 829 connected to the processor 827 may include multiple memory components, such as a hard disk 861, a read-only memory (ROM) 862, an electrically erasable programmable read-only memory (EEPROM) 863, and a random access memory (RAM) 864. It is not necessary for all of the above-mentioned memory components to be present. Furthermore, it is not important whether the above-mentioned memory components are physically very close to the processor 827 or close to each other. They may be spaced at a certain distance.
[0121] The processor 827 can also be connected to some kind of user interface, such as a keyboard 865 or a mouse 866. A touchscreen, trackball, voice converter, or other interfaces known to those skilled in the art can also be used.
[0122] The processor 827 may be connected to the reading unit 867, which is arranged to read data, for example, in some cases, in the form of computer-executable code, and store the data on a data medium such as a solid-state drive 868 or a CD-ROM 869. DVDs or other data media known to those skilled in the art may also be used.
[0123] The processor 827 can also be connected to the printer 870 to print output data on paper and to the display 871, such as a monitor or LCD (liquid crystal display), which can be any other type of display known to those skilled in the art.
[0124] Processor 827 can be connected to communication network 872, such as Public Switched Telephone Network (PSTN), Local Area Network (LAN), Wide Area Network (WAN), etc., via transmitter / receiver 873 responsible for input / output (I / O). Processor 827 can be configured to communicate with other communication systems via communication network 872. In embodiments of the invention, an external computer (not shown) (e.g., a carrier's personal computer) can log on to processor 827 via communication network 872.
[0125] Processor 827 can be implemented as a standalone system or as multiple processing units operating in parallel, where each processing unit is arranged to execute a subtask of a larger program. Processing units can also be divided into one or more main processing units with multiple sub-processing units. Some processing units of processor 827 can even be located at a distance from other processing units and communicate via communication network 872. Connections between modules can be wired or wireless.
[0126] A computer system can be any signal processing system with analog and / or digital and / or software technologies that is configured to perform the functions discussed herein.
[0127] Other embodiments of the invention are disclosed in the following list of numbered embodiments:
[0128] 1. A method for optimizing an apparatus for multi-stage processing of a product unit, the method comprising: (a) receiving object data representing one or more parameters measured at different processing stages across a plurality of product units; (b) determining fingerprints of variations in the object data across each of the plurality of product units, the fingerprints being associated with corresponding different processing stages; (c) analyzing commonalities of the fingerprints at the different stages to produce commonalities; and (d) optimizing the apparatus for processing the product units based on the commonalities.
[0129] 2. The method according to Example 1, wherein step (b) of determining the fingerprint includes: decomposing the object data into components for each corresponding different stage.
[0130] 3. The method according to Example 2, wherein the decomposition includes: using principal component analysis of the object data to obtain orthogonal principal components.
[0131] 4. The method according to any one of the foregoing embodiments, wherein step (c) of analyzing commonalities includes: identifying at least one fingerprint common to the fingerprints at the different stages.
[0132] 5. The method according to embodiment 4, wherein step (c) of analyzing the commonalities of the fingerprints includes: rendering a control panel that displays the determined fingerprints arranged in stages, and receiving user input that identifies at least one fingerprint common in the different stages of the fingerprints.
[0133] 6. The method according to any one of the foregoing embodiments, wherein step (d) of optimizing the means for processing the product unit comprises: optimizing the means for processing the product unit for measuring the object data therefrom in a subsequent stage of its multi-stage processing.
[0134] 7. The method according to Example 2 or 3, wherein the component receives property data.
[0135] 8. The method according to Example 7, wherein the attribute data indicates one or more of the following: the relevance of the component to explain the variation of object data across product units, the reliability of the component, and / or the expected yield of the process while adhering to the component.
[0136] 9. The method according to embodiment 7 or 8, wherein step d) of optimizing the device is based on the common result and the attribute data.
[0137] 10. The method according to Example 9, wherein step d) of optimizing the apparatus is based on weighting the components using a weighting factor, the weighting factor being based on the values of attribute data associated with the components for at least two processing stages.
[0138] 11. The method according to embodiment 10, wherein the weighting factor is based on the ratio between a first value of the attribute data in a first processing stage and a second value of the attribute data in a second processing stage.
[0139] 12. The method according to embodiment 10 or 11, wherein the weighting factor is set to zero when the attribute data indicates that a component has one or more of the following: low correlation, low reliability.
[0140] 13. The method according to any one of the foregoing embodiments further includes the step (e) of receiving context data, the context data representing one or more parameters of the processing of the different processing stages of the product unit, wherein the step (d) of optimizing the means for processing in subsequent stages is based on at least one identified fingerprint and the context data.
[0141] 14. The method according to embodiment 13, wherein step (d) of optimizing the means for processing in a subsequent stage includes: associating the identified at least one fingerprint with received context data to identify a specific means for processing in a subsequent stage.
[0142] 15. The method according to embodiment 13, wherein step (d) of optimizing the apparatus for subsequent processing includes: predicting product performance variations across product units based on at least one identified fingerprint and received context data to determine process corrections to be applied to the apparatus for subsequent processing.
[0143] 16. The method according to embodiment 15, wherein the object data includes alignment data, the fingerprint includes an aligned fingerprint, the stage includes layers, and the predicted variation includes predicted overprinting variation between layers including subsequent layers.
[0144] 17. The method according to embodiment 13, wherein step (d) of optimizing the apparatus for subsequent stage processing includes: simulating the subsequent stage processing based on at least one identified fingerprint and received context data to determine process corrections to be applied to the apparatus for subsequent stage processing.
[0145] 18. The method according to any one of the foregoing embodiments, wherein the product unit is a substrate.
[0146] 19. The method according to Embodiment 1 further includes a step of sorting the performance dataset, wherein the step of sorting the performance dataset includes:
[0147] (a) Determine a first probability density function associated with a first performance dataset, the first performance dataset being obtained by measuring product units processed before optimizing the apparatus for processing product units based on the commonality results;
[0148] (b) Determine a second probability density function associated with a second performance dataset, the second performance dataset being obtained by measuring product units processed after optimizing the apparatus for processing product units based on the commonality results; and
[0149] (c) Sort the performance dataset based on the first probability density function and the second probability density function.
[0150] 20. The method according to Example 19, wherein the first probability density function and the second probability density function are determined using a kernel density estimation method.
[0151] 21. A computer program comprising computer-readable instructions that, when executed on a suitable computer device, cause the computer device to perform the method according to any one of embodiments 1 to 20.
[0152] 22. A computer program product comprising the computer program according to embodiment 21.
[0153] The foregoing description of the specific embodiments so fully reveals the general nature of the invention that others can readily modify and / or adapt these specific embodiments to various applications by applying knowledge within the scope of the art, without much experimentation, without departing from the general concept of the invention. Therefore, based on the teachings and guidance given herein, these adaptations and modifications are intended to fall within the meaning and scope of equivalents of the disclosed embodiments. It should be understood that the wording or terminology in this specification is for illustrative purposes and not for limitation, and that the terminology or terminology of this specification will be interpreted by those skilled in the art based on the teachings and guidance.
[0154] The breadth and scope of this invention should not be limited by any of the exemplary embodiments described above, but should be defined only by the appended claims and their equivalents.
Claims
1. A method for sorting a performance dataset, the method comprising: (a) Determine a first probability density function associated with a first performance dataset, the first performance dataset being obtained by measuring product cells processed prior to the process of optimizing product cell patterning; (b) Determine a second probability density function associated with a second performance dataset, the second performance dataset being obtained by measuring product cells processed after the process of optimizing product cell patterning; as well as (c) Sort the first performance dataset and the second performance dataset based on the first probability density function and the second probability density function.
2. The method according to claim 1, wherein the first probability density function and the second probability density function are determined using a kernel density estimation method.
3. The method of claim 1 or 2, wherein the sorting includes evaluating a two-dimensional graph, the two-dimensional graph depicting the value of the product of the first probability density function and the second probability density function as a function of the first performance data and the second performance data.
4. The method of claim 3, wherein the evaluation includes determining the degree of symmetry of the two-dimensional graph.
5. The method of claim 3, wherein the evaluation includes determining the centroid of the two-dimensional graph.
6. The method of claim 3, wherein the evaluation comprises a first integral of the two-dimensional graph across a first region and a second integral of the two-dimensional graph across a second region.
7. The method according to claim 6, further comprising: The first integral value associated with the first region and the second integral value associated with the second region are compared.
8. The method according to claim 1, further comprising: The quality of the optimization is evaluated based on the ranking.
9. The method according to claim 7, further comprising: The quality of the optimization is evaluated based on the comparison.
10. A computer-readable medium comprising computer-readable instructions that, when executed on a suitable computer device, cause the computer device to perform: (a) Determine a first probability density function associated with a first performance dataset, the first performance dataset being obtained by measuring product cells processed prior to the process of optimizing product cell patterning; (b) Determine a second probability density function associated with a second performance dataset, the second performance dataset being obtained by measuring product cells processed after the process of optimizing product cell patterning; as well as (c) Sort the first performance dataset and the second performance dataset based on the first probability density function and the second probability density function.
11. The computer-readable medium of claim 10, wherein the first probability density function and the second probability density function are determined using a kernel density estimation method.
12. The computer-readable medium of claim 10 or 11, wherein the sorting includes evaluating a two-dimensional graph depicting the value of the product of the first probability density function and the second probability density function as a function of the first performance data and the second performance data.
13. The computer-readable medium of claim 12, wherein the evaluation includes determining the degree of symmetry of the two-dimensional graph.
14. The computer-readable medium of claim 12, wherein the evaluation includes determining the centroid of the two-dimensional graph.
15. The computer-readable medium of claim 10, further comprising: The quality of the optimization is evaluated based on the ranking.