Control chip, switching power supply and control method

Abstract

The application provides a control chip, a switching power supply and a control method. The switching power supply comprises a first driving transistor, a second driving transistor and a transformer. The transformer comprises a primary coil and a secondary coil. The first driving transistor is connected with a power supply voltage end, a control chip, the second driving transistor and the primary coil respectively. The second driving transistor is further connected with the control chip, the primary coil and a ground end. The secondary coil is connected with a load end. The application forms a charging circuit by arranging the first driving transistor, the second driving transistor, the transformer, the load end and the control chip. The control chip can open a second working mode according to a first current of the load end. The control chip controls the second driving transistor according to the second working mode, so that the primary coil provides charging energy to the secondary coil. The switching frequency of the second driving transistor in the second working mode is adjusted, so that the switching frequency of the second driving transistor is reduced while meeting the charging demand of the load, and the working efficiency of the switching power supply is improved.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and in particular to a control chip, a switching power supply, and a control method. Background Technology

[0002] The rapid development of fast charging for electronic devices (such as mobile phones) demands increased power density and higher charging efficiency in switching power supplies, especially power adapters. Switching power supplies, also known as switching converters or switching power supplies, are a type of power supply. Their function is to convert a voltage level to the voltage or current required by the user through different architectures (e.g., flyback, buck, or boost architectures).

[0003] In related technologies, switching power supplies can adopt an asymmetric half-bridge flyback architecture. The asymmetric half-bridge flyback architecture can greatly improve the charging efficiency of the switching power supply and reduce its size. However, the conversion efficiency of the symmetric half-bridge flyback architecture switching power supply drops significantly when applied to small loads. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a control chip, a switching power supply, and a control method.

[0005] This invention provides a control chip for a switching power supply. The switching power supply includes a first driving transistor, a second driving transistor, and a transformer. The transformer includes a primary coil and a secondary coil coupled to the primary coil. The first driving transistor is connected to a power supply voltage terminal, the control chip, the second driving transistor, and the primary chip. The second driving transistor is also connected to the control chip, the primary coil, and a ground terminal. The secondary coil is connected to a load terminal.

[0006] The control chip controls the first driving transistor to turn on in a first operating mode so that the power supply voltage terminal charges the primary coil. When the voltage of the primary coil is greater than a first preset threshold, the control chip controls the first driving transistor to turn off and controls the second driving transistor to turn on so that the primary coil provides charging energy to the secondary coil.

[0007] The control chip is also used to detect a first current at the load terminal, and when the first current is less than a second preset threshold, control the second driving transistor to work in a second working mode so that the primary coil provides charging energy to the secondary coil. The switching frequency of the second driving transistor in the first working mode is greater than the switching frequency in the second working mode.

[0008] Thus, the switching power supply of this application forms a charging circuit by setting a first driving transistor, a second driving transistor, a transformer, a load terminal, and a control chip. The control chip can start a second working mode according to the first current at the load terminal, control the second driving transistor according to the second working mode so that the primary coil provides charging energy to the secondary coil, and reduce the switching frequency of the second driving transistor while meeting the load charging requirements by adjusting the switching frequency of the second driving transistor in the second working mode, thereby improving the working efficiency of the switching power supply.

[0009] In some embodiments, the second operating mode includes a first operating cycle, a second operating cycle, and a third operating cycle. The control chip includes a operating cycle activation module connected to the second driving transistor. The operating cycle activation module is used to acquire a second voltage at the load terminal and to determine a target operating cycle based on the second voltage, and to control the switching frequency of the second driving transistor based on the target operating cycle. The target operating cycle includes one of the first operating cycle, the second operating cycle, and the third operating cycle.

[0010] In some implementations, the work cycle initiation module includes:

[0011] A duty cycle selection circuit, connected to the load terminal, is used to generate a target duty cycle signal based on the second voltage of the load terminal.

[0012] A duty cycle activation circuit is connected to the duty cycle selection circuit, the connection point of the first driving transistor and the second driving transistor, and the second driving transistor. It is used to provide a driving signal to the second driving transistor according to the first voltage at the connection point and the target duty cycle signal to drive the second driving transistor.

[0013] In some embodiments, the duty cycle selection circuit includes:

[0014] The first comparison unit has a first input terminal connected to a first reference voltage terminal, a second input terminal connected to the load terminal, and an output terminal connected to the duty cycle start-up circuit.

[0015] The second comparison unit has a first input terminal connected to the second reference voltage terminal, a second input terminal connected to the load terminal, and an output terminal connected to the duty cycle start-up circuit.

[0016] The third comparison unit has a first input terminal connected to the third reference voltage terminal, a second input terminal connected to the load terminal, and an output terminal connected to the duty cycle start circuit.

[0017] In some embodiments, the duty cycle start-up circuit includes:

[0018] A delay sub-circuit, connected to the connection point of the first driving transistor and the second driving transistor, is used to generate a delay signal based on a first voltage at the connection point of the first driving transistor and the second driving transistor.

[0019] A trigger sub-circuit, connected to the delay sub-circuit, is used to generate a start signal based on the delay signal;

[0020] A logic unit, connected to the trigger sub-circuit, the duty cycle selection circuit, and the second driving transistor, is used to provide a driving signal to the second driving transistor according to the start signal and the target duty cycle signal of the duty cycle selection circuit to drive the second driving transistor.

[0021] In some embodiments, the delay sub-circuit includes a first delay unit, a second delay unit, and a third delay unit connected in series. The first delay unit is connected to the connection point of the first driving transistor and the second driving transistor and the trigger sub-circuit. The second delay unit and the third delay unit are also connected to the trigger sub-circuit, respectively.

[0022] In some embodiments, the trigger sub-circuit includes:

[0023] The first triggering unit is connected to the first delay unit and the logic unit;

[0024] The second triggering unit is connected to the first triggering unit, the second delay unit, and the logic unit;

[0025] The third triggering unit is connected to the second triggering unit, the third delay unit, and the logic unit.

[0026] The present invention also provides a switching power supply, comprising a control chip, a first driving transistor, a second driving transistor, and a transformer as described in any of the preceding claims. The transformer includes a primary coil and a secondary coil coupled to the primary coil. The first driving transistor is connected to a power supply voltage terminal, the control chip, the second driving transistor, and the primary chip. The second driving transistor is also connected to the control chip, the primary coil, and a ground terminal. The secondary coil is connected to a load terminal.

[0027] In some embodiments, the switching power supply further includes;

[0028] A resonant capacitor is connected to the second driving transistor and the primary coil;

[0029] The current sensing resistor has one end connected to the ground terminal and the other end connected to the control chip, the second driving transistor, and the resonant capacitor.

[0030] In some embodiments, the switching power supply further includes:

[0031] A diode is connected to the secondary coil;

[0032] A filter capacitor is connected in parallel across the secondary coil.

[0033] The load resistor is connected in parallel across the secondary coil.

[0034] This application also provides a control method for the control chip described in any of the above claims, the control method comprising:

[0035] Detect the first current at the load terminal;

[0036] When the first current is not less than the second preset threshold, the second driving transistor is controlled to operate in the first operating mode so that the primary coil provides charging energy to the secondary coil; or

[0037] When the first current is less than the second preset threshold, the second driving transistor is controlled to work in the second working mode so that the primary coil provides charging energy to the secondary coil. The switching frequency of the second driving transistor in the first working mode is greater than the switching frequency in the second working mode.

[0038] In some embodiments, the second operating mode includes a first operating cycle, a second operating cycle, and a third operating cycle. Controlling the second driving transistor to operate in the second operating mode so that the primary coil provides charging energy to the secondary coil includes:

[0039] Obtain the first voltage at the connection point of the first driving transistor and the second driving transistor, and the second voltage at the load terminal;

[0040] The target operating cycle is determined based on the second voltage at the load terminal, and the target operating cycle is one of the first operating cycle, the second operating cycle, and the third operating cycle;

[0041] The on-time of the target voltage is determined based on the target operating cycle and the first voltage;

[0042] The second driving transistor is driven by a driving signal provided according to the turn-on time and the target duty cycle.

[0043] In some implementations, determining the on-time of the target voltage based on the target duty cycle and the first voltage includes:

[0044] When the target working cycle is the first working cycle, the first valley signal of the first voltage is used as the turn-on time; or

[0045] When the target working cycle is the second working cycle, the second valley signal of the first voltage is used as the turn-on time; or

[0046] When the target working cycle is the third working cycle, the third valley signal of the first voltage is used as the turn-on time.

[0047] Additional aspects and advantages of the embodiments of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0048] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of embodiments taken in conjunction with the accompanying drawings, wherein:

[0049] Figure 1 This is a circuit diagram of a switching power supply according to certain embodiments of the present invention;

[0050] Figure 2 This is a schematic diagram of a control chip module according to certain embodiments of the present invention;

[0051] Figure 3 This is a schematic diagram of the working cycle selection circuit in some embodiments of the present invention;

[0052] Figure 4 This is a circuit diagram of the duty cycle start-up circuit in some embodiments of the present invention;

[0053] Figure 5 This is a schematic diagram of waveform signals according to certain embodiments of the present invention;

[0054] Figure 6 This is a flowchart illustrating the control method of some embodiments of the present invention;

[0055] Figure 7 This is a flowchart illustrating the control method of some embodiments of the present invention;

[0056] Figure 8 This is a flowchart illustrating the control method of some embodiments of the present invention.

[0057] Explanation of key component symbols:

[0058] Switching power supply 100, control chip 10, duty cycle activation module 11, duty cycle selection circuit 111, first comparison unit CMP1, second comparison unit CMP2, third comparison unit CMP3, first reference voltage terminal vref1, second reference voltage terminal vref2, third reference voltage terminal vref3, duty cycle activation circuit 112, delay sub-circuit 1121, first delay unit X1, second delay unit X2, third delay unit X3, trigger sub-circuit 1122, first trigger unit Y1, second trigger unit Y2, third trigger unit Y3, logic unit 1123, first driving transistor Q1, second driving transistor Q2, power supply voltage terminal VIN, current sensing resistor R1, load resistor R2, resonant capacitor C1, filter capacitor C2, diode D1, ground terminal GND, transformer 20, primary coil 21, secondary coil 22, first voltage V1, second voltage V2, load terminal 30. Detailed Implementation

[0059] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0060] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0061] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0062] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0063] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0064] Please see Figure 1 This application provides a control chip 10 for a switching power supply 100. The switching power supply 100 includes a first driving transistor Q1, a second driving transistor Q2, and a transformer 20. The transformer 20 includes a primary coil 21 and a secondary coil 22 coupled to the primary coil 21. The first driving transistor Q1 is connected to the power supply voltage terminal VIN, the control chip 10, the second driving transistor Q2, and the primary chip. The second driving transistor Q2 is also connected to the control chip 10, the primary coil 21, and the ground terminal GND. The secondary coil 22 is connected to the load terminal 30.

[0065] Specifically, the first driving transistor Q1 and the second driving transistor Q2 can be metal-oxide-semiconductor field-effect transistors (MOSFETs). The transformer 20 is used to convert voltage and generate charging energy. The load terminal 30 can be connected to a load, which can be an electronic device. By controlling the opening and closing of the first driving transistor Q1 and the second driving transistor Q2, the control chip 10 can adjust the input power and output power of the transformer 20, thereby adjusting the charging energy provided by the transformer 20 to the load.

[0066] In some examples, the control chip 10 operates in a first working mode, that is, the control chip 10 controls the first driving transistor Q1 to turn on, connecting the power supply voltage terminal VIN to the primary coil 21 of the transformer 20, and the power supply voltage terminal VIN charges the primary coil 21. The control chip 10 can detect the voltage of the primary coil 21 in real time. When the voltage of the primary coil 21 is greater than a first preset threshold, the control chip 10 controls the first driving transistor Q1 to turn off and controls the second driving transistor Q2 to turn on. The primary coil 21 is connected to the ground terminal GND through the second driving transistor Q2 to form a circuit, so that the primary coil 21 generates charging energy to charge the secondary coil 22 to charge the load, and a first current is formed at the load terminal 30.

[0067] Furthermore, the control chip 10 can also detect the first current at the load terminal 30. If the first current is not less than a second preset threshold, the control chip 10 controls the first driving transistor Q1 and the second driving transistor Q2 based on the voltage of the primary coil 21. That is, if the voltage of the primary coil 21 is greater than the first preset threshold, the control chip 10 controls the first driving transistor Q1 to turn off and controls the second driving transistor Q2 to turn on. If the voltage of the primary coil 21 is zero, the control chip 10 controls the second driving transistor Q2 to turn off and controls the first driving transistor Q1 to turn on, so that the power supply voltage terminal VIN charges the primary coil 21.

[0068] When the first current is less than the second preset threshold, the control chip 10 operates in the second working mode, that is, the control chip 10 controls the second driving transistor Q2 to turn on and off, so that the primary coil 21 provides charging energy to the secondary coil 22. The control chip 10 can adjust the charging energy generated by the secondary coil 22 by adjusting the switching frequency of the second driving transistor Q2.

[0069] It should be noted that the switching frequency of the second driving transistor Q2 in the first operating mode is greater than that in the second operating mode.

[0070] Thus, the switching power supply 100 of this application forms a charging circuit by setting a first driving transistor Q1, a second driving transistor Q2, a transformer 20, a load terminal 30, and a control chip 10. The control chip 10 can start a second working mode according to the first current of the load terminal 30, and control the second driving transistor Q2 according to the second working mode so that the primary coil 21 provides charging energy to the secondary coil 22. By adjusting the switching frequency of the second driving transistor Q2 in the second working mode, the switching frequency of the second driving transistor Q2 is reduced while meeting the load charging requirements, thereby improving the working efficiency of the switching power supply 100.

[0071] Please combine Figure 1 and Figure 2 In some embodiments, the second operating mode includes a first operating cycle, a second operating cycle, and a third operating cycle. The control chip 10 includes a operating cycle activation module 11, which is connected to the second driving transistor Q2. The operating cycle activation module 11 is used to acquire the second voltage V2 of the load terminal 30 and to determine a target operating cycle based on the second voltage V2, and to control the switching frequency of the second driving transistor Q2 based on the target operating cycle. The target operating cycle includes one of the first operating cycle, the second operating cycle, and the third operating cycle.

[0072] Specifically, the second operating mode may include multiple operating cycles. For example, the second operating mode may include a first operating cycle, a second operating cycle, a third operating cycle, and so on up to a sixteenth operating cycle. The specific number is not limited here. This application uses three operating cycles as an example, that is, the second operating mode includes a first operating cycle, a second operating cycle, and a third operating cycle. The control chip 10 is provided with a operating cycle activation module 11, which is connected to the second driving transistor Q2. The operating cycle activation module can obtain the second voltage V2 of the load terminal 30 and determine the target operating cycle based on the second voltage V2. The operating cycle activation module 11 can control the switching frequency of the second driving transistor Q2 according to the target operating cycle. The target operating cycle can be one of the first operating cycle, the second operating cycle, and the third operating cycle, and the time of the first operating cycle is less than the time of the second operating cycle, and the time of the second operating cycle is less than the time of the third operating cycle. For example, the time of the first operating cycle can be 2 microseconds shorter than the time of the second operating cycle, and the time of the second operating cycle can be 2 microseconds shorter than the time of the third operating cycle. The specific number is not limited here.

[0073] Thus, by setting the working cycle, the start module 11 can determine the target working cycle based on the second voltage V2 of the load terminal 30, and control the switching frequency of the second driving transistor Q2 according to the target working cycle, thereby reducing the switching frequency of the second driving transistor Q2 while meeting the load charging requirements, and improving the working efficiency of the switching power supply 100.

[0074] Please see Figure 2 and Figure 3 In some embodiments, the duty cycle activation module 11 includes a duty cycle selection circuit 111 and a duty cycle activation circuit 112.

[0075] Specifically, the duty cycle selection circuit 111 is connected to the load terminal 30 and detects the second voltage V2 of the load terminal 30. The duty cycle selection circuit 111 can generate a target duty cycle signal based on the second voltage V2 of the load terminal 30 and send the target duty cycle signal to the duty cycle activation circuit 112. The duty cycle activation circuit 112 is connected to the connection point of the duty cycle selection circuit 111, the first driving transistor Q1, and the second driving transistor Q2. The duty cycle activation circuit 112 can obtain the first voltage V1 at the connection point of the first driving transistor Q1 and the second driving transistor Q2, and generate a drive signal based on the first voltage V1 at the connection point and the target duty cycle signal. The duty cycle activation module 11 can drive the second driving transistor Q2 according to the drive signal.

[0076] The duty cycle selection circuit 111 includes a first comparison unit CMP1, a second comparison unit CMP2, and a third comparison unit CMP3. These units can be comparators. The first input terminal of the first comparison unit CMP1 is connected to the first reference voltage terminal vref1, the second input terminal is connected to the load terminal 30, and the output terminal is connected to the duty cycle enabling circuit 112. The first input terminal of the second comparison unit CMP2 is connected to the second reference voltage terminal vref2, the second input terminal is connected to the load terminal 30, and the output terminal is connected to the duty cycle enabling circuit 112. The first input terminal of the third comparison unit CMP3 is connected to the third reference voltage terminal vref3, the second input terminal is connected to the load terminal 30, and the output terminal is connected to the duty cycle enabling circuit 112.

[0077] Furthermore, the first reference voltage terminal vref1 is provided with a first reference voltage, the second reference voltage terminal vref2 is provided with a second reference voltage, and the third reference voltage terminal vref3 is provided with a third reference voltage, wherein the first reference voltage is greater than the second reference voltage, and the second reference voltage is greater than the third reference voltage. When the second voltage V2 at the load terminal 30 is less than the first reference voltage and the second voltage V2 is greater than the second reference voltage, the first comparison unit CMP1 outputs a high-level signal, the second comparison unit CMP2 outputs a low-level signal, and the third comparison unit CMP3 outputs a low-level signal, thereby determining the target working cycle signal as the first working cycle signal, and determining the target working cycle as the first working cycle based on the target working cycle signal.

[0078] When the second voltage V2 is less than the first reference voltage and the second reference voltage, and the second voltage V2 is greater than the third reference voltage, the first comparison unit CMP1 and the second comparison unit CMP2 output high-level signals, and the third comparison unit CMP3 outputs low-level signals, thereby determining the target working cycle signal as the second working cycle signal. Based on the target working cycle signal, the target working cycle is determined to be the second working cycle, and the second working cycle is 2 microseconds longer than the first working cycle.

[0079] When the second voltage V2 is less than the first reference voltage, the second reference voltage and the third reference voltage, the first comparison unit CMP1, the second comparison unit CMP2 and the third comparison unit CMP3 output a high-level signal, thereby determining the target working cycle signal as the third working cycle signal. The target working cycle is determined to be the third working cycle based on the target working cycle signal. The third working cycle is 2 microseconds longer than the second working cycle.

[0080] Thus, by setting the working cycle selection circuit 111, the target working cycle can be determined based on the second voltage V2. By setting the working cycle activation circuit 112, the working cycle activation circuit 112 can generate a drive signal based on the first voltage V1 and the target working cycle, so that the control chip 10 drives the second drive transistor Q2 to work according to the drive signal, thereby realizing the corresponding working cycle.

[0081] Please see Figure 4 In some implementations, the duty cycle start circuit 112 includes a delay sub-circuit 1121, a trigger sub-circuit 1122, and a logic unit 1123.

[0082] Specifically, the delay sub-circuit 1121 is electrically connected to the connection point of the first driving transistor Q1 and the second driving transistor Q2. The extension sub-circuit can obtain the first voltage V1 at the connection point. The delay sub-circuit 1121 can generate a delayed signal based on the first voltage V1 at the connection point. The delayed signal can be the waveform signal of the first voltage V1. The delay sub-circuit 1121 may include a first delay unit X1, a second delay unit X2, and a third delay unit X3 connected in series. The first delay unit X1 is connected to the connection point of the first driving transistor Q1 and the second driving transistor Q2 and the trigger sub-circuit 1122. The second delay unit X2 is connected to the first delay unit X1 and the trigger sub-circuit 1122. The third delay unit X3 is connected to the second delay unit X2 and the trigger sub-circuit 1122. The delayed signal is transmitted to the first delay unit X1, the second delay unit X2, and the third delay unit X3 in sequence.

[0083] The trigger sub-circuit 1122 is connected to the delay sub-circuit 1121. The trigger sub-circuit 1122 is used to generate a start signal based on the delay signal. The trigger sub-circuit 1122 includes a first trigger unit Y1, a second trigger unit Y2, and a third trigger unit Y3. The first trigger unit Y1 is connected to the first delay unit X1 and the logic unit 1123. The second trigger unit Y2 is connected to the first trigger unit Y1, the second delay unit X2, and the logic unit 1123. The third trigger unit Y3 is connected to the second trigger unit Y2, the third delay unit X3, and the logic unit 1123. The delay signal is transmitted to the trigger sub-circuit 1122 through the delay sub-circuit 1121. For example, please refer to... Figure 5 The waveform signal of the first voltage V1 can include three valleys. At each valley of the waveform signal, the delayed signal will output a high pulse. That is, the delayed signal includes three high pulses. The first high pulse is transmitted to the first trigger unit Y1 through the first delay unit X1 to generate the first start signal. The second high pulse is transmitted to the second trigger unit Y2 through the second delay unit X2 to generate the second start signal. The third high pulse is transmitted to the third trigger unit Y3 through the third delay unit X3 to generate the third start signal.

[0084] Logic unit 1123 is connected to trigger sub-circuit 1122, duty cycle selection circuit 111, and second driving transistor Q2. Logic unit 1123 is used to provide a drive signal to the second driving transistor Q2 according to a start signal and a target duty cycle signal from the duty cycle selection circuit 111 to drive the second driving transistor Q2. For example, when the target duty cycle signal is a first duty cycle signal, logic unit 1123 can generate a first drive signal based on the first start signal and drive the second driving transistor Q2 to operate in the first duty cycle according to the first drive signal. When the target duty cycle signal is a second duty cycle signal, logic unit 1123 can generate a second drive signal based on the second start signal and drive the second driving transistor Q2 to operate in the second duty cycle according to the second drive signal. When the target duty cycle signal is a third duty cycle signal, logic unit 1123 can generate a third drive signal based on the third start signal and drive the second driving transistor Q2 to operate in the third duty cycle according to the third drive signal.

[0085] Thus, the working cycle start circuit 112 generates a delayed signal by setting a delay sub-circuit 1121, and generates a first start signal, a second start signal, and a third start signal based on the delayed signal by setting a trigger sub-circuit 1122, and generates a drive signal based on the start signal and the target cycle signal by setting a logic unit 1123, and drives the second drive transistor Q2 to work in the target working cycle.

[0086] Please see Figure 1In some embodiments, the switching power supply 100 further includes a resonant capacitor C1 and a current-sensing resistor R1. The resonant capacitor C1 is connected to the second driving transistor Q2 and the primary coil 21. One end of the current-sensing resistor R1 is connected to the ground terminal GND, and the other end is connected to the control chip 10, the second driving transistor Q2, and the resonant capacitor C1.

[0087] Specifically, the resonant capacitor C1 is connected in series with the primary coil 21 of the transformer 20. Through the resonance of the resonant capacitor C1 and the inductance of the primary coil 21, zero-voltage conduction of the first driving transistor Q1 and the second driving transistor Q2 can be achieved. The current-sensing resistor R1 is connected to the ground terminal GND, the second driving transistor Q2, the resonant capacitor C1, and the control chip 10. When the second driving transistor Q2 is turned on, current flows sequentially through the resonant capacitor C1, the primary coil 21, the second driving transistor Q2, and the current-sensing resistor R1, exiting to the ground terminal GND to form a current path. The control chip 10 can also detect whether there is current in the current-sensing resistor R1.

[0088] Thus, by setting the resonant capacitor C1, the first driving transistor Q1 and the second driving transistor Q2 can be turned on at zero voltage. By setting the current sensing resistor R1 to be connected to the ground terminal GND, the current transmitted by the resonant capacitor C1 can form a loop. Furthermore, the current sensing resistor R1 is connected to the control chip 10, so that the control chip 10 can detect the current flowing to the current sensing resistor R1.

[0089] Please see Figure 1 In some embodiments, the switching power supply 100 further includes a diode D1, a filter capacitor C2, and a load resistor R2. The diode D1 is connected to the secondary coil 22, the filter capacitor C2 is connected in parallel across the secondary coil 22, and the load resistor R2 is connected in parallel across the secondary coil 22.

[0090] Specifically, diode D1 is connected in series with secondary coil 22. The anode of diode D1 is connected to secondary coil 22, and the cathode is connected to load terminal 30. Diode D1 controls the unidirectional output current of secondary coil 22 to load resistor R2. One end of filter capacitor C2 is connected to the cathode of diode D1, and the other end is connected to secondary coil 22. Filter capacitor C2 can reduce the impact of alternating current ripple on the circuit, and at the same time absorb the current fluctuations generated during circuit operation and the interference introduced through the AC power supply, making the circuit performance more stable. Load resistor R2 is set at load terminal 30. One end of load resistor R2 is connected to the cathode of diode D1, and the other end is connected to secondary coil 22 of transformer 20. Load resistor R2 and filter capacitor C2 are connected in parallel. Load resistor R2 can be the device to be charged.

[0091] Thus, by setting diode D1, the switching power supply 100 can make the current of the secondary coil 22 flow in one direction. By setting filter capacitor C2, the influence of AC ripple on the circuit can be reduced, the efficient and smooth DC output can be improved, and the working performance of the circuit can be made more stable. The load resistor R2 is connected in parallel across the secondary coil 22, so that the current generated by the secondary coil 22 can charge the load resistor R2.

[0092] Please see Figure 6 This application also provides a control method for controlling chip 10, the control method including:

[0093] S10: Detect the first current at the load terminal;

[0094] S20: When the first current is not less than the second preset threshold, the second driving transistor is controlled to operate in the first operating mode so that the primary coil provides charging energy to the secondary coil; or

[0095] S30: When the first current is less than the second preset threshold, the second driving transistor is controlled to work in the second working mode so that the primary coil provides charging energy to the secondary coil. The switching frequency of the second driving transistor in the first working mode is greater than the switching frequency in the second working mode.

[0096] Specifically, when the power supply voltage terminal VIN is powered on, the first driving transistor Q1 is turned on and the second driving transistor Q2 is turned off. The power supply voltage terminal VIN can charge the primary coil 21 of the transformer 20. The control chip 10 can detect the voltage of the primary coil 21 in real time. When the voltage of the primary coil 21 is greater than the first preset threshold, the control chip 10 controls the first driving transistor Q1 to turn off and controls the second driving transistor Q2 to turn on. The primary coil 21 is connected to the ground terminal GND through the second driving transistor Q2 to form a circuit, so that the primary coil 21 generates charging energy to charge the secondary coil 22 to charge the load, and the load terminal 30 forms a first current.

[0097] The control chip 10 can also detect the first current at the load terminal 30. If the first current is not less than a second preset threshold, the control chip 10 controls the second driving transistor Q2 using a first working module. That is, when the voltage of the primary coil 21 is zero, the control chip 10 controls the second driving transistor Q2 to turn off and controls the first driving transistor Q1 to turn on, so that the power supply voltage terminal VIN charges the primary coil 21. When the voltage of the primary coil 21 is greater than the first preset threshold, the control chip 10 controls the first driving transistor Q1 to turn off and controls the second driving transistor Q2 to turn on, so that the primary coil 21 provides charging energy to the secondary coil 22.

[0098] When the first current is less than the second preset threshold, the control chip 10 operates in the second working mode, that is, the control chip 10 controls the second driving transistor Q2 to turn on and off, so that the primary coil 21 provides charging energy to the secondary coil 22. The control chip 10 can adjust the charging energy generated by the secondary coil 22 by adjusting the switching frequency of the second driving transistor Q2.

[0099] It should be noted that the switching frequency of the second driving transistor Q2 in the first operating mode is greater than that in the second operating mode.

[0100] Thus, the switching power supply 100 of this application forms a charging circuit by setting a first driving transistor Q1, a second driving transistor Q2, a transformer 20, a load terminal 30, and a control chip 10. The control chip 10 can start a second working mode according to the first current of the load terminal 30, and control the second driving transistor Q2 according to the second working mode so that the primary coil 21 provides charging energy to the secondary coil 22. By adjusting the switching frequency of the second driving transistor Q2 in the second working mode, the switching frequency of the second driving transistor Q2 is reduced while meeting the load charging requirements, thereby improving the working efficiency of the switching power supply 100.

[0101] Please see Figure 7 In some implementations, the second working mode includes a first working cycle, a second working cycle, and a third working cycle, and S30 includes:

[0102] S31: Obtain the first voltage at the connection point of the first driving transistor and the second driving transistor and the second voltage at the load terminal;

[0103] S32: Determine the target duty cycle based on the second voltage at the load end. The target duty cycle is one of the first duty cycle, the second duty cycle, and the third duty cycle.

[0104] S33: Determine the start-up time of the target voltage based on the target operating cycle and the first voltage;

[0105] S34: Provide a drive signal to the second drive transistor according to the turn-on time and the target duty cycle to drive the second drive transistor.

[0106] Specifically, the second operating mode may include multiple operating cycles. This application uses three operating cycles as an example, that is, the second operating mode includes a first operating cycle, a second operating cycle, and a third operating cycle. The control chip 10 is connected to the connection point of the first driving transistor Q1 and the second driving transistor Q2 and the load terminal 30, respectively. The control chip 10 can obtain the first voltage V1 at the connection point of the first driving transistor Q1 and the second driving transistor Q2 and the second voltage V2 at the load terminal 30. The control chip 10 is provided with a duty cycle selection circuit 111. The duty cycle selection circuit 111 includes a first comparison unit CMP1, a second comparison unit CMP2, and a third comparison unit CMP3. The duty cycle selection circuit 111 can determine the target duty cycle by acquiring the second voltage V2. For example, if the second voltage V2 at the load terminal 30 is less than the first reference voltage of the first comparison unit CMP1, and the second voltage V2 is greater than the second reference voltage of the second comparison unit CMP2, and the second voltage V2 is greater than the third reference voltage of the third comparison unit CMP3, the first comparison unit CMP1 outputs a high-level signal, the second comparison unit CMP2 outputs a low-level signal, and the third comparison unit CMP3 outputs a low-level signal, thereby determining the target duty cycle signal as the first duty cycle signal. The target duty cycle is determined as the first duty cycle based on the target duty cycle signal.

[0107] Furthermore, the activation time of the second operating mode can be determined based on the target operating cycle and the first voltage V1. A drive signal can be provided to the second driving transistor Q2 based on the activation time and the target operating cycle. The control chip 10 drives the second driving transistor Q2 to activate according to the drive signal, causing the primary coil 21 to provide charging energy to the secondary coil 22. Furthermore, the switching frequency of the second driving transistor Q2 can be adjusted according to the target operating cycle, thereby adjusting the charging energy generated by the secondary coil 22. It should be noted that the target operating cycle is one of the first, second, and third operating cycles.

[0108] Thus, by obtaining the second voltage V2 of the load terminal 30, the target working cycle is determined, and the switching frequency of the second driving transistor Q2 is controlled according to the target working cycle, thereby adjusting the charging energy generated by the secondary coil 22. While meeting the load charging requirements, the switching frequency of the second driving transistor Q2 is reduced, thereby improving the working efficiency of the switching power supply 100.

[0109] Please see Figure 8 In some embodiments, S33 includes:

[0110] S331: When the target working cycle is the first working cycle, the first valley signal of the first voltage is used as the turn-on time; or

[0111] S332: When the target duty cycle is the second duty cycle, the second valley signal of the first voltage is used as the turn-on time; or

[0112] S333: When the target working cycle is the third working cycle, the third valley signal of the first voltage is used as the turn-on time.

[0113] Specifically, the control chip 10 can obtain a first voltage V1 at the connection point between the first driving transistor Q1 and the second driving transistor Q2. Based on the first voltage V1, its waveform signal can be obtained. When the target operating cycle is the first operating cycle, the first valley signal of the waveform signal is used as the start time of the first operating cycle. When the target operating cycle is the second operating cycle, the second valley signal of the waveform signal is used as the start time of the second operating cycle. When the target operating cycle is the third operating cycle, the third valley signal of the waveform signal is used as the start time of the third operating cycle.

[0114] It is understood that the target working cycle can be n, and the nth valley signal of the waveform signal can be used as the start time of the nth working cycle. This application uses three working cycles as an example, and the specific number is not limited here.

[0115] Thus, by acquiring the waveform signal of the first voltage V1 and determining the start time of the corresponding working cycle based on the valley signal of the waveform signal, the working cycle corresponding to the second working mode is started, thereby realizing the adjustment of the working frequency of the second driving transistor Q2 and improving the working efficiency of the switching power supply 100.

[0116] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A control chip for a switching power supply, characterized in that, The switching power supply includes a first driving transistor, a second driving transistor, and a transformer. The transformer includes a primary coil and a secondary coil coupled to the primary coil. The first driving transistor is connected to the power supply voltage terminal, the control chip, the second driving transistor, and the primary chip. The second driving transistor is also connected to the control chip, the primary coil, and the ground terminal. The secondary coil is connected to the load terminal. The control chip controls the first driving transistor to turn on in a first operating mode so that the power supply voltage terminal charges the primary coil. When the voltage of the primary coil is greater than a first preset threshold, the control chip controls the first driving transistor to turn off and controls the second driving transistor to turn on so that the primary coil provides charging energy to the secondary coil. The control chip is also used to detect the first current at the load terminal, and when the first current is less than the second preset threshold, control the second driving transistor to work in the second working mode so that the primary coil provides charging energy to the secondary coil. The switching frequency of the second driving transistor in the first working mode is greater than the switching frequency in the second working mode. The second operating mode includes a first operating cycle, a second operating cycle, and a third operating cycle. The control chip includes a operating cycle activation module connected to the second driving transistor. The operating cycle activation module is used to acquire a second voltage at the load terminal and to determine a target operating cycle based on the second voltage, and to control the switching frequency of the second driving transistor based on the target operating cycle. The target operating cycle includes one of the first operating cycle, the second operating cycle, and the third operating cycle.

2. The control chip according to claim 1, characterized in that, The work cycle activation module includes: A duty cycle selection circuit, connected to the load terminal, is used to generate a target duty cycle signal based on the second voltage of the load terminal. A duty cycle activation circuit is connected to the duty cycle selection circuit, the connection point of the first driving transistor and the second driving transistor, and the second driving transistor. It is used to provide a driving signal to the second driving transistor according to the first voltage at the connection point and the target duty cycle signal to drive the second driving transistor.

3. The control chip according to claim 2, characterized in that, The duty cycle selection circuit includes: The first comparison unit has a first input terminal connected to a first reference voltage terminal, a second input terminal connected to the load terminal, and an output terminal connected to the duty cycle start-up circuit. The second comparison unit has a first input terminal connected to the second reference voltage terminal, a second input terminal connected to the load terminal, and an output terminal connected to the duty cycle start-up circuit. The third comparison unit has a first input terminal connected to the third reference voltage terminal, a second input terminal connected to the load terminal, and an output terminal connected to the duty cycle start circuit.

4. The control chip according to claim 2, characterized in that, The duty cycle activation circuit includes: A delay sub-circuit, connected to the connection point of the first driving transistor and the second driving transistor, is used to generate a delay signal based on a first voltage at the connection point of the first driving transistor and the second driving transistor. A trigger sub-circuit, connected to the delay sub-circuit, is used to generate a start signal based on the delay signal; A logic unit, connected to the trigger sub-circuit, the duty cycle selection circuit, and the second driving transistor, is used to provide a driving signal to the second driving transistor according to the start signal and the target duty cycle signal of the duty cycle selection circuit to drive the second driving transistor.

5. The control chip according to claim 4, characterized in that, The delay sub-circuit includes a first delay unit, a second delay unit, and a third delay unit connected in series. The first delay unit is connected to the connection point of the first driving transistor and the second driving transistor and the trigger sub-circuit. The second delay unit and the third delay unit are also connected to the trigger sub-circuit, respectively.

6. The control chip according to claim 5, characterized in that, The trigger sub-circuit includes: The first triggering unit is connected to the first delay unit and the logic unit; The second triggering unit is connected to the first triggering unit, the second delay unit, and the logic unit; The third triggering unit is connected to the second triggering unit, the third delay unit, and the logic unit.

7. A switching power supply, characterized in that, The device includes a control chip, a first driving transistor, a second driving transistor, and a transformer as described in any one of claims 1-6. The transformer includes a primary coil and a secondary coil coupled to the primary coil. The first driving transistor is connected to a power supply voltage terminal, the control chip, the second driving transistor, and the primary chip. The second driving transistor is also connected to the control chip, the primary coil, and a ground terminal. The secondary coil is connected to a load terminal.

8. The switching power supply according to claim 7, characterized in that, The switching power supply also includes; A resonant capacitor is connected to the second driving transistor and the primary coil; The current sensing resistor has one end connected to the ground terminal and the other end connected to the control chip, the second driving transistor, and the resonant capacitor.

9. The switching power supply according to claim 7, characterized in that, The switching power supply also includes: A diode is connected to the secondary coil; A filter capacitor is connected in parallel across the secondary coil. The load resistor is connected in parallel across the secondary coil.

10. A control method, characterized in that, The control method, used in the control chip according to any one of claims 1-6, comprises: Detect the first current at the load terminal; When the first current is not less than the second preset threshold, the second driving transistor is controlled to operate in the first operating mode so that the primary coil provides charging energy to the secondary coil; or When the first current is less than the second preset threshold, the second driving transistor is controlled to work in the second working mode so that the primary coil provides charging energy to the secondary coil. The switching frequency of the second driving transistor in the first working mode is greater than the switching frequency in the second working mode.

11. The control method according to claim 10, characterized in that, The second operating mode includes a first operating cycle, a second operating cycle, and a third operating cycle. Controlling the second driving transistor to operate in the second operating mode so that the primary coil provides charging energy to the secondary coil includes: Obtain the first voltage at the connection point of the first driving transistor and the second driving transistor, and the second voltage at the load terminal; The target operating cycle is determined based on the second voltage at the load terminal, and the target operating cycle is one of the first operating cycle, the second operating cycle, and the third operating cycle; The on-time of the target voltage is determined based on the target operating cycle and the first voltage; The second driving transistor is driven by a driving signal provided according to the turn-on time and the target duty cycle.

12. The control method according to claim 11, characterized in that, The step of determining the on-time of the target voltage based on the target operating cycle and the first voltage includes: When the target working cycle is the first working cycle, the first valley signal of the first voltage is used as the turn-on time; or When the target working cycle is the second working cycle, the second valley signal of the first voltage is used as the turn-on time; or When the target working cycle is the third working cycle, the third valley signal of the first voltage is used as the turn-on time.

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