A single-phase high-frequency link inverter and a modulation method thereof

Abstract

This invention belongs to the field of power electronics technology, specifically relating to a single-phase high-frequency chain inverter and its modulation method, comprising: a primary-side full-bridge inverter circuit, including primary-side switching transistors K1, K3, K2, and K4; a secondary-side full-bridge frequency converter, including secondary-side switching transistors S1a, S2a, S3b, S4b, S1b, S2b, S3a, and S4a; a high-frequency transformer for connecting the primary-side full-bridge inverter circuit and the secondary-side full-bridge frequency converter; a voltage spike suppression circuit, including D1, D3, D2, and D4; the input terminal of the full-bridge circuit is connected in parallel with the secondary winding of the high-frequency transformer, and the output terminal of the full-bridge circuit is connected to a DC power supply.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, specifically relating to a single-phase high-frequency chain inverter and its modulation method. Background Technology

[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.

[0003] With the increasing prominence of the global energy crisis and environmental problems, renewable energy power generation technologies, represented by solar and wind power, have developed rapidly. In distributed generation systems, the inverter, as the core device for converting direct current (DC) to alternating current (AC), directly affects the efficiency, reliability, and cost of the entire system. Meanwhile, to ensure electrical isolation and safety, isolated inverters are widely used in various applications.

[0004] Traditional isolation inverters typically use power frequency transformers for electrical isolation, but these transformers are large, heavy, and inefficient, severely limiting the improvement of system power density. To overcome this shortcoming, high-frequency link inverter technology has emerged. By increasing the operating frequency of the transformer, high-frequency link inverters significantly reduce the size and weight of the transformer, thereby significantly improving the system power density.

[0005] A typical high-frequency chain inverter topology consists of three parts: a primary-side inverter circuit, a high-frequency transformer, and a secondary-side frequency converter. The primary-side inverter circuit converts DC power into a high-frequency AC square wave, which is then transmitted to the secondary side via the high-frequency transformer. The frequency converter then performs waveform transformation, and finally outputs power frequency sinusoidal AC power through a filter.

[0006] High-frequency link inverters operate at high frequencies (typically tens of kilohertz), resulting in high switching losses in the switching devices and a decrease in overall efficiency. To reduce switching losses, high-performance wide-bandgap semiconductor devices, such as silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs), can be used. Although SiC MOSFETs have advantages such as fast switching speed, low on-resistance, and high temperature resistance, their high cost makes them difficult to promote in cost-sensitive applications.

[0007] High-frequency transformers inevitably contain leakage inductance. When the switching transistor of the secondary-side converter is turned off, the transformer leakage inductance resonates with the parasitic capacitance of the switching transistor, generating voltage spikes across the transistor. These voltage spikes not only jeopardize the normal operation of the switching transistor, potentially causing it to break down and be damaged, but also increase electromagnetic interference, affecting system reliability. Voltage spikes can be suppressed using RC snubber circuits, adding clamping circuits, and optimizing the transformer structure; however, RC snubber circuits introduce additional losses; active clamping circuits require additional auxiliary switching transistors, increasing modulation complexity and cost; and optimizing the transformer structure has high process requirements and limited suppression effect.

[0008] To reduce switching losses, soft-switching technologies such as zero-voltage switching (ZVS) and zero-current switching (ZCS) can be used; however, to achieve soft switching of the primary-side switching transistor in a high-frequency chain inverter, it is usually necessary to add an auxiliary resonant network or adopt a complex modulation strategy, which increases the system complexity and cost.

[0009] To achieve high efficiency, existing high-frequency link inverters often use all SiC MOSFET devices, which, while efficient, are expensive. Using all silicon-based insulated-gate bipolar transistors (IGBTs) is cheaper, but the IGBT turn-off tail current and significant switching losses make it difficult to achieve high efficiency at high frequencies. Therefore, controlling cost while ensuring efficiency is a pressing technical challenge in this field.

[0010] In summary, existing technologies suffer from high switching losses, poor voltage spike suppression, complex soft-switching implementation, and a difficulty in balancing cost and efficiency. Therefore, there is an urgent need to propose a novel high-frequency chain inverter topology and its modulation method that can simultaneously address these issues. Summary of the Invention

[0011] To address the aforementioned issues, this invention proposes a single-phase high-frequency chain inverter and its modulation method, which achieves zero-voltage turn-on of the primary-side switch and effectively suppresses voltage spikes in the secondary-side switch.

[0012] According to some embodiments, the first aspect of the present invention provides a single-phase high-frequency chain inverter, which adopts the following technical solution: A single-phase high-frequency chain inverter, comprising: The primary-side full-bridge inverter circuit has its input terminal connected to the DC power supply side. It includes a first inverter bridge arm composed of a first primary-side switch K1 and a third primary-side switch K3, and a second inverter bridge arm composed of a second primary-side switch K2 and a fourth primary-side switch K4. The two ends of the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are respectively connected in parallel to a first capacitor Cs1, a second capacitor Cs2, a third capacitor Cs3, and a fourth capacitor Cs4. The secondary-side full-bridge frequency converter has its output connected to the load side. It includes a first half-bridge composed of a first secondary-side switch S1a and a third secondary-side switch S2a, a second half-bridge composed of a sixth secondary-side switch S3b and an eighth secondary-side switch S4b, a complementary switch of the first half-bridge composed of a second secondary-side switch S1b and a fourth secondary-side switch S2b, and a complementary switch of the second half-bridge composed of a fifth secondary-side switch S3a and a seventh secondary-side switch S4a. A high-frequency transformer is used to connect the primary-side full-bridge inverter circuit and the secondary-side full-bridge frequency converter; the high-frequency transformer has a primary winding and a secondary winding. The voltage spike suppression circuit includes a first bridge arm composed of a first diode D1 and a third diode D3, and a second bridge arm composed of a second diode D2 and a fourth diode D4; the first bridge arm and the second bridge arm are connected in parallel to form a full-bridge circuit; the input terminal of the full-bridge circuit is connected in parallel with the secondary winding of the high-frequency transformer, and the output terminal of the full-bridge circuit is connected to a DC power supply.

[0013] As a further technical limitation, a single-phase high-frequency chain inverter also includes an LC filter disposed between the secondary full-bridge cyclic converter and the load side, comprising a filter inductor Lf and a filter capacitor Cf.

[0014] As a further technical limitation, the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are all silicon-based insulated-gate bipolar transistors.

[0015] As a further technical limitation, the first secondary-side switch S1a, the third secondary-side switch S2a, the sixth secondary-side switch S3b and the eighth secondary-side switch S4b are all silicon carbide metal-oxide-semiconductor field-effect transistors.

[0016] As a further technical limitation, the second secondary-side switch S1b, the fourth secondary-side switch S2b, the fifth secondary-side switch S3a, and the seventh secondary-side switch S4a are all silicon-based insulated-gate bipolar transistors.

[0017] According to some embodiments, the second aspect of the present invention provides a modulation method for a single-phase high-frequency chain inverter, which adopts a single-phase high-frequency chain inverter provided by the first aspect, and employs the following technical solution: A modulation method for a single-phase high-frequency chain inverter includes: The drive signals for the first secondary-side switch S1a, the third secondary-side switch S2a, the sixth secondary-side switch S3b, and the eighth secondary-side switch S4b are acquired. The drive signals are high-frequency pulse width modulation signals, the modulation wave is a power frequency sine wave, and the carrier wave is a high-frequency sawtooth wave. During the positive half-cycle of the power frequency, the first secondary-side switch S1a and the third secondary-side switch S2a operate in high-frequency pulse width modulation mode, while the sixth secondary-side switch S3b and the eighth secondary-side switch S4b are normally off. During the negative half-cycle of the power frequency, the sixth secondary-side switch S3b and the eighth secondary-side switch S4b operate in high-frequency pulse width modulation mode, while the first secondary-side switch S1a and the third secondary-side switch S2a are normally off. The drive signals for the second secondary-side switch S1b, the fourth secondary-side switch S2b, the fifth secondary-side switch S3a, and the seventh secondary-side switch S4a are acquired. The drive signals are power frequency square wave signals. During the positive half-cycle of the power frequency, the second secondary-side switch S1b and the fourth secondary-side switch S2b are normally open, and the fifth secondary-side switch S3a and the seventh secondary-side switch S4a are normally closed. During the negative half-cycle of the power frequency, the fifth secondary-side switch S3a and the seventh secondary-side switch S4a are normally open, and the second secondary-side switch S1b and the fourth secondary-side switch S2b are normally closed. Through the coordinated control of the primary and secondary switching transistors, the transformer secondary output pulse width modulation waveform is obtained. After being filtered by an LC filter, the power frequency sinusoidal AC current is obtained, thus completing the modulation of the single-phase high-frequency chain inverter.

[0018] As a further technical limitation, after the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are turned off, they form a resonant circuit with the transformer leakage inductance through a parallel capacitor, so that the voltage across the primary-side switch drops to zero before the next cycle is turned on, thereby achieving zero-voltage turn-on.

[0019] As a further technical limitation, the dead time is greater than one-quarter of the resonant period, which is determined by the parallel capacitor and the transformer leakage inductance.

[0020] As a further technical limitation, during the positive half-cycle of the power frequency, the driving signals of the first secondary-side switch S1a and the third secondary-side switch S2a are high-frequency pulse width modulation signals, and their duty cycles change in a sinusoidal manner; during the negative half-cycle of the power frequency, the driving signals of the sixth secondary-side switch S3b and the eighth secondary-side switch S4b are high-frequency pulse width modulation signals, and their duty cycles change in a sinusoidal manner.

[0021] As a further technical limitation, the capacitance values ​​of the first capacitor Cs1, the second capacitor Cs2, the third capacitor Cs3, and the fourth capacitor Cs4 are all equal; the first diode D1, the second diode D2, the third diode D3, and the fourth diode D4 are all fast recovery diodes or Schottky diodes.

[0022] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention divides the secondary-side switching transistors into a high-frequency switching group and a power-frequency switching group. It achieves zero-voltage turn-on of the primary-side switching transistors through resonance, suppresses voltage spikes through a diode full-bridge circuit, and balances efficiency and cost through the selection of hybrid devices. It has the advantages of high efficiency, low cost, good reliability, and simple modulation strategy. Attached Figure Description

[0023] The accompanying drawings, which form part of this embodiment, are used to provide a further understanding of this embodiment. The illustrative embodiments and their descriptions are used to explain this embodiment and do not constitute an improper limitation of this embodiment.

[0024] Figure 1 This is a schematic diagram of the topology of a single-phase high-frequency chain inverter in Embodiment 1 of the present invention; Figure 2 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode one of Embodiment 1 of the present invention; Figure 3 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode two of Embodiment 1 of the present invention; Figure 4 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode three of Embodiment 1 of the present invention; Figure 5 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode four of Embodiment 1 of the present invention; Figure 6 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode five of Embodiment 1 of the present invention; Figure 7 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode six of Embodiment 1 of the present invention; Figure 8 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode seven of Embodiment 1 of the present invention; Figure 9 The equivalent circuit diagram of the single-phase high-frequency chain inverter in mode eight in Embodiment 1 of the present invention is shown. Figure 10 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode nine of Embodiment 1 of the present invention; Figure 11This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode 10 of Embodiment 1 of the present invention; Figure 12 This is the equivalent circuit diagram of the single-phase high-frequency chain inverter in mode eleven of Embodiment 1 of the present invention; Figure 13 This is a timing diagram of the drive signals of each switching transistor in the single-phase high-frequency chain inverter of the present invention. Figure 14 This is a schematic diagram of the voltage waveform across the secondary switch transistor in Embodiment 1 of the present invention without the addition of a voltage spike suppression circuit; Figure 15 This is a schematic diagram of the voltage waveform across the secondary switching transistor after adding a voltage spike suppression circuit in Embodiment 1 of the present invention. Detailed Implementation

[0025] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0026] It should be noted that the following detailed descriptions are exemplary and intended to provide further illustration of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0027] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0028] In this invention, terms such as "upper," "lower," "left," "right," "front," "back," "vertical," "horizontal," "side," and "bottom" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are used only to facilitate the description of the structural relationships of the various components or elements of this invention and do not specifically refer to any component or element in this invention. They should not be construed as limiting the invention.

[0029] In this invention, terms such as "fixed connection," "connected," and "linked" should be interpreted broadly, indicating a fixed connection, an integral connection, or a detachable connection; a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can determine the specific meaning of these terms in this invention based on the specific circumstances, and they should not be construed as limitations on the invention.

[0030] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0031] Example 1 Embodiment 1 of this invention introduces a single-phase high-frequency chain inverter.

[0032] like Figure 1 A single-phase high-frequency chain inverter shown includes: The primary-side full-bridge inverter circuit has its input terminal connected to the DC power supply side. It includes a first inverter bridge arm composed of a first primary-side switch K1 and a third primary-side switch K3, and a second inverter bridge arm composed of a second primary-side switch K2 and a fourth primary-side switch K4. The two ends of the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are respectively connected in parallel to a first capacitor Cs1, a second capacitor Cs2, a third capacitor Cs3, and a fourth capacitor Cs4. The secondary-side full-bridge frequency converter has its output connected to the load side. It includes a first half-bridge composed of a first secondary-side switch S1a and a third secondary-side switch S2a, a second half-bridge composed of a sixth secondary-side switch S3b and an eighth secondary-side switch S4b, a complementary switch of the first half-bridge composed of a second secondary-side switch S1b and a fourth secondary-side switch S2b, and a complementary switch of the second half-bridge composed of a fifth secondary-side switch S3a and a seventh secondary-side switch S4a. High-frequency transformers are used to connect the primary-side full-bridge inverter circuit and the secondary-side full-bridge frequency converter. The voltage spike suppression circuit includes a first bridge arm composed of a first diode D1 and a third diode D3, and a second bridge arm composed of a second diode D2 and a fourth diode D4; the first bridge arm and the second bridge arm are connected in parallel to form a full-bridge circuit; the input terminal of the full-bridge circuit is connected in parallel with the secondary winding of the high-frequency transformer, and the output terminal of the full-bridge circuit is connected to a DC power supply. An LC filter, disposed between the secondary full-bridge cyclic converter and the load side, includes a filter inductor Lf and a filter capacitor Cf.

[0033] It should be noted that, in this embodiment, the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are all silicon-based insulated-gate bipolar transistors; the first secondary-side switch S1a, the third secondary-side switch S2a, the sixth secondary-side switch S3b, and the eighth secondary-side switch S4b are all silicon carbide metal-oxide-semiconductor field-effect transistors; and the second secondary-side switch S1b, the fourth secondary-side switch S2b, the fifth secondary-side switch S3a, and the seventh secondary-side switch S4a are all silicon-based insulated-gate bipolar transistors.

[0034] This embodiment is combined with, for example Figure 13 The driving signal timing shown illustrates the working principle of a single-phase high-frequency link inverter. Specifically: (1) Primary-side switch drive signal The drive signals for K1~K4 are 20kHz square waves with a duty cycle of 0.5. K1 and K4 are in phase, and K2 and K3 are in phase. K1 and K2 are complementary in conduction, with a 2μs dead time set between them. When K1 and K4 are on, the primary voltage of the transformer is positive; when K2 and K3 are on, the primary voltage of the transformer is negative.

[0035] (2) Drive signal for secondary switch During the positive half-cycle of the power frequency (0~10ms), specifically: S1a and S2a operate in a 20kHz high-frequency PWM mode, with a sine wave as the modulation wave, a sawtooth wave as the carrier wave, and the output PWM pulse width varies according to a sine law. S1b and S2b are normally open (drive signal is high level); S3b and S4b are normally off (drive signal is low level); S3a and S4a are normally off (drive signal is low).

[0036] During the negative half-cycle of the power frequency (10~20ms), specifically: S3b and S4b operate in a 20kHz high-frequency PWM mode, with a sine wave as the modulation wave, a sawtooth wave as the carrier wave, and the output PWM pulse width varies according to a sine law. S3a and S4a are normally open (drive signal is high level); S1a and S2a are normally off (drive signal is low level). S1b and S2b are normally off (drive signal is low).

[0037] Through the above modulation, the transformer secondary output Ucd is a high-frequency PWM waveform, which is filtered by an LC filter to obtain a 50Hz sinusoidal AC current.

[0038] This embodiment combines Figures 2 to 12 This paper analyzes in detail the operating modes of the inverter within one high-frequency switching cycle. For ease of analysis, the following assumptions are made: all switching transistors are ideal devices, considering their body diodes and parasitic capacitances; the transformer leakage inductance Lk is referred to the primary side; the filter inductance Lf is sufficiently large and can be regarded as a constant current source; the output filter capacitor Cf is sufficiently large, and the output voltage Vo is constant.

[0039] Mode 1 [t0~t1]: Energy transfer phase like Figure 2 As shown, the switch states during this stage are: K1 and K4 are on, S2a and S3b are on, S1b and S2b are normally open, and S3a and S4a are normally closed.

[0040] Current path: DC power supply Vin positive terminal → K1 → transformer primary winding Np → K4 → Vin negative terminal; transformer secondary winding Ns → S2a → filter inductor Lf → load R → S3b → Ns. Energy is transferred from the DC power supply through the first and fourth primary arms, the transformer, and the second and third secondary arms to the load. The filter inductor Lf is charged, and the inductor current increases linearly.

[0041] At this time, the transformer secondary voltage Ucd is equal to the DC bus voltage Vin (turns ratio 1:1), and the expression for the filter inductor current is: iLf ( t )= ILf 0+ LfVin Vo ( t t 0); Where I_{Lf0} is the initial value of the inductor current at time t0, and Vo is the instantaneous value of the output voltage.

[0042] Mode 2 [t1~t2]: Resonant transition phase like Figure 3 As shown, at the beginning of this stage, K1 and K4 are turned off, and S1a is turned on. At this time, the first and second bridge arms (S1a and S2b) of the inverter secondary side, the transformer leakage inductance Lk, and the primary side parallel capacitors Cs1 to Cs4 form a resonant circuit.

[0043] Current path: The transformer leakage inductance Lk forms a charging circuit with Cs1 and Cs4, and a discharging circuit with Cs2 and Cs3. The resonant current charges Cs1 and Cs4, causing the voltage across K1 and K4 to rise; simultaneously, it discharges Cs2 and Cs3, causing the voltage across K2 and K3 to fall. The presence of the resonant current accelerates the charging and discharging process of the parallel capacitor on the primary side. Meanwhile, the current in the secondary-side filter inductor flows through S2a, S3b, and the transformer secondary freewheeling.

[0044] The expression for resonant current is: iLkt )= ILk 1 cos( ωr ( t t 1))+ ZrVCs 1( t 1) sin( ωr ( t t 1)) in, ωr =1 / LkCs It is the resonant angular frequency. Zr = Lk / Cs Where C is the resonant impedance and Cs is the capacitance of a single parallel capacitor.

[0045] Mode 3 [t2~t3]: Establishment of zero voltage condition like Figure 4 As shown, after Cs2 and Cs3 have discharged completely in the previous mode, their voltage drops to zero, and the current freewheels through the body diodes of K2 and K3. At this time, the voltage across the switching transistors K2 and K3 is zero, creating conditions for zero-voltage turn-on.

[0046] The current path in this stage is the same as in mode two, except that Cs2 and Cs3 have been completely discharged, and the current flows entirely through the body diodes of K2 and K3.

[0047] Mode 4 [t3~t4]: Zero-voltage turn-on like Figure 5 As shown, at the beginning of this stage, K2 and K3 are turned on. Since the voltage across K2 and K3 was zero before turning on, zero-voltage turn-on is achieved. At the same time, S2a is turned off.

[0048] During this stage, the resonant current on the transformer leakage inductance continues to flow through the body diodes of K2 and K3, feeding back to the primary DC source until it drops to zero.

[0049] The leakage inductance current decreases linearly. iLk ( t )= ILk 3 LkVin ( t t 3) When the leakage inductance current drops to zero, the diode turns off naturally, without generating a reverse recovery current, thus avoiding the generation of voltage spikes.

[0050] Mode 5 [t4~t5]: Continued current phase like Figure 6 As shown, at the end of the previous stage, the resonant current on the leakage inductor naturally decreases to zero, and the leakage inductor current will not generate a voltage spike. At this time, the body diodes of the primary side K2 and K3 are reverse biased under negative voltage. Although K2 and K3 are conducting, no current flows through them (because there is no energy transfer path).

[0051] The current in the secondary-side filter inductor and the load forms a freewheeling loop through S1a and S3b, and the inductor current decreases linearly. iLf ( t )= ILf 4 LfVo ( t t 4) Mode 6 [t5~t6]: Reverse energy transfer begins like Figure 7 As shown, at the start of this stage, S4b is turned on. The DC source begins to transfer energy to the filter and load through the inverter and the first and fourth bridge arms of the frequency converter. At this time, S1a and S4b are turned on, while K2 and K3 remain on. The energy transfer path is symmetrical to mode one, but the current direction is opposite.

[0052] Modes 7 to 11 like Figures 8 to 12 As shown, modes seven to eleven are symmetrical with modes two to six, completing the reverse energy transfer and the corresponding soft-switching process, which will not be elaborated here.

[0053] From the above eleven modes, it can be seen that: The primary-side switching transistors K1~K4 all achieved zero-voltage turn-on, and the parallel capacitors Cs1~Cs4 effectively reduced the turn-off loss. The secondary high-frequency switching transistors S1a, S2a, S3b, and S4b operate in high-frequency PWM mode. Using SiC MOSFETs can significantly reduce switching losses. The secondary power frequency switching transistors S1b, S2b, S3a, and S4a are normally open or normally closed within half a power frequency cycle, resulting in very low switching losses. Si IGBTs can be used to reduce costs.

[0054] like Figure 1 As shown, the voltage spike suppression circuit in this embodiment consists of a full-bridge circuit composed of diodes D1 to D4, with its output side connected to the inverter DC source Vin and its input side connected to the secondary winding of the transformer.

[0055] With a transformer turns ratio of 1:1, the DC source voltage Vin is the same as the normal operating voltage of the transformer secondary side. Under normal operating conditions, the transformer secondary voltage is clamped at Vin, the voltages across the diode full-bridge are equal, and no current flows. Therefore, the full-bridge circuit does not affect the normal operation of the inverter.

[0056] When the secondary-side switching transistor is turned off, the transformer leakage inductance and the parasitic capacitance of the switching transistor resonate, generating a voltage spike higher than Vin. At this time, the transformer secondary voltage is higher than Vin, and the diode full-bridge circuit conducts, feeding the spike energy back to the DC source Vin. The specific current path is: transformer secondary winding → D1 → DC source positive terminal → DC source negative terminal → D4 → transformer secondary winding (for positive spikes), or transformer secondary winding → D2 → DC source negative terminal → DC source positive terminal → D3 → transformer secondary winding (for negative spikes).

[0057] Through this process, the voltage spike is clamped at Vin+VD (VD is the diode forward voltage drop), thus effectively protecting the secondary-side switching transistor and avoiding damage from overvoltage stress.

[0058] Figure 14 The image shows the voltage waveform across the secondary switch S2a without a voltage spike suppression circuit. It can be seen that at the instant the switch is turned off, due to leakage inductance resonance, the voltage spike reaches 780V, approximately 1.95 times the normal operating voltage of 400V.

[0059] Figure 15 The voltage waveform across the secondary switch S2a after incorporating the voltage spike suppression circuit of this invention is shown. It can be seen that the voltage spike is effectively clamped to 460V, approximately 1.15 times the normal operating voltage, demonstrating a significant suppression effect.

[0060] In this embodiment, the secondary-side switching transistors are divided into a high-frequency switching group and a power-frequency switching group. The high-frequency switching group (S1a, S2a, S3b, S4b) uses SiC MOSFETs, leveraging their fast switching speed and low switching losses to significantly reduce high-frequency switching losses. The power-frequency switching group (S1b, S2b, S3a, S4a) uses Si IGBTs, utilizing their low on-state voltage drop and low cost, switching only once within half a power-frequency cycle, resulting in negligible switching losses. The primary-side switching transistors K1~K4 use Si IGBTs and achieve zero-voltage turn-on through soft-switching technology, resulting in extremely low switching losses. This hybrid device selection strategy, while ensuring overall system efficiency, can reduce costs by 30% to 40% compared to an all-SiC solution.

[0061] This embodiment achieves zero-voltage turn-on by connecting a capacitor in parallel across the primary-side switching transistor and forming a resonant circuit with the transformer leakage inductance. The capacitor charges and discharges within the dead time, causing the voltage across the switching transistor to drop to zero before turn-on. Simultaneously, the parallel capacitor also acts as a turn-off buffer, reducing turn-off losses. This soft-switching implementation requires no additional resonant components, utilizing only the circuit's inherent parasitic parameters and the parallel capacitor, resulting in a simple structure and high reliability.

[0062] In this embodiment, a full-bridge clamping circuit consisting of four diodes is connected in parallel to the secondary side of the transformer at its input and connected to a DC power supply at its output. When a voltage spike occurs on the secondary side of the transformer that is higher than the DC bus voltage, the full-bridge diodes conduct, feeding the spike energy back to the DC bus, thereby clamping the voltage across the secondary-side switching transistors within a safe range. Compared with existing technologies, this embodiment only adds four passive diodes, resulting in low cost, no additional control complexity, and minimal losses. Simulation and experimental results show that the voltage spike can be reduced from twice the normal operating voltage to less than 1.2 times.

[0063] In this embodiment, the modulation strategy uses a square wave driven by a fixed duty cycle of 0.5 for the primary-side switching transistor, eliminating the need for complex PWM calculations. The secondary-side high-frequency switching transistor uses sinusoidal PWM modulation, while the power frequency switching transistor uses a power frequency square wave drive. The control logic is clear and easy to implement using a digital signal processor or field-programmable gate array.

[0064] This embodiment effectively protects the switching transistor through a voltage spike suppression circuit, preventing damage from overvoltage stress; it reduces switching losses, decreases device temperature rise, and extends device lifespan through soft-switching technology; the overall circuit structure is simple, with fewer components, thus improving system reliability.

[0065] Example 2 Embodiment 2 of the present invention introduces a modulation method for a single-phase high-frequency chain inverter, which adopts the single-phase high-frequency chain inverter introduced in Embodiment 1.

[0066] A modulation method for a single-phase high-frequency chain inverter includes: The drive signals of the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3 and the fourth primary-side switch K4 are obtained. The drive signals are square wave signals with a fixed duty cycle of 0.5, and a dead time is set between two adjacent switches. The drive signals for the first secondary-side switch S1a, the third secondary-side switch S2a, the sixth secondary-side switch S3b, and the eighth secondary-side switch S4b are acquired. The drive signals are high-frequency pulse width modulation signals, the modulation wave is a power frequency sine wave, and the carrier wave is a high-frequency sawtooth wave. During the positive half-cycle of the power frequency, the first secondary-side switch S1a and the third secondary-side switch S2a operate in high-frequency pulse width modulation mode, while the sixth secondary-side switch S3b and the eighth secondary-side switch S4b are normally off. During the negative half-cycle of the power frequency, the sixth secondary-side switch S3b and the eighth secondary-side switch S4b operate in high-frequency pulse width modulation mode, while the first secondary-side switch S1a and the third secondary-side switch S2a are normally off. The drive signals for the second secondary-side switch S1b, the fourth secondary-side switch S2b, the fifth secondary-side switch S3a, and the seventh secondary-side switch S4a are acquired. The drive signals are power frequency square wave signals. During the positive half-cycle of the power frequency, the second secondary-side switch S1b and the fourth secondary-side switch S2b are normally open, and the fifth secondary-side switch S3a and the seventh secondary-side switch S4a are normally closed. During the negative half-cycle of the power frequency, the fifth secondary-side switch S3a and the seventh secondary-side switch S4a are normally open, and the second secondary-side switch S1b and the fourth secondary-side switch S2b are normally closed. Through the coordinated control of the primary and secondary switching transistors, the transformer secondary output pulse width modulation waveform is obtained. After being filtered by an LC filter, the power frequency sinusoidal AC current is obtained, thus completing the modulation of the single-phase high-frequency chain inverter.

[0067] As one or more implementation methods, after the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are turned off, they form a resonant circuit with the leakage inductance of the transformer through a parallel capacitor, so that the voltage across the primary-side switch drops to zero before the next cycle is turned on, thereby achieving zero-voltage turn-on.

[0068] As one or more implementations, the dead time is greater than one-quarter of the resonant period, and the resonant period is determined by the parallel capacitor and the transformer leakage inductance.

[0069] As one or more implementation methods, during the positive half-cycle of the power frequency, the driving signals of the first secondary-side switch S1a and the third secondary-side switch S2a are high-frequency pulse width modulation signals, and their duty cycles change in a sinusoidal manner; during the negative half-cycle of the power frequency, the driving signals of the sixth secondary-side switch S3b and the eighth secondary-side switch S4b are high-frequency pulse width modulation signals, and their duty cycles change in a sinusoidal manner.

[0070] As one or more embodiments, the capacitance values ​​of the first capacitor Cs1, the second capacitor Cs2, the third capacitor Cs3, and the fourth capacitor Cs4 are all equal; the first diode D1, the second diode D2, the third diode D3, and the fourth diode D4 are all fast recovery diodes or Schottky diodes.

[0071] The detailed steps are the same as the working principle of the single-phase high-frequency chain inverter provided in Example 1, and will not be repeated here.

[0072] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0073] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

[0074] The above description is merely a preferred embodiment of this practice and is not intended to limit the scope of this practice. Various modifications and variations can be made to this practice by those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of this practice should be included within the protection scope of this practice.

Claims

1. A single-phase high-frequency chain inverter, characterized in that, include: The primary-side full-bridge inverter circuit has its input terminal connected to the DC power supply side. It includes a first inverter bridge arm composed of a first primary-side switch K1 and a third primary-side switch K3, and a second inverter bridge arm composed of a second primary-side switch K2 and a fourth primary-side switch K4. The two ends of the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are respectively connected in parallel to a first capacitor Cs1, a second capacitor Cs2, a third capacitor Cs3, and a fourth capacitor Cs4. The secondary-side full-bridge frequency converter has its output connected to the load side. It includes a first half-bridge composed of a first secondary-side switch S1a and a third secondary-side switch S2a, a second half-bridge composed of a sixth secondary-side switch S3b and an eighth secondary-side switch S4b, a complementary switch of the first half-bridge composed of a second secondary-side switch S1b and a fourth secondary-side switch S2b, and a complementary switch of the second half-bridge composed of a fifth secondary-side switch S3a and a seventh secondary-side switch S4a. A high-frequency transformer is used to connect the primary-side full-bridge inverter circuit and the secondary-side full-bridge frequency converter. The voltage spike suppression circuit includes a first bridge arm composed of a first diode D1 and a third diode D3, and a second bridge arm composed of a second diode D2 and a fourth diode D4; the first bridge arm and the second bridge arm are connected in parallel to form a full-bridge circuit; the input terminal of the full-bridge circuit is connected in parallel with the secondary winding of the high-frequency transformer, and the output terminal of the full-bridge circuit is connected to a DC power supply.

2. A single-phase high-frequency chain inverter as described in claim 1, characterized in that, It also includes an LC filter disposed between the secondary full-bridge cyclic converter and the load side, comprising a filter inductor Lf and a filter capacitor Cf.

3. A single-phase high-frequency chain inverter as described in claim 1, characterized in that, The first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are all silicon-based insulated-gate bipolar transistors.

4. A single-phase high-frequency chain inverter as described in claim 1, characterized in that, The first secondary-side switch S1a, the third secondary-side switch S2a, the sixth secondary-side switch S3b, and the eighth secondary-side switch S4b are all silicon carbide metal-oxide-semiconductor field-effect transistors.

5. A single-phase high-frequency chain inverter as described in claim 1, characterized in that, The second secondary-side switch S1b, the fourth secondary-side switch S2b, the fifth secondary-side switch S3a, and the seventh secondary-side switch S4a are all silicon-based insulated-gate bipolar transistors.

6. A modulation method for a single-phase high-frequency chain inverter, employing a single-phase high-frequency chain inverter as described in any one of claims 1-5, characterized in that, include: The drive signals of the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3 and the fourth primary-side switch K4 are obtained. The drive signals are square wave signals with a fixed duty cycle of 0.5, and a dead time is set between two adjacent switches. The drive signals for the first secondary-side switch S1a, the third secondary-side switch S2a, the sixth secondary-side switch S3b, and the eighth secondary-side switch S4b are acquired. The drive signals are high-frequency pulse width modulation signals, the modulation wave is a power frequency sine wave, and the carrier wave is a high-frequency sawtooth wave. During the positive half-cycle of the power frequency, the first secondary-side switch S1a and the third secondary-side switch S2a operate in high-frequency pulse width modulation mode, while the sixth secondary-side switch S3b and the eighth secondary-side switch S4b are normally off. During the negative half-cycle of the power frequency, the sixth secondary-side switch S3b and the eighth secondary-side switch S4b operate in high-frequency pulse width modulation mode, while the first secondary-side switch S1a and the third secondary-side switch S2a are normally off. The drive signals for the second secondary-side switch S1b, the fourth secondary-side switch S2b, the fifth secondary-side switch S3a, and the seventh secondary-side switch S4a are acquired. The drive signals are power frequency square wave signals. During the positive half-cycle of the power frequency, the second secondary-side switch S1b and the fourth secondary-side switch S2b are normally open, and the fifth secondary-side switch S3a and the seventh secondary-side switch S4a are normally closed. During the negative half-cycle of the power frequency, the fifth secondary-side switch S3a and the seventh secondary-side switch S4a are normally open, and the second secondary-side switch S1b and the fourth secondary-side switch S2b are normally closed. Through the coordinated control of the primary and secondary switching transistors, the transformer secondary output pulse width modulation waveform is obtained. After being filtered by an LC filter, the power frequency sinusoidal AC current is obtained, thus completing the modulation of the single-phase high-frequency chain inverter.

7. The modulation method for a single-phase high-frequency chain inverter as described in claim 6, characterized in that, After the first primary-side switch K1, the second primary-side switch K2, the third primary-side switch K3, and the fourth primary-side switch K4 are turned off, they form a resonant circuit with the transformer leakage inductance through a parallel capacitor, causing the voltage across the primary-side switch to drop to zero before the next cycle is turned on, thereby achieving zero-voltage turn-on.

8. The modulation method for a single-phase high-frequency chain inverter as described in claim 6, characterized in that, The dead time is greater than one-quarter of the resonant period, which is determined by the parallel capacitor and the transformer leakage inductance.

9. The modulation method for a single-phase high-frequency chain inverter as described in claim 6, characterized in that, During the positive half-cycle of the power frequency, the driving signals for the first secondary-side switch S1a and the third secondary-side switch S2a are high-frequency pulse width modulation signals, and their duty cycles change in a sinusoidal manner. During the negative half-cycle of the power frequency, the driving signals for the sixth secondary-side switch S3b and the eighth secondary-side switch S4b are high-frequency pulse width modulation signals, and their duty cycles change in a sinusoidal manner.

10. The modulation method for a single-phase high-frequency chain inverter as described in claim 6, characterized in that, The capacitance values ​​of the first capacitor Cs1, the second capacitor Cs2, the third capacitor Cs3, and the fourth capacitor Cs4 are all equal; the first diode D1, the second diode D2, the third diode D3, and the fourth diode D4 are all fast recovery diodes or Schottky diodes.

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