Memory capacity identification method and device, intelligent device and storage medium
By using a unified memory capacity identification method and memory parameter and register reading technology, the high complexity and cost of identifying different DDR capacities in traditional technologies have been solved, achieving efficient and low-cost memory capacity identification.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN TCL NEW-TECH CO LTD
- Filing Date
- 2021-12-07
- Publication Date
- 2026-07-10
AI Technical Summary
In traditional technology, identifying printed circuit boards with different DDR capacities requires custom software, which increases the complexity and cost of identification. Furthermore, printed circuit boards with different memory capacities require different surface mount methods, leading to increased production management and costs.
A unified memory capacity identification method is adopted. By obtaining the memory parameters of the circuit board under test, such as manufacturer labels, memory density and bit width, and combining register reading and memory module testing, the memory capacity is determined, avoiding dependence on different surface mount methods and customized software.
It simplifies the printed circuit board manufacturing process, reduces production costs and identification complexity, improves production efficiency, and ensures the accuracy and consistency of memory capacity identification.
Smart Images
Figure CN116244119B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of memory capacity identification technology, and in particular to a memory capacity identification method, apparatus, smart device, and storage medium. Background Technology
[0002] With the widespread adoption of smart devices and the diversified demands of users with varying spending power, manufacturers typically offer versions of the same smart device with different memory (DDR) capacity configurations to meet the needs of customers with different budgets. During the implementation process, the inventors discovered at least the following problems with traditional technologies:
[0003] Typically, when manufacturing printed circuit boards (PCBAs), manufacturers will use different surface mount methods to place different memory modules according to different memory capacity versions, so as to provide different input / output interface states (GPIO states). The software reads the different GPIO states to load the correct DDR parameter file and thus identify the DDR capacity.
[0004] However, different types of PCBAs are manufactured using different surface mount methods for different memory capacities. Therefore, identifying PCBAs with different DDR capacities requires customized software that matches the PCBA type, which increases the complexity and cost of identifying different DDR capacities. Summary of the Invention
[0005] Therefore, it is necessary to provide a memory capacity identification method, apparatus, intelligent device, and storage medium that can adaptively identify different DDR capacities to address the aforementioned technical problems.
[0006] A method for identifying memory capacity, the method comprising:
[0007] Obtain the memory parameters of the circuit board under test, wherein the circuit board under test is used to indicate a printed circuit board manufactured using a preset surface mount method, and the number of memory modules differs among printed circuit boards of different memory capacities manufactured using the preset surface mount method.
[0008] The memory capacity of the circuit board under test is determined based on the memory parameters.
[0009] Optionally, obtaining the memory parameters of the circuit board under test includes:
[0010] The memory parameters of the circuit board under test are obtained through registers.
[0011] Optionally, after obtaining the memory parameters of the circuit board under test through a register, determining the memory capacity corresponding to the circuit board under test based on the memory parameters includes:
[0012] Based on the mapping relationship between manufacturer tags and memory capacity, the memory capacity corresponding to the target manufacturer tag is determined, wherein the memory parameter includes the target manufacturer tag.
[0013] Optionally, after obtaining the memory parameters of the circuit board under test through a register, determining the memory capacity corresponding to the circuit board under test based on the memory parameters includes:
[0014] The memory module capacity is determined based on the memory density and memory bit width, wherein the memory parameters include the memory density and the memory bit width, and the memory module capacity is used to indicate the storage capacity of a memory module. The memory of the circuit board under test includes multiple memory modules.
[0015] The memory modules within the circuit board under test are traversed and tested, and the number of memory modules is determined based on the test results of each memory module.
[0016] The memory capacity corresponding to the circuit board under test is determined based on the memory module capacity and the number of memory modules.
[0017] Optionally, determining the memory module capacity based on memory density and memory bit width includes:
[0018] The corresponding memory chip capacity is determined based on the memory density.
[0019] The number of memory chips is determined based on the memory bit width.
[0020] The memory module capacity is obtained by multiplying the capacity of the memory chip by the number of memory chips.
[0021] Optionally, the step of traversing and testing the memory modules within the circuit board under test, and determining the number of memory modules based on the test results of each memory module, includes:
[0022] Data tests are performed on the memory modules within the circuit board under test to obtain test results for each memory module, wherein the test results include test success and test failure.
[0023] The number of memory modules is obtained by counting the number of memory modules that successfully passed the test.
[0024] Optionally, the step of performing data testing on the memory modules within the circuit board under test to obtain test results for each memory module includes:
[0025] Test data is sent to the memory module under test, wherein the memory module under test is any memory module in the memory of the circuit board under test that has not been tested.
[0026] The test data is read from the memory module under test to obtain feedback data.
[0027] If the test data matches the feedback data, the test result of the memory module under test is determined to be a successful test.
[0028] If the test data and the feedback data are inconsistent, the test result of the memory module under test is determined to be a test failure.
[0029] On the other hand, embodiments of this application also provide a memory capacity identification device, the device comprising:
[0030] The parameter acquisition module is used to acquire the memory parameters of the circuit board under test, wherein the circuit board under test is used to indicate a printed circuit board manufactured using a preset surface mount method, and the number of memory modules varies among printed circuit boards of different memory capacities manufactured using the preset surface mount method.
[0031] The capacity identification module is used to determine the memory capacity corresponding to the circuit board under test based on the memory parameters.
[0032] On the other hand, embodiments of this application also provide a smart device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:
[0033] Obtain the memory parameters of the circuit board under test, wherein the circuit board under test is used to indicate a printed circuit board manufactured using a preset surface mount method, and the number of memory modules differs among printed circuit boards of different memory capacities manufactured using the preset surface mount method.
[0034] The memory capacity of the circuit board under test is determined based on the memory parameters.
[0035] On the other hand, embodiments of this application also provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, performs the following steps:
[0036] Obtain the memory parameters of the circuit board under test, wherein the circuit board under test is used to indicate a printed circuit board manufactured using a preset surface mount method, and the number of memory modules differs among printed circuit boards of different memory capacities manufactured using the preset surface mount method.
[0037] The memory capacity of the circuit board under test is determined based on the memory parameters.
[0038] One of the above technical solutions has the following advantages and beneficial effects: It adopts a unified memory capacity identification method to identify circuit boards under test with different memory capacities. These circuit boards refer to printed circuit boards manufactured using the same preset surface mount method. This unifies the manufacturing process for printed circuit boards with different memory capacities, eliminating the need to use different types of surface mount components. This facilitates unified management of production materials and reduces production costs associated with using multiple surface mount components. Using the same manufacturing method for printed circuit boards with different memory capacities also simplifies the manufacturing process, thereby improving production efficiency. Furthermore, printed circuit boards manufactured using the same method only require the same memory capacity testing method for capacity identification, eliminating the need for customized identification software for different memory capacities, thus reducing the cost of memory capacity identification. Attached Figure Description
[0039] Figure 1 This is a diagram illustrating the application environment of the memory capacity identification method in this application embodiment.
[0040] Figure 2 This is a flowchart illustrating the memory capacity identification method in the embodiments of this application.
[0041] Figure 3 This is the character specification table corresponding to the registers in the embodiments of this application.
[0042] Figure 4 This is a structural block diagram of the memory capacity identification device in the embodiments of this application.
[0043] Figure 5 This is an internal structural diagram of the smart device in the embodiments of this application. Detailed Implementation
[0044] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0045] The memory capacity identification method provided in this application can be applied to, for example... Figure 1 The application environment shown illustrates this. The printed circuit board (PCB) communicates with the processor via wired or wireless connections. The PCB and processor can be located in the same device, or they can be located in separate devices. This embodiment uses the example of the PCB and processor being located in the same smart device. The smart device can be any device with storage capabilities, such as a smart TV, smart speaker, smart refrigerator, smart air conditioner, or smart terminal.
[0046] In one embodiment, such as Figure 2 As shown, a method for identifying memory capacity is provided. Taking the application of this method to the processor in a smart TV as an example, the method includes the following steps:
[0047] Step 210: Obtain the memory parameters of the circuit board under test.
[0048] The circuit board under test (TBD) indicates a printed circuit board manufactured using a pre-defined surface mount method. Different memory capacity TBDs manufactured using this method have different numbers of memory modules. In other words, TBDs of different memory capacities are manufactured using the same pre-defined surface mount method, which means using uniform types of surface mount resistors and capacitors. The only difference between TBDs of different memory capacities is the number of memory modules installed; larger capacity TBDs have more memory modules, and smaller capacity TBDs have fewer. Compared to existing technologies that use different surface mount methods for different memory capacities, this method reduces the types of surface mount resistors and capacitors used, facilitating standardized management of surface mount materials, lowering manufacturing costs, simplifying the manufacturing process for TBDs of different memory capacities, and improving TBD manufacturing efficiency.
[0049] Memory parameters refer to the internal structural parameters of DDR, which typically include parameters such as the number of memory modules, memory density, and memory bit width. A memory module (rank) refers to a set of memory chips with different bit widths. That is, a memory module contains multiple memory chips. The bit width of a memory module is the same as the data bit width that the processor reads or sends in one clock cycle. Typically, the bit width of a memory module is 64 bits or 32 bits.
[0050] Step 220: Determine the memory capacity of the circuit board under test based on the memory parameters.
[0051] The memory capacity of DDR can be calculated based on parameters such as the number of memory modules, memory density, and memory bit width. DDR memory capacity is usually a power of 2, such as 64MB (Megabyte), 128MB, 256MB, etc. Generally speaking, the larger the memory capacity, the better it is for the operation of smart devices.
[0052] Because existing technologies use different surface mount methods for printed circuit boards with different memory capacities, and corresponding customized identification software is designed, the process of identifying printed circuit boards with different memory capacities requires first identifying the surface mount type of the printed circuit board, then matching the printed circuit board with the identification software corresponding to the surface mount type, and finally using the corresponding identification software to identify the memory capacity of the printed circuit board. However, in this embodiment, the memory capacity of the printed circuit board can be directly identified without identifying the surface mount type, which reduces the memory identification process, speeds up the memory identification progress of the printed circuit board, and thus optimizes the user experience of smart devices.
[0053] The acquisition of memory parameters of the circuit board under test includes:
[0054] The memory parameters of the circuit board under test are obtained through registers.
[0055] Different memory parameters can be obtained through different registers. For example, the manufacturer label can be read through the MR5 register, and the number of memory modules, memory density, and memory bit width can be read through the MR8 register.
[0056] After obtaining the memory parameters of the circuit board under test through registers, the memory capacity of the circuit board under test is determined based on the memory parameters, including:
[0057] Based on the mapping relationship between vendor labels and memory capacity, the memory capacity corresponding to the target vendor label is determined, where the memory parameters include the target vendor label.
[0058] Each manufacturer produces printed circuit boards (PCBs) for different memory capacities. The manufacturer label is the identifier of the PCB manufacturer. The manufacturer label consists of a string that can include letters, numbers, and other characters. The left side of the table indicates the manufacturer label, and the right side indicates the manufacturer name. The mapping relationship between manufacturer labels and manufacturers is shown in the table below:
[0059] 00000000B Reserved 00000001B Samsung 00000010B Qimonda 00000011B Elpida 00000100B Etron 00000101B Nanya 00000110B Hynix 00000111B Mosel 00001000B Windbond 00001001B ESMT 00001010B Reserved 00001011B Spansion 00001100B SST 00001101B ZMOS 00001110B Intel 11111110B Numonyx 11111111B Micron All Others Reserved
[0060] When a manufacturer produces printed circuit boards (PCBs) with only one memory capacity, the memory capacity of the PCB can be quickly identified by the manufacturer's label. However, when a manufacturer produces PCBs with multiple memory capacities, only the manufacturer's label can be used to identify different manufacturers, but the memory capacity of the PCB cannot be determined. Furthermore, before identifying the memory capacity, it is necessary to establish a mapping relationship between the manufacturer's label and the memory capacity of each DDR. It is not possible to identify the memory capacity of PCBs produced by manufacturers outside the mapping relationship, which is quite limiting.
[0061] After obtaining the memory parameters of the circuit board under test through registers, the memory capacity of the circuit board under test is determined based on the memory parameters, including:
[0062] The memory module capacity is determined based on memory density and memory bit width, where memory parameters include memory density and memory bit width.
[0063] The system iterates through the memory modules within the circuit board under test and determines the number of memory modules based on the test results of each module.
[0064] Determine the memory capacity corresponding to the circuit board under test based on the memory module capacity and the number of memory modules.
[0065] To address the shortcomings of identifying memory capacity through manufacturer labels, a method combining register reading of memory parameters with Rank testing is adopted to identify DDR memory capacity. This avoids the situation where manufacturers can only identify the manufacturer through manufacturer labels but cannot determine the memory capacity of the printed circuit board when producing printed circuit boards with multiple memory capacities. Furthermore, it eliminates the need to establish a mapping relationship between each manufacturer label and memory capacity in advance.
[0066] Memory density and memory bit width are strings of varying lengths. Memory density indicates the capacity of memory chips, while memory bit width indicates the number of memory chips. Therefore, the memory module capacity can be calculated using memory density and memory bit width. The memory module capacity indicates the storage capacity of a memory module. The memory of the circuit board under test includes multiple memory modules, i.e., a DDR contains multiple Ranks. However, since not all Ranks are necessarily usable, it is necessary to iterate through and test each Rank in the DDR to count the number of truly usable Ranks. Based on the number of truly usable Ranks, the actual memory capacity of the DDR can be determined.
[0067] The determination of memory module capacity, based on memory density and memory bit width, includes:
[0068] The corresponding memory chip capacity is determined based on memory density.
[0069] The number of memory chips is determined based on the memory bit width.
[0070] The memory module capacity is obtained by multiplying the capacity of the memory chip by the number of memory chips.
[0071] The processor reads a string of multiple characters from a register. Each character in the string indicates a different parameter. The JEDEC technical specification includes the parameter type corresponding to characters at different positions in the string, such as... Figure 3As shown, characters at positions OP5-OP2 in the string indicate memory density, and characters at positions OP7-OP6 indicate memory bit width. Therefore, the memory chip capacity corresponding to the substring indicating memory density can be found using the JEDEC technical specifications. Memory chip capacity is denoted as Density. Similarly, the number of memory chips corresponding to the memory bit width can be found using the JEDEC technical specifications. The number of memory chips is denoted as I / O width. Thus, memory module capacity = Density * (I / O width). For example, if the memory bit width is 32 bits, then the number of memory chips is 32 / DDR I / O width, and the memory module capacity = Density * (32 / DDR I / O width). However, it should be noted that the unit of Density here is Gb. If the unit needs to be converted to GB, the Density value needs to be divided by 8.
[0072] This process involves iterating through all the memory modules on the circuit board under test and determining the number of memory modules based on the test results of each module. This includes:
[0073] Data tests are performed on the memory modules inside the circuit board under test to obtain the test results for each memory module. The test results include test success and test failure.
[0074] The statistical test results are the number of memory modules that successfully passed the test, thus obtaining the total number of memory modules.
[0075] Testing memory modules is crucial to prevent the inclusion of abnormally ranked memory modules in the DDR memory capacity calculation process. Incorrect rankings could lead to significant discrepancies between the calculated DDR memory capacity and the actual usable capacity, thus misleading the memory capacity assessment. Therefore, it is necessary to test and exclude abnormal DDR memory modules, only counting the correctly configured and usable modules to obtain the true and accurate memory capacity.
[0076] The test involved performing data tests on the memory modules within the circuit board under test, obtaining test results for each memory module, including:
[0077] Send test data to the memory module under test, where the memory module under test is any memory module on the circuit board under test that has not been tested;
[0078] Test data is read from the memory module under test to obtain feedback data;
[0079] If the test data and the feedback data are consistent, the test result of the memory module under test is determined to be a successful test.
[0080] If the test data and feedback data are inconsistent, the test result of the memory module under test is determined to be a test failure.
[0081] The processor iterates through each Rank in the DDR memory, selecting one memory module to be tested at a time. First, test data is written to any memory chip within the tested module. Then, test data is read from the tested module. Under normal circumstances, the feedback data read from the tested module should match the test data written. However, if the tested module malfunctions, test data may not be read, indicating a read failure. Alternatively, the feedback data returned by the tested module may not be the same as the test data written. In both cases, the test result for the tested module is deemed a failure, and the failed module is classified as an abnormal memory module. Abnormal memory modules are not counted during the statistical analysis of available memory modules, thus ensuring that the DDR memory capacity determined based on the normally available memory modules is accurate.
[0082] It should be understood that, although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.
[0083] In one embodiment, such as Figure 4 As shown, a memory capacity identification device is provided, comprising:
[0084] The parameter acquisition module 310 is used to acquire the memory parameters of the circuit board under test. The circuit board under test is used to indicate the printed circuit board made by a preset surface mount method. The number of memory modules is different between printed circuit boards with different memory capacities made by the preset surface mount method.
[0085] The capacity identification module 320 is used to determine the memory capacity of the circuit board under test based on the memory parameters.
[0086] The parameter acquisition module 310 is also used for:
[0087] The memory parameters of the circuit board under test are obtained through registers.
[0088] The capacity identification module 320 is also used for:
[0089] Based on the mapping relationship between vendor labels and memory capacity, the memory capacity corresponding to the target vendor label is determined, where the memory parameters include the target vendor label.
[0090] The capacity identification module 320 is also used for:
[0091] The memory module capacity is determined based on the memory density and memory bit width. The memory parameters include memory density and memory bit width. The memory module capacity is used to indicate the storage capacity of a memory module. The memory of the circuit board under test includes multiple memory modules.
[0092] The test process iterates through the memory modules within the circuit board under test, and the number of memory modules is determined based on the test results of each memory module.
[0093] Determine the memory capacity corresponding to the circuit board under test based on the memory module capacity and the number of memory modules.
[0094] The capacity identification module 320 is also used for:
[0095] Determine the corresponding memory chip capacity based on memory density;
[0096] The number of memory chips is determined based on the memory bit width.
[0097] The memory module capacity is obtained by multiplying the capacity of the memory chip by the number of memory chips.
[0098] The capacity identification module 320 is also used for:
[0099] Data tests are performed on the memory modules inside the circuit board under test to obtain the test results for each memory module. The test results include test success and test failure.
[0100] The statistical test results are the number of memory modules that successfully passed the test, thus obtaining the total number of memory modules.
[0101] The capacity identification module 320 is also used for:
[0102] Send test data to the memory module under test, where the memory module under test is any memory module on the circuit board under test that has not been tested;
[0103] Test data is read from the memory module under test to obtain feedback data;
[0104] If the test data and the feedback data are consistent, the test result of the memory module under test is determined to be a successful test.
[0105] If the test data and feedback data are inconsistent, the test result of the memory module under test is determined to be a test failure.
[0106] Specific limitations regarding the memory capacity identification device can be found in the limitations of the memory capacity identification method described above, and will not be repeated here. Each module in the aforementioned memory capacity identification device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in the smart device, or stored in software in the memory of the smart device, so that the processor can call and execute the corresponding operations of each module.
[0107] In one embodiment, a smart device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 5 As shown, the intelligent device includes a processor, memory, network interface, display screen, and input device connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface is used to communicate with external terminals via a network connection. When the computer program is executed by the processor, it implements a memory capacity identification method. The display screen can be an LCD screen or an e-ink screen. The input device can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the device's casing, or an external keyboard, touchpad, or mouse.
[0108] Those skilled in the art will understand that Figure 5 The structure shown is merely a block diagram of a portion of the structure related to the solution of this application and does not constitute a limitation on the smart device to which the solution of this application is applied. A specific smart device may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0109] In one embodiment, a smart device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:
[0110] Obtain the memory parameters of the circuit board under test, wherein the circuit board under test is used to indicate the printed circuit board manufactured using a preset surface mount method, and the number of memory modules varies between printed circuit boards of different memory capacities manufactured using the preset surface mount method;
[0111] Determine the memory capacity of the circuit board under test based on the memory parameters.
[0112] In one embodiment, the processor, when executing a computer program, also performs the following steps:
[0113] The memory parameters of the circuit board under test are obtained through registers.
[0114] In one embodiment, the processor, when executing a computer program, also performs the following steps:
[0115] Based on the mapping relationship between vendor labels and memory capacity, the memory capacity corresponding to the target vendor label is determined, where the memory parameters include the target vendor label.
[0116] In one embodiment, the processor, when executing a computer program, also performs the following steps:
[0117] The memory module capacity is determined based on the memory density and memory bit width. The memory parameters include memory density and memory bit width. The memory module capacity is used to indicate the storage capacity of a memory module. The memory of the circuit board under test includes multiple memory modules.
[0118] The test process iterates through the memory modules within the circuit board under test, and the number of memory modules is determined based on the test results of each memory module.
[0119] Determine the memory capacity corresponding to the circuit board under test based on the memory module capacity and the number of memory modules.
[0120] In one embodiment, the processor, when executing a computer program, also performs the following steps:
[0121] Determine the corresponding memory chip capacity based on memory density;
[0122] The number of memory chips is determined based on the memory bit width.
[0123] The memory module capacity is obtained by multiplying the capacity of the memory chip by the number of memory chips.
[0124] In one embodiment, the processor, when executing a computer program, also performs the following steps:
[0125] Data tests are performed on the memory modules inside the circuit board under test to obtain the test results for each memory module. The test results include test success and test failure.
[0126] The statistical test results are the number of memory modules that successfully passed the test, thus obtaining the total number of memory modules.
[0127] In one embodiment, the processor, when executing a computer program, also performs the following steps:
[0128] Send test data to the memory module under test, where the memory module under test is any memory module on the circuit board under test that has not been tested;
[0129] Test data is read from the memory module under test to obtain feedback data;
[0130] If the test data and feedback data are consistent, the test result of the memory module under test is determined to be a successful test.
[0131] If the test data and feedback data are inconsistent, the test result of the memory module under test is determined to be a test failure.
[0132] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:
[0133] Obtain the memory parameters of the circuit board under test, wherein the circuit board under test is used to indicate the printed circuit board manufactured using a preset surface mount method, and the number of memory modules varies between printed circuit boards of different memory capacities manufactured using the preset surface mount method;
[0134] Determine the memory capacity of the circuit board under test based on the memory parameters.
[0135] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:
[0136] The memory parameters of the circuit board under test are obtained through registers.
[0137] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:
[0138] Based on the mapping relationship between vendor labels and memory capacity, the memory capacity corresponding to the target vendor label is determined, where the memory parameters include the target vendor label.
[0139] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:
[0140] The memory module capacity is determined based on the memory density and memory bit width. The memory parameters include memory density and memory bit width. The memory module capacity is used to indicate the storage capacity of a memory module. The memory of the circuit board under test includes multiple memory modules.
[0141] The test process iterates through the memory modules within the circuit board under test, and the number of memory modules is determined based on the test results of each memory module.
[0142] Determine the memory capacity corresponding to the circuit board under test based on the memory module capacity and the number of memory modules.
[0143] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:
[0144] Determine the corresponding memory chip capacity based on memory density;
[0145] The number of memory chips is determined based on the memory bit width.
[0146] The memory module capacity is obtained by multiplying the capacity of the memory chip by the number of memory chips.
[0147] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:
[0148] Data tests are performed on the memory modules inside the circuit board under test to obtain the test results for each memory module. The test results include test success and test failure.
[0149] The statistical test results are the number of memory modules that successfully passed the test, thus obtaining the total number of memory modules.
[0150] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:
[0151] Send test data to the memory module under test, where the memory module under test is any memory module on the circuit board under test that has not been tested;
[0152] Test data is read from the memory module under test to obtain feedback data;
[0153] If the test data and feedback data are consistent, the test result of the memory module under test is determined to be a successful test.
[0154] If the test data and feedback data are inconsistent, the test result of the memory module under test is determined to be a test failure.
[0155] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.
[0156] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0157] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A method for identifying memory capacity, characterized in that, Includes the following steps: The memory parameters of the circuit board under test are obtained. The circuit board under test is used to indicate a printed circuit board manufactured using a preset surface mount method. The number of memory modules is different between printed circuit boards of different memory capacities manufactured using the preset surface mount method. The printed circuit boards of different memory capacities are manufactured using the same preset surface mount method, which means that a uniform type of surface mount resistor and surface mount capacitor are used for surface mount manufacturing. Determining the memory capacity of the circuit board under test based on the memory parameters includes: determining the memory module capacity based on the memory density and memory bit width, wherein the memory parameters include the memory density and the memory bit width, and the memory module capacity is used to indicate the storage capacity of a memory module, and the memory of the circuit board under test includes multiple memory modules; traversing and testing the memory modules in the circuit board under test, and determining the number of memory modules based on the test results of each memory module; and determining the memory capacity of the circuit board under test based on the memory module capacity and the number of memory modules. The step of traversing and testing the memory modules within the circuit board under test, and determining the number of memory modules based on the test results of each memory module, includes: sending test data to the memory module under test, wherein the memory module under test is any memory module in the memory of the circuit board under test that has not undergone data testing; reading the test data from the memory module under test to obtain feedback data; determining that the test result of the memory module under test is successful if the test data and the feedback data are consistent; determining that the test result of the memory module under test is unsuccessful if the test data and the feedback data are inconsistent; and counting the number of memory modules with successful test results to obtain the number of memory modules.
2. The method according to claim 1, characterized in that, The acquisition of the memory parameters of the circuit board under test includes: The memory parameters of the circuit board under test are obtained through registers.
3. The method according to claim 2, characterized in that, After obtaining the memory parameters of the circuit board under test through the register, determining the memory capacity corresponding to the circuit board under test based on the memory parameters includes: Based on the mapping relationship between manufacturer tags and memory capacity, the memory capacity corresponding to the target manufacturer tag is determined, wherein the memory parameter includes the target manufacturer tag.
4. The method according to claim 1, characterized in that, The process of determining the memory module capacity based on memory density and memory bit width includes: The corresponding memory chip capacity is determined based on the memory density. The number of memory chips is determined based on the memory bit width. The memory module capacity is obtained by multiplying the capacity of the memory chip by the number of memory chips.
5. A memory capacity identification device, characterized in that, The device includes: The parameter acquisition module is used to acquire the memory parameters of the circuit board under test. The circuit board under test is used to indicate a printed circuit board manufactured using a preset surface mount method. The number of memory modules is different between printed circuit boards with different memory capacities manufactured using the preset surface mount method. The printed circuit boards with different memory capacities are manufactured using the same preset surface mount method, which means that a uniform type of surface mount resistor and surface mount capacitor are used for surface mount manufacturing. A capacity identification module is used to determine the memory capacity corresponding to the circuit board under test based on the memory parameters, including: determining the memory module capacity based on the memory density and memory bit width, wherein the memory parameters include the memory density and the memory bit width, the memory module capacity is used to indicate the storage capacity of a memory module, and the memory of the circuit board under test includes multiple memory modules; traversing and testing the memory modules in the circuit board under test, determining the number of memory modules based on the test results of each memory module; and determining the memory capacity corresponding to the circuit board under test based on the memory module capacity and the number of memory modules. The step of traversing and testing the memory modules within the circuit board under test, and determining the number of memory modules based on the test results of each memory module, includes: sending test data to the memory module under test, wherein the memory module under test is any memory module in the memory of the circuit board under test that has not undergone data testing; reading the test data from the memory module under test to obtain feedback data; determining that the test result of the memory module under test is successful if the test data and the feedback data are consistent; determining that the test result of the memory module under test is unsuccessful if the test data and the feedback data are inconsistent; and counting the number of memory modules with successful test results to obtain the number of memory modules.
6. A smart device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 4.
7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.