Non-contact current detection chip, output limiting circuit and method thereof

Abstract

The application discloses a non-contact current detection chip, an output limiting circuit and a method thereof, the output limiting circuit comprises a voltage amplitude detection circuit and an output signal processing circuit; the voltage amplitude detection circuit is used to detect a first output voltage of the non-contact current detection chip; the output signal processing circuit is used to output a second output voltage according to the first output voltage detected by the voltage amplitude detection circuit; when the first output voltage detected by the voltage amplitude detection circuit represents that the internal function of the chip is failed or potential risk exists, the second output voltage exceeds the voltage range in the normal working state. The non-contact current detection chip, the output limiting circuit and the method thereof can reduce the cost of an additional chip alarm pin, and the amplifier for driving an additional alarm signal line and the power consumption thereof are saved.

Description

Technical Field

[0001] This invention belongs to the field of current detection technology, and relates to a non-contact current detection chip, and more particularly to an output limiting circuit and method for a non-contact current detection chip. Background Technology

[0002] Non-contact current sensing has wide applications in industrial and automotive fields. However, compared to traditional series resistance current sensing methods, traditional methods are susceptible to high-voltage surges when the voltage / current of the circuit being sensed is too high. Furthermore, resistors with constant temperature characteristics are difficult to obtain (or are expensive), and series resistance reduces system efficiency and generates heat. Figure 1 The non-contact current detection method shown is based on the principle of current-induced magnetic field, which can avoid the above difficulties.

[0003] Please see Figure 1 The dashed box represents the current detection module, which includes the current loop to be detected and a magnetic sensor chip based on the Hall effect or magnetoresistive magnetic field detection principle. This chip has three pins: Vdd, Vss, and Out. Internally, it mainly includes a magnetoresistive or Hall effect magnetic field sensor, a voltage amplifier, and other servo circuits (such as a temperature sensor, reference voltage, LDO, oscillator, etc.).

[0004] like Figure 1 As shown, when the current to be detected (indicated by the arrow) flows through the current loop, according to the principle of electromagnetic induction, a magnetic field proportional to the magnitude of the current to be detected will be generated around the current loop (see...). Figure 1 (X and ● in the diagram); the magnetic field is converted into a proportionally proportional induced voltage by a Hall effect or magnetoresistive sensor. Since this induced voltage is small, a voltage amplifier is needed to amplify it proportionally to the voltage required for the host detection, and it also needs to have a certain output drive capability to drive the capacitive and resistive loads on the transmission line between the current detection module and the host.

[0005] In automotive or industrial applications, where high system reliability is required, continuous self-testing of each module of the chip is necessary. Upon detecting a malfunction (such as overheating, internal power supply failure, or abnormal Hall element sensitivity), the host computer needs to be notified to take timely countermeasures to prevent system risks. The traditional approach to notifying the host computer of alarm signals is to design a dedicated alarm signal pin for the chip, using the high or low value of this pin to inform the host computer of the system's current status. However, in industrial applications, current sensing modules are typically located far from the host computer, and the long transmission lines are susceptible to interference. Furthermore, the addition of a new chip pin increases the cost of the current sensing module.

[0006] In view of this, there is an urgent need to design a new non-contact current detection chip in order to overcome at least some of the aforementioned defects of existing non-contact current detection chips. Summary of the Invention

[0007] This invention provides a non-contact current detection chip and its output limiting circuit and method, which can reduce the cost of additional chip alarm pins and eliminate the need for amplifiers that drive additional alarm signal lines and their power consumption.

[0008] To solve the above-mentioned technical problems, according to one aspect of the present invention, the following technical solution is adopted:

[0009] An output limiting circuit for a non-contact current detection chip, the output limiting circuit comprising: a voltage amplitude detection circuit, a voltage amplitude hysteresis control logic, and a main amplifier limiting processing circuit;

[0010] The voltage amplitude detection circuit is used to detect the amplitude of the first output voltage of the non-contact current detection chip for reference by the voltage control logic.

[0011] The voltage amplitude hysteresis control logic is connected to the voltage amplitude detection circuit to establish hysteresis when entering or exiting the voltage limiting state.

[0012] The main amplifier limiting processing circuit is connected to the voltage amplitude hysteresis control logic to perform voltage limiting processing based on the hysteresis established by the voltage amplitude hysteresis control logic.

[0013] In one embodiment of the present invention, the voltage amplitude detection circuit includes: a plurality of comparators, each comparator comparing the first output voltage of the non-contact current detection chip with a plurality of threshold voltages.

[0014] In one embodiment of the present invention, the voltage amplitude detection circuit includes: a first comparator, a second comparator, a third comparator, a fourth comparator, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor;

[0015] The voltage amplitude hysteresis control logic includes a first NOR gate, a second NOR gate, a third NOR gate, and a fourth NOR gate;

[0016] The voltage Vsig is connected to the non-inverting input of the first comparator, the inverting input of the second comparator, the non-inverting input of the third comparator, and the inverting input of the fourth comparator, respectively.

[0017] The first terminal of the first resistor is connected to voltage VCC. The first, second, third, fourth, fifth, sixth, and seventh resistors are connected in series, and the second terminal of the seventh resistor is grounded.

[0018] The inverting input terminal of the first comparator is connected to the second terminal of the first resistor and the first terminal of the second resistor, respectively; the non-inverting input terminal of the second comparator is connected to the second terminal of the third resistor and the first terminal of the fourth resistor, respectively; the inverting input terminal of the third comparator is connected to the second terminal of the fourth resistor and the first terminal of the fifth resistor, respectively; the non-inverting input terminal of the fourth comparator is connected to the second terminal of the sixth resistor and the first terminal of the seventh resistor, respectively.

[0019] The output of the first comparator is connected to the first input of the first NOR gate, the second input of the first NOR gate is connected to the output of the second NOR gate, and the output of the first NOR gate is connected to the first input of the second NOR gate; the output of the second comparator is connected to the second input of the second NOR gate; the output of the second NOR gate outputs a control signal that controls the closing of the first switch.

[0020] The output of the third comparator is connected to the first input of the third NOR gate, the second input of the third NOR gate is connected to the output of the fourth NOR gate, and the output of the third NOR gate is connected to the first input of the fourth NOR gate; the output of the fourth comparator is connected to the second input of the fourth NOR gate; the output of the fourth NOR gate outputs a control signal to control the closing of the second switch.

[0021] As one embodiment of the present invention, the main amplifier limiting processing circuit includes: a fifth comparator, a sixth comparator, a first switch, and a second switch;

[0022] The non-inverting input terminal of the fifth comparator is connected to the second terminal of the second resistor and the first terminal of the third resistor, respectively; the non-inverting input terminal of the sixth comparator is connected to the second terminal of the fifth resistor and the first terminal of the sixth resistor, respectively.

[0023] The inverting input terminal of the fifth comparator is connected to the output terminal of the fifth comparator and the second terminal of the first switch, respectively. The inverting input terminal of the sixth comparator is connected to the output terminal of the sixth comparator and the second terminal of the second switch, respectively.

[0024] According to another aspect of the present invention, the following technical solution is adopted: a non-contact current detection chip, wherein the non-contact current detection chip includes the output limiting circuit of the above-mentioned non-contact current detection chip.

[0025] As one embodiment of the present invention, the non-contact current detection chip further includes a Hall element, a pre-amplification circuit, and a power amplifier.

[0026] The output terminal of the Hall element is connected to the input terminal of the pre-amplifier circuit, and the pre-amplifier circuit outputs voltage Vsig.

[0027] The first terminal of the first switch is connected to the second terminal of the first resistor, the first terminal of the second switch, and the non-inverting input terminal of the power amplifier, respectively. The inverting input terminal of the power amplifier is connected to the output terminal of the power amplifier.

[0028] According to another aspect of the present invention, the following technical solution is adopted: an output limiting method for a non-contact current detection chip, the output limiting method comprising:

[0029] The voltage amplitude detection circuit detects the amplitude of the first output voltage of the non-contact current detection chip for reference by the voltage control logic.

[0030] The voltage amplitude hysteresis control logic is connected to the voltage amplitude detection circuit to establish a hysteresis for entering or exiting the voltage limiting state;

[0031] The main amplifier limiting circuit is connected to the voltage amplitude hysteresis control logic, and performs voltage limiting processing based on the hysteresis established by the voltage amplitude hysteresis control logic.

[0032] The beneficial effects of the present invention are as follows: the non-contact current detection chip and its output limiting circuit and method proposed in the present invention can reduce the cost of additional chip alarm pins and eliminate the need for amplifiers that drive additional alarm signal lines and their power consumption. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the working principle of a non-contact current detection module.

[0034] Figure 2 The output voltage V of the traditional current monitoring chip out The relationship between the current and the detection current I is shown in the graph.

[0035] Figure 3 This is a circuit diagram of the output limiting circuit in one embodiment of the present invention. Detailed Implementation

[0036] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0037] To further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, and not for limiting the scope of the claims of the present invention.

[0038] The description in this section pertains to only a few typical embodiments, and the present invention is not limited to the scope of the embodiments described. Substitution of identical or similar prior art methods with some technical features in the embodiments is also within the scope of the description and protection of this invention.

[0039] The steps described in the various embodiments in the specification are for illustrative purposes only, and the implementation of this application is not limited by the order of the steps.

[0040] The term "connection" in the specification includes both direct and indirect connections, such as connections made through active devices, passive devices, or electrical conduction media; it may also include connections made by other active or passive devices that are known to those skilled in the art and can achieve the same or similar functional purpose, such as connections made through circuits or components such as switches or follower circuits.

[0041] This invention discloses an output limiting circuit for a non-contact current detection chip, the output limiting circuit comprising: a voltage amplitude detection circuit, a voltage amplitude hysteresis control logic, and a main amplifier limiting processing circuit.

[0042] The voltage amplitude detection circuit is used to detect the amplitude of the first output voltage of the non-contact current detection chip for reference by the voltage control logic.

[0043] The voltage amplitude hysteresis control logic is connected to the voltage amplitude detection circuit to establish hysteresis when entering or exiting the voltage limiting state.

[0044] The main amplifier limiting processing circuit is connected to the voltage amplitude hysteresis control logic to perform voltage limiting processing based on the hysteresis established by the voltage amplitude hysteresis control logic.

[0045] In one embodiment of the present invention, the voltage amplitude detection circuit includes: a plurality of comparators, which respectively compare the first output voltage of the non-contact current detection chip with a plurality of threshold voltages.

[0046] Figure 3 This is a circuit diagram of the output limiting circuit in one embodiment of the present invention; please refer to [link / reference]. Figure 3 In one embodiment of the present invention, the voltage amplitude detection circuit includes: a first comparator 11, a second comparator 12, a third comparator 13, a fourth comparator 14, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7; the voltage amplitude hysteresis control logic includes a first NOR gate 21, a second NOR gate 22, a third NOR gate 23, and a fourth NOR gate 24; the main amplifier limiting processing circuit includes: a fifth comparator 31, a sixth comparator 32, a first switch K1, and a second switch K2.

[0047] The voltage Vsig is connected to the non-inverting input of the first comparator 11, the inverting input of the second comparator 12, the non-inverting input of the third comparator 13, and the inverting input of the fourth comparator 14, respectively.

[0048] The first terminal of the first resistor R1 is connected to the voltage VCC. The first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7 are connected in series. The second terminal of the seventh resistor R7 is grounded.

[0049] The inverting input terminal of the first comparator 11 is connected to the second terminal of the first resistor R1 and the first terminal of the second resistor R2, respectively; the non-inverting input terminal of the second comparator 12 is connected to the second terminal of the third resistor R3 and the first terminal of the fourth resistor R4, respectively; the inverting input terminal of the third comparator 13 is connected to the second terminal of the fourth resistor R4 and the first terminal of the fifth resistor R5, respectively; and the non-inverting input terminal of the fourth comparator 14 is connected to the second terminal of the sixth resistor R6 and the first terminal of the seventh resistor R7, respectively.

[0050] The output of the first comparator 11 is connected to the first input of the first NOR gate 21, the second input of the first NOR gate 21 is connected to the output of the second NOR gate 22, and the output of the first NOR gate 21 is connected to the first input of the second NOR gate 22; the output of the second comparator 12 is connected to the second input of the second NOR gate 22; the output of the second NOR gate 22 outputs a control signal that controls the first switch K1 to close.

[0051] The output of the third comparator 13 is connected to the first input of the third NOR gate 23, the second input of the third NOR gate 23 is connected to the output of the fourth NOR gate 24, and the output of the third NOR gate 23 is connected to the first input of the fourth NOR gate 24; the output of the fourth comparator 14 is connected to the second input of the fourth NOR gate 24; and the output of the fourth NOR gate 24 outputs a control signal to control the closing of the second switch K2.

[0052] The non-inverting input terminal of the fifth comparator 31 is connected to the second terminal of the second resistor R2 and the first terminal of the third resistor, respectively; the non-inverting input terminal of the sixth comparator 32 is connected to the second terminal of the fifth resistor R5 and the first terminal of the sixth resistor R6, respectively.

[0053] The inverting input terminal of the fifth comparator 31 is connected to the output terminal of the fifth comparator 31 and the second terminal of the first switch K1, respectively. The inverting input terminal of the sixth comparator 32 is connected to the output terminal of the sixth comparator 32 and the second terminal of the second switch K2, respectively.

[0054] The present invention also discloses a non-contact current detection chip, wherein the non-contact current detection chip includes the output limiting circuit of the above-described non-contact current detection chip.

[0055] In one embodiment of the present invention, the non-contact current detection chip further includes a Hall element, a pre-amplifier circuit, and a power amplifier; the output terminal of the Hall element is connected to the input terminal of the pre-amplifier circuit, and the pre-amplifier circuit outputs a voltage Vsig; the first terminal of the first switch is connected to the second terminal of the first resistor, the first terminal of the second switch, and the non-inverting input terminal of the power amplifier, respectively, and the inverting input terminal of the power amplifier is connected to the output terminal of the power amplifier.

[0056] This invention further discloses an output limiting method for a non-contact current detection chip, the output limiting method comprising:

[0057] The voltage amplitude detection circuit detects the amplitude of the first output voltage of the non-contact current detection chip for reference by the voltage control logic.

[0058] The voltage amplitude hysteresis control logic is connected to the voltage amplitude detection circuit to establish a hysteresis for entering or exiting the voltage limiting state;

[0059] The main amplifier limiting circuit is connected to the voltage amplitude hysteresis control logic, and performs voltage limiting processing based on the hysteresis established by the voltage amplitude hysteresis control logic.

[0060] like Figure 3 As shown, in one application scenario of the present invention, the Hall element and the pre-amplifier circuit are the front-end circuits of the current detection chip, V sig It is a voltage signal that is amplified to be proportional to the magnitude of the magnetic field. In order to drive the load, an output driver is added after the Hall element and the pre-amplification circuit. The voltage gain of this driver is 1.

[0061] In this application, V sig The relationship between the current to be detected (I) and the current is the same as in the traditional design, but the following improvements have been made to the design of the driver stage:

[0062] (1) Added support for V sig Amplitude detection, once it exceeds V th ph Or below V th nl This will cause the signal SWP or SWN to be high;

[0063] (2) SWP and SWN are connected to the driver input V. A The control signals for the two switches, Switchp and Switchn, are connected to two buffered outputs of reference voltages, respectively: V refh and V refl ;

[0064] (3) When the direction of the input current to be detected is positive, and the current value is too large, causing V to... sig >Vth ph When SWP=1, Switchp is turned on, V refh The voltage buffer output was connected to the input terminal V of the driver. A Therefore, V at this time out =V A =V refh ;

[0065] (4) and (3) are similar, when the direction of the input current to be detected is negative, and the current value is too large, causing V to... sig <V th nl When SWN=1, Switchn is turned on, V refl The voltage buffer output was connected to the input terminal V of the driver. A Therefore, V at this time out =V A =V refl ;

[0066] (5) When the chip is already in state 3), the absolute value of the current to be detected needs to be reduced to such that V sig ≤V th nh Only when the signal SWP returns to 0 and the switch Switchp is turned off will the input signal V of the drive amplifier be restored. A =V sig Therefore, the chip output

[0067] (6) When the chip is already in state 4), the absolute value of the current to be detected needs to be reduced to such that V sig ≥V th pl Only when the signal SWN returns to 0 and the switch Switchn is turned off will the input signal V of the drive amplifier be restored. A =V sig Therefore, the chip output

[0068] (7) Figure 3 The function of the medium-resistance voltage divider network is to generate the threshold voltage V. th ph V th nh V th pl and V th nl and output reference voltage V refh and V refl ;

[0069] (8) Figure 3 The four comparators Cmp_ph, Cmp_nh, Cmp_pl, and Cmp_nl, along with two RS flip-flops, are designed to establish hysteresis threshold control for entering and exiting high and low bit limiting states (3) to 5). The hysteresis thresholds for entering and exiting the high and low bit limiting states are respectively: (V th ph-V th nh ) and (V th pl -V th nl The purpose of establishing hysteresis control for entering / exiting the amplitude limiting state is to avoid the impact of system noise on V. sig The system switches back and forth between entering and exiting the limiting state due to the influence of this, thereby avoiding the corresponding back and forth changes in the output.

[0070] (9) The resistor Rx inserted between the chip's preamplifier circuit and the output driver amplifier is designed to isolate the preamplifier and V in the limiting state. refh Or V refl The voltage buffer amplifier, in its normal state (non-limiting state), since both Switchp and Switchn are closed, the input of the driver amplifier is in a high-impedance state. Therefore, the pre-amplifier circuit can drive the input of the output driver V through Rx. A ;

[0071] In summary, when the detected current is too large, the chip output of this design will lock the chip output to a specific output value V according to the direction of the detected current. refh Or V refl Instead of pushing the output to the power supply voltage V when the current to be detected is too large, as in traditional designs. dd Or the ground voltage is 0.

[0072] The current detection chip output limiting technology proposed in this patent, compared to traditional designs, adds a function to limit the output voltage when the detected current is too large. This ensures that the chip outputs V even when there is no internal malfunction alarm. out The maximum and minimum voltage values ​​are respectively less than the power supply voltage V dd The voltage is greater than ground voltage (0). When a functional failure is detected internally by the chip, the output driver can be shut down, thus causing the output voltage V to... out The voltage is pulled down to 0 by the pull-down resistor at the load end. Figure 3 (As shown) or pulled high to V by the pull-up load resistor. dd At this point, the host computer can detect an internal failure alarm in the chip without needing an additional alarm signal line. This improvement reduces the cost of additional chip alarm pins and eliminates the need for amplifiers that drive additional alarm signal lines and their power consumption.

[0073] The present invention further discloses a non-contact current detection chip, wherein the non-contact current detection chip includes the output limiting circuit of the above-mentioned non-contact current detection chip.

[0074] In summary, the non-contact current detection chip, its output limiting circuit, and method proposed in this invention can reduce the cost of additional chip alarm pins and eliminate the need for amplifiers that drive additional alarm signal lines and their power consumption.

[0075] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0076] The description and application of the present invention herein are illustrative and not intended to limit the scope of the invention to the embodiments described above. Effects or advantages involved in the embodiments may not be apparent due to various factors, and the description of effects or advantages is not intended to limit the embodiments. Variations and modifications of the embodiments disclosed herein are possible, and various substitutions and equivalents of the components in the embodiments are well known to those skilled in the art. It should be apparent to those skilled in the art that the invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of the invention. Other variations and modifications can be made to the embodiments disclosed herein without departing from the scope and spirit of the invention.

Claims

1. A non-contact current detection chip, characterized in that, The chip includes an output limiting circuit; wherein, the chip also includes a chip pre-amplifier circuit and an output driver; the chip pre-amplifier circuit includes a Hall element and a pre-amplifier circuit; the output limiting circuit includes: a voltage amplitude detection circuit, a voltage amplitude hysteresis control logic, and a main amplifier limiting processing circuit; The voltage amplitude detection circuit is used to detect the amplitude of the first output voltage of the non-contact current detection chip for reference by the voltage control logic. The voltage amplitude hysteresis control logic is connected to the voltage amplitude detection circuit to establish hysteresis when entering or exiting the voltage limiting state. The main amplifier limiting processing circuit is connected to the voltage amplitude hysteresis control logic to perform voltage limiting processing based on the hysteresis established by the voltage amplitude hysteresis control logic. When there is no internal functional failure alarm in the chip, the maximum output voltage Vout of the chip is less than the power supply voltage Vdd, and the minimum output voltage is greater than the ground voltage 0. When a functional failure is detected inside the chip, the output driver is turned off, so that the output voltage Vout is pulled down to 0 voltage by the load terminal pull-down resistor or pulled up to Vdd by the load pull-up resistor.

2. The non-contact current detection chip according to claim 1, characterized in that: The voltage amplitude detection circuit includes several comparators, each of which compares the first output voltage of the non-contact current detection chip with several threshold voltages.

3. The non-contact current detection chip according to claim 2, characterized in that: The voltage amplitude detection circuit includes: a first comparator, a second comparator, a third comparator, a fourth comparator, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor; The voltage amplitude hysteresis control logic includes a first NOR gate, a second NOR gate, a third NOR gate, and a fourth NOR gate; The voltage Vsig is connected to the non-inverting input of the first comparator, the inverting input of the second comparator, the non-inverting input of the third comparator, and the inverting input of the fourth comparator, respectively. The first terminal of the first resistor is connected to voltage VCC. The first, second, third, fourth, fifth, sixth, and seventh resistors are connected in series, and the second terminal of the seventh resistor is grounded. The inverting input terminal of the first comparator is connected to the second terminal of the first resistor and the first terminal of the second resistor, respectively; the non-inverting input terminal of the second comparator is connected to the second terminal of the third resistor and the first terminal of the fourth resistor, respectively; the inverting input terminal of the third comparator is connected to the second terminal of the fourth resistor and the first terminal of the fifth resistor, respectively; the non-inverting input terminal of the fourth comparator is connected to the second terminal of the sixth resistor and the first terminal of the seventh resistor, respectively. The output of the first comparator is connected to the first input of the first NOR gate, the second input of the first NOR gate is connected to the output of the second NOR gate, and the output of the first NOR gate is connected to the first input of the second NOR gate; the output of the second comparator is connected to the second input of the second NOR gate; the output of the second NOR gate outputs a control signal that controls the closing of the first switch. The output of the third comparator is connected to the first input of the third NOR gate, the second input of the third NOR gate is connected to the output of the fourth NOR gate, and the output of the third NOR gate is connected to the first input of the fourth NOR gate; the output of the fourth comparator is connected to the second input of the fourth NOR gate; the output of the third NOR gate outputs a control signal to control the closing of the second switch.

4. The non-contact current detection chip according to claim 3, characterized in that: The main amplifier limiting processing circuit further includes: a fifth voltage buffer amplifier, a sixth voltage buffer amplifier, a first switch, and a second switch; The non-inverting input terminal of the fifth voltage buffer amplifier is connected to the second terminal of the second resistor and the first terminal of the third resistor, respectively; the non-inverting input terminal of the sixth voltage buffer amplifier is connected to the second terminal of the fifth resistor and the first terminal of the sixth resistor, respectively. The inverting input terminal of the fifth voltage buffer amplifier is connected to the output terminal of the fifth voltage buffer amplifier and the second terminal of the first switch, respectively. The inverting input terminal of the sixth voltage buffer amplifier is connected to the output terminal of the sixth voltage buffer amplifier and the second terminal of the second switch, respectively.

5. A method for output limiting of a non-contact current detection chip according to any one of claims 1 to 4, characterized in that, The output limiting method includes: The voltage amplitude detection circuit detects the amplitude of the first output voltage of the non-contact current detection chip for reference by the voltage control logic. The voltage amplitude hysteresis control logic is connected to the voltage amplitude detection circuit to establish a hysteresis for entering or exiting the voltage limiting state; The main amplifier limiting circuit is connected to the voltage amplitude hysteresis control logic, and performs voltage limiting processing based on the hysteresis established by the voltage amplitude hysteresis control logic. When there is no internal functional failure alarm in the chip, the maximum output voltage Vout of the chip is less than the power supply voltage Vdd, and the minimum output voltage is greater than the ground voltage 0. When a functional failure is detected inside the chip, the output driver is turned off, so that the output voltage Vout is pulled down to 0 voltage by the load terminal pull-down resistor or pulled up to Vdd by the load pull-up resistor.

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