Voltage regulating apparatus and method using delta-sigma modulator
By introducing a Δ-∑ modulator, quantizer, and digital modulation device with a feedforward path into the voltage regulator, the stability and efficiency problems of existing voltage regulators under low voltage and high load current conditions are solved, achieving efficient and reliable voltage regulation, simplifying the design, and improving the applicability of digital technology.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NXP BV
- Filing Date
- 2022-11-08
- Publication Date
- 2026-07-10
Smart Images
Figure CN116266063B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to a voltage regulation device comprising a digital modulation device having a Δ-Σ modulator, a quantizer, and a feedforward path. Additionally, this disclosure relates to a method of operating the voltage regulation device. Furthermore, this disclosure relates to a specific use of a pulse density modulation device. Therefore, this disclosure relates to the technical field of voltage regulation. Background Technology
[0002] Voltage regulators, such as LDO (Low Dropout) voltage regulators, are suitable for many electronic applications, including regulator circuits for automotive, mobile phone, or industrial applications. Voltage regulators are used to control / regulate the voltage of power devices / stages, thereby providing a well-defined and stable (DC) output voltage.
[0003] Figure 13 This shows an example of a conventional analog LDO. The input voltage V... IN The power is supplied to the power unit, which then generates a corresponding output voltage V. OUT To regulate the output voltage, a feedback regulation path is established. A feedback signal (analog signal) is provided to an error amplifier, which amplifies the error relative to a reference voltage. The amplified analog error signal is then fed back to the power unit via a buffer. This regulates the output voltage.
[0004] Figure 14 An example of a conventional digital LDO is shown. Instead of a buffer in the case of an analog LDO, an analog-to-digital converter (ADC) converts the analog error amplification signal into a digital signal.
[0005] Figure 15 This illustrates an alternative example to a conventional digital LDO, where an ADC and shift register are used instead of... Figure 14 Error amplifier and ADC in the middle.
[0006] Figure 16 This illustrates another alternative example of a conventional digital LDO, where a comparator and a so-called coarse-D device are used instead of... Figure 14 Error amplifier and ADC in the middle.
[0007] However, these conventional LDOs may have various drawbacks. Analog regulators may have at least some of the following disadvantages: analog regulators require complex stability analysis due to pole and zero positions varying with load current; they require area due to the power stage in the saturation region; they are only suitable for applications requiring high PSRR or low-noise applications; portability and scalability are complex for small digital processes because conventional architectures may not be convenient for low-voltage applications.
[0008] Digital regulators may have at least some of the following disadvantages: high ripple; the use of ADCs and DACs may require shift registers and several comparators to control the power stage; and no operation at constant frequency due to shift registers, poor bandwidth and ripple.
[0009] Class D LDOs may have at least some of the following disadvantages: use of ramp, process dependence, use of power units in the saturation region, and the need to filter the PWM signal to control the power stage.
[0010] In conclusion, operating voltage regulators in an efficient and reliable manner remains a challenge. Summary of the Invention
[0011] It may be necessary to operate the voltage regulator in an efficient and reliable manner. A voltage regulator device and a method of operating the voltage regulator device are described below according to the independent claims. Exemplary embodiments are described according to the appended claims.
[0012] According to one aspect of this disclosure, a voltage regulator device is described, comprising:
[0013] i) An electrical device configured to receive an input signal (input voltage) and generate a corresponding output signal (output voltage);
[0014] ii) A comparator device coupled to the power device via a feedback path and configured to
[0015] a) Receive the output signal as a feedback signal, and b) Generate a comparison feedback signal (in other words: the comparator output); and
[0016] iii) A digital modulation device, which is arranged between the comparator device and the power device and is configured to
[0017] a) Digitally modulate the comparison feedback signal (comparator output), and b) provide the digitally modulated signal to the power unit.
[0018] Digital modulation apparatus (e.g., implemented as a Δ-Σ modulator) includes:
[0019] iiia)Δ-∑,
[0020] iiib) Quantizer, and
[0021] (iiic) Feedforward path, which is configured to feed forward the comparison feedback signal outside of Δ-∑ (around Δ-∑) (e.g., feed the comparison feedback signal forward to the coupling point between Δ-∑ and the quantizer or feed it forward to the power stage / device; in other words, the feedforward path can feed forward the quantization noise from the Δ-∑ input outside of the Δ-∑ output).
[0022] According to another aspect of this disclosure, a method of operating a voltage regulator device is described, the method comprising:
[0023] i) The power device receives the input signal and generates the corresponding output signal;
[0024] ii) The comparator device receives the output signal as a feedback signal and generates a comparison feedback signal;
[0025] iii) A digitally modulated signal is obtained by digitally modulating the comparison feedback signal (comparator output) using a digital modulation device including a Δ-∑ and a quantizer (arranged downstream of the Δ-∑); and
[0026] iv) Providing digitally modulated signals to power devices;
[0027] The method further includes:
[0028] v) Feedforward comparison feedback signal via feedforward path outside of Δ-∑.
[0029] According to another aspect of this disclosure, a method of using a pulse density modulation (PDM) device between a comparator device of a low-dropout voltage regulator and a power device is described, the PDM device including a feedforward path around Δ-∑.
[0030] In the context of this document, "electrical device" may specifically include multiple electrical units, such as (digital-to-analog) converters and / or power switches (preferably connected in parallel). In the example, the electrical device includes multiple power switches in a linear region. The electrical device may be a power stage or part of a power stage. In the example, the power stage includes the electrical device (specifically, having multiple electrical units) and one or more driver devices or one or more driver and level shifter devices.
[0031] In the context of this document, a "comparator device" can be a device configured to compare two signals (e.g., a feedback signal and a reference signal). A comparator can be an error amplifier and can be implemented, for example, as a differential amplifier. In this context, the comparator output can be referred to as the "comparison feedback signal".
[0032] In the context of this document, a "digital modulation device" can be a means configured to perform digital modulation of an (analog) input signal (e.g., a comparator output) to obtain a digitally modulated output signal (e.g., to a power supply). The described digital modulation device can be implemented as a Δ-Σ modulator. In embodiments, the digital modulation device is implemented as a pulse density modulation (PDM) device.
[0033] In the context of this document, a “Δ-Σ modulator” can be a device that includes a Δ-Σ (unit) (i.e., a difference and integrator) and a quantizer (unit). The quantizer can be, for example, a unity quantizer or a multi-bit quantizer. Δ-Σ modulation converts an analog voltage signal into pulse width or pulse density, which can be understood as pulse density modulation (PDM).
[0034] Additionally, the Δ-Σ modulator may include a feedforward path, for example, from the input of the Δ-Σ modulator to the quantizer. The input to the loop filter of the Δ-Σ may no longer contain the signal, but only the filtered quantization noise. Therefore, the loop filter / Δ-Σ does not process the signal, but only the (shaped) quantization noise. Linearity may therefore not need to be high, and the feedforward path can enhance stability and improve dynamic range. The advantage of the feedforward path can be that by reducing the constraints of the loop filter with respect to dynamic range, the loop filter / Δ-Σ only processes quantization noise.
[0035] According to an exemplary embodiment, this disclosure is based on the idea that a voltage regulator can operate efficiently and reliably when a feedback signal from a power source is directed to a comparator device and returned to the power source via a digital modulation device. The digital modulation device is implemented as a Δ-∑ modulator with a Δ-∑, a quantizer, and a feedforward path around the Δ-∑ feedforward comparator output. The digital modulation device (specifically, a PDM controller) controls the regulation loop, meaning that the Δ-∑ and (multi-bit) quantizer control the output power source. Due to the Δ-∑, the data stream (quantizer) output can be at a fixed sampling rate.
[0036] The inventors have unexpectedly discovered that a novel feedforward path, particularly around Δ-∑, can reduce quantizer noise and thereby improve output ripple and device stability. Furthermore, this method can enable operation at a constant frequency.
[0037] These measures significantly simplify the design while reducing the complexity of stability analysis. The described design is a digital system (the control section is fully digital and synthesizable), which overcomes the disadvantages of analog systems (enabling operation at lower voltages compared to analog regulators because the analog design simplifies to a comparator). The described device allows driving high load currents (e.g., 200mA) with simplified stability compared to analog regulators.
[0038] The described voltage regulator can be applied, for example, to power circuits such as CPUs, digital functionalities (specifically, NFC and secure element products), or memory, since there are no specific constraints regarding noise or power rejection ratios. Further improvements can be made to the scalability and portability of digital technologies (e.g., nodes such as 16nm, 28nm, or 40nm), which may be important because digital technologies may have high maximum power consumption requirements (e.g., 150mA for 40nm products and 230mA for 28nm products).
[0039] Further exemplary embodiments of the apparatus and method will be explained below.
[0040] In embodiments of this disclosure, the digital modulation apparatus includes a pulse density modulation (PDM) device. PDM is a form of modulation used to represent analog signals as binary signals, where the relative density of pulses substantially corresponds to the amplitude of the analog signal. Thus, pulse width modulation (PWM) can be a special case of PDM, where the switching frequency is fixed and all pulses corresponding to a sample are continuous in the digital signal. The described apparatus can be operated using a PDM device / controller to control the regulation loop. PDM modulation is achieved through a Δ-Σ modulator, a quantizer, and a feedforward path. The output power device is controlled by using the Δ-Σ modulator and the quantizer.
[0041] In other embodiments of this disclosure, the quantizer is a multi-bit quantizer (see below for example). Figure 9 A multi-bit quantizer allows simultaneous control of multiple power units in a power unit / stage. This reduces output voltage ripple. In this example, the data stream (quantizer output) passes through multiple selected power units (and output capacitors). Therefore, the number of active power units depends on the data stream of the multi-bit quantizer. The power unit can operate as a DAC here.
[0042] In the example, the output voltage ripple can be adjusted by at least one of the following parameters: the number of bits of the multi-bit quantizer, the number of parallel power units, the switching frequency, the output capacitor characteristics, the quantization step size, and the number of quantizer levels.
[0043] In another embodiment of this disclosure, the digital modulation apparatus further includes a digital modulation feedback path configured to feed back the output of the quantizer to the input of the Δ-∑ modulator. This enables efficient regulation. In this example, the calculation is performed digitally. In this example, the corresponding values of the bits are taken, including the bits...<N:1> The sum is then calculated. This sum is then amplified by a gain of Gb and returned to the negative input in the Δ domain. The digital modulation feedback path may include a digital-to-analog converter (DAC) and / or DAC functionality implemented in the calculation.
[0044] In another embodiment of this disclosure, the feedforward path is configured to feed the comparison feedback signal (comparator output) forward to the coupling point (sum formation) between Δ-∑ and the quantizer. Thus, only the quantized (filtered, shaped) noise is processed in the loop filter (Δ-∑), thereby improving linearity, dynamic range requirements, and stability. The gain of the feedforward path is then added to quantize only the noise in Δ-∑. Using the feedforward path, only the quantized noise in Δ-∑ can be obtained.
[0045] In another embodiment of this disclosure, the voltage regulator device further includes a driver device, specifically a driver device and a level shifter device, which are arranged between the digital modulation device and the power device (and form part of the power stage) and / or between the comparator device and the digital modulation device.
[0046] In another embodiment of this disclosure, the feedforward path is configured to feed the comparison feedback signal forward to the driver and / or level shifter device.
[0047] In other embodiments of this disclosure, the comparator device (and the power device (and the driver device, specifically, the driver device and the level shifter device)) is part of the analog domain, and the digital modulation device is part of the digital domain. The driver device can be used to set the strength of a signal to control the power device. The level shifter device can allow shifting from a supply voltage (e.g., high / low) to another voltage.
[0048] In another embodiment of this disclosure, the voltage regulator device is configured as a low dropout (LDO) voltage regulator device.
[0049] In another embodiment of this disclosure, the comparator device is configured to compare a feedback signal with a reference voltage to generate a comparison feedback signal. In this example, the comparator can be implemented in a continuous time with hysteresis.
[0050] In another embodiment of this disclosure, the voltage regulator device further includes a clocking device configured to provide a clock signal to the digital modulation device. In this example, a fast clock (e.g., 20 MHz) may be used.
[0051] In another embodiment of this disclosure, the clock device is further configured to provide an additional clock signal to the comparator device. In this way, the comparator can be implemented as a latch comparator.
[0052] In another embodiment of this disclosure, the power device includes multiple power units, such as power switches. The power units can be arranged in a linear region (configured as power switches), thereby potentially saving space. The power device can be designed with several power units connected in parallel. In this example, in terms of functionality, the multiple power switches serve as digital-to-analog converters. Attached Figure Description
[0053] Figure 1 A voltage regulation device according to an exemplary embodiment of the present disclosure is shown.
[0054] Figure 2 A voltage regulation device according to another exemplary embodiment of the present disclosure is shown.
[0055] Figure 3 A digital modulation apparatus according to another exemplary embodiment of the present disclosure is shown.
[0056] Figures 4 to 7 Voltage regulation devices according to other exemplary embodiments of the present disclosure are shown respectively.
[0057] Figure 8 An alternative representation of an integrator for calculating the transfer function in the Laplace or Z-domain is shown.
[0058] Figure 9 A multi-bit quantizer according to exemplary embodiments of the present disclosure is illustrated in detail.
[0059] Figure 10 A power device according to exemplary embodiments of the present disclosure is shown in detail.
[0060] Figure 11 The figure shows a simulation of the output signal compared to the load current according to an exemplary embodiment of the present disclosure.
[0061] Figure 12 A digital modulation apparatus for performing calculations about a transfer function is shown according to an exemplary embodiment of the present disclosure.
[0062] Figures 13 to 16 A standard LDO is shown (see description above).
[0063] The illustrations in the drawings are schematic. Similar or identical elements are represented by the same reference numerals in different drawings. Detailed Implementation
[0064] Before describing exemplary embodiments in more detail with reference to the drawings, some basic considerations on which the exemplary embodiments of this disclosure are based will be outlined.
[0065] According to exemplary embodiments of this disclosure, a novel control method for combining a comparator with a PDM controller and a power stage in an LDO is described. The PDM controller is implemented using a digital Δ-Σ modulator with a multi-bit quantizer and a feedforward path. This method reduces complexity in design and stability analysis, saves chip area (because the power device operates only in the linear region), and improves the scalability and portability of digital technology nodes.
[0066] According to exemplary embodiments of this disclosure, the control method may include the following features:
[0067] i) Reduce the complexity of design and stability analysis;
[0068] ii) Improve the scalability and portability of digital technology nodes;
[0069] iii) Implement the PDM controller using Δ-∑ and multi-bit quantizers;
[0070] iv) Use a feedforward path in Δ-Σ modulation to reduce quantization noise and thus reduce the ripple and also improve stability;
[0071] v) For analog or Class D LDOs, area is saved by using power stage devices in the linear region (as switches) instead of power stage devices in saturation.
[0072] vi) It does not have stability issues similar to those attributable to changes in internal poles and zeros due to large current load variations;
[0073] vii) Compared to analog solutions, it has a reduced number of poles and zeros;
[0074] viii) No error amplifiers, buffers, pole tracking, or electrical devices with stability are required;
[0075] (ix) Compared to analog regulators, it can operate at lower voltages because only comparators and power switches are needed in the analog section;
[0076] x) The control part is fully digital and can be synthesized.
[0077] Figure 1 A voltage regulation device 100 according to an exemplary embodiment of the present disclosure is shown. The device 100 includes a power supply device 150, wherein the power supply device 150 is configured to receive an input signal 151 (voltage V). IN And generate the corresponding output signal 152 (voltage B) OUTFeedback path 140 is coupled to power unit 150 to regulate output signal 152. Feedback path 140 directs output signal 152 as feedback signal 141 back to comparator device 110, such as an error amplifier. Feedback path 140 may include resistor ladder 142. Comparator device 110 compares (analog) feedback signal 141 with reference voltage 115 and generates a corresponding comparison feedback signal 112 as output. Comparator output 112 defines whether output voltage 152 is higher or lower than a target voltage. The comparison feedback signal 112 is then further provided to digital modulation device 120 arranged between comparator device 110 and power unit 150, thereby closing the feedback / regulation loop. Digital modulation device 120 is implemented as a pulse density modulation (PDM) device and configured to digitally modulate comparison feedback signal 112 and provide digitally modulated signal 121 back to power unit 150.
[0078] Figure 2 A voltage regulation device 100 according to an exemplary embodiment of the present disclosure is shown. The device 100 is very similar to... Figure 1 The apparatus is shown, but with more details. It can be seen that the PDM device 120 is implemented as a Δ-Σ modulator including Δ-Σ 122 and a multi-bit quantizer 124. A clock device 160 provides a clock signal 161 to the PDM device 120 for digital modulation. A driver (and optionally a level shifter) device 155 is coupled between the PDM device 120 and the power device 150. The power device 150 (which may include multiple power units) and the driver / level shifter device 155 form a power stage 156. Additionally, a comparator device 110, a feedback path 140 (and in principle, the power device 150), and the driver / level shifter device 155 are shown forming an analog (signal) domain, while the PDM 120 forms a digital (signal) domain. The output 152 further includes an output capacitor 154, which may be internal or external to the device 100.
[0079] Figure 3 A digital modulation apparatus 120 according to an exemplary embodiment of the present disclosure is illustrated in detail. An (analog) comparison feedback signal 112 from a comparator device 110 is an input, while a digital modulation signal 121 (data stream) is an output to a power device 150. Δ-∑122 includes a Δ domain 122a (difference) and a ∑ domain 122b (integrator). A feedforward path 128 is established, configured to feed forward the comparison feedback signal 112 outside of Δ-∑122 (around Δ-∑122). Specifically, in this example, the feedforward path 128 feeds the comparison feedback signal 112 forward to a coupling point 125 (sum) between Δ-∑122 and the quantizer 124. The feedforward path 128 may include a gain Gc.
[0080] Additionally, the digital modulation device 120 includes a feedback path 126 established between the output of the quantizer 124 and the coupling point 123 (difference) of the Δ-∑ domains 122a, ∑122b, and the comparator output 112. The feedback path 126 may further include a gain Gb, which is the gain of the Δ-∑ feedback loop. The feedback path 126 is a digital path and computes the quantizer output 121 as a digital value used as the negative input to Δ-∑. The functionality of the feedback path can also be considered analogous to that of a digital-to-analog converter (DAC).
[0081] In this example, the signal feedback FB corresponds to the sum of the binary bits <N:1> on the data stream bus. In other words, the signal feedback FB follows the equation:
[0082] For example, in the case of an 8-bit bus (N=8), the following bit correspondences will exist: {b8, b7, b6, b5, b4, b3, b2, b1} = 00001111, or
[0083]
[0084] Figure 4 A voltage regulation device 100 according to another exemplary embodiment of the present disclosure is shown. Figure 4 In principle, show Figure 2 In the device Figure 3 Detailed view of the digital modulation device 120.
[0085] Figure 5 A voltage regulation device 100 according to another exemplary embodiment of the present disclosure is shown. In this example, a clock device 160 is additionally connected to a comparator device 110 and provides a clock signal 161 thereto. In this way, the comparator device 110 can be used as a latch comparator.
[0086] Figure 6 A voltage regulation device 100 according to another exemplary embodiment of the present disclosure is shown. Based on... Figure 5 In this example, there is a first level shifter device 155a coupled between the comparator device 110 and the digital modulation device 120, while a second driver and a level shifter device 155b are coupled between the digital modulation device 120 and the power device 150. Thus, potentially different power domains can be established in the device 100.
[0087] Figure 7 A voltage regulation device 100 according to another exemplary embodiment of the present disclosure is shown. Based on... Figure 4In this example of the illustration, feedforward path 128 is configured to feed forward the comparison feedback signal 112 to the (second) driver and level shifter device 155b. In this case, feedforward path 128 leads to the outside of digital modulation device 120 to directly control power stage 156 (and / or power device 150).
[0088] Figure 8 Alternative representations of integrator 122b for calculating transfer functions in the Laplace or Z-domain are shown. While integrator 122b is applied in the example on the left (see also the previous diagram), the Laplace transform / domain is applied in the example in the middle for continuous-time patterning. Conversely, the example on the right applies the Z-transform / domain for discrete-time patterning.
[0089] Figure 9 A multi-bit quantizer 124 according to an exemplary embodiment of the present disclosure is shown in detail. The digital modulation device 120 is configured as described above, but as can be seen in this detailed figure, the multi-bit quantizer 124 employs multiple stages to provide quantizer output 121.
[0090] Figure 10 A power device 150 according to an exemplary embodiment of the present disclosure is illustrated in detail. In this detailed example, the power device 150 includes a plurality of power units 158 configured to be connected in parallel with power switches. In this example, each quantizer output 121 is connected to a specific power switch 158.
[0091] Figure 11 The figure illustrates a simulation of the output signal 152 according to an exemplary embodiment of the present disclosure compared to the DC load current 153 supplied to the power device 150. Although the DC load current 153 increases significantly in a linear manner, the voltage output 152 is regulated in an efficient and reliable manner by the described voltage regulator 100.
[0092] Figure 12 A digital modulation apparatus 120, here a Δ-Σ modulator, is shown according to an exemplary embodiment of this disclosure. This figure serves as the basis for the following calculations regarding the transfer function. Therefore, Ti is the clock period (equivalent to the sampling period of the integrator). It is assumed that the power stage is considered to have a transfer function similar to a low-pass filter.
[0093] For the following calculations, we believe
[0094] a is the comparator gain
[0095] b is the feedback gain of the Δ-∑ modulator.
[0096] c is the feedforward path gain
[0097] d is the regulator feedback gain
[0098] V out For the output of the regulator
[0099] Ti is the clock period.
[0100] V FB Feedback for the regulator
[0101] V REF This serves as a reference for the regulator.
[0102] Transfer function calculation
[0103] x(s)=aV REF (s)
[0104] w(s)=cx(s)+[x(s)-by(s)].[1 / (Tis)]
[0105] y(s) = w(s) + N(s)
[0106] V out (s)=H LPF (s).y(s)
[0107] V FB (s) = d.Vout(s)
[0108] y(s)=[(c.Ti.s+1) / (Ti.s+b)].x(s)+[(Ti.s) / (Ti.s+b)].N(s), where x(s)=aV REF (s)
[0109] The transfer function is
[0110] y(s)=a.[(c.Ti.s+1) / (Ti.s+b)].V REF (s)+[(Ti.s / b) / (Ti.s / b+1)].N(s)
[0111] 1) If N(s) = 0, then the open-loop signal transfer function is:
[0112] y(s)=a[(c.Ti.s+1) / (Ti.s+b)].V REF (s)
[0113] The open-loop signal transfer function is
[0114] (V FB (s) / V REF (s))=(adc / T LPF ).[s+1 / (c.Ti)] / [(s+b / Ti).(s+1 / T LPF )]
[0115] Based on this transfer function, the poles and zeros can be described as follows:
[0116] P LPF =-1 / T LPF (Assuming it acts as a power stage pole for a low-pass filter)
[0117] pi = -b / Ti (integrator poles)
[0118] zi = -1 / (c.Ti) (integrator zero)
[0119] Gain DC =adc / T LPF (DC gain of the regulator)
[0120] By setting b = 1 / c in the calculation, the poles and zeros of the (Δ-∑) integrator cancel each other out, thereby simplifying the stability, since the stable response is similar to that of a first-order stable system. Specifically, the stability of the described voltage regulator device can be improved by providing a feedforward path (see c) and a feedback path (see b).
[0121] 2) If V REF If (s) = 0, then the open-loop noise transfer function is:
[0122] y(s)=[(Ti.s / b) / (Ti.s / b+1)].N(s)
[0123] The open-loop noise transfer function is
[0124] (V FB (s) / N(s))=(d / T LPF ).[(s / (s+(b / Ti))].[(1 / (s+(1 / T LPF ))],
[0125] Where [s / (s+(b / Ti))] represents a high-pass filter.
[0126] Figure Labels
[0127] 100 Voltage Regulator
[0128] 110 Comparator device
[0129] 112 Compare feedback signal and comparator output
[0130] 115 Reference signal / voltage
[0131] 120 Digital Modulation Device
[0132] 121 Quantizer Output, Data Stream
[0133] 122 Δ-∑
[0134] 122a Δ domain
[0135] 122b ∑-field, integrator
[0136] 123 First coupling point (difference)
[0137] 124 quantizer
[0138] 125 Second coupling point (summary)
[0139] 126 Digital Modulation Feedback Path
[0140] 128 Feedforward Path
[0141] 140 Feedback Path
[0142] 141 Feedback Signal
[0143] 142 Resistor ladder or unity-gain feedback path
[0144] 150 Electrical installations
[0145] 151 Input Signal / Voltage
[0146] 152 Output Signal / Voltage
[0147] 153 DC load current
[0148] 154 Output capacitor
[0149] 155 drive unit
[0150] 155a Level Shifter Device
[0151] 155b Driver and Level Shifter Device
[0152] 156 Electricity Class
[0153] 158 Power unit, power switch
[0154] 160 Clock device
[0155] 161a, 161b Clock signals.
Claims
1. A voltage regulator device (100), characterized in that, include: An electrical device (150) is configured to receive an input signal (151) and generate a corresponding output signal (152). Comparator device (110), which is coupled to the power device (150) via feedback path (140) and configured to The output signal (152) is received as a feedback signal (141), and Generate a comparison feedback signal (112); and A digital modulation device (120) is disposed between the comparator device (110) and the power device (150) and is configured to... The comparison feedback signal (112) is digitally modulated, and The digitally modulated signal (121) is provided to the power device (150). The digital modulation device (120) includes: Δ-∑(122) Quantizer (124), and Feedforward path (128), the feedforward path being configured to feed forward the comparison feedback signal (112) beyond the Δ-∑ (122); and The voltage regulator device further includes a driver device disposed between the digital modulation device and the power device, wherein the feedforward path is configured to feed the comparison feedback signal to the driver device.
2. The voltage regulator device (100) according to claim 1. Its features are, The digital modulation device (120) includes a pulse density modulation (PDM) device.
3. The voltage regulator device (100) according to claim 1 or 2. Its features are, The quantizer (124) is a multi-bit quantizer.
4. The voltage regulator device (100) according to claim 1, characterized in that, The digital modulation device (120) further includes: A digital modulation feedback path (126) is configured to feed back the output of the quantizer (124) to the Δ-∑ (122).
5. A method for operating a voltage regulator device (100), characterized in that, include: The power device (150) receives the input signal (151) and generates the corresponding output signal (152). The comparator device (110) receives the output signal (152) as a feedback signal (141) and generates a comparison feedback signal (112). The comparison feedback signal (112) is digitally modulated by a digital modulation device (120) including Δ-∑ (122) and a quantizer (124) to obtain a digitally modulated signal (121). The digital modulation signal (121) is provided to the power device (150). The voltage regulator device further includes a driver device disposed between the digital modulation device and the power device. And the method further includes: The comparison feedback signal (112) is fed forward via the feedforward path (128) in addition to the Δ-∑ (122), and The comparison feedback signal is fed forward to the driver device.