Data Writing Method, Device, Storage Medium and Electronic Device

Abstract

Embodiments of the present disclosure provide a method, apparatus, storage medium, and electronic device for writing data. The method includes: determining a plurality of first type pixel rows according to a predetermined rule, where the first type pixel rows are the pixel rows that need to be correctly displayed in the current frame; determining the time difference between the write times of the first data signals corresponding to two adjacent first type pixel rows; determining the number of second type pixel rows included between two adjacent first type pixel rows, where the second type pixel rows are other pixel rows except the first type pixel rows; determining the write times of the second data signals corresponding to each of the second type pixel rows included between two adjacent first type pixel rows according to the time difference and the number of second type pixel rows; writing a first gate pulse signal to the first type pixel rows at the first data signal write time, and writing a second gate pulse signal to the second type pixel rows at the second data signal write time to refresh the display data of the current frame.

Description

Technical Field

[0001] The present disclosure relates to the field of displays, and particularly to a method, apparatus, storage medium, and electronic device for writing data. Background Art

[0002] In the field of displays, especially in large-size OLED displays, high PPI (Pixels Per Inch, a unit of pixel density for short) and high refresh rate are the main indicators of display products. This means that the writing time of each row of data will be greatly compressed compared to low-refresh-rate products, which may lead to incomplete data writing and cause abnormal display images. Summary of the Invention

[0003] In view of this, embodiments of the present disclosure provide a method, apparatus, storage medium, and electronic device for writing data to solve the following problems in the prior art: For display products with high PPI and high refresh rate, the writing time of each row of pixel data is compressed to be relatively short, resulting in incomplete data writing and abnormal display images.

[0004] On the one hand, embodiments of the present disclosure provide a method for writing data, including: determining a plurality of first-type pixel rows according to a predetermined rule, where the first-type pixel rows are the pixel rows that need to be correctly displayed in the current frame (Frame); determining the time difference between the writing times of the first data signals corresponding to two adjacent first-type pixel rows; determining the number of second-type pixel rows included between two adjacent first-type pixel rows, where the second-type pixel rows are other pixel rows except the first-type pixel rows; determining the writing times of the second data signals corresponding to each of the second-type pixel rows included between two adjacent first-type pixel rows according to the time difference and the number of second-type pixel rows; writing a first gate pulse signal to the first-type pixel rows at the writing time of the first data signal, and writing a second gate pulse signal to the second-type pixel rows at the writing time of the second data signal to refresh the display data of the current frame according to the first gate pulse signal and the second gate pulse signal.

[0005] In some embodiments, determining a plurality of first-type pixel rows according to a predetermined rule includes: dividing all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; determining the predetermined group of pixel rows in the N groups of pixel rows as the plurality of first-type pixel rows in the current frame.

[0006] In some embodiments, determining a plurality of first-type pixel rows according to a predetermined rule includes:

[0007] All pixel rows are divided into N groups according to the row numbers of the pixel rows. Among them, the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; a group of pixel rows that has not been selected in the first N - 1 frames is selected from the group numbers of the N groups of pixel rows as the multiple first - type pixel rows of the current frame.

[0008] In some embodiments, determining multiple first - type pixel rows according to a predetermined rule includes:

[0009] Determine that the number of second - type pixel rows between two adjacent first - type pixel rows is M, where M is an integer greater than 0 and less than 6.

[0010] In some embodiments, determining the write times of the second data signals corresponding to each of the second - type pixel rows included between two adjacent first - type pixel rows according to the time difference and the number of second - type pixel rows includes: determining the time interval for writing the second data signal for each of the second - type pixel rows according to the quotient of the time difference divided by the number of second - type pixel rows; determining the write times of the second data signals for each of the second - type pixel rows according to the time interval and the write time of the first data signal of the first first - type pixel row, where the first first - type pixel row is the first - type pixel row with an earlier write time of the first data signal among the two adjacent first - type pixel rows for which the time difference is determined.

[0011] On the other hand, an embodiment of the present disclosure provides a data writing device, including: a first determination module for determining multiple first - type pixel rows according to a predetermined rule, where the first - type pixel rows are the pixel rows that need to be correctly displayed in the current frame; a second determination module for determining the time difference between the write times of the first data signals corresponding to two adjacent first - type pixel rows; a third determination module for determining the number of second - type pixel rows included between two adjacent first - type pixel rows, where the second - type pixel rows are other pixel rows except the first - type pixel rows; a fourth determination module for determining the write times of the second data signals corresponding to each of the second - type pixel rows included between two adjacent first - type pixel rows according to the time difference and the number of second - type pixel rows; an execution module for writing a first gate pulse signal to the first - type pixel rows at the write time of the first data signal and writing a second gate pulse signal to the second - type pixel rows at the write time of the second data signal to refresh the display data of the current frame according to the first gate pulse signal and the second gate pulse signal.

[0012] In some embodiments, the first determination module includes: a first determination unit configured to divide all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not consecutive, and N is an integer greater than 1; determine a predetermined group of pixel rows among the N groups of pixel rows as multiple first-type pixel rows of the current frame; a second determination unit configured to divide all pixel rows into N groups according to the row numbers of the pixel rows; select a group of pixel rows that has not been selected in the previous N-1 frames from the group numbers of the N groups of pixel rows as multiple first-type pixel rows of the current frame; a third determination unit configured to determine that the number of second-type pixel rows between two adjacent first-type pixel rows is M, where M is an integer greater than 0 and less than 6.

[0013] In some embodiments, the fourth determination module is specifically configured to: determine the time interval for writing the second data signal for each of the second-type pixel rows according to the quotient of the time difference divided by the number of the second-type pixel rows; determine the writing time of the second data signal for each of the second-type pixel rows according to the time interval and the writing time of the first data signal of the first first-type pixel row, where the first first-type pixel row is the first-type pixel row with an earlier writing time of the first data signal among the two adjacent first-type pixel rows for which the time difference is determined.

[0014] On the other hand, an embodiment of the present disclosure provides a storage medium storing a computer program, and when the computer program is executed by a processor, the steps of the above method are implemented.

[0015] On the other hand, an embodiment of the present disclosure provides a computer device including at least a memory and a processor, where a computer program is stored on the memory, and when the processor executes the computer program on the memory, the steps of the above method are implemented.

[0016] In the embodiments of the present disclosure, for a display product with high PPI and high refresh rate, some are selected from all pixel rows as the first-type pixel rows to ensure its correct display. As long as the data of these pixel rows is written correctly and there is written content in other second-type pixel rows, the display screen will not show abnormal display that can be recognized by the naked eye of the user, and the user experience is good. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments recorded in the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1 A traditional 3T1C architecture pixel circuit diagram provided by the related art;

[0019] Figure 2 Provided for the related art Figure 1 The timing diagram of the pixel circuit shown;

[0020] Figure 3 Provided for the related art Figure 1 The timing diagram of the data writing stage;

[0021] Figure 4 Provided for the related art according to Figure 3 The correlation diagram obtained;

[0022] Figure 5 The data writing timing diagram in the case of high PPI and high refresh rate provided for the related art;

[0023] Figure 6 The flowchart of the data writing method provided by the first embodiment of the present disclosure;

[0024] Figure 7 The data writing timing diagram provided by the first embodiment of the present disclosure;

[0025] Figure 8 The structural schematic diagram of the data writing device provided by the second embodiment of the present disclosure;

[0026] Figure 9 The structural schematic diagram of the electronic device provided by the fourth embodiment of the present disclosure. Detailed implementation manners

[0027] In order to make the objectives, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are some but not all of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present disclosure without creative efforts shall fall within the scope of protection of the present disclosure.

[0028] Unless otherwise defined, technical or scientific terms used in this disclosure shall have the ordinary meaning as understood by those of ordinary skill in the art to which this disclosure pertains. The terms "first", "second" and similar words used in this disclosure do not denote any order, quantity or importance, but are only used to distinguish different components. Words such as "comprising" or "including" mean that the elements or items appearing before this word cover the elements or items listed after this word and their equivalents, without excluding other elements or items. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Upper", "lower", "left", "right", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0029] To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of known functions and known components are omitted in this disclosure.

[0030] Figure 1 is a traditional 3T1C architecture pixel circuit, Figure 2 is Figure 1 the timing diagram of the pixel circuit shown.

[0031] It is mainly divided into the following two stages: (1) write data (data writing stage): G1 and G2 are opened simultaneously to write the DATA data; (2) Emission (release stage): G1 and G2 are turned off, and the G point is bootstrapped through the Cst capacitor, and the pixel starts to emit light until the next data writing stage.

[0032] Figure 3 is Figure 1 the timing diagram of the data writing stage, Figure 4 is according to Figure 3 the obtained correlation diagram. It can be seen from the figure that at time t1, data1 of the Nth row starts to be written, and at time t2, data2 of the N+1th row starts to be written, and the writing process lasts for a fixed time; however, there is a conversion time for the transformation from data1 to data2 (the same data line). For the refresh rate, it is usually 1 / 60 divided by the number of pixel rows. Therefore, at high refresh frequencies and high resolutions, the data writing time will be shorter compared to non-high PPI and high refresh rate display panels, resulting in problems with the data writing of the Nth row and the N+1th row. The data writing timing in the case of high PPI and high refresh rate is as Figure 5 shown. When G<N+1> of the N+1th row is opened to write data2, data1 has not been completely transformed into data2, resulting in abnormal data writing for the N+1th row. Thereafter, there will be problems with the writing of each row, and the display will have problems.

[0033] To solve the above problems, an embodiment of the present disclosure proposes a method for displaying data. This method can randomly select some rows, then ensure the accuracy of data writing for these rows, and then insert data that ensures normal display between these rows, which makes the display normal while the difference cannot be detected by the human eye.

[0034] The first embodiment of the present disclosure provides a method for writing data. The flow of this method is as Figure 6 shown, including steps S601 to S605:

[0035] S601, determine a plurality of first-type pixel rows according to a predetermined rule, where the first-type pixel rows are the pixel rows that need to be correctly displayed in the current frame.

[0036] The predetermined rule in the embodiment of the present disclosure can be any rule. For example, randomly determine some pixel rows as the first-type pixel rows, or formulate a predetermined rule according to certain display requirements, etc.

[0037] When the predetermined rule is to randomly select some pixel rows, since a better display effect is to insert second-type pixel rows between the first-type pixel rows, therefore, the row numbers of the first-type pixel rows are preferably discontinuous. The number of second-type pixel rows between two adjacent first-type pixel rows is M. The number of second-type pixel rows between any pair of adjacent first-type pixel rows can be the same or different. For example, if the row numbers of the first-type pixel rows are 1, 3, 7, 10..., then there is only one second-type pixel row between row numbers 1 and 3, there are three second-type pixel rows 4, 5, 6 between row numbers 3 and 7, and there are two second-type pixel rows 8 and 9 between row numbers 7 and 10; again, for example, if the row numbers of the first-type pixel rows are 1, 5, 9, 13..., then there are three second-type pixel rows 2, 3, 4 between row numbers 1 and 5, there are three second-type pixel rows 6, 7, 8 between row numbers 5 and 9, and there are three second-type pixel rows 10, 11, 12 between row numbers 9 and 13. In implementation, to ensure the visual effect, M is preferably an integer greater than 0 and less than 6.

[0038] The above random selection of some pixel rows is only one of the predetermined rules. When determining a plurality of first-type pixel rows according to the predetermined rule, all pixel rows can also be divided into N groups according to the row numbers of the pixel rows, and then determine the predetermined group of pixel rows in the N groups of pixel rows as the plurality of first-type pixel rows in the current frame, where the row numbers corresponding to each group of pixel rows are discontinuous, and N is an integer greater than 1. In this process, the first-type pixel rows can be any group of pixel rows in the N groups of pixel rows. For example, divide the pixel rows into three groups. The row numbers of the first group are 1, 4, 7, 10..., the row numbers of the second group are 2, 5, 8, 11..., and the row numbers of the third group are 3, 6, 9, 12.... Then any group of pixel rows can be selected as the first-type pixel rows.

[0039] To ensure that the display panel does not lose data of odd or even rows during display, for the case of dividing the pixel rows into N groups, embodiments of the present disclosure can also select a group of pixel rows that have not been selected in the previous N - 1 frames from the group numbers of the N groups of pixel rows as multiple first - type pixel rows for the current frame. That is, a group of pixel rows will be re - selected for each frame image, and the pixel rows selected in consecutive N frame images are not repeated. After N frame images have polled and selected all N groups of divided pixel rows, the second - round selection is repeated, that is, the group numbers of the N groups of pixel rows are sequentially selected frame - by - frame as multiple first - type pixel rows. For example, if the pixel rows are divided into three groups, the row numbers of the first group are 1, 4, 7, 10...; the row numbers of the second group are 2, 5, 8, 11...; the row numbers of the third group are 3, 6, 9, 12..., then the first - frame image selects the first - group row numbers, the second - frame image selects the second - group row numbers, the third - frame image selects the third - group row numbers, the fourth - frame image selects the first - group row numbers, the fifth - frame image selects the second - group row numbers, the sixth - frame image selects the third - group row numbers, etc., and all grouped pixel rows are repeated every three frames. Of course, the group numbers of the groups selected by the first - frame image and the fourth - frame image can be different, as long as all grouped pixel rows are repeated every three frames.

[0040] S602, determine the time difference between the write times of the first data signals corresponding to two adjacent first - type pixel rows.

[0041] For example, the row numbers of two adjacent first - type pixel rows are 1 and 4 respectively. The write time of the first data signal of the first - type pixel row with row number 1 is t1 (the duration of the write operation is the write time period, and generally, the time period from the start of the write operation to the arrival of the write time of the next pixel row is called the write time period of a pixel - row data signal). The write time of the first data signal of the first - type pixel row with row number 4 is t2, then the time difference is t2 - t1.

[0042] S603, determine the number of second - type pixel rows included between two adjacent first - type pixel rows, where the second - type pixel rows are other pixel rows except the first - type pixel rows.

[0043] In the above example, the row numbers of two adjacent first - type pixel rows are 1 and 4 respectively, and the row numbers of the second - type pixel rows included between the two adjacent first - type pixel rows are 2 and 3, then the number of second - type pixel rows is two.

[0044] S604, determine the write times of the second data signals corresponding to each of the second - type pixel rows included between two adjacent first - type pixel rows according to the time difference and the number of second - type pixel rows.

[0045] In specific implementation, the time interval for each second-type pixel row to write the second data signal is determined according to the quotient of the time difference divided by the number of second-type pixel rows; the writing time of the second data signal for each second-type pixel row is determined according to the time interval and the writing time of the first data signal of the first first-type pixel row, where the first first-type pixel row is the first-type pixel row with an earlier writing time of the first data signal among two adjacent first-type pixel rows for determining the time difference.

[0046] As in the above example, the time interval for each second-type pixel row to write the second data signal is (t2 - t1) / (2 + 1). Then, the writing time of the second data signal of the second-type pixel row with row number 2 is t1+(t2 - t1) / 3, and the writing time of the second data signal of the second-type pixel row with row number 3 is t1+(t2 - t1)2 / 3. Correspondingly, the writing time of the first data signal of the first-type pixel row with row number 1 is t1, and the continuous writing time period is from t1 to t1+(t2 - t1) / 3. The writing time of the second data signal of the second-type pixel row with row number 2 is t1+(t2 - t1) / 3, and the writing time period is from t1+(t2 - t1) / 3 to t1+(t2 - t1)2 / 3; the writing time of the second data signal of the second-type pixel row with row number 3 is t1+(t2 - t1)2 / 3, and the writing time period is from t1+(t2 - t1)2 / 3 to t2; the writing time of the first data signal of the first-type pixel row with row number 4 is t2.

[0047] The time difference between two adjacent first-type pixel rows is used to write the corresponding second data signal of the second-type pixel row. Therefore, when determining the time interval for each second-type pixel row to write the second data signal, the time interval needs to be calculated in the way of (t2 - t1) / (quantity + 1).

[0048] S605, write the first gate pulse signal to the first-type pixel row at the first data signal writing time, and write the second gate pulse signal to the second-type pixel row at the second data signal writing time, so as to refresh the display data of the current frame according to the first gate pulse signal and the second gate pulse signal.

[0049] As Figure 7 shown, when the first-type pixel rows are the Nth and (N + 5)th rows, output the corresponding G <n>And G<N+5> ensure the write timing diagrams of data1 and data2 at times t1 and t2. The middle N+1, N+2, N+3, N+4 lines then insert the corresponding time intervals (gaps) of G<N+1>-G<N+4> etc. into G <n>Between this and G<N+5>, so as to ensure the accuracy of data writing for the Nth and (N+5)th rows. For the (N+1)th to (N+4)th rows, it is achieved by inserting data.

[0050] After the refresh frequency is determined, the writing time for each row is also determined. At high resolutions, it is impossible to ensure that the data writing for each row is accurate. Therefore, the data insertion scheme proposed in this embodiment of the disclosure is that before the start of each frame (which can be achieved by an algorithm according to a predetermined rule), the rows that need to be ensured to be correctly displayed are determined (ensuring that the data writing for these rows is correct), and then the corresponding Gate signal timings are output according to these rows that need to be ensured to be correctly displayed. The Gate signals for other rows are inserted at equal time intervals between these rows that need to be ensured to be correctly displayed. The data is randomly inserted by relying on the data transformation between the rows that need to be ensured to be correctly displayed, and finally the display of the current frame is achieved.

[0051] The embodiment of the disclosure selects some from all pixel rows as the first type of pixel rows that can be ensured to be correctly displayed for a display product with high PPI and high refresh rate. As long as the data writing for these pixel rows is correct and there is written content for the other second type of pixel rows, the display screen will not show abnormal displays that can be recognized by the naked eye of users, and the user experience is good.

[0052] The second embodiment of the disclosure provides a data writing device, and the structural schematic diagram of the device is as Figure 8 shown, including:

[0053] A first determination module 10, configured to determine a plurality of first type of pixel rows according to a predetermined rule, where the first type of pixel rows are the pixel rows that need to be correctly displayed in the current frame; a second determination module 20, coupled to the first determination module 10, configured to determine the time difference between the writing times of the first data signals corresponding to two adjacent first type of pixel rows; a third determination module 30, coupled to the second determination module 20, configured to determine the number of second type of pixel rows included between two adjacent first type of pixel rows, where the second type of pixel rows are other pixel rows except the first type of pixel rows; a fourth determination module 40, coupled to the third determination module 30, configured to determine the writing times of the second data signals corresponding to each of the second type of pixel rows included between two adjacent first type of pixel rows according to the time difference and the number of second type of pixel rows; an execution module 50, coupled to the fourth determination module 40, configured to write a first gate pulse signal to the first type of pixel rows at the writing time of the first data signal, and write a second gate pulse signal to the second type of pixel rows at the writing time of the second data signal, so as to refresh the display data of the current frame according to the first gate pulse signal and the second gate pulse signal.

[0054] The above first determination module may include any one or more of the following units as needed: a first determination unit, configured to divide all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not consecutive, and N is an integer greater than 1; determine a predetermined group of pixel rows among the N groups of pixel rows as multiple first-type pixel rows of the current frame; a second determination unit, configured to divide all pixel rows into N groups according to the row numbers of the pixel rows; select a group of pixel rows that has not been selected in the previous N-1 frames from the group numbers of the N groups of pixel rows as multiple first-type pixel rows of the current frame; a third determination unit, configured to determine that the number of second-type pixel rows between two adjacent first-type pixel rows is M, where M is an integer greater than 0 and less than 6.

[0055] Specifically, the above fourth determination module is configured to: determine the time interval for writing the second data signal for each second-type pixel row according to the quotient of the time difference divided by the number of second-type pixel rows; determine the writing time of the second data signal for each second-type pixel row according to the time interval and the writing time of the first data signal of the first first-type pixel row, where the first first-type pixel row is the first-type pixel row with an earlier writing time of the first data signal among the two adjacent first-type pixel rows for determining the time difference.

[0056] In implementation, the predetermined rule in the embodiments of the present disclosure may be any rule. For example, some pixel rows are randomly determined as first-type pixel rows, or the predetermined rule may be formulated according to certain display requirements, etc.

[0057] When the predetermined rule is to randomly select some pixel rows, since a better display effect is to insert second-type pixel rows between the first-type pixel rows, preferably, the row numbers of the first-type pixel rows are not consecutive, and the number of second-type pixel rows between two adjacent first-type pixel rows is M. The number of second-type pixel rows between any pair of adjacent first-type pixel rows may be the same or different. For example, if the row numbers of the first-type pixel rows are 1, 3, 7, 10..., then there is only one second-type pixel row between row numbers 1 and 3, there are three second-type pixel rows 4, 5, 6 between row numbers 3 and 7, and there are two second-type pixel rows 8 and 9 between row numbers 7 and 10; again, for example, if the row numbers of the first-type pixel rows are 1, 5, 9, 13..., then there are three second-type pixel rows 2, 3, 4 between row numbers 1 and 5, there are three second-type pixel rows 6, 7, 8 between row numbers 5 and 9, and there are three second-type pixel rows 10, 11, 12 between row numbers 9 and 13. In implementation, to ensure the visual effect, M is preferably an integer greater than 0 and less than 6.

[0058] The above-mentioned randomly selecting some pixel rows is just one kind of predetermined rules. When determining multiple first-type pixel rows according to the predetermined rules, all pixel rows can also be divided into N groups according to the row numbers of the pixel rows, and then determine the predetermined group of pixel rows in the N groups of pixel rows as the multiple first-type pixel rows of the current frame, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1. In this process, the first-type pixel rows can be any group of pixel rows in the N groups of pixel rows. For example, if the pixel rows are divided into three groups, the row numbers of the first group are 1, 4, 7, 10...; the row numbers of the second group are 2, 5, 8, 11...; the row numbers of the third group are 3, 6, 9, 12..., then any group of pixel rows can be selected as the first-type pixel rows.

[0059] To ensure that the display panel does not lose data of odd or even rows during display, for the case of dividing into N groups of pixel rows, the embodiments of the present disclosure can also select a group of pixel rows that have not been selected in the previous N - 1 frames from the group numbers of the N groups of pixel rows as the multiple first-type pixel rows of the current frame, that is, a group of pixel rows will be reselected for each frame of image, and the pixel rows selected in consecutive N frames of images are not repeated. When all N groups of pixel rows divided are polled and selected after N frames of images, then repeat the second round of selection, that is, select in sequence according to the group numbers of the N groups of pixel rows frame by frame as the multiple first-type pixel rows. For example, if the pixel rows are divided into three groups, the row numbers of the first group are 1, 4, 7, 10...; the row numbers of the second group are 2, 5, 8, 11...; the row numbers of the third group are 3, 6, 9, 12..., then the first frame of image selects the first group of row numbers, the second frame of image selects the second group of row numbers, the third frame of image selects the third group of row numbers, the fourth frame of image selects the first group of row numbers, the fifth frame of image selects the second group of row numbers, the sixth frame of image selects the third group of row numbers, etc., and all grouped pixel rows are repeated every three frames. Of course, the group numbers of the groups selected by the first frame of image and the fourth frame of image can be different, as long as all grouped pixel rows are repeated every three frames.

[0060] For example, the row numbers of two adjacent first-type pixel rows are 1 and 4 respectively. The write time of the first data signal of the first-type pixel row with row number 1 is t1 (the duration of the write operation is the write time period, and usually the time period from the current time to the arrival time of the write time of the next pixel row is called the write time period of a pixel row data signal). The write time of the first data signal of the first-type pixel row with row number 4 is t2, then the time difference is t2 - t1. The row numbers of the second-type pixel rows included between two adjacent first-type pixel rows are 2 and 3, then the number of second-type pixel rows is two. The time interval for writing the second data signal for each second-type pixel row is (t2 - t1) / (2 + 1). Then the write time of the second data signal of the second-type pixel row with row number 2 is t1 + (t2 - t1) / 3, and the write time of the second data signal of the second-type pixel row with row number 3 is t1 + (t2 - t1)2 / 3.

[0061] The time difference between two adjacent first - type pixel rows is used for writing the second data signal corresponding to the second - type pixel rows. Therefore, when determining the time interval for writing the second data signal for each second - type pixel row, it is necessary to calculate the time interval in the way of (t2 - t1) / (quantity + 1).

[0062] After the refresh rate is determined, the writing time for each row is also determined. At high resolutions, it is impossible to ensure that the data writing for each row is accurate. Therefore, the present disclosure embodiment proposes a data insertion scheme, that is, before the start of each frame (which can be achieved by an algorithm to implement a predetermined rule), determine the rows that need to be ensured to be correctly displayed (ensure that the data writing for these rows is correct), then output the corresponding Gate signal timing according to these rows that need to be ensured to be correctly displayed, and insert the Gate signals of other rows at equal time intervals between these rows that need to be ensured to be correctly displayed. The data is randomly inserted by relying on the data transformation between the rows that need to be ensured to be correctly displayed, and finally the display of the current frame is realized.

[0063] The embodiment of the present disclosure selects some from all pixel rows as the first - type pixel rows that can be ensured to be correctly displayed for a display product with high PPI and high refresh rate. As long as the data writing for these pixel rows is correct and there is written content for other second - type pixel rows, the display screen will not show abnormal displays that can be recognized by the naked eye of users, and the user experience is good.

[0064] The third embodiment of the present disclosure provides a storage medium, which is a computer - readable medium and stores a computer program. When the computer program is executed by a processor, it implements the method provided in any embodiment of the present disclosure, including the following steps S11 to S15:

[0065] S11, determine a plurality of first - type pixel rows according to a predetermined rule, where the first - type pixel rows are the pixel rows that need to be correctly displayed in the current frame;

[0066] S12, determine the time difference between the writing times of the first data signals corresponding to two adjacent first - type pixel rows;

[0067] S13, determine the number of second - type pixel rows included between two adjacent first - type pixel rows, where the second - type pixel rows are other pixel rows except the first - type pixel rows;

[0068] S14, determine the writing times of the second data signals corresponding to each second - type pixel row included between two adjacent first - type pixel rows according to the time difference and the number of second - type pixel rows;

[0069] S15. Write a first gate pulse signal to the first type of pixel rows during the first data signal writing time, and write a second gate pulse signal to the second type of pixel rows during the second data signal writing time, so as to refresh the display data of the current frame according to the first gate pulse signal and the second gate pulse signal.

[0070] When the computer program is executed by the processor to determine multiple first type of pixel rows according to a predetermined rule, the processor is specifically further executed as follows: divide all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; determine a predetermined group of pixel rows in the N groups of pixel rows as multiple first type of pixel rows of the current frame.

[0071] When the computer program is executed by the processor to determine multiple first type of pixel rows according to a predetermined rule, the processor is specifically further executed as follows: divide all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; select a group of pixel rows that have not been selected in the previous N - 1 frames from the group numbers of the N groups of pixel rows as multiple first type of pixel rows of the current frame.

[0072] When the computer program is executed by the processor to determine multiple first type of pixel rows according to a predetermined rule, the processor is specifically further executed as follows: determine that the number of second type of pixel rows between two adjacent first type of pixel rows is M, where M is an integer greater than 0 and less than 6.

[0073] When the computer program is executed by the processor to determine the second data signal writing time corresponding to each second type of pixel row included between two adjacent first type of pixel rows according to the time difference and the number of second type of pixel rows, the processor is specifically further executed as follows: determine the time interval for writing the second data signal to each second type of pixel row according to the quotient of the time difference divided by the number of second type of pixel rows; determine the second data signal writing time of each second type of pixel row according to the time interval and the first data signal writing time of the first first type of pixel row, where the first first type of pixel row is the first type of pixel row with an earlier first data signal writing time among the two adjacent first type of pixel rows for determining the time difference.

[0074] Embodiments of the present disclosure are directed to display products with high PPI and high refresh rate. Some are selected from all pixel rows as the first type of pixel rows to ensure their correct display. As long as the data writing of these pixel rows is correct and there is written content in other second type of pixel rows, the display screen will not show abnormal display that can be recognized by the naked eye of the user, and the user experience is better.

[0075] Optionally, in this embodiment, the above storage medium may include, but is not limited to: various media such as USB flash drives, read-only memories (ROMs), random access memories (RAMs), mobile hard disks, magnetic disks, or optical discs that can store program codes. Optionally, in this embodiment, the processor executes the method steps described in the above embodiment according to the program codes stored in the storage medium. Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiment and optional implementation manners, and will not be elaborated herein. Obviously, those skilled in the art should understand that the above modules or steps of the present disclosure can be implemented by a general-purpose computing device. They can be concentrated on a single computing device or distributed on a network composed of multiple computing devices. Optionally, they can be implemented by program codes executable by the computing device. Thus, they can be stored in the storage device and executed by the computing device. And in some cases, the steps shown or described can be executed in a different order than here, or they can be separately fabricated into individual integrated circuit modules, or multiple modules or steps among them can be fabricated into a single integrated circuit module to implement. In this way, the present disclosure is not limited to any specific combination of hardware and software.

[0076] The fourth embodiment of the present disclosure provides an electronic device. The structural schematic diagram of the electronic device can be as Figure 9 shown, and at least includes a memory 901 and a processor 902. A computer program is stored on the memory 901. When the processor 902 executes the computer program on the memory 901, the method provided in any embodiment of the present disclosure is implemented. Exemplarily, the computer program steps of the electronic device are as follows from S21 to S25:

[0077] S21. Determine a plurality of first-class pixel rows according to a predetermined rule, where the first-class pixel rows are the pixel rows that need to be correctly displayed in the current frame;

[0078] S22. Determine the time difference between the write times of the first data signals corresponding to two adjacent first-class pixel rows;

[0079] S23. Determine the number of second-class pixel rows included between two adjacent first-class pixel rows, where the second-class pixel rows are other pixel rows except the first-class pixel rows;

[0080] S24. Determine the write times of the second data signals corresponding to each of the second-class pixel rows included between two adjacent first-class pixel rows according to the time difference and the number of second-class pixel rows;

[0081] S25. Write a first gate pulse signal to the first type of pixel rows during the first data signal writing time, and write a second gate pulse signal to the second type of pixel rows during the second data signal writing time, so as to refresh the display data of the current frame according to the first gate pulse signal and the second gate pulse signal.

[0082] When the processor executes a computer program stored in a memory for determining multiple first type of pixel rows according to a predetermined rule, the following computer program is specifically executed: divide all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; determine a predetermined group of pixel rows in the N groups of pixel rows as the multiple first type of pixel rows of the current frame.

[0083] When the processor executes a computer program stored in a memory for determining multiple first type of pixel rows according to a predetermined rule, the following computer program is specifically executed: divide all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; select a group of pixel rows that have not been selected in the previous N - 1 frames from the group numbers of the N groups of pixel rows as the multiple first type of pixel rows of the current frame.

[0084] When the processor executes a computer program stored in a memory for determining multiple first type of pixel rows according to a predetermined rule, the following computer program is specifically executed: determine that the number of second type of pixel rows between two adjacent first type of pixel rows is M, where M is an integer greater than 0 and less than 6.

[0085] When the processor executes a computer program stored in a memory for determining the second data signal writing time corresponding to each of the second type of pixel rows included between two adjacent first type of pixel rows according to the time difference and the number of second type of pixel rows, the following computer program is specifically executed: determine the time interval for writing the second data signal to each of the second type of pixel rows according to the quotient of the time difference divided by the number of second type of pixel rows; determine the second data signal writing time of each of the second type of pixel rows according to the time interval and the first data signal writing time of the first first type of pixel row, where the first first type of pixel row is the first type of pixel row with an earlier first data signal writing time among the two adjacent first type of pixel rows for determining the time difference.

[0086] Embodiments of the present disclosure are directed to display products with high PPI and high refresh rate. Some are selected from all pixel rows as the first type of pixel rows to ensure correct display. As long as the data writing of these pixel rows is correct and there is written content in other second type of pixel rows, the display screen will not show abnormal display that can be recognized by the naked eye of users, and the user experience is good.

[0087] Moreover, although exemplary embodiments have been described herein, the scope includes any and all embodiments based on the present disclosure having equivalent elements, modifications, omissions, combinations (e.g., schemes that cross various embodiments), adaptations, or alterations. The elements in the claims will be construed broadly based on the language employed in the claims and are not limited to the examples described in this specification or during the implementation of this application, and the examples will be construed as non-exclusive. Thus, this specification and the examples are intended to be considered only as examples, and the true scope and spirit are indicated by the following claims and the full scope of their equivalents.

[0088] The above description is intended to be illustrative rather than restrictive. For example, the above examples (or one or more of them) can be used in combination with each other. For example, those of ordinary skill in the art can use other embodiments when reading the above description. Additionally, in the above detailed description, various features can be grouped together to simplify the present disclosure. This should not be construed as an intention that the disclosed features not claimed are necessary for any claim. On the contrary, the subject matter of the present disclosure can be less than all the features of a particular disclosed embodiment. Thus, the following claims are incorporated herein as examples or embodiments into the detailed description, where each claim independently serves as a separate embodiment, and it is contemplated that these embodiments can be combined with each other in various combinations or permutations. The scope of the present disclosure should be determined with reference to the appended claims and the full scope of the equivalent forms empowered by these claims.

[0089] The above has described multiple embodiments of the present disclosure in detail, but the present disclosure is not limited to these specific embodiments. Those skilled in the art can make various variations and modifications to the embodiments based on the concept of the present disclosure, and these variations and modifications should all fall within the scope claimed by the present disclosure.< / n> < / n>

Claims

1. A method for writing data, characterized in that Including: Determining a plurality of first - type pixel rows according to a predetermined rule, where the first - type pixel rows are the pixel rows that need to be correctly displayed in the current frame; Determining the time difference between the write times of the first data signals corresponding to two adjacent first - type pixel rows; Determining the number of second - type pixel rows included between two adjacent first - type pixel rows, where the second - type pixel rows are other pixel rows except the first - type pixel rows; Determining the write times of the second data signals corresponding to each of the second - type pixel rows included between two adjacent first - type pixel rows according to the time difference and the number of second - type pixel rows; Writing a first gate pulse signal to the first - type pixel rows at the write time of the first data signal, and writing a second gate pulse signal to the second - type pixel rows at the write time of the second data signal, so as to refresh the display data of the current frame according to the first gate pulse signal and the second gate pulse signal.

2. The method according to claim 1, characterized in that The determining a plurality of first - type pixel rows according to a predetermined rule includes: Dividing all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; Determining a predetermined group of pixel rows in the N groups of pixel rows as the plurality of first - type pixel rows of the current frame.

3. The method according to claim 1, wherein The determining a plurality of first - type pixel rows according to a predetermined rule includes: Dividing all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; Selecting a group of pixel rows that have not been selected in the previous N - 1 frames from the group numbers of the N groups of pixel rows as the plurality of first - type pixel rows of the current frame.

4. The method according to claim 1, wherein The determining a plurality of first - type pixel rows according to a predetermined rule includes: Determining that the number of second - type pixel rows between two adjacent first - type pixel rows is M, where M is an integer greater than 0 and less than 6.

5. The method according to any one of claims 1 to 4, characterized in that The determining the write times of the second data signals corresponding to each of the second - type pixel rows included between two adjacent first - type pixel rows according to the time difference and the number of second - type pixel rows includes: Determining the time interval for writing the second data signal to each of the second - type pixel rows according to the quotient of the time difference divided by the number of second - type pixel rows; Determining the write times of the second data signals of each of the second - type pixel rows according to the time interval and the write time of the first data signal of the first first - type pixel row, where the first first - type pixel row is the first - type pixel row with an earlier write time of the first data signal among the two adjacent first - type pixel rows for which the time difference is determined.

6. A data writing device, characterized in that, Including: A first determination module for determining a plurality of first - type pixel rows according to a predetermined rule, where the first - type pixel rows are the pixel rows that need to be correctly displayed in the current frame; A second determination module for determining the time difference between the write times of the first data signals corresponding to two adjacent first - type pixel rows; A third determination module for determining the number of second - type pixel rows included between two adjacent first - type pixel rows, where the second - type pixel rows are other pixel rows except the first - type pixel rows; A fourth determination module, configured to determine the write times of second data signals corresponding to each of the second type of pixel rows included between two adjacent first type of pixel rows according to the time difference and the number of the second type of pixel rows; An execution module, configured to write a first gate pulse signal to the first type of pixel rows at the first data signal write time, and write a second gate pulse signal to the second type of pixel rows at the second data signal write time, so as to refresh the display data of the current frame according to the first gate pulse signal and the second gate pulse signal.

7. The device according to claim 6, characterized in that, The first determination module includes: A first determination unit, configured to divide all pixel rows into N groups according to the row numbers of the pixel rows, where the row numbers corresponding to each group of pixel rows are not continuous, and N is an integer greater than 1; determine a predetermined group of pixel rows in the N groups of pixel rows as the multiple first type of pixel rows of the current frame; A second determination unit, configured to divide all pixel rows into N groups according to the row numbers of the pixel rows; select a group of pixel rows that have not been selected in the previous N - 1 frames from the group numbers of the N groups of pixel rows as the multiple first type of pixel rows of the current frame; A third determination unit, configured to determine that the number of second type of pixel rows between two adjacent first type of pixel rows is M, where M is an integer greater than 0 and less than 6.

8. The device according to claim 6 or 7, characterized in that, The fourth determination module is specifically configured to: Determine the time interval for writing the second data signal to each of the second type of pixel rows according to the quotient of the time difference divided by the number of the second type of pixel rows; Determine the write times of the second data signals of each of the second type of pixel rows according to the time interval and the write time of the first data signal of the first first type of pixel row, where the first first type of pixel row is the first type of pixel row with an earlier write time of the first data signal among the two adjacent first type of pixel rows for determining the time difference.

9. A storage medium stores a computer program, characterized in that, When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

10. A computer device, at least including a memory and a processor, wherein a computer program is stored on the memory, characterized in that, When the processor executes the computer program on the memory, the steps of the method according to any one of claims 1 to 5 are implemented.

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