Pixel switch control circuit, pixel unit and display panel
By introducing a current release circuit and a control circuit into the TFT-LCD, and using a reference voltage to control the conduction and cutoff of the current release circuit, the problem of screen flickering during shutdown caused by the parasitic capacitance of the pixel switch is solved, and the shutdown stability of the display is improved.
Patent Information
- Application Number
- CN202211482514.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-24
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2042-11-24
AI Technical Summary
TFT-LCD displays experience screen flickering when powered off due to parasitic capacitance in the pixel switches, a problem that is difficult to effectively solve with existing technologies.
By employing a combination of current release circuit and control circuit, the current release circuit is turned on and off by controlling the reference voltage, thereby releasing the residual charge between the pixel switch control terminal and the output terminal and reducing the impact of parasitic capacitance.
It effectively reduces the probability of TFT-LCD screen flickering when shutting down, ensures that the pixel switches do not reopen due to residual charge when the screen is turned off, and improves the shutdown stability of the display.
Smart Images

Figure CN116403538B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a pixel switch control circuit, a pixel unit and a display panel. Background Art
[0002] As liquid crystal display technology continues to mature, Thin Film Transistor-Liquid Crystal Display (TFT-LCD) has been widely used in various fields due to its advantages such as light weight, small size, low power consumption, no radiation, and high display resolution.
[0003] In TFT-LCD, each pixel has a pixel switch. When the display is turned off, each pixel switch is turned off. However, the parasitic capacitance between the gate and source of the pixel switch may turn the pixel switch back on, causing the display to flicker when it is turned off. Summary of the invention
[0004] In view of this, the present application provides a pixel switch control circuit, a pixel unit and a display panel, so as to reduce the probability of screen flickering when the TFT-LCD is turned off due to the parasitic capacitance of the pixel switch.
[0005] In order to achieve the above-mentioned purpose, in a first aspect, an embodiment of the present application provides a pixel switch control circuit, including: a current release circuit, a control circuit and a reference power supply;
[0006] The input end of the current release circuit is electrically connected to the output end of the pixel switch, the output end of the current release circuit is grounded, and the control end of the current release circuit is electrically connected to the output end of the control circuit;
[0007] One input terminal of the control circuit is electrically connected to the control terminal of the pixel switch, and another input terminal of the control circuit is electrically connected to the reference power supply; the reference power supply is used to input a reference voltage to the control circuit;
[0008] The control circuit is used to control the current release circuit to be turned on when the voltage at the control end of the pixel switch is less than the reference voltage; and to control the current release circuit to be turned off when the voltage at the control end of the pixel switch is greater than the reference voltage.
[0009] As an optional implementation of the embodiment of the present application, the current release circuit includes a switch circuit and a protection circuit;
[0010] The input end of the switch circuit is electrically connected to the output end of the pixel switch, the output end of the switch circuit is grounded through the protection circuit, and the control end of the switch circuit is electrically connected to the output end of the control circuit.
[0011] As an optional implementation of the embodiment of the present application, the protection circuit includes a protection resistor, and the output end of the switch circuit is grounded through the protection resistor.
[0012] As an optional implementation of the embodiment of the present application, the switching circuit includes a switching tube; the first pole of the switching tube is electrically connected to the output end of the pixel switch, the second pole of the switching tube is grounded through the protection circuit, and the control pole of the switching tube is electrically connected to the output end of the control circuit.
[0013] As an optional implementation of the embodiment of the present application, the switch tube is an NMOS tube, the drain of the NMOS tube is electrically connected to the output end of the pixel switch, the source of the NMOS tube is grounded through the protection circuit, and the gate of the NMOS tube is electrically connected to the output end of the control circuit.
[0014] As an optional implementation of the embodiment of the present application, the control circuit includes a voltage comparator, one input end of the voltage comparator is electrically connected to the control end of the pixel switch, the other input end of the voltage comparator is electrically connected to the reference power supply, and the output end of the voltage comparator is electrically connected to the control end of the current release circuit.
[0015] As an optional implementation of the embodiment of the present application, the control circuit includes a PMOS tube, the gate of the PMOS is electrically connected to the control end of the pixel switch, the source of the PMOS is electrically connected to the reference power supply, and the drain of the PMOS is electrically connected to the control end of the current release circuit.
[0016] As an optional implementation of the embodiment of the present application, the control end of the pixel switch is electrically connected to the output end of the gate line, the input end of the pixel switch is electrically connected to the output end of the data line, and the output end of the pixel switch is electrically connected to the common electrode through a pixel capacitor.
[0017] In a second aspect, an embodiment of the present application provides a pixel unit, including a pixel switch, a pixel capacitor, and a pixel switch control circuit as described in any embodiment of the first aspect above.
[0018] In a third aspect, an embodiment of the present application provides a display panel, comprising an array substrate and a color filter substrate arranged relatively to each other, and a liquid crystal layer located between the array substrate and the color filter substrate, wherein a plurality of pixel units as described in the second aspect above are arranged on the array substrate.
[0019] The pixel switch control circuit, pixel unit and display panel provided in the embodiments of the present application include: a current release circuit, a control circuit and a reference power supply; the input end of the current release circuit is electrically connected to the output end of the pixel switch, the output end of the current release circuit is grounded, and the control end of the current release circuit is electrically connected to the output end of the control circuit; one input end of the control circuit is electrically connected to the control end of the pixel switch, and the other input end of the control circuit is electrically connected to the reference power supply, the reference power supply is used to input a reference voltage to the control circuit, and the control circuit is used to control the current release circuit to be turned on when the voltage at the control end of the pixel switch is less than the reference voltage; when the voltage at the control end of the pixel switch is greater than the reference voltage, the current release circuit is controlled to be turned off. In the above technical scheme, when the pixel switch is turned on, since the voltage at the control end of the pixel switch is higher and greater than the reference voltage, the control circuit controls the current release circuit to turn off, and the pixel switch works normally; when the display screen is turned off, the pixel switch is turned off, since the voltage at the control end of the pixel switch is lower and less than the reference voltage, the control circuit controls the current release circuit to turn on, so that the residual charge generated between the control end and the output end of the pixel switch due to the parasitic capacitance can be released through the current release circuit, and the pixel switch will not be reopened due to the residual charge. Therefore, this scheme can reduce the probability of TFT-LCD shutdown screen flashing caused by the parasitic capacitance of the pixel switch. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of the present application;
[0021] Figure 2 A schematic diagram of the structure of an array substrate provided in an embodiment of the present application;
[0022] Figure 3 A schematic diagram of the structure of any pixel unit in the array substrate provided in an embodiment of the present application;
[0023] Figure 4 for Figure 3 A circuit structure schematic diagram of a pixel switch control circuit;
[0024] Figure 5 for Figure 3 Another circuit structure schematic diagram of the pixel switch control circuit. DETAILED DESCRIPTION
[0025] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation method section of the embodiments of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.
[0026] Figure 1A schematic diagram of the structure of a display panel provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the display panel may include: an array substrate 1 , a color filter substrate 2 and a liquid crystal layer 3 .
[0027] The array substrate 1 and the color filter substrate 2 are arranged opposite to each other, and the liquid crystal layer 3 is located between the array substrate 1 and the color filter substrate 2 .
[0028] Figure 2 A schematic diagram of the structure of the array substrate provided in the embodiment of the present application is shown in FIG. Figure 2 As shown, the array substrate 1 may include: a plurality of gate lines Gate, a plurality of data lines Data and a plurality of pixel units P.
[0029] The pixel units P may be arranged in an array, each gate line Gate may be electrically connected to the pixel units P in a corresponding row, and each data line Data may be electrically connected to the pixel units P in a corresponding column.
[0030] Display panels with different resolutions may have different numbers of rows and columns of pixel units P, which is not specifically limited in this embodiment.
[0031] Various other electronic components may also be integrated on the array substrate 1 to implement complex circuit functions, which is not specifically limited in this embodiment.
[0032] Figure 3 A schematic diagram of the structure of any pixel unit in the array substrate provided in the embodiment of the present application, such as Figure 3 As shown, the pixel unit P may include: a pixel switch 10 , a pixel capacitor 20 and a pixel switch control circuit 30 .
[0033] The pixel switch 10 may be a thin film transistor (TFT), a triode, a metal-oxide-semiconductor (MOS), etc. In the following description of this embodiment, the pixel switch 10 is TFT as an example for illustrative description.
[0034] The control end of the pixel switch 10 can be electrically connected to the gate line Gate, the input end of the pixel switch 10 can be electrically connected to the data line Data, and the output end of the pixel switch 10 can be electrically connected to one end of the pixel capacitor 20 and the input end of the pixel switch control circuit 30. The other end of the pixel capacitor 20 is electrically connected to the common electrode Vcom.
[0035] The pixel switch control circuit 30 may include a current release circuit 31 , a control circuit 32 , and a reference power source 33 .
[0036] An input end of the current release circuit 31 is electrically connected to an output end of the pixel switch 10 , an output end of the current release circuit 31 is grounded, and a control end of the current release circuit 31 is electrically connected to an output end of the control circuit 32 .
[0037] The current release circuit 31 may include a switch circuit 311 and a protection circuit 312, wherein the input end of the switch circuit 311 is electrically connected to the output end of the pixel switch, the output end of the switch circuit 311 is grounded through the protection circuit 312, and the control end of the switch circuit 311 is electrically connected to the output end of the control circuit.
[0038] One input end of the control circuit 32 is electrically connected to the control end of the pixel switch 10, and the other input end of the control circuit 32 is electrically connected to the output end of the reference power supply 33. The reference power supply 33 is used to input a reference voltage to the control circuit 32. The control circuit 32 is used to control the current release circuit 31 to be turned on when the voltage at the control end of the pixel switch 10 is less than the reference voltage; and to control the current release circuit 31 to be turned off when the voltage at the control end of the pixel switch 10 is greater than the reference voltage.
[0039] When the pixel switch 10 is turned on, since the voltage at the control end of the pixel switch 10 is higher and greater than the reference voltage, the control circuit 32 controls the current release circuit 31 to turn off, and the pixel switch 10 works normally; when the display screen is turned off, the pixel switch 10 is turned off. Since the voltage at the control end of the pixel switch 10 is very low and less than the reference voltage, the control circuit 32 controls the current release circuit 31 to turn on, so that the residual charge generated between the control end and the output end of the pixel switch 10 due to the parasitic capacitance can be released through the current release circuit 31, and the pixel switch 10 will not be reopened due to the residual charge. Therefore, this solution can solve the problem of TFT-LCD screen flashing when it is turned off due to the parasitic capacitance of the pixel switch 10.
[0040] When the pixel switch 10 is turned on, the voltage at the control end of the pixel switch 10 is usually a fixed value, and there will be a certain difference between the lowest turn-on voltage of the pixel switch 10. For example, if the lowest turn-on voltage of the pixel switch 10 is 3V, the voltage at the control end of the pixel switch 10 when the pixel switch 10 is turned on may be 5V. The reference voltage output by the reference power supply 33 may be between the lowest turn-on voltage of the pixel switch 10 and the voltage at the control end of the pixel switch 10 when the pixel switch 10 is turned on, for example, 4.5V. In this way, when the pixel switch 10 is turned on, the voltage at the control end of the pixel switch 10 (5V) is greater than the reference voltage (4.5V), and the control circuit 32 controls the current release circuit 31 to turn off; when the pixel switch 10 is turned off, the voltage at the control end of the pixel switch 10 decreases (for example, to 1V), which is less than the reference voltage, and the control circuit 32 controls the current release circuit 31 to turn on.
[0041] Figure 4 for Figure 3A circuit structure diagram of a pixel switch control circuit in FIG. Figure 4 As shown, the gate of the pixel switch T1 is electrically connected to the output end of the gate line Gate, the drain of the pixel switch T1 is electrically connected to the output end of the data line Data, and the source of the pixel switch T1 is electrically connected to the common electrode Vcom and the input end of the current release circuit 31 through the pixel capacitor 20.
[0042] The pixel capacitor 20 may include a liquid crystal capacitor C1 and a storage capacitor C2. When the pixel switch T1 is turned on, the data line Data charges the liquid crystal capacitor C1 and the storage capacitor C2 through the pixel switch T1. When the pixel switch T1 is turned off, the storage capacitor C2 is discharged to maintain the electric field of the liquid crystal capacitor C1, so that the liquid crystal in the liquid crystal capacitor C1 maintains a rotating or non-rotating state.
[0043] The protection circuit 312 may include a protection resistor R1 , and the output end of the switch circuit 311 is grounded through the protection resistor R1 .
[0044] The switch circuit 311 may include a switch tube T2 , a first electrode of the switch tube T2 is electrically connected to the output end of the pixel switch T1 , a second electrode of the switch tube T2 is grounded via a protection resistor R1 , and a control electrode of the switch tube T2 is electrically connected to the output end of the control circuit 32 .
[0045] The switch tube T2 may be a MOS tube or a triode. In the following description of this embodiment, the switch tube T2 is taken as a MOS tube as an example.
[0046] Specifically, when the switch tube T2 is an NMOS tube, the drain of the NMOS tube is electrically connected to the gate of the pixel switch T1 , the source of the NMOS tube is grounded through the protection resistor R1 , and the gate of the NMOS tube is electrically connected to the output end of the control circuit 32 .
[0047] When the pixel switch T1 is turned off, the gate voltage of the pixel switch T1 is less than the reference voltage, the control circuit 32 outputs a high potential voltage, the NMOS tube is turned on, and the residual charge generated between the gate and source of the pixel switch T1 due to the parasitic capacitance can be released through the current release circuit 31, and the pixel switch T1 will not be reopened due to the residual charge; when the pixel switch T1 is turned on, the gate voltage of the pixel switch T1 is greater than the reference voltage, the control circuit 32 outputs a low potential voltage, the NMOS tube is turned off, and the data line Data charges the liquid crystal capacitor C1 and the storage capacitor C2 normally through the pixel switch T1.
[0048] When the switch tube T2 is a PMOS tube, the source of the PMOS tube is electrically connected to the gate of the pixel switch T1 , the drain of the PMOS tube is grounded through the protection resistor R1 , and the gate of the PMOS tube is electrically connected to the output end of the control circuit 32 .
[0049] When the pixel switch T1 is turned off, the gate voltage of the pixel switch T1 is less than the reference voltage, the control circuit 32 outputs a low potential voltage, the PMOS tube is turned on, and the residual charge generated between the gate and source of the pixel switch T1 due to the parasitic capacitance is released through the current release circuit 31; when the pixel switch T1 is turned on, the gate voltage of the pixel switch T1 is greater than the reference voltage, the control circuit 32 outputs a high potential voltage, the PMOS tube is turned off, and the data line Data charges the liquid crystal capacitor C1 and the storage capacitor C2 normally through the pixel switch T1.
[0050] The control circuit 32 may include a voltage comparator Q1, one input end of the voltage comparator Q1 is electrically connected to the gate of the pixel switch T1, another input end of the voltage comparator Q1 is electrically connected to the reference power supply Vref, and an output end of the voltage comparator Q1 is electrically connected to the gate of the switch tube T2.
[0051] Specifically, when the switch tube T2 is an NMOS tube, the positive input terminal of the voltage comparator Q1 is electrically connected to the reference power supply Vref, and the negative input terminal of the voltage comparator Q1 is electrically connected to the gate of the pixel switch T1.
[0052] At this time, if the voltage at the negative input terminal of the voltage comparator Q1 is less than the voltage at the positive input terminal (that is, the gate voltage of the pixel switch T1 is less than the reference voltage), the voltage comparator Q1 outputs a high potential voltage, the NMOS tube is turned on, and the residual charge is released; if the voltage at the negative input terminal of the voltage comparator Q1 is greater than the voltage at the positive input terminal (that is, the gate voltage of the pixel switch T1 is greater than the reference voltage), the voltage comparator Q1 outputs a low potential voltage, and the NMOS tube is turned off.
[0053] When the switch tube T2 is a PMOS tube, the negative input terminal of the voltage comparator Q1 is electrically connected to the reference power supply Vref, and the positive input terminal of the voltage comparator Q1 is electrically connected to the gate of the pixel switch T1.
[0054] At this time, if the voltage at the positive input terminal of the voltage comparator Q1 is less than the voltage at the negative input terminal (that is, the gate voltage of the pixel switch T1 is less than the reference voltage), the voltage comparator Q1 outputs a low potential voltage, the PMOS tube is turned on, and the residual charge is released; if the voltage at the positive input terminal of the voltage comparator Q1 is greater than the voltage at the negative input terminal (that is, the gate voltage of the pixel switch T1 is greater than the reference voltage), the voltage comparator Q1 outputs a high potential voltage, and the PMOS tube is turned off.
[0055] Figure 5 for Figure 3 Another circuit structure diagram of the pixel switch control circuit is shown in FIG. Figure 5 As shown,
[0056] The control circuit 32 may further include a PMOS transistor T3 , a gate of the PMOS transistor T3 being electrically connected to the control end of the pixel switch T1 , a source of the PMOS transistor T3 being electrically connected to a reference power supply Vref, and a drain of the PMOS transistor T3 being electrically connected to the gate of the switch tube T2 .
[0057] When the pixel switch T1 is turned off, the gate voltage of the pixel switch T1 is less than the reference voltage, that is, the gate voltage of the PMOS tube T3 is less than the source voltage, the PMOS tube T3 is turned on, and the reference voltage is output to the gate of the switch tube T2, the switch tube T2 is turned on, and the residual charge generated between the gate and the source of the pixel switch T1 due to the parasitic capacitance is released through the current release circuit 31; when the pixel switch T1 is turned on, the gate voltage of the pixel switch T1 is greater than the reference voltage, that is, the gate voltage of the PMOS tube T3 is greater than the source voltage, the PMOS tube T3 is turned off, the switch tube T2 is turned off, and the data line Data is normally charged to the liquid crystal capacitor C1 and the storage capacitor C2 through the pixel switch T1.
[0058] Figure 5 The other circuits in the Figure 4 Similar, no further description is given here.
[0059] It is understood that the circuit modules illustrated in the embodiments of the present application do not constitute a specific limitation on the pixel switch control circuit. In other embodiments of the present application, the pixel switch control circuit may include more or fewer circuit modules than shown in the figure, or combine certain circuit modules, or split certain circuit modules. The illustrated circuit modules may be implemented in hardware, software, or a combination of software and hardware.
[0060] The pixel switch control circuit, pixel unit and display panel provided in the embodiments of the present application include: a current release circuit, a control circuit and a reference power supply; the input end of the current release circuit is electrically connected to the output end of the pixel switch, the output end of the current release circuit is grounded, and the control end of the current release circuit is electrically connected to the output end of the control circuit; one input end of the control circuit is electrically connected to the control end of the pixel switch, and the other input end of the control circuit is electrically connected to the reference power supply, the reference power supply is used to input a reference voltage to the control circuit, and the control circuit is used to control the current release circuit to be turned on when the voltage at the control end of the pixel switch is less than the reference voltage; when the voltage at the control end of the pixel switch is greater than the reference voltage, the current release circuit is controlled to be turned off. In the above technical scheme, when the pixel switch is turned on, since the voltage at the control end of the pixel switch is higher and greater than the reference voltage, the control circuit controls the current release circuit to turn off, and the pixel switch works normally; when the display screen is turned off, the pixel switch is turned off, since the voltage at the control end of the pixel switch is lower and less than the reference voltage, the control circuit controls the current release circuit to turn on, so that the residual charge generated between the control end and the output end of the pixel switch due to the parasitic capacitance can be released through the current release circuit, and the pixel switch will not be reopened due to the residual charge. Therefore, this scheme can reduce the probability of TFT-LCD shutdown screen flashing caused by the parasitic capacitance of the pixel switch.
[0061] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0062] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.
[0063] The naming or numbering of the steps in this application does not mean that the steps in the method flow must be executed in the time / logical sequence indicated by the naming or numbering. The named or numbered process steps can change the execution order according to the technical purpose to be achieved, as long as the same or similar technical effects can be achieved.
[0064] In the description of this application, unless otherwise specified, " / " indicates that the objects associated with each other are in an "or" relationship, for example, A / B can represent A or B; "and / or" in this application is merely a description of the association relationship between associated objects, indicating that three relationships may exist, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural.
[0065] Furthermore, in the description of this application, unless otherwise specified, "plurality" means two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.
[0066] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.
[0067] In addition, in the description of the present specification and the appended claims, the terms "first", "second", "third", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein.
[0068] References described in the specification of the present application to "one embodiment" or "some embodiments" etc. mean that one or more embodiments of the present application include a specific feature, structure or characteristic described in conjunction with the embodiment. Therefore, the phrases "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. appearing in different places in the specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways.
[0069] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A pixel switch control circuit, characterized in that: The pixel switch control circuit is applied to TFT-LCD, and includes: a current release circuit, a control circuit and a reference power supply; The current release circuit includes a switch circuit and a protection circuit; The input end of the switch circuit is electrically connected to the output end of the pixel switch, the output end of the switch circuit is grounded through the protection circuit, and the control end of the switch circuit is electrically connected to the output end of the control circuit; One input terminal of the control circuit is electrically connected to the control terminal of the pixel switch, and another input terminal of the control circuit is electrically connected to the reference power supply; the reference power supply is used to input a reference voltage to the control circuit; The control circuit is used to control the current release circuit to be turned on when the display screen of the TFT-LCD is turned off; and to control the current release circuit to be turned off when the voltage at the control end of the pixel switch is greater than the reference voltage, wherein when the display screen of the TFT-LCD is turned off, the voltage at the control end of the pixel switch is less than the reference voltage, and the pixel switch circuit is disconnected; The switch circuit comprises a switch tube; a first electrode of the switch tube is electrically connected to the output end of the pixel switch, a second electrode of the switch tube is grounded through the protection circuit, and a control electrode of the switch tube is electrically connected to the output end of the control circuit; The protection circuit includes a protection resistor, and the output end of the switch circuit is grounded through the protection resistor; The control circuit includes a voltage comparator, one input end of the voltage comparator is electrically connected to the control end of the pixel switch, the other input end of the voltage comparator is electrically connected to the reference power supply, and the output end of the voltage comparator is electrically connected to the control end of the current release circuit.
2. The pixel switch control circuit according to claim 1, characterized in that: The switch tube is an NMOS tube, the drain of the NMOS tube is electrically connected to the output end of the pixel switch, the source of the NMOS tube is grounded through the protection circuit, and the gate of the NMOS tube is electrically connected to the output end of the control circuit.
3. The pixel switch control circuit according to claim 1, characterized in that: The control circuit includes a PMOS tube, a gate of the PMOS is electrically connected to the control end of the pixel switch, a source of the PMOS is electrically connected to the reference power supply, and a drain of the PMOS is electrically connected to the control end of the current release circuit.
4. The pixel switch control circuit according to any one of claims 1 to 3, characterized in that: The control end of the pixel switch is electrically connected to the output end of the gate line, the input end of the pixel switch is electrically connected to the output end of the data line, and the output end of the pixel switch is electrically connected to the common electrode through a pixel capacitor.
5. A pixel unit, characterized in that: The invention comprises a pixel switch, a pixel capacitor and a pixel switch control circuit as claimed in any one of claims 1 to 4.
6. A display panel, characterized in that: It comprises an array substrate and a color filter substrate which are arranged opposite to each other, and a liquid crystal layer located between the array substrate and the color filter substrate, wherein a plurality of pixel units according to claim 5 are arranged on the array substrate.
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