Hyper-jerk circuit with relu and encryption method

By designing a ReLU memristor hyperjerk circuit, the initial state value is changed to generate complex dynamic behavior. This circuit is then applied to image encryption, solving the problems of insufficient initial value sensitivity and anti-decryption ability of memristor chaotic systems in image encryption. This achieves high security and encryption effect with a large key space.

CN116418479BActive Publication Date: 2026-04-17XUCHANG UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
XUCHANG UNIV
Filing Date
2023-03-15
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

In the existing technology, the initial value sensitivity, quasi-randomness and anti-decryption ability of memristor chaotic systems in the field of image encryption need to be improved, and there is little research on the application of ReLU function in memristor circuits.

Method used

A hyper-jerk circuit with ReLU was designed. By changing the initial state values ​​of the memristor circuit and the hyper-jerk circuit, a super-multi-stability behavior with different periodic states, stable point states, divergent states and chaotic states was generated. Combined with PSIM circuit simulation, it was applied to image encryption.

Benefits of technology

It achieves high security for image encryption, increases the key space, improves anti-decryption capabilities, and provides a theoretical foundation and technical support for memristor systems in the fields of artificial intelligence and information encryption.

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Abstract

This invention relates to the field of nonlinear circuit technology, and more particularly to a hyper-jerk circuit with ReLU and an encryption method, comprising a ReLU memristor circuit and a hyper-jerk circuit. By changing the initial values ​​of the ReLU memristor circuit and the hyper-jerk circuit, different periodic states, stable point states, divergent states, and chaotic states are generated, exhibiting super-multi-stability behavior. This invention enables the encryption sequence of the memristor chaotic system to have higher initial value sensitivity, stronger quasi-randomness, and continuous broadband power spectrum characteristics compared to traditional chaotic systems. Applying it to image encryption can effectively increase its key space and improve its anti-decryption capability.
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Description

Technical Field

[0001] This invention relates to the field of nonlinear circuit technology, and more particularly to hyper-jerk circuits with ReLU and encryption methods. Background Technology

[0002] The Rectified Linear Unit (ReLU) is a very simple bisegmental linear function. Applying it as an activation function to neural networks can effectively simplify analog hardware implementation. However, research on using the ReLU function as a memristor derivative to construct new memristor circuits is still limited. Meanwhile, due to the unique characteristics of memristors, the encryption sequences of memristor chaotic systems exhibit higher initial value sensitivity, stronger quasi-randomness, and a continuous broadband power spectrum compared to traditional chaotic systems. Applying it to image encryption can effectively increase its key space and improve its resistance to decryption. Summary of the Invention

[0003] To address the shortcomings of existing algorithms, this invention proposes a hyper-jerk circuit with ReLU, studies its complex dynamic behavior caused by initial state values, and performs PSIM circuit simulation based on the physical circuit. Finally, the newly proposed memristor hyper-jerk circuit is applied to image encryption, and its encryption performance is studied. The research results can establish a certain theoretical foundation and technical support for the application of memristor systems in artificial intelligence, information encryption and other fields.

[0004] The technical solution adopted in this invention is: a hyper-jerk circuit with ReLU includes a ReLU memristor circuit and a hyper-jerk circuit. By changing the initial state values ​​of the ReLU memristor circuit and the hyper-jerk circuit, a super multi-stability behavior with different periodic states, stable point states, divergent states and chaotic states is generated.

[0005] Furthermore, the hyper-jerk circuit includes: resistors R5-R 13 The circuit consists of multipliers M2-M3, operational amplifiers U3-U7, capacitors C2-C4, and a ReLU memristor circuit. The inverting input of U3 is connected to one end of resistors R5, R6, R7, R8, and capacitor C2. The other end of the parallel connection between R8 and C2 is connected to the output of U3 and one end of the ReLU memristor circuit. The other end of the ReLU memristor circuit is connected to the inverting input of U4 and one end of capacitor C3. The other end of C3 is connected to R... 12 and R 13 One end is connected; R 13 The other end is connected to the inverting input of U5 and one end of C4, respectively; the other end of C4 is connected to the output of U5 and R, respectively. 10 One end of R7 is connected; the other end of R7 is connected to the output of U6 and R... 11One end is connected; R 11 The other end is connected to the inverting input of U6 and R respectively. 12 The other end is connected; the other end of R6 is connected to the output of U7, the two inputs of M3, and one end of R9; the other end of R9 is connected to the inverting input of U7 and R... 10 The other end is connected; the other end of R5 is connected to the output of M2; one input of M2 is connected to R... 10 The other end of M2 is connected; the other end of the input of M2 is connected to the output of M3.

[0006] Furthermore, the ReLU memristor circuit includes: resistors R1-R4, capacitor C1, multiplier M1, Max module, and operational amplifiers U1-U2. The two ends of R1 and R4 are connected to a hyper-jerk circuit. One end of R1 is connected to the inverting input of U1 and one end of R2. The other end of R2 is connected to the output of U1 and one input of M1. The output of U1 is also connected to one end of R3, and the other end of R3 is connected to the inverting input of U2 and one end of C1. The other end of C1 is connected to the output of U2 and one input of the Max module. The output of the Max module is connected to the other input of M1. The output of M1 is connected to one end of R4. The non-inverting inputs of U1 and U2 are grounded. The other input of the Max module is grounded.

[0007] Furthermore, the equations for the hyper-jerk circuit are as follows:

[0008]

[0009] Among them, v1, v2, v3 and There are four circuit variables: R is the resistance, and C is the capacitance.

[0010] Furthermore, an encryption method using a hyper-jerk circuit with ReLU is employed, comprising the following steps:

[0011] Step 1: Read the original image and convert it to grayscale, saving the grayscale image P as a two-dimensional matrix of size M×N;

[0012] Step 2: Solve the equations of the hyper-jerk circuit using the Runge-Kutta method to obtain the chaotic sequence Sx1, Sx2, Sx3. The sequences Sx1 and Sx2 are placed into chaotic matrices B and D of size M×N using the equations B = reshape(Sx1, M, N) and D = reshape(Sx2, M, N), respectively. The chaotic sequence matrices after amplification and bias are obtained by using the formulas B1 = mod(B×k + B, 256) and D1 = mod(D×k + b, 256), where k is the amplification factor and b is the bias.

[0013] Step 3: Perform modulo operation on image P using the formulas C = mod(double(P) + B1, 256) and E = mod(double(P) + D1, 256) to obtain the key sequence m = unit8(C(:));

[0014] Step 4: Perform double-precision serialization on image P to obtain P'; perform XOR operation on serialized P' and key sequence m to obtain the diffused pseudo-random sequence CL, with the formula CL = bitxor(uint8(P'(i)),m(i));

[0015] Step 5: Obtain a pseudo-random sequence V = floor(E) + 1 by scrambling; use the equation U E =unique(V) yields S V Find the unique element in sequence A = [1, 2, ..., MN] but not in U. SV Extract the elements from the array, sort them in ascending order, and save them to U. E End of ; swap CL V (U E (i)) and CL V (U E (MN-i+1));

[0016] Step 6: Encrypt the one-dimensional image pixel sequence CL V Converting it into a two-dimensional matrix of size M×N yields an 8-bit unsigned encrypted image.

[0017] The beneficial effects of this invention are:

[0018] 1. A memristor hyperjerk circuit with a smooth rectified linear unit ReLU memristor circuit can control the coexistence behavior of multiple attractors by changing the initial value of the system state.

[0019] 2. When this circuit is applied to image encryption, the proposed encryption scheme has good security against a variety of possible attacks.

[0020] 3. The research findings can provide a theoretical foundation and technical support for the application of memristor systems in fields such as artificial intelligence and information encryption. Attached Figure Description

[0021] Figure 1 This is a hyper-jerk circuit diagram with ReLU;

[0022] Figure 2 This is the ReLU memristor circuit of the present invention;

[0023] Figure 3 This describes the coexistence attractor behavior under different initial conditions according to the present invention;

[0024] Figure 4 The PSIM circuit of this invention simulates the coexistence attractor behavior under different initial conditions;

[0025] Figure 5 This is a diagram illustrating the experimental process of Clock's image encryption scheme.

[0026] Figure 6 This is a diagram illustrating the key sensitivity analysis process using a Clock image.

[0027] Figure 7 It is a pair of adjacent pixels between the Clock image and its ciphertext image. Detailed Implementation

[0028] The present invention will be further described below with reference to the accompanying drawings and embodiments. The drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0029] like Figure 1 As shown, a hyper-jerk circuit with ReLU includes: resistors R5-R 13 The system consists of multipliers M2-M3, operational amplifiers U3-U7, capacitors C2-C4, and a ReLU memristor circuit W. The ReLU memristor circuit W includes resistors R1-R4, capacitor C1, multiplier M1, a Max module, and operational amplifiers U1-U2. The ends of R1 and R4 are connected to a hyper-jerk circuit. One end of R1 is connected to the inverting input of U1 and one end of R2. The other end of R2 is connected to the output of U1 and one input of M1. The output of U1 is also connected to one end of R3, and the other end of R3 is connected to... Connect the inverting input of U2 and one end of C1; connect the other end of C1 to the output of U2 and the input of the Max module; connect the output of the Max module to the other input of M1; connect the output of M1 to one end of R4; connect the inverting input of U3 to one end of R5, R6, R7, R8, and C2; connect the other end of C2 to the output of U3 and one end of the ReLU memristor circuit W; connect the other end of the ReLU memristor circuit W to the inverting input of U4 and one end of C3; connect the other end of C3 to R5, R6, R7, R8, and one end of ...3 to the other end of R4; connect the other end of C3 to the other end of R5, R6, R7, R8, and one end of C2; connect the other end of C3 to the other end of R5, R6, R7, R8, and one end of C2; connect the other end of C2 to the other end of the Max module and the other end of the Max module; connect the other end of the Max module to the other input of M1; connect the other end of M1 to one end of R4; connect the other end of U3 to the other end of the Max module; connect the other end of the Max module to the other input of M1; connect the other end of M1 to one end of R4; connect the other end of U3 to the other end of the Max module; connect the other end of the Max module to the other input of M1; connect the other end of M1 to one end of R4; connect the other end of U3 to the other end of the Max module; connect the other end of the Max module to the 12 and R 13 One end is connected; R 13 The other end is connected to the inverting input of U5 and one end of C4, respectively; the other end of C4 is connected to the output of U5 and R, respectively. 10 One end of R7 is connected; R8 and C2 are connected in parallel; the other end of R7 is connected to the output of U6 and R... 11 One end is connected; R 11 The other end connects to the inverting input of U6 and R 12The other end is connected; the other end of R6 is connected to the output of U7, the two inputs of M3, and one end of R9; the other end of R9 is connected to the inverting input of U7 and R... 10 The other end is connected; the other end of R5 is connected to the output of M2; one input of M2 is connected to R 10 The other end of M2 is connected; the other input of M2 is connected to the output of M3.

[0030] Figure 1 The system equations corresponding to the circuit contain four state variables: x1, x2, x3, and The four variables v in the corresponding circuit state equation x1 v x2 v x3 and

[0031] Mathematical Modeling: This invention is based on a three-dimensional autonomous jerk system, whose model can be described as follows:

[0032]

[0033] The second equation in equation (1) contains only one coupling term with a resistance coefficient of b.

[0034] Therefore, we consider replacing the resistance coefficient with the ReLU memderivative function of a smooth rectified linear unit, which is obtained from a memristor with a ReLU memderivative. This memristor can be described as follows:

[0035]

[0036] in, v and i represent the internal state variables, input voltage, and output current of the memristor, respectively, and the memderivative function. It can be represented as:

[0037]

[0038] Its circuit modules, such as Figure 2 As shown.

[0039] By introducing the aforementioned memristor into the system, a novel ReLU-type memristor hyper-jerk system can be established. This model can be described by a system of first-order ordinary differential equations:

[0040]

[0041] It is worth noting that when the system parameter a = 0.7 is fixed, as the initial state value IC = (x1(0), x2(0), x3(0), The model in equation (4) has different periodic states, stable point states, divergent states and chaotic states, exhibiting complex super-stability behavior.

[0042] Numerical simulation: When the initial state values ​​are (x1(0), x2(0), x3(0), When the initial state (10) changes, the dynamic behavior of a novel ReLU-type memristor hyperjerk system is numerically studied using the MATLAB ODE45 algorithm. -9 When (,0,0,16) and (-1.2,0,-0.5,25), Figure 3 (a) Describes the coexistence behavior of period 3 and period 2; when the initial state is (10 -9 ,0,-0.5,20) and (10 -9 When ,0,0,30), Figure 3 (b) Describes the coexistence behavior of chaotic single vortex and period 1. When the initial state is (10... -9 ,0,0,-1) and (10 -9 When , 0, -0.5, 0.4), Figure 3 (c) describes the coexistence behavior of point attractors and divergence. Figure 1 , 2 In the four-dimensional ReLU type memristor hyper-jerk system, the main circuit has four integration channels to implement the first, second, third, and fourth equations of equation (4); according to Kirchhoff's circuit laws and the electrical characteristics of circuit components, Figure 1 The circuit equation shown can be written as:

[0043]

[0044] Among them, v1, v2, v3 and There are four circuit variables; the time precision is 0.1ms, i.e., R 13 =R3=R4=10kΩ, C1=C2=C3=C4=10nF, thus, by comparing equation (4) and equation (5), we can obtain R7=R 13 / a=14.2857kΩ.

[0045] R1=R2=R5=R6=R8=R9=R 10 =R 11 =R 12 =10kΩ; the voltage gain of M1-M4 is 1.

[0046] To better capture the super-stability caused by the initial value in the ReLU type memristor hyper-jerk system (4) implementation circuit, PSIM software was used for simulation verification. For simplicity, a two-port Max module was directly selected in the PSIM simulation; refer to Figure 3 (a) Figure 3 (b) Figure 3 The initial state values ​​used in (c) can be used to assign corresponding voltages to the four capacitors. Because the initial voltages of the capacitors in the circuit are relatively high, the supply voltage of all operational amplifiers is set to ±55V. A screenshot of the super-heterogeneous coexistence attractor is shown below. Figure 4 (a) Figure 4 (b) and Figure 4 As shown in (c), it can be well demonstrated Figure 3 The given numerical results.

[0047] Thus, this invention constructs a novel ReLU-type memristor hyperjerk circuit induced by initial state values ​​and its implementation scheme.

[0048] Encryption Applications: Based on the aforementioned ReLU-type memristor hyper-jerk circuit, it is applied to image encryption technology; its encryption scheme includes:

[0049] Step 1: Read the original image and convert it to grayscale, saving the grayscale image P as a two-dimensional matrix of size M×N;

[0050] Step 2: Set the initial state values ​​(x1(0), x2(0), x3(0), As the security key K1, the Runge-Kutta method is used to solve equation (4) to obtain the chaotic sequence Sx1, Sx2, Sx3. Then, the sequences Sx1 and Sx2 are placed into chaotic matrices B and D of size M×N using the equations B = reshape(Sx1, M, N) and D = reshape(Sx2, M, N), respectively. Here, B and D are normalized signals with excessively small amplitudes, for example, when the encryption key is (10... -9 The decryption key is (10,0,0,5.5). -9 +10 -9 When the amplitude is 0, 0, 5.5, the maximum amplitude of B is 0.1651 and the maximum amplitude of D is 1.4557. These need to be amplified and biased before taking the modulus to obtain chaotic sequence matrices B1 and D1 of size M×N. The formulas used are B1=mod(B×k+B,256) and D1=mod(D×k+b,256); where parameter k is the amplification factor and b is the bias.

[0051] Step 3: Add chaotic sequence matrices B1 and D1 to the original image signal P, and perform modulo operations on the 256*256 encrypted images C and E using the formulas C = mod(double(P) + B1, 256) and E = mod(double(P) + D1, 256) respectively; from this, the key sequence m is obtained by the formula m = unit8(C(:)).

[0052] Step 4: Serialize the original image P into P', and convert it to double precision using P' = double(P(:)); then perform an XOR operation on the original image sequence P' and the key sequence m to obtain the diffused pseudo-random sequence CL, and use CL = bitxor(uint8(P'(i)),m(i)).

[0053] Step 5: Obtain a pseudo-random sequence through scrambling; the corresponding calibration equation can be expressed as V = floor(E) + 1; using equation U E =unique(V) yields S V Find the unique element in sequence A = [1, 2, ..., MN] but not in U. SV The elements in the array are sorted in ascending order and saved to U. E At the end; finally, swap CL. V (U E (i)) and CL V (U E (MN-i+1)).

[0054] Step 6: Encrypt the one-dimensional image pixel sequence CL V Converting to a two-dimensional matrix of size M×N yields an 8-bit unsigned encrypted image C'. The decryption operation is the inverse of each step in the encryption operation.

[0055] To verify the effectiveness of the above image encryption algorithm, a grayscale clock was used to test the image encryption system. The experimental setup for this invention included a test image size of 256×256 and a security key K1 of (x1(0), x2(0), x3(0)). The magnification factor k = 1014 and the bias b = 100. The security of this encryption scheme was analyzed from aspects such as histogram, key sensitivity, correlation coefficient, and information entropy. Figure 5 Experiments demonstrating the proposed encryption scheme were presented. Figure 5 (a) Displays a plaintext image of the Clock image. Figure 5 (b) Ciphertext image and Figure 5 (c) Decrypt the image; and Figure 5 (d) Figure 5 (e) Figure 5 (f) shows Figure 5 (a) Figure 5(b) Figure 5 (c) The corresponding histogram of the image. From Figure 5 As can be seen, the histogram of the plaintext image has multiple distribution patterns, while the proposed encryption algorithm can obtain a ciphertext image with a uniform histogram distribution. Figure 6 The experiment demonstrates key sensitivity analysis. Figure 6 (a) is the original image. Figure 6 (b) shows an encrypted image. As can be seen from the image, only the correct key can fully recover the original image (e.g., ...). Figure 6 (g) shows). Using a key with slight errors, the decryption result class does not contain any information about the original image (e.g., Figure 6 (as shown in (c), (d), (e), and (f)). Therefore, the proposed image encryption scheme is extremely sensitive to its key. Figure 7 Adjacent pixel pairs were drawn. From Figure 7 (a) Level, Figure 7 (b) Vertical and Figure 7 (c) It can be seen from the adjacent pixel pairs of the plaintext image drawn along the diagonal that most of the adjacent pixel pairs in the plaintext image are distributed along the diagonal of the phase plane. Figure 7 (d) Figure 7 (e) and Figure 7 (f) indicates that adjacent pixel pairs in the horizontal, vertical, and diagonal directions of the encrypted image are randomly distributed across the entire phase plane. Experimental results show that the encryption scheme has good security against a variety of possible attacks.

[0056] Based on the above-described preferred embodiments of the present invention, and through the foregoing description, those skilled in the art can make various changes and modifications without departing from the inventive concept. The technical scope of this invention is not limited to the contents of the specification, but must be determined according to the scope of the claims.

Claims

1. A hyper-jerk circuit with ReLU, characterized by, Including: The ReLU memristive circuit and the hyper-jerk circuit generate different super-multiple stable behaviors of periodic state, stable point state, divergent state and chaotic state by changing the initial value of the state of the ReLU memristive circuit and the hyper-jerk circuit; that is, the coexistence of periodic 3 and periodic 2, the coexistence of chaotic single vortex and periodic 1, the coexistence of point attractor and divergence; Hyper-jerk circuits include: resistors R 5- R 13 Multiplier M 2- M 3. Operational amplifier U 3- U 7. Capacitors C 2- C 4 and ReLU memristor circuit, U The inverting input of 3 is respectively connected to R 5. R 6. R 7. R 8 and C Connect one end of 2; R 8 and C The other end of the 2 parallel connection is respectively connected to U The output terminal of 3 is connected to one end of the ReLU memristor circuit; the other end of the ReLU memristor circuit is connected to... U 4's inverting input and C Connect one end of 3; C The other end of 3 is respectively with R 12 and R 13 One end is connected; R 13 The other end is respectively with U 5's inverting input and C Connect one end of 4; C The other end of 4 is respectively with U 5's output terminal and R 10 One end is connected; R The other end of 7 is respectively with U 6's output and R 11 One end is connected; R 11 The other end is respectively with U The inverting input of 6 and R 12 The other end is connected; R The other end of 6 is respectively with U 7's output terminal M 3's two input terminals and R Connect one end of 9; R The other end of 9 is respectively with U 7's inverting input and R 10 The other end is connected; R The other end of 5 and M Connect the output terminal of 2; M one end of the input of 2 is connected to R 10 the other end of the output of 1; M the other end of the input of 2 is connected to M the output end of 3; ReLU memristor circuits include: resistors R 1- R 4. Capacitor C 1. Multiplier M 1. Max module, operational amplifier U 1- U 2, R 1 and R Connect the two ends of 4 to the hyper-jerk circuit; R One end of 1 is respectively with U The inverting input of 1 and R Connect one end of 2; R The other end of 2 is respectively with U 1's output terminal and M One input end of 1 is connected; U The output of 1 is also connected to R Connect one end of 3. R The other end of 3 is respectively with U The inverting input of 2 and C One end of 1 is connected; C The other end of 1 and U The output of module 2 is connected to one input of the Max module; the output of the Max module is connected to... M The other end of the input for 1 is connected; M 1's output terminal and R Connect one end of 4; U 1 and U The non-inverting input terminal of module 2 is grounded; the other input terminal of the Max module is grounded. The equation of the hyper-jerk circuit is: ; wherein v 1, v 2, v 3 and v φ are four circuit variables, R is a resistance, C is a capacitance.