System and method for allocating resource blocks

Abstract

Disclosed herein is a system and method for allocating resource blocks. In one embodiment, the system and method are configured to: determine a resource indication value based on at least a first parameter and a second parameter, the resource indication value indicating a number of resource blocks to be allocated to a communication node, wherein a predefined relationship between the first indication parameter and the second indication parameter limits the number of possible different values ​​of the resource indication value; and transmit the resource indication value to the communication node.

Description

[0001] This application is a divisional application of the application with application number 201780090453.X, application date May 5, 2017, and invention name “System and method for allocating resource blocks”. Technical Field

[0002] The present disclosure relates generally to wireless communications and, more particularly, to systems and methods for allocating resource blocks. Background Art

[0003] In wireless communications, when a base station (BS) prepares to send and receive data from a user equipment (UE), it typically performs a scheduling process before the BS actually sends and receives data from the UE. This scheduling process typically provides some control information (e.g., downlink control information (DCI)), which is transmitted to the UE via one or more physical channels (e.g., the physical downlink control channel (PDCCH)). In particular, the control information includes various specified parameters that the UE can use to receive and transmit data, such as, for example, parameters for resource block allocation.

[0004] Typically, a base station (BS) has various methods for allocating resource blocks to a UE via downlink and uplink communications. In downlink communications, the DCI (Direct Information Flow) including parameters for resource block allocation can be provided in various formats (hereinafter referred to as "DCI formats"). For example, the BS uses a resource indication value (RIV) to indicate the corresponding consecutive sequence of resource blocks that the UE can use. More specifically, the RIV is determined based on the starting resource block and the length of the consecutive sequence of resource blocks (commonly referred to as DCI formats 1A or 1B).

[0005] Based on the different numbers of resource blocks expected to be allocated, the RIV is usually presented as a range of integer values ​​(e.g., 0 to 20), and is then used to determine how many bits (digital bits) the BS / UE will need to accommodate all values ​​of the RIV. For example, when the RIV ranges from 0 to 20, the number of bits that can accommodate all values ​​of the RIV (i.e., 21) is at least 5 (because 2 5 >21>2 4 ).

[0006] Existing formats for allocating resource blocks (including the above-mentioned type 2 downlink DCI format and type 0 uplink DCI format) are intended to allocate one or more "contiguous" sequences of resource blocks, such as, for example, multiple sequences with a common fixed starting resource block position but each sequence has a "contiguously" increasing / decreasing resource block length, multiple sequences with a common fixed resource block length but each sequence has a "contiguously" increasing / decreasing starting resource block position, and so on.

[0007] However, in 5G networks, various communication requirements for various applications (e.g., Internet of Things (IoT), massive machine type communication (mMTC), etc.) are emerging, which may require the use of one or more discontinuous resource block sequences. For example, in some cases, multiple resource block sequences may be required, wherein the multiple resource block sequences have a common fixed starting resource block position, but each sequence has a "discontinuously" increasing / decreasing resource block length (e.g., 5, 10, 15, 20, etc.). However, the existing format for allocating resource blocks requires that the starting resource block position and / or the length of the resource block sequence increase / decrease continuously. Therefore, for discontinuously increasing or decreasing RB sequence lengths, or discontinuous RB sequence starting positions, such existing formats will require additional overhead bits to account for such changes, and thus disadvantageously cause bit waste. Therefore, the existing formats and / or technologies for allocating resource blocks are not entirely satisfactory. Summary of the Invention

[0008] The exemplary embodiments disclosed herein are intended to solve problems related to one or more problems existing in the prior art, as well as to provide additional features, which will become apparent with reference to the following detailed description when taken in conjunction with the accompanying drawings. According to various embodiments, exemplary systems, methods, devices, and computer program products are disclosed herein. However, it should be understood that these embodiments are given as examples and not limitations, and it will be apparent to those of ordinary skill in the art who have read this disclosure that various modifications may be made to the disclosed embodiments while remaining within the scope of the present invention.

[0009] In one embodiment, a method includes determining a resource indication value based on at least a first parameter and a second parameter, the resource indication value indicating a number of resource blocks to be allocated to a communication node, wherein the number of possible different values ​​of the resource indication value is limited by a predefined relationship between the first parameter and the second parameter; and transmitting the resource indication value to the communication node.

[0010] In another embodiment, a method includes: receiving, by a communication node, a resource indication value determined based on at least a first parameter and a second parameter, the resource indication value indicating a number of resource blocks to be allocated to the communication node, wherein the number of possible different values ​​of the resource indication value is limited by a predefined relationship between the first parameter and the second parameter; and determining, based on the received resource indication value, the number of resource blocks to be allocated to the communication node.

[0011] In another embodiment, a first communication node includes: at least one processor configured to determine a resource indication value based on at least a first parameter and a second parameter, the resource indication value indicating a number of resource blocks to be allocated to a second communication node, wherein the number of possible different values ​​of the resource indication value is limited by a predefined relationship between the first parameter and the second parameter; and a transmitter configured to transmit the resource indication value to the second communication node.

[0012] In yet another embodiment, a communication node comprises: a receiver configured to receive a resource indication value determined based on at least a first parameter and a second parameter, the resource indication value indicating a number of resource blocks to be allocated to the communication node, wherein the number of possible different values ​​of the resource indication value is limited by a predefined relationship between the first parameter and the second parameter; and at least one processor configured to determine the number of resource blocks to be allocated to the communication node based on the received resource indication value. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Various exemplary embodiments of the present invention are described in detail below with reference to the following drawings. The drawings are provided for illustrative purposes only and depict only exemplary embodiments of the present invention to facilitate the reader's understanding of the present invention. Therefore, the drawings should not be considered as limiting the breadth, scope, or applicability of the present invention. It should be noted that for clarity and ease of illustration, these drawings are not necessarily drawn to scale.

[0014] Figure 1 An exemplary cellular communication network according to an embodiment of the present disclosure is shown, in which the techniques disclosed herein may be implemented.

[0015] Figure 2 A block diagram of exemplary base station and user equipment apparatus according to some embodiments of the present invention is shown.

[0016] Figure 3 A flow chart illustrating a method of allocating resource blocks to a UE device according to some embodiments is shown. DETAILED DESCRIPTION

[0017] Various exemplary embodiments of the present invention are described below with reference to the accompanying drawings to enable one of ordinary skill in the art to make and use the present invention. As will be apparent to one of ordinary skill in the art, after reading this disclosure, various changes or modifications may be made to the examples described herein without departing from the scope of the present invention. Therefore, the present invention is not limited to the exemplary embodiments and applications described and illustrated herein. In addition, the specific order or hierarchy of steps in the methods disclosed herein are merely exemplary methods. Based on design preferences, the specific order or hierarchy of steps of the disclosed methods or processes may be rearranged while remaining within the scope of the present invention. Therefore, it will be understood by one of ordinary skill in the art that the methods and techniques disclosed herein present various steps or actions in an example order, and unless expressly stated otherwise, the present invention is not limited to the specific order or hierarchy presented.

[0018] Figure 1 An exemplary wireless communication network 100 is shown in accordance with an embodiment of the present disclosure, in which the techniques disclosed herein may be implemented. The exemplary communication network 100 includes a base station (BS) 102 and a user equipment (UE) device 104 capable of communicating with each other via a communication link 110 (e.g., a wireless communication channel), and a cluster of conceptual cells 126, 130, 132, 134, 136, 138, and 140 covering a geographic area 101. Figure 1 , BS 102 and UE 104 are contained within the geographic boundaries of cell 126. Each of the other cells 130, 132, 134, 136, 138, and 140 may include at least one base station operating within its allocated bandwidth to provide adequate radio coverage to its intended users. For example, base station 102 may operate within its allocated channel transmission bandwidth to provide adequate coverage to UE 104. Base station 102 and UE 104 may communicate via downlink radio frames 118 and uplink radio frames 124, respectively. Each radio frame 118 / 124 may be further divided into subframes 120 / 126 that may include data symbols 122 / 128. In the present disclosure, base station (BS) 102 and user equipment (UE) 104 are described herein as non-limiting examples of "communication nodes" that may generally practice the methods disclosed herein. According to various embodiments of the present invention, such communication nodes may be capable of wireless and / or wired communication.

[0019] Figure 2 A block diagram of an exemplary wireless communication system 200 for transmitting and receiving wireless communication signals (e.g., OFDM / OFDMA signals) according to some embodiments of the present invention is shown. System 200 may include components and elements configured to support known or conventional operating features that need not be described in detail herein. In one exemplary embodiment, as described above, system 200 may be used in applications such as Figure 1 Data symbols are sent and received in the wireless communication environment 100 of the wireless communication environment.

[0020] System 200 generally includes a base station 202 and a UE 204. Base station 202 includes a BS transceiver module 210, a BS antenna 212, a BS processor module 214, a BS memory module 216, and a network communication module 218, each coupled to and interconnected with one another as needed via a data communication bus 220. UE 204 includes a UE transceiver module 230, a UE antenna 232, a UE memory module 234, and a UE processor module 236, each coupled to and interconnected with one another as needed via a data communication bus 240. BS 202 communicates with UE 204 via a communication channel 250, which can be any wireless channel or other medium known in the art suitable for data transmission, as described herein.

[0021] As will be understood by those skilled in the art, the system 200 may also include Figure 2 Any number of modules other than the modules shown. It will be understood by those skilled in the art that the various illustrative blocks, modules, circuits, and processing logic described in conjunction with the embodiments disclosed herein can be implemented in hardware, computer-readable software, firmware, or any actual combination thereof. In order to clearly illustrate this interchangeability and compatibility of hardware, firmware, and software, various illustrative components, blocks, modules, circuits, and steps are generally described in terms of their functionality. Whether this functionality is implemented as hardware, firmware, or software depends on the specific application and the design constraints imposed on the entire system. Personnel familiar with the concepts described herein can implement this functionality in an appropriate manner for each specific application, but this implementation decision should not be interpreted as limiting the scope of the present invention.

[0022] According to some embodiments, the UE transceiver 230, which may be referred to herein as an "uplink" transceiver 230, includes an RF transmitter and receiver circuitry, each coupled to an antenna 232. A duplex switch (not shown) may alternatively couple the uplink transmitter or receiver to the uplink antenna in a time-duplexed manner. Similarly, according to some embodiments, the BS transceiver 210, which may be referred to herein as a "downlink" transceiver 210, includes an RF transmitter and receiver circuitry, each coupled to an antenna 212. The downlink duplex switch may alternatively couple the downlink transmitter or receiver to the downlink antenna 212 in a time-duplexed manner. The operation of the two transceivers 210 and 230 is time-coordinated such that while the downlink transmitter is coupled to the downlink antenna 212, the uplink receiver is coupled to the uplink antenna 232 to receive transmissions over the wireless transmission link 250. Preferably, tight time synchronization exists only when the guard time between duplex direction changes is minimized.

[0023] The UE transceiver 230 and the base station transceiver 210 are configured to communicate via a wireless data communication link 250 and cooperate with an appropriately configured RF antenna arrangement 212 / 232 that can support a specific wireless communication protocol and modulation scheme. In some exemplary embodiments, the UE transceiver 608 and the base station transceiver 602 are configured to support industry standards such as Long Term Evolution (LTE) and emerging 5G standards. However, it should be understood that the present invention is not necessarily limited in application to specific standards and related protocols. Instead, the UE transceiver 230 and the base station transceiver 210 can be configured to support alternative or additional wireless data communication protocols, including future standards or variations thereof.

[0024] According to various embodiments, BS 202 may be, for example, an evolved Node B (eNB), a serving eNB, a target eNB, a femto site, or a pico site. In some embodiments, UE 204 may be embodied in various types of user equipment, such as a mobile phone, a smartphone, a personal digital assistant (PDA), a tablet, a laptop computer, a wearable computing device, or the like. Processor modules 214 and 236 may be implemented or realized using a general-purpose processor, content-addressable memory, a digital signal processor, an application-specific integrated circuit, a field programmable gate array, any suitable programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. In this manner, a processor may be implemented as a microprocessor, a controller, a microcontroller, a state machine, or the like. A processor may also be implemented as a combination of computing devices, such as a combination of a digital signal processor and a microprocessor, a combination of multiple microprocessors, a combination of one or more microprocessors and a digital signal processor core, or any other such configuration.

[0025] Furthermore, the steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be embodied directly in hardware, firmware, or software modules executed by the processor modules 214 and 236, respectively, or in any practical combination thereof. The memory modules 216 and 234 may be implemented as RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. In this regard, the memory modules 216 and 234 may be coupled to the processor modules 210 and 230, respectively, such that the processor modules 210 and 230 can read information from and write information to the memory modules 216 and 234, respectively. The memory modules 216 and 234 may also be integrated into their respective processor modules 210 and 230. In some embodiments, the memory modules 216 and 234 may each include a cache memory for storing temporary variables or other intermediate information during the execution of instructions executed by the processor modules 210 and 230, respectively. Memory modules 216 and 234 may also each include non-volatile memory for storing instructions to be executed by processor modules 210 and 230, respectively.

[0026] The network communication module 218 generally represents the hardware, software, firmware, processing logic and / or other components of the base station 202 that enable bidirectional communication between the base transceiver station 602 and other network components and communication nodes configured to communicate with the base station 202. For example, the network communication module 218 can be configured to support Internet or WiMAX services. In a typical deployment without limitation, the network communication module 218 provides an 802.3 Ethernet interface so that the base transceiver station 210 can communicate with a conventional Ethernet-based computer network. In this manner, the network communication module 218 can include a physical interface for connecting to a computer network (e.g., a mobile switching center (MSC)).

[0027] Reference again Figure 1 As discussed above, when the BS 102 is preparing to transmit and receive data from the UE 104, a scheduling process is typically performed before the BS actually transmits and receives data from the UE 104. During such a scheduling process, control information (such as DCI including resource block allocation information) is typically transmitted from the BS 102 to the UE 104 via one or more physical channels (e.g., PDCCH).

[0028] In some embodiments, a method for a base station to allocate multiple resource block sequences to a user equipment terminal (UE) is disclosed. More specifically, the multiple resource block sequences may include a common starting resource block position represented by a variable "y1," and each sequence may include discontinuous resource block lengths represented by a variable "x1L," where "x1" and "y1" are positive integers and "L" is a predefined positive constant integer. In some embodiments, the maximum number of available resource blocks that a base station can provide to a user equipment terminal may be "N," which is also a predefined positive constant integer. Thus, according to some embodiments, N, x1, and y1 may satisfy the condition: x1L+y1≤N.

[0029] In some examples, the variable x1 may be a series of consecutive integers (ie, having a range of values). Such a range of the variable x1 has a minimum value x 1min and the maximum value x 1max Similarly, the variable y1 can also be a series of consecutive integers (ie, have a certain range of values).

[0030] Therefore, in this embodiment, multiple resource block sequences are allocated as follows: First, in some embodiments, the BS may determine the ranges of variables x1 and y1 based on the above condition (x1L+y1≤N).

[0031] Therefore, the following equation (1) can be used to determine the respective RIVs.

[0032]

[0033] Since the variables x1 and y1 both have ranges, RIV can have multiple possible values. In some embodiments, equation (2) shown below is used to determine the number of all possible values ​​of RIV.

[0034]

[0035] Once the value of "M" is retrieved, the following equation (3) can be used to derive the total number of bits required by the BS to transmit multiple sequences of resource blocks.

[0036]

[0037] Table I, shown below, is an example, where the predefined N and L are 25 and 8, respectively, and the BS determines that the variables x1 and y1 can vary from 1 to 3 and from 0 to 17, respectively, based on the condition (x1L+y1≤N). In other words, the plurality of resource block sequences may include multiple subsets of resource block sequences, each having specific x1L and y1 values ​​to determine the corresponding resource block lengths and starting resource block positions. For example, the first subset of resource block sequences has a common starting resource block position at 0 (y1=0) and each has a corresponding length (x1L) of 8, 16, and 24 when x1 is equal to 1, 2, and 3, respectively; the second subset of resource block sequences has a common starting resource block position at 1 (y1=1) and each has a corresponding length (x1L) of 8, 16, and 24 when x1 is equal to 1, 2, and 3, respectively, and so on. Note that while the starting resource block position (y1) can be changed "continuously," the resource block length (x1L) can be changed "discontinuously."

[0038] Table I

[0039]

[0040]

[0041] As shown in Table I, when N and L are 25 and 8 respectively, x1 and y1 can vary from 1 to 3 and from 0 to 17 respectively, and the condition x1L+y1≤N is satisfied, and the total number of different RIV values ​​is 30 (i.e., M=30). Therefore, using equation (3), since 2 5 =32>30>2 4 = 16, so the total number of bits (i.e., K) required for the BS to transmit multiple resource block sequences is 5. In contrast, the existing format for transmitting a total of 25 (N) resource blocks may require up to 9 bits because the existing format does not consider the "L" value. More specifically, to consider the total number (N) 25, the existing format requires N (N + 1) / 2 = 325 different RIV values, which requires 9 bits (because 2 9 =512>325>2 8 =256).

[0042] Alternatively, in some embodiments, once the BS determines the ranges of variables x1 and y1, respectively, based on the above condition (x1L+y1≤N), the BS may determine the RIV value using one of the following equations (1-a), (1-b), and (1-c) (different from equation (1)) while keeping the total number of bits (“K value”) the same.

[0043] x′1=x1-x 1min

[0044] N′=Nx1min L

[0045]

[0046]

[0047] in

[0048] or

[0049]

[0050] or

[0051]

[0052] In yet another embodiment, a method for a base station to allocate multiple resource block sequences to a user equipment terminal (UE) is disclosed. More specifically, the multiple resource block sequences may include a common resource block length represented by the variable "y2," and each sequence includes discontinuous starting resource block positions represented by the variable "x2L," where "x2" and "y2" are positive integers, and "L" is a predefined constant integer. In some embodiments, the maximum number of available resource blocks that the base station can provide to the user equipment terminal may be "N," which is also a predefined constant integer. Thus, according to some embodiments, N, x2, and y2 may satisfy the condition: x2L+y2≤N.

[0053] In some examples, the variable y2 may be a series of consecutive integers (ie, having a range of values). This range of the variable y2 has a minimum value y 2min Similarly, the variable x2 can also be a series of consecutive integers (ie, have a range of values).

[0054] Thus, in this embodiment, the method for allocating multiple resource block sequences is as follows. First, in some embodiments, the BS may determine the ranges of variables x2 and y2 based on the above condition (x2L+y2≤N). Therefore, each RIV may be determined using the following equation (4).

[0055]

[0056] Since the variables x2 and y2 both have ranges, RIV can have multiple possible values. In some embodiments, equation (5) shown below is used to determine the number of all possible values ​​of RIV.

[0057]

[0058] Once the value of "M" is retrieved, the following equation (6) can be used to derive the total number of bits "K" required by the BS to transmit multiple possible sequences of resource blocks.

[0059]

[0060] As mentioned above, each of the variables x2 and y2 has a respective range of values. For y2, its respective range has a minimum value y 2min ; and for x2, their respective ranges have a minimum value x 2min and the maximum value x 2max Thus, equation (4) for deriving RIV can be expressed as equation (7), and the corresponding equation (5) for estimating the value of M can be expressed as equation (8), as shown below, respectively.

[0061]

[0062]

[0063] And the "K" bits can be estimated by using the M value derived from equation (8) and equation (6). More specifically, x 2min , x 2max and y 2min Can further satisfy

[0064] Alternatively, in some embodiments, once the BS determines the respective ranges of the variables x2 and y2 (i.e., x 2min , x 2max ,y 2min ), the BS may use one of the following equations (7-a), (7-b), and (7-c) (different from equation (7)) to determine the RIV value while keeping the total number of bits ("K value") the same.

[0065] x2′=x2-x 2m in

[0066] y2′=y2-y 2min

[0067] N′=Nx 2min Ly 2min

[0068]

[0069]

[0070] in

[0071] Where "%" represents the modulo operation,

[0072] or

[0073]

[0074] or

[0075]

[0076] In yet another embodiment, a method for a BS to allocate multiple resource block sequences to a UE is disclosed. More particularly, the multiple resource block sequences may each include a discontinuous resource block length represented by a variable "y3Q", and each sequence includes a discontinuous starting resource block position represented by a variable "x3L", where "x3" and "y3" are positive integers, and "L" and "Q" are predefined constant integers. In some embodiments, L and Q are positive integers greater than 1. In addition, L=PQ, where P is also a predefined constant integer, which is a positive integer greater than 1. In some embodiments, the maximum number of available resource blocks that the BS can provide to the UE may be "N", which is also a predefined constant integer. Thus, according to some embodiments, N, x3, and y3 may satisfy the condition: x3L+y3Q≤N.

[0077] The equation for determining the RIV value is substantially similar to that of the above embodiment. For example, based on L=PQ and x3L+y3Q≤N, it can be derived that x3P+y3≤N / Q. In the following discussion, the variable N' is used to represent N / Q.

[0078] In some embodiments, x3 may be a value of a sequence of consecutive integers. Thus, x3 has a minimum value x 3min and the maximum value x 3max Based on x3P+y3≤N / Q, x 3max can be up to (N' / P), and similarly, y3 has a minimum value y 3min Therefore, the RIV value can be derived as follows.

[0079]

[0080] The corresponding M and K values ​​can then be determined using the following equations.

[0081]

[0082]

[0083] In yet another embodiment, a method for a BS to allocate multiple resource blocks to a UE is disclosed. More particularly, the BS allocates two types of resource blocks to the UE: type 1 and type 2. In terms of the number of resource elements, the type 1 resource block is L times larger than the type 2 resource block, where L is a positive integer greater than 1. According to some embodiments, the resource element can be any of a variety of resource elements, such as a time resource element, a frequency resource element, a symbol resource element, a power resource element, or a combination thereof. In an example, when the type 1 and type 2 resource blocks extend over the same bandwidth (in frequency), the type 1 resource block extends over a time length that is L times longer than the time length of the type 2 resource block. In another example, when the type 1 and type 2 resource blocks extend over the same time length, the type 1 resource block extends over a bandwidth that is L times wider than the bandwidth of the type 2 resource block.

[0084] In a specific example under this embodiment, the maximum number of available resource blocks that the BS can provide to the UE may be N type-2 resource blocks. In addition, the BS may allocate x number of type-1 resource blocks and y number of type-2 resource blocks to the UE, where x and y are positive integers, the minimum values ​​of x and y are 0, respectively, and N, x, and y satisfy the inequality condition: xL+y≤N.

[0085] Thus, the method for allocating resource blocks can be implemented as follows. First, determine whether (x, y) includes (0, 0). If so, RIV can be estimated using equation (9), then the corresponding M value can be estimated using equation (10), and the K value can be estimated using equation (11). If (x, y) is not equal to (0, 0), RIV can be estimated using equation (12), then the corresponding M value can be estimated using equation (13), and the K value can be estimated using equation (11).

[0086]

[0087]

[0088]

[0089]

[0090]

[0091] Similarly, in some alternative embodiments, the RIV value derived from equation (9) may be derived using one of the following equations (9-1), (9-b), and (9-c), each described below.

[0092]

[0093]

[0094] in or

[0095]

[0096] or

[0097]

[0098] in

[0099] Table II below shows some exemplary values ​​of x and y and corresponding RIV values ​​when N=8 and L=2 and when N=9 and L=2, respectively. According to some embodiments, by providing the number of type 1 resource blocks allocated to the UE (x) and the number of type 2 resource blocks allocated to the UE (y), subsequent processes performed by the UE can be simplified. For example, the UE can perform blind detection to determine the corresponding resource block starting positions of the type 1 and type 2 resource blocks. Therefore, once the number of type 1 and type 2 resource blocks (i.e., x and y) is determined, the UE can easily use the allocated resource blocks.

[0100]

[0101]

[0102] In the above discussion, when the corresponding ranges of x (e.g., x1, x2, and x3) and y (e.g., y1, y2, and y3) are determined, the corresponding K value (i.e., the total number of bits required) can be determined. In yet another embodiment, the total number of "available" bits that can be used can be set equal to "K", which can be set to be a predetermined amount less than K. Thus, the corresponding RIV value can be expressed as a value between the minimum and maximum values ​​2 K” Any integer value between .

[0103] Figure 3 A flow chart of a method 300 for allocating resource blocks to a UE device (e.g., a UE) according to some embodiments is shown. Method 300 begins at operation 302, in which the BS transmits control information (DCI) to the UE via a PDCCH. Such DCI includes one of the above-described methods of allocating resource blocks. In other words, whenever a signal containing DCI is transmitted to the UE, such signal includes a RIV value that corresponds to a pair (x, y). Next, at operation 304, the UE receives the DCI and the RIV and uses the RIV value contained in the signal to determine x and y values ​​using the same equation used by the BS to calculate the RIV value. At operation 306, the UE can then use the x and y values ​​to determine which resource blocks the UE can use for subsequent communications with the BS.

[0104] In some embodiments, if the BS determines the RIV value using equation (9) above and transmits a signal containing the RIV value and DCI, the UE may estimate (x, y) by using a corresponding table (such as those discussed above) or performing the following steps:

[0105] Step 1: Compare RIV and N

[0106] Step 2: If RIV≤N, then x=0, y=RIV.

[0107] Step 3: If RIV>N, then based on and Calculate the maximum integer value of U. Therefore, x = U + 1 and y = RIV - R.

[0108] In another embodiment, if the BS determines the RIV value using equation (12) above and transmits a signal including the RIV value and DCI, the BS may estimate (x, y) by using a corresponding table or performing the following steps:

[0109] Step 1: Make RIV=RIV+1, and then compare RIV with N

[0110] Step 2: If RIV≤N, then x=0, y=RIV+1.

[0111] Step 3: If RIV>N, then based on and Calculate the maximum integer value of U. Therefore, x = U + 1 and y = RIV - R.

[0112] In yet another embodiment, if the BS determines the RIV value using equation (7) above and transmits a signal containing the RIV and DCI, the BS may estimate (x, y) by using a corresponding table or performing the following steps:

[0113] Step 1: Based on N′=Nx min Ly min Estimated N'

[0114] Step 2: Compare RIV and N'

[0115] Step 3: If RIV ≤ N', then x = x min ,y=RIV+y min

[0116] Step 4: If RIV>N', then based on Calculate the maximum integer value of U. Therefore,

[0117] In yet another embodiment, if the BS determines the RIV value using equation (9-a) above and transmits a signal containing the RIV and DCI, the BS may estimate (x, y) by using a corresponding table or performing the following steps:

[0118] Step 1: Estimate Satisfaction The maximum integer value U

[0119] Step 2: Estimate (x, y) based on

[0120]

[0121] s=RIV%p,so y=N-UL-s

[0122] in

[0123] In yet another embodiment, if the BS determines the RIV value using equation (7-b) above and transmits a signal containing the RIV and DCI, the BS may estimate (x, y) by using a corresponding table or performing the following steps:

[0124] Step 1: Based on N'=Nx max Ly min Estimated N'

[0125] Step 2: Based on and 0≤U≤x max Compute the maximum integer value of U.

[0126] Step 3: Based on Estimate (x, y).

[0127] Although various embodiments of the present invention have been described above, it should be understood that they are presented in an exemplary and not limiting manner only. Similarly, various figures can depict exemplary architectures or configurations, which are provided to enable those of ordinary skill in the art to understand the exemplary features and functions of the present invention. However, it will be understood by these personnel that the present invention is not limited to the exemplary architectures or configurations shown, but can be implemented using a variety of alternative architectures and configurations. In addition, as will be understood by those of ordinary skill in the art, one or more features of an embodiment can be combined with one or more features of another embodiment described herein. Therefore, the breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments.

[0128] It should also be understood that any reference to an element herein using names such as "first," "second," etc. does not generally limit the quantity or order of those elements. Rather, these names may be used herein as a convenient means of distinguishing between two or more elements or instances of an element. Thus, a reference to a first and a second element does not mean that only two elements may be used, or that the first element must precede the second element in some manner.

[0129] In addition, those skilled in the art will appreciate that any of a variety of different technologies and techniques may be used to represent information and signals. For example, references to data, instructions, commands, information, signals, bits, and symbols in the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0130] It will be further understood by those of ordinary skill in the art that any of the various illustrative logical blocks, modules, processors, devices, circuits, methods, and functions described in conjunction with the aspects disclosed herein may be implemented by electronic hardware (e.g., digital implementation, analog implementation, or a combination of the two), firmware, various forms of programs or design code containing instructions (which, for convenience, may be referred to herein as "software" or "software modules"), or any combination of these technologies. To clearly illustrate this interchangeability of hardware, firmware, and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware, firmware, software, or a combination of these technologies depends on the specific application and the design constraints imposed on the overall system. A skilled person may implement the described functionality in various ways for each specific application, but such implementation decisions do not result in a departure from the scope of this disclosure.

[0131] In addition, it will be understood by those of ordinary skill in the art that the various illustrative logical blocks, modules, devices, components, and circuits described herein may be implemented within or performed by an integrated circuit (IC), which may include a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic device, or any combination thereof. The logical blocks, modules, and circuits may further include an antenna and / or a transceiver to communicate with various components within a network or within the device. The general purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, or state machine. The processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a combination of multiple microprocessors, a combination of one or more microprocessors and a DSP core, or any other suitable configuration for performing the functions described herein.

[0132] If implemented in software, the functions may be stored as one or more instructions or codes on a computer-readable medium. Thus, the steps of the methods or algorithms disclosed herein may be implemented as software stored on a computer-readable medium. Computer-readable media include both computer storage media and communication media, including any medium that enables a computer program or code to be transferred from one place to another. A storage medium may be any available medium that a computer can access. By way of example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired program code in the form of instructions or data structures and that can be accessed by a computer.

[0133] In this document, the term "module" as used herein refers to software, firmware, hardware, and any combination of these elements for performing the relevant functions described herein. In addition, for the purpose of discussion, various modules are described as discrete modules; however, as will be apparent to one of ordinary skill in the art, two or more modules may be combined to form a single module that performs the relevant functions according to embodiments of the present invention.

[0134] In addition, in embodiments of the present invention, memories or other storage devices and communication components may be employed. It will be understood that, for the sake of clarity, the above description has described embodiments of the present invention with reference to different functional units and processors. However, it will be apparent that any suitable distribution of functionality between different functional units, processing logic elements, or domains may be used without departing from the present invention. For example, functions illustrated as being performed by separate processing logic elements or controllers may be performed by the same processing logic element or controller. Therefore, references to specific functional units are merely references to suitable means for providing the described functionality, rather than indicating a strict logical or physical structure or organization.

[0135] Various modifications to the embodiments described in this disclosure will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments without departing from the scope of this disclosure. Therefore, the present disclosure is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the novel features and principles disclosed herein, as set forth in the following claims.

Claims

1. A method at a base station, comprising: determining a resource indication value (RIV) based on a first parameter denoted as x and a second parameter denoted as y, wherein the first parameter x indicates a starting resource block position allocated to the user equipment and the second parameter y indicates a length of a sequence of resource blocks allocated to the user equipment, and a predefined relationship is specified as xL+yQ≤N, wherein L and Q are predefined positive integers each greater than 1, and N represents a maximum number of available resource blocks that the base station can allocate to the user equipment; and The RIV is transmitted to the user equipment through the base station.

2. The method according to claim 1, wherein The RIV indicates the number of resource blocks to be allocated to the user equipment.

3. The method according to claim 1, wherein L and Q are not equal to each other.

4. The method according to claim 3, wherein: L=P times Q, and P is a positive integer greater than 1.

5. The method according to claim 1 , further comprising determining K bits for transmitting a plurality of resource block sequences to the user equipment according to the following formula: and in, x 3min is the minimum value of x3, x 3max is the maximum value of x3, y 3min is the minimum value of y3, x3 and y3 are positive integers, P is a positive integer greater than 1, and N' represents N / Q.

6. The method of claim 1 , further comprising determining the RIV according to the following formula: in, x 3min is the minimum value of x3, x 3max is the maximum value of x3, y 3min is the minimum value of y3, x3 and y3 are positive integers, P is a positive integer greater than 1, and N' represents N / Q.

7. The method according to claim 1, wherein The number of different values ​​of the RIV is limited by the predefined relationship xL+yQ≤N.

8. A base station, comprising: at least one processor configured to determine a resource indication value (RIV) based on at least a first parameter denoted as x and a second parameter denoted as y, wherein the first parameter x indicates a starting resource block position allocated to a user equipment and the second parameter y indicates a length of a sequence of resource blocks allocated to the user equipment, and a predefined relationship is specified as xL+yQ≤N, wherein L and Q are predefined positive integers each greater than 1, and N represents a maximum number of available resource blocks that the base station can allocate to the user equipment; and A transmitter is configured to transmit the RIV to the user equipment.

9. The base station according to claim 8, wherein: The RIV indicates the number of resource blocks to be allocated to the user equipment.

10. The base station according to claim 9, wherein: L and Q are not equal to each other. The base station according to claim 10 , wherein: L=P times Q, and P is a positive integer greater than 1.

12. The base station according to claim 10, wherein: The at least one processor is configured to determine K bits for transmitting a plurality of resource block sequences to the user equipment according to the following formula: and Among them, x 3min is the minimum value of x3, x 3max is the maximum value of x3, y 3min is the minimum value of y3, x3 and y3 are positive integers, P is a positive integer greater than 1, and N' represents N / Q.

13. The base station according to claim 10, wherein: The at least one processor is configured to determine the RIV according to the following formula: Among them, x 3min is the minimum value of x3, x 3max is the maximum value of x3, y 3min is the minimum value of y3, x3 and y3 are positive integers, P is a positive integer greater than 1, and N' represents N / Q.

14. The base station according to claim 9, wherein: The number of different values ​​of the RIV is limited by the predefined relationship xL+yQ≤N.

15. A method at a user equipment, comprising: receiving a resource indication value (RIV) from a base station; determining, from the RIV, a number of resource blocks allocated to the user equipment according to a predefined relationship between a first parameter denoted as x and a second parameter denoted as y; as well as performing further communications with the base station based on the determined number of resource blocks allocated to the user equipment; The first parameter x indicates the starting resource block position allocated to the user equipment and the second parameter y indicates the length of the resource block sequence allocated to the user equipment, and the predefined relationship is specified as xL+yQ≤N, wherein L and Q are predefined positive integers each greater than 1, and N represents the maximum number of available resource blocks that the base station can allocate to the user equipment.

16. The method according to claim 15, wherein The number of different values ​​of the RIV is limited by the predefined relationship xL+yQ≤N.

17. A user equipment comprising: a receiver configured to receive a resource indication value (RIV) from a base station; At least one processor configured to: determining, from the RIV, a number of resource blocks allocated to the user equipment according to a predefined relationship between a first parameter denoted as x and a second parameter denoted as y; and performing further communications with the base station based on the determined number of resource blocks allocated to the user equipment, The first parameter x indicates the starting resource block position allocated to the user equipment and the second parameter y indicates the length of the resource block sequence allocated to the user equipment, and the predefined relationship is specified as xL+yQ≤N, wherein L and Q are predefined positive integers each greater than 1, and N represents the maximum number of available resource blocks that the base station can allocate to the user equipment.

18. The user equipment according to claim 17, wherein: The at least one processor is configured to receive a plurality of resource block sequences indicated by K bits, wherein the K bits are determined according to the following formula: and Among them, x 3min is the minimum value of x3, x 3max is the maximum value of x3, y 3min is the minimum value of y3, x3 and y3 are positive integers, P is a positive integer greater than 1, and N' represents N / Q.

19. The user equipment according to claim 17, wherein: The RIV is determined according to the following formula: Among them, x 3min is the minimum value of x3, x 3max is the maximum value of x3, y 3min is the minimum value of y3, x3 and y3 are positive integers, P is a positive integer greater than 1, and N' represents N / Q.

20. The user equipment according to claim 17, wherein: The number of different values ​​of the RIV is limited by the predefined relationship xL+yQ≤N.

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