Display panel, driving method of display panel, and display device

Abstract

The present application provides a display panel, a driving method of the display panel, and a display device. The display panel includes a plurality of pixel circuits, and each pixel circuit includes: a data writing module, a driving module, a bias adjustment module, and a light emitting module. The working cycle of the pixel circuit includes a first stage and a second stage. The image refresh rate in the first stage is less than that in the second stage. The writing frame in the second stage includes a reset stage and a first bias stage, and at least part of the reset stage and the first bias stage overlap. In the first bias stage, the bias adjustment module is configured to provide an adjustment signal sent from an adjustment signal line to the driving module under the control of a first scan signal, and the voltage value of the adjustment signal is greater than the voltage value of the power supply signal. The above display panel can eliminate the residual display image caused by ghosting, thereby reducing the number of high-frequency driving images inserted in the second stage, improving ghosting, and reducing display power consumption.

Description

Technical Field

[0001] This application relates to the field of displays, and particularly to a display panel, a driving method of the display panel, and a display device. Background Art

[0002] With the development of display technology, people's requirements for display quality are also getting higher and higher. The display panel can display with different image refresh rates in different application scenarios. When using a driving method with a relatively low image refresh rate (also known as low-frequency driving) to drive the display screen, there is a smearing problem, which affects the display effect. For example, in a Low Temperature Polycrystalline Oxide (LTPO) display panel, when using a low-frequency drive of 1 Hz to display the screen, there is a serious smearing problem during screen switching. Smearing refers to the residue of the black screen when the display panel switches from a black screen to a white screen.

[0003] In the prior art, the way to solve the smearing problem is to insert multiple screens displayed in a high-frequency driving mode during screen switching to achieve a fast screen switching and improve smearing. For example, insert multiple screens displayed in a 60 Hz high-frequency driving mode. However, this requires inserting a large number of high-frequency driven screens, increasing the power consumption of the display panel. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide a display panel, a driving method of the display panel, and a display device, which can eliminate the residue of the display screen caused by smearing, and then reduce the number of high-frequency driven screens inserted in the second stage. This can not only improve the smearing problem and enhance the display effect, but also reduce the display power consumption. The specific solutions are as follows:

[0005] In a first aspect, this application provides a display panel, and the display panel includes a plurality of pixel circuits;

[0006] The pixel circuit includes: a data writing module, a driving module, a bias adjustment module, and a light emitting module; the driving module and the light emitting module are sequentially electrically connected between a first power supply line and a second power supply line, and the first power supply line is used to provide a power signal to the driving module; the data writing module is electrically connected between a data signal line and a first end of the driving module; the bias adjustment module is electrically connected between an adjustment signal line and the first end of the driving module, and the first end of the driving module is electrically connected to the first power supply line;

[0007] The working cycle of the pixel circuit includes a first stage and a second stage, and the image refresh rate in the first stage is less than that in the second stage; the write frame in the second stage includes a reset stage and a first bias stage, and the reset stage and the first bias stage at least partially overlap; in the first bias stage, the bias adjustment module is used to provide an adjustment signal sent from the adjustment signal line to the driving module under the control of a first scan signal, and the voltage value of the adjustment signal is greater than the voltage value of the power supply signal.

[0008] In a second aspect, an embodiment of the present application further provides a driving method for a display panel, which is used to drive the display panel, and the method includes:

[0009] In the first bias stage of the write frame in the second stage, control the bias adjustment module to conduct, so as to provide an adjustment signal sent from the adjustment signal line to the driving module; the voltage value of the adjustment signal is greater than the voltage value of the power supply signal;

[0010] In the data writing stage of the write frame in the second stage, control the data writing module to conduct, and write the data signal on the data signal line into the control end of the driving module;

[0011] In the light emitting stage of the write frame in the second stage, control the driving module to conduct, and the driving module generates a driving current and transmits it to the light emitting module to control the light emitting module to emit light.

[0012] In a third aspect, an embodiment of the present application further provides a display device, including the display panel.

[0013] An embodiment of the present application provides a display panel, a driving method for the display panel, and a display device. The display panel includes a plurality of pixel circuits, and each pixel circuit includes: a data writing module, a driving module, a bias adjustment module, and a light emitting module. The driving module and the light emitting module are sequentially electrically connected between a first power supply line and a second power supply line. The first power supply line is used to provide a power supply signal to the driving module. The data writing module is electrically connected between the data signal line and the first end of the driving module. The bias adjustment module is electrically connected between the adjustment signal line and the first end of the driving module. The first end of the driving module is electrically connected to the first power supply line. The working cycle of the pixel circuit includes a first stage and a second stage. The image refresh rate in the first stage is less than that in the second stage. The write frame in the second stage includes a reset stage and a first bias stage, and the reset stage and the first bias stage at least partially overlap. In the first bias stage, the bias adjustment module is used to provide an adjustment signal sent from the adjustment signal line to the driving module under the control of a first scan signal, and the voltage value of the adjustment signal is greater than the voltage value of the power supply signal.

[0014] In this way, in the second stage with a relatively high image refresh rate, during the reset stage, the voltage at the first end of the driving module is the voltage of the power signal, and at this time, the driving module does not perform OBS. During the first bias stage, the voltage at the first end of the driving module is the voltage of the adjustment signal. Since the voltage value of the adjustment signal is greater than the voltage value of the power signal, at this time, the driving module performs strong OBS. The bias voltage of the driving module during the first bias stage will be greater than the bias voltage during the reset stage. As the bias voltage increases, the bias voltages of the driving modules in each pixel circuit all increase, which can quickly restore the characteristics of multiple driving modules to a close level, thereby quickly eliminating the influence of the previous frame and removing the residual display screen caused by ghosting. Furthermore, the number of high-frequency driving frames inserted in the second stage is reduced. This can not only improve the ghosting problem and enhance the display effect but also reduce the display power consumption. Description of the Drawings

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0016] Figure 1 Shows a schematic structural diagram of a display panel provided by an embodiment of the present application;

[0017] Figure 2 Shows a schematic structural diagram of another display panel provided by an embodiment of the present application;

[0018] Figure 3 Shows a schematic structural diagram of another display panel provided by an embodiment of the present application;

[0019] Figure 4 Shows a schematic structural diagram of another display panel provided by an embodiment of the present application;

[0020] Figure 5 Shows a schematic structural diagram of another display panel provided by an embodiment of the present application;

[0021] Figure 6 Shows a schematic structural diagram of another display panel provided by an embodiment of the present application;

[0022] Figure 7 Shows a timing diagram of a write frame of an 8T1C pixel circuit provided by an embodiment of the present application;

[0023] Figure 8 Shows a timing diagram of a write frame of a 7T1C pixel circuit provided by an embodiment of the present application;

[0024] Figure 9 Shows the timing diagram of the write frame of another 8T1C pixel circuit provided by the embodiment of the present application;

[0025] Figure 10 Shows the timing diagram of the hold frame of an 8T1C pixel circuit provided by the embodiment of the present application;

[0026] Figure 11 Shows the timing diagram of the hold frame of a 7T1C pixel circuit provided by the embodiment of the present application;

[0027] Figure 12 Shows the timing diagram of the write frame of another 8T1C pixel circuit provided by the embodiment of the present application;

[0028] Figure 13 Shows the timing diagram of the write frame of another 7T1C pixel circuit provided by the embodiment of the present application;

[0029] Figure 14 Shows the timing diagram of the write frame of another 7T1C pixel circuit provided by the embodiment of the present application;

[0030] Figure 15 Shows the timing diagram of the write frame of another 8T1C pixel circuit provided by the embodiment of the present application;

[0031] Figure 16 Shows the flowchart of a driving method for a display panel provided by the embodiment of the present application;

[0032] Figure 17 Is a schematic structural diagram of a display device provided by the embodiment of the present application. Detailed implementation manners

[0033] To make the above objects, features, and advantages of the present application more obvious and understandable, the following will describe in detail the specific implementation manners of the present application with reference to the accompanying drawings.

[0034] In the following description, many specific details are set forth in order to fully understand the present application. However, the present application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0035] Secondly, the present application will be described in detail with reference to the schematic diagrams. When describing the embodiments of the present application in detail, for the sake of convenience of explanation, the cross-sectional views showing the device structure will be enlarged locally not in accordance with the general scale, and the schematic diagrams are only examples and should not limit the scope of protection of the present application herein. In addition, in actual production, three-dimensional spatial dimensions including length, width, and depth should be included.

[0036] As described in the background art, in the prior art, to solve the ghosting problem, when the screen is switched, multiple screens displayed in a high-frequency driving manner are inserted to achieve a fast switching of the display screen and improve ghosting. For example, multiple screens displayed in a 60Hz high-frequency driving manner are inserted. However, this requires inserting many high-frequency driven screens, increasing the power consumption of the display panel.

[0037] Based on the above technical problems, embodiments of the present application provide a display panel, a driving method of the display panel, and a display device. The display panel includes a plurality of pixel circuits. The pixel circuit includes: a data writing module, a driving module, a bias adjustment module, and a light-emitting module. The driving module and the light-emitting module are sequentially electrically connected between a first power supply line and a second power supply line. The first power supply line is used to provide a power signal to the driving module. The data writing module is electrically connected between a data signal line and a first end of the driving module. The bias adjustment module is electrically connected between an adjustment signal line and the first end of the driving module. The first end of the driving module is electrically connected to the first power supply line. The working cycle of the pixel circuit includes a first stage and a second stage. The image refresh rate in the first stage is less than that in the second stage. The writing frame in the second stage includes a reset stage and a first bias stage. The reset stage and the first bias stage at least partially overlap. In the first bias stage, the bias adjustment module is used to provide an adjustment signal sent from the adjustment signal line to the driving module under the control of a first scan signal. The voltage value of the adjustment signal is greater than the voltage value of the power signal.

[0038] In this way, in the second stage with a higher image refresh rate, at the reset stage, the voltage at the first end of the driving module is the voltage of the power signal, and at this time, the driving module does not perform OBS. At the first bias stage, the voltage at the first end of the driving module is the voltage of the adjustment signal. Since the voltage value of the adjustment signal is greater than the voltage value of the power signal, at this time, the driving module performs strong OBS. The bias voltage of the driving module at the first bias stage will be greater than that at the reset stage. The bias voltage increases, and the bias voltages of the driving modules in each pixel circuit all increase, which can quickly restore the characteristics of multiple driving modules to a close level, thereby quickly eliminating the influence of the previous screen and eliminating the residual of the display screen caused by ghosting, and further reducing the number of high-frequency driven screens inserted in the second stage. In this way, not only can the ghosting problem be improved and the display effect be enhanced, but also the display power consumption can be reduced.

[0039] For ease of understanding, the following will combine the accompanying drawings to provide a detailed description of a display panel, a driving method of the display panel, and a display device provided by embodiments of the present application.

[0040] Refer to Figure 1As shown, it is a schematic structural diagram of a display panel provided by an embodiment of the present application. The display panel may include a plurality of pixel circuits, and the pixel circuits can drive the display panel to emit light. The pixel circuit may include a data writing module 100, a driving module 200, a bias adjustment module 300, and a light-emitting module 400.

[0041] Specifically, the driving module 200 and the light-emitting module 400 are sequentially electrically connected between the first power supply line PVDD and the second power supply line PVEE. The first power supply line PVDD is used to provide a power signal to the driving module 200. The data writing module 100 is electrically connected between the data signal line and the first end N2 of the driving module 200. The data signal line can provide a data signal DATA. The first end N2 of the driving module 200 is electrically connected to the first power supply line PVDD. The bias adjustment module 300 is electrically connected between the adjustment signal line and the first end N2 of the driving module 200. The adjustment signal line can provide an adjustment signal DVH. The control end of the driving module 200 is connected to the first reference signal line, and the first reference signal line can provide a first reference signal VREF1 to drive the driving module 200.

[0042] The working cycle of the pixel circuit may include a first stage and a second stage. The image refresh rate in the first stage is less than that in the second stage. In the first stage, the display screen can be driven at a low frequency, such as at 1 Hz. In the second stage, the display screen can be driven at a high frequency, such as at 60 Hz. During the operation of the pixel circuit, the first stage and the second stage can alternate, that is, between adjacent low-frequency frame images driven in a low-frequency driving mode, high-frequency frame images driven in a high-frequency driving mode are inserted, so as to improve the smear problem during low-frequency display and improve the low-frequency display quality.

[0043] When the display panel displays a certain picture, a certain picture display time needs to be set to ensure that the viewer fully realizes visual persistence, so as to form a continuous animation effect when refreshing multiple pictures. Therefore, for each picture displayed by the display panel, a plurality of frames need to be set, and the plurality of frames are played sequentially to achieve smooth display of the picture. The plurality of frames may include a write (refresh) frame and a hold (holding) frame. The write frame can provide the data signal corresponding to the written display picture to drive the display, while the hold frame no longer writes the data signal, but displays according to the data signal saved during the write frame, and maintains the display picture of the write frame.

[0044] Specifically, whether in the first stage or the second stage, in a write frame, the working process of the pixel circuit may include a reset stage, a data writing stage, and a light emitting stage. In the reset stage, a first reference signal VREF1 may be transmitted to the control end of the driving module 200 to reset the control end of the driving module 200. In the data writing stage, the data writing module 100 may write a data signal DATA into the driving module 200 under the control of a second scan signal SP1. In the light emitting stage, the driving module 200 generates a driving current to control the light emitting module 400 to emit light.

[0045] Specifically, in the second stage (i.e., the high-frequency driving stage), the write frame may include not only a reset stage but also a first bias stage. The reset stage and the first bias stage may at least partially overlap. For example, the time period of the first bias stage may be located within the time period of the reset stage, that is, bias adjustment is performed during the reset process. Or, the start time of the first bias stage is before the end time of the reset stage, and the end time of the first bias stage is after the end time of the reset stage, that is, the time periods of the two stages may partially overlap.

[0046] Specifically, the first end of the bias adjustment module 300 may be connected to an adjustment signal line that provides an adjustment signal DVH. The second end of the bias adjustment module 300 may be connected to the first end N2 of the driving module 200. The control end of the bias adjustment module 300 may be connected to a first scan signal line, and the first scan signal line may provide a first scan signal SP*1. In the first bias stage, the bias adjustment module 300 is configured to provide the adjustment signal DVH sent from the adjustment signal line to the driving module 200 under the control of the first scan signal SP*1, that is, to apply a bias voltage (on-bias stress, OBS) to the driving module 200.

[0047] Specifically, during the reset stage, the voltage of the control end of the driving module 200 is VREF1, the voltage of the first end N2 of the driving module 200 is the voltage of the power supply signal, and the bias voltage between the first end and the control end of the driving module 200 is PVDD - VREF1. After the first bias stage, the voltage of the first end N2 of the driving module 200 is the voltage of the adjustment signal DVH, and the bias voltage between the first end and the control end of the driving module 200 is DVH - VREF1.

[0048] By setting the voltage value of the adjustment signal DVH to be greater than the voltage value of the power supply signal, a strong bias voltage (strong OBS) can be applied to the driving module 200 to adjust the bias state of the driving module 200, that is, a bias voltage greater than the bias voltage received by the driving module 200 during the reset stage is applied to the driving module 200. The bias voltage of the driving module 200 during the first bias stage will be greater than the bias voltage during the reset stage. As the bias voltage increases, the bias voltages of the driving modules 200 in each pixel circuit all increase, and the characteristics of multiple driving modules 200 can be quickly restored to a nearly identical level, thereby rapidly eliminating the influence of the previous frame and removing the residual display image caused by ghosting. Furthermore, the number of high-frequency driving frames inserted in the second stage can be reduced. This not only improves the ghosting problem and enhances the display effect but also reduces the display power consumption.

[0049] For example, in the prior art, in the second stage, the number of high-frequency frames inserted varies, with some inserting more than a dozen frames and some inserting more than forty frames. However, for the display panel provided in this application, the number of high-frequency frames inserted in the second stage can be reduced to a few frames or more than a dozen frames, significantly reducing the number of inserted high-frequency frames and thus reducing power consumption.

[0050] In the embodiment of this application, the data writing module 100 can be reused as the bias adjustment module 300, that is, the data writing module 100 and the bias adjustment module 300 are the same module. Refer to Figure 2 As shown, at this time, the second scan signal SP1 and the first scan signal SP*1 are the same signal, both being the second scan signal SP1.

[0051] During the reset stage, the voltage of the first terminal N2 of the driving module 200 is the voltage of the power supply signal, and the bias voltage between the first terminal and the control terminal of the driving module 200 is PVDD - VREF1. At this time, the driving module 200 does not perform OBS. During the first bias stage, the driving module 200 performs OBS. The data writing module 100 is used to provide the data signal DATA sent from the data signal line to the driving module 200 under the control of the second scan signal SP1. The voltage of the first terminal N2 of the driving module 200 is the voltage of the data signal DATA, and the bias voltage between the first terminal and the control terminal of the driving module 200 is DATA - VREF1.

[0052] By setting the voltage value of the data signal DATA to be greater than the voltage value of the power supply signal, a strong OBS can be applied to the driving module 200, that is, a bias voltage greater than the bias voltage received by the driving module 200 during the reset stage is applied to the driving module 200. The bias voltage of the driving module 200 during the first bias stage will be greater than the bias voltage during the reset stage. As the bias voltage increases, the bias voltages of the driving modules 200 in each pixel circuit all increase, and the characteristics of multiple driving modules 200 can be quickly restored to a nearly identical level, thereby rapidly eliminating the influence of the previous frame, removing the residual display image caused by smear, and further reducing the number of high-frequency driving images inserted in the second stage. This can not only improve the smear problem and enhance the display effect but also reduce the display power consumption. In addition, by setting the data writing module 100 and the bias adjustment module 300 to be the same module, the pixel circuit structure can be simplified and the cost of the display panel can be reduced.

[0053] In the embodiment of the present application, the pixel circuit may further include a first reset module 500, a second reset module 600, a first light-emitting control module 700, a threshold compensation module 800, a second light-emitting control module 900, and a storage module 1000. Specific descriptions will be given below in the cases where the data writing module 100 and the bias adjustment module 300 are or are not the same module.

[0054] In a possible implementation manner, when the data writing module 100 and the bias adjustment module 300 are different modules, as shown in Figure 3 the pixel circuit may further include a first reset module 500, a second reset module 600, a first light-emitting control module 700, a threshold compensation module 800, a second light-emitting control module 900, and a storage module 1000.

[0055] The first reset module 500 is electrically connected between the first reference signal line and the control terminal N1 of the driving module 200, and is configured to provide, under the control of the third scan signal S1N1, a first reference signal VREF1 emitted from the first reference signal line to the control terminal N1 of the driving module 200.

[0056] The second reset module 600 is electrically connected between the second reference signal line and the first end of the light-emitting module 400. The second end of the light-emitting module 400 is electrically connected to the second power supply line PVEE. The second reset module 600 is configured to reset the light-emitting module 400 under the control of the fourth scan signal, where the fourth scan signal can be multiplexed as the first scan signal SP*1.

[0057] The first light-emitting control module 700 is electrically connected between the first power supply line PVDD and the first end N2 of the driving module 200. The control end of the first light-emitting control module 700 is connected to the light-emitting control signal line E1. The threshold compensation module 800 is electrically connected between the control end N1 of the driving module 200 and the second end N3 of the driving module 200. The threshold compensation module 800 is used to perform threshold compensation on the driving module 200 under the control of the fifth scanning signal S2N1. The second light-emitting control module 900 is electrically connected between the second end of the driving module 200 and the first end of the light-emitting module 400. The control end of the second light-emitting control module 900 is connected to the light-emitting control signal line E1. The storage module 1000 is electrically connected between the first power supply line PVDD and the control end N1 of the driving module 200.

[0058] Specifically, during the operation of the pixel circuit, in the write frame of the first stage, it includes a reset stage, a data write stage, and a light-emitting stage. In the reset stage, the first reset module 500 is turned on, and the first reference signal VREF1 can be transmitted to the control end of the driving module 200 to reset the control end of the driving module 200. In the data write stage, the data write module 100 and the threshold compensation module 800 are turned on. Under the control of the second scanning signal SP1, the data signal DATA is written to the control end N1 of the driving module 200. In the light-emitting stage, the first light-emitting control module 700 and the second light-emitting control module 900 are turned on. The first power supply line PVDD provides a power signal to the driving module 200, and the driving module 200 generates a driving current to control the light-emitting module 400 to emit light.

[0059] In the write frame of the second stage, it not only includes a reset stage, a data write stage, and a light-emitting stage, but also includes a first bias stage. The first bias stage can at least partially overlap with the reset stage. In the first bias stage, the bias adjustment module 300 is turned on, and the adjustment signal DVH is written to the first end of the driving module 200 to apply a strong OBS to the driving module 200.

[0060] In another possible implementation, when the data write module 100 and the bias adjustment module 300 are the same module, refer to Figure 4 As shown, in the write frame of the first stage, the operation process of the pixel circuit is the same as that when the data write module 100 and the bias adjustment module 300 are different modules, and will not be elaborated here. In the write frame of the second stage, in the first bias stage, the data write module 100 is turned on, and the data signal DATA is written to the first end of the driving module 200 to apply a strong OBS to the driving module 200.

[0061] In the embodiments of the present application, the data writing module 100, the driving module 200, the bias adjustment module 300, the first reset module 500, the second reset module 600, the first light emission control module 700, the threshold compensation module 800, and the second light emission control module 900 may specifically be thin film transistors. The types of thin film transistors are not specifically limited herein. The first end of the driving module 200 may be the source electrode of the transistor, the control end may be the gate electrode of the transistor, and the second end may be the drain electrode of the transistor. Of course, those skilled in the art may also set according to actual situations. For example, the first end of the driving module 200 may be the drain electrode of the transistor, etc.

[0062] In the embodiments of the present application, when the data writing module 100 and the bias adjustment module 300 are different modules, refer to Figure 5 as shown, the pixel circuit includes eight transistors and one capacitor, and may be denoted as an 8T1C circuit.

[0063] Specifically, the data writing module 100 includes a first transistor M1, the second reset module 600 includes a second transistor M2, the bias adjustment module 300 includes a third transistor M3, the first light emission control module 700 includes a fourth transistor M4, the driving module 200 includes a fifth transistor M5. The control end of the first transistor M1 is electrically connected to the second scanning signal line. The first end of the first transistor M1 is electrically connected to the data signal line. The second end of the first transistor M1 is electrically connected to the first end of the fifth transistor M5. The second end of the fifth transistor M5 is electrically connected to the light emission module. The control end of the fifth transistor M5 is electrically connected to the first reference signal line. The control end of the third transistor M3 is electrically connected to the first scanning signal line. The first end of the third transistor M3 is electrically connected to the adjustment signal line. The second end of the third transistor M3 is electrically connected to the first end of the fifth transistor M5. The second light emission control module 900 includes a sixth transistor M6, the first reset module 500 includes a seventh transistor M7, the threshold compensation module 800 includes an eighth transistor M8, the storage module 1000 includes a storage capacitor, and the light emission module includes a light emitting diode.

[0064] In the embodiments of the present application, when the data writing module 100 and the bias adjustment module 300 are the same module, refer to Figure 6 as shown, the pixel circuit includes seven transistors and one capacitor, and may be denoted as a 7T1C circuit.

[0065] In a possible implementation, the seventh transistor M7 and the eighth transistor M8 can be N-type transistors, and the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 can be P-type transistors. Additionally, the seventh transistor M7 and the eighth transistor M8 can be P-type transistors, and the remaining transistors can be N-type transistors. Of course, all the transistors can also be N-type transistors or P-type transistors, and specific limitations are not made here.

[0066] In the embodiments of the present application, it can be described that the seventh transistor M7 and the eighth transistor M8 can be N-type transistors, and the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 can be P-type transistors. Among them, the N-type transistor conducts when at a high level and cuts off when at a low level, and the P-type transistor cuts off when at a high level and conducts when at a low level.

[0067] Refer to Figure 7 As shown, it is a timing diagram of a write frame of an 8T1C pixel circuit provided by the embodiments of the present application. In the write frame of the second stage, it includes multiple stages, denoted as T1, T2, T3, and T4. T1 represents the first bias stage, T2 represents the reset stage, T3 represents the data write stage, and T4 represents the light emission stage. The first bias stage T1 and the reset stage T2 partially overlap.

[0068] In the reset stage T2, when the third scan signal S1N1 is at a high level, the seventh transistor M7 conducts, and the control terminal N1 of the fifth transistor M5 is reset. In the first bias stage T1, when the first scan signal SP*1 is at a low level, the third transistor M3 conducts, and a strong OBS is applied to the first terminal N2 of the fifth transistor M5. When both the third scan signal S1N1 and the fifth scan signal S2N1 are at a high level, OBS can be applied to the control terminal N1 and the second terminal N3 of the fifth transistor M5.

[0069] In the data write stage T3, when the fifth scan signal S2N1 is at a high level and the second scan signal SP1 is at a low level, both the first transistor M1 and the eighth transistor M8 conduct, and the data signal DATA is written into the control terminal N1 of the fifth transistor M5 in sequence through the first transistor M1, the fifth transistor M5, and the eighth transistor M8, that is, threshold compensation is performed.

[0070] In the light-emitting stage T4, the third scan signal S1N1 and the fifth scan signal S2N1 are at a low level, the seventh transistor M7 and the eighth transistor M8 are turned off, the second scan signal SP1 and the first scan signal SP*1 are at a high level, the first transistor M1, the second transistor M2, and the third transistor M3 are turned off, and the light-emitting control signal line E1 can provide a low level to turn on the fourth transistor M4 and the sixth transistor M6, so that the light-emitting diode emits light.

[0071] Reference Figure 8 As shown, it is a timing diagram of the write frame of a 7T1C pixel circuit provided by an embodiment of the present application. In the reset stage T2, when the third scan signal S1N1 is at a high level, the seventh transistor M7 is turned on to reset the control terminal N1 of the fifth transistor M5. In the first bias stage T1, the second scan signal SP1 is at a low level, the first transistor M1 is turned on, and a strong OBS is applied to the first terminal N2 of the fifth transistor M5 using the data signal DATA. At this time, the voltage value of the data signal is greater than the voltage value of the power supply signal. When both the third scan signal S1N1 and the fifth scan signal S2N1 are at a high level, the control terminal N1 and the second terminal N3 of the fifth transistor M5 can be reset.

[0072] In the data writing stage T3, when the fifth scan signal S2N1 is at a high level and the second scan signal SP1 is at a low level, both the first transistor M1 and the eighth transistor M8 are turned on, and the data signal DATA is written into the control terminal N1 of the fifth transistor M5 in sequence through the first transistor M1, the fifth transistor M5, and the eighth transistor M8, that is, threshold compensation is performed, and it can also be used as an OBS once.

[0073] In the light-emitting stage T4, the third scan signal S1N1 and the fifth scan signal S2N1 are at a low level, the seventh transistor M7 and the eighth transistor M8 are turned off, the second scan signal SP1 is at a high level, the first transistor M1 and the second transistor M2 are turned off, and the light-emitting control signal line E1 can provide a low level to turn on the fourth transistor M4 and the sixth transistor M6, so that the light-emitting diode emits light.

[0074] In the embodiment of the present application, when the bias adjustment module 300 and the data writing module 100 are different modules, when the transistor types of the second reset module 600 and the bias adjustment module 300 are the same, the fourth scan signal can be multiplexed as the first scan signal SP*1 to simplify the circuit design and reduce costs. When the data writing module 100 is multiplexed as the bias adjustment module 300, when the transistor types of the second reset module 600 and the data writing module 100 are the same, the fourth scan signal can be multiplexed as the second scan signal SP1 to simplify the circuit design and reduce costs.

[0075] In the embodiment of the present application, before the light-emitting stage in the second stage, when writing a frame, the driving module 200 receives a data signal DATA. When holding a frame, the driving module 200 does not receive the data signal DATA. That is, before the light-emitting stage, the state of the driving module 200 when writing a frame is different from the state of the driving module 200 when holding a frame. This will cause the display brightness of the driving module 200 when holding a frame to be different from the display brightness of the writing frame, and it is easy to have a flicker problem, seriously affecting the user experience.

[0076] Specifically, in the second stage, the writing frame may further include a third bias stage. The third bias stage may be after the reset stage, for example, it may be located after the data writing stage. In the third bias stage, the bias adjustment module 300 is used to provide an adjustment signal to the first end N1 of the driving module 200 under the control of the first scan signal SP*1, that is, to perform an OBS on the driving module 200 again. In this way, the display brightness of the holding frame can be made to tend to be the same as the display brightness of the writing frame, improving the flicker problem and enhancing the display consistency.

[0077] When the data writing module 100 and the bias adjustment module 300 are different modules, refer to Figure 9 As shown, it is a timing diagram of the writing frame of another 8T1C pixel circuit provided by the embodiment of the present application. In the 8T1C circuit, there is a third bias stage T5 after the data writing stage T3. The first scan signal SP*1 is at a low level, and the bias adjustment module 300 is turned on to perform an OBS on the driving module 200 again.

[0078] In actual application, in the first bias stage, the bias adjustment module 300 provides a first adjustment signal from the adjustment signal line to the driving module 200 under the control of the first scan signal SP*1. In the third bias stage, the bias adjustment module 300 provides a second adjustment signal from the adjustment signal line to the driving module 200 under the control of the first scan signal SP*1. The voltage value of the first adjustment signal can be made the same as the voltage value of the second adjustment signal, that is, the two pulse magnitudes of the first scan signal SP*1 are equal. There is no need to separately set the voltage magnitudes of the first adjustment signal and the second adjustment signal, that is, there is no need to pre-integrate multiple groups of voltages in the driving chip of the display panel. In this way, the design of the driving chip can be simplified, the design cost of the driving chip can be reduced, the resources of the driving chip can be saved, and thus the production cost can be reduced.

[0079] When the data writing module 100 and the bias adjustment module 300 are the same module, in the data writing stage, the second scan signal SP1 is at a low level, and data is written to the driving module 200. This can be regarded as an OBS. Therefore, in the 7T1C circuit, the data writing stage and the third bias stage can be the same stage.

[0080] In the embodiment of the present application, before the light-emitting stage in the second stage, when writing a frame, the driving module 200 receives a data signal DATA. When holding a frame, the driving module 200 does not receive the data signal DATA. That is, before the light-emitting stage, the state of the driving module 200 when writing a frame is different from the state of the driving module 200 when holding a frame. This will cause the display brightness of the driving module 200 in the holding frame to be different from the display brightness of the writing frame, and it is easy to have a flicker problem, seriously affecting the user experience.

[0081] Specifically, the holding frame in the second stage may include a second bias stage. The second bias stage may be before the light-emitting stage of the holding frame. In the second bias stage, the bias adjustment module 300 is used to provide an adjustment signal DVH to the first terminal N2 of the driving module 200 under the control of the first scan signal SP*1. That is, an OBS is performed once in the holding frame. In this way, the driving module 200 also receives a voltage signal in the holding frame. The states of the driving module 200 when holding a frame and writing a frame are the same, both receiving voltage signals, which can reduce the display brightness of the holding frame and improve the flicker problem.

[0082] As an example, when the data writing module 100 and the bias adjustment module 300 are different modules, refer to Figure 10 As shown, it is a timing diagram of the holding frame of an 8T1C pixel circuit provided by the embodiment of the present application. For the 8T1C circuit, the holding frame includes a second bias stage T6 and a light-emitting stage T4 after the second bias stage T6. In the second bias stage T6, the first scan signal SP*1 is at a low level, and the bias adjustment module 300 is turned on. In the light-emitting stage T4, the light-emitting control signal E1 is at a low level, and the first light-emitting control module 700 and the second light-emitting control module 900 are turned on.

[0083] As another example, when the data writing module 100 is multiplexed as the bias adjustment module 300, refer to Figure 11 As shown, it is a timing diagram of the holding frame of a 7T1C pixel circuit provided by the embodiment of the present application. For the 7T1C circuit, in the holding frame, in the second bias stage T6, the second scan signal SP1 is at a low level, and the data writing module 100 is turned on. In the light-emitting stage T4, the light-emitting control signal E1 is at a low level, and the first light-emitting control module 700 and the second light-emitting control module 900 are turned on.

[0084] In the embodiment of the present application, in the first stage (i.e., the low-frequency driving stage), when the bias adjustment module 300 and the data writing module 100 are different modules, refer to Figure 12As shown in the figure, it is a timing diagram of a write frame of another 8T1C pixel circuit provided by an embodiment of the present application. In the write frame, it includes a reset stage T2, a data write stage T3, a reset stage T2, and a light emission stage T4 that are sequentially performed. In the first reset stage T2, the third scan signal S1N1, the second scan signal SP1, and the first scan signal SP*1 are high levels, the fifth scan signal S2N1 is a low level, and the first reset module 500 is turned on. In the data write stage T3, the second scan signal SP1 and the third scan signal S1N1 are low levels, the first scan signal SP*1 and the fifth scan signal S2N1 are high levels, and the data write module 100 and the threshold compensation module 800 are turned on. In the second reset stage T2, the first scan signal SP*1 is a low level, and the second reset module 600 can be turned on to reset the light emission module 400. Among them, in the second reset stage T2, the bias adjustment module 300 will also be turned on. Therefore, the second reset stage T2 can also be regarded as an OBS. Then, in the light emission stage T4, under the action of the light emission control signal E1, the first light emission control module 700 and the second light emission control module 900 can be turned on to drive the light emission module 400 to emit light.

[0085] In an embodiment of the present application, in the first stage, when the data write module 100 is multiplexed as the bias adjustment module 300, refer to Figure 13 As shown in the figure, it is a timing diagram of a write frame of another 7T1C pixel circuit provided by an embodiment of the present application. In the reset stage T2 of the write frame in the first stage, the third scan signal S1N1 and the second scan signal SP1 are high levels, the fifth scan signal S2N1 is a low level, and the first reset module 500 is turned on. In the data write stage T3, the second scan signal SP1 and the third scan signal S1N1 are low levels, the fifth scan signal S2N1 is a high level, and the data write module 100 and the threshold compensation module 800 are turned on. In the light emission stage T4, under the action of the light emission control signal E1, the first light emission control module 700 and the second light emission control module 900 can be turned on to drive the light emission module 400 to emit light.

[0086] In an embodiment of the present application, when switching from the first stage to the second stage, the brightness of the first write frame in the second stage will decrease, resulting in fluctuations in the display brightness and affecting the display effect. It can be set that in the write frame of the second stage, before the light emission stage, the working cycle of the pixel circuit can include multiple reset stages, multiple first bias stages, and multiple data write stages. The first bias stage at least partially overlaps with the reset stage. In the first bias stage, the bias adjustment module 300 provides a first adjustment signal sent from the adjustment signal line to the drive module 200 under the control of the first scan signal.

[0087] Among them, the first bias phase and the data writing phase are alternated, and the reset phase and the data writing phase are alternated. That is to say, before the light emitting phase, multiple reset phases, first bias phases, and data writing phases are performed. Compared with the prior art where only one reset phase and one data writing phase are performed before the light emitting phase, the present application can extend the reset time of the driving module 200, compensate the driving module 200, so as to quickly improve the display brightness of the first written frame, make the brightness of the first written frame in the second stage consistent with the brightness of other frames, and improve the consistency of the display brightness.

[0088] Reference Figure 14 As shown, it is a timing diagram of a written frame of another 7T1C pixel circuit provided by an embodiment of the present application. In the 7T1C circuit, in a written frame, the reset phase T2, the first bias phase T1, and the data writing phase T3 are sequentially performed twice, and then a light emitting phase T4 is entered. Reference Figure 15 As shown, it is a timing diagram of a written frame of another 8T1C pixel circuit provided by an embodiment of the present application. In the 8T1C circuit, in a written frame, the reset phase T2, the first bias phase T1, the data writing phase T3, and the third bias phase T5 are sequentially performed twice, and then a light emitting phase T4 is entered.

[0089] In the embodiment of the present application, performing a strong OBS in the second stage will cause a large difference in the display brightness between the first stage and the second stage. The display brightness in the second stage is higher than that in the first stage, affecting the display effect.

[0090] Specifically, in the first stage, the data signal provided by the data signal line can be denoted as the first data signal, and in the second stage, the data signal provided by the data signal line can be denoted as the second data signal. According to the luminous current formula I = K(PVDD - VDATA) 2 , the larger the data signal voltage value VDATA, the smaller the luminous current I flowing through the light emitting module. Therefore, the data signal voltage value can be increased, thereby reducing the luminous current, so that the display brightness in the first stage and the second stage is consistent. That is to say, the voltage of the second data signal can be set to be greater than the voltage of the first data signal, reducing the luminous current in the second stage, and further reducing the display brightness in the second stage, narrowing the difference in the display brightness between the second stage and the first stage, and improving the consistency of the display effect.

[0091] In a possible implementation manner, since the display brightness is adjusted based on the gamma curve, the gamma curve can represent the mapping relationship between the display brightness and the gray level, and the display brightness can be adjusted by adjusting the voltage VDATA of the data signal. Therefore, there is also a mapping relationship between the gray level in the gamma curve and the voltage VDATA of the data signal.

[0092] Specifically, the display panel may include a first gamma curve and a second gamma curve. In the first gamma curve and the second gamma curve, the display brightness corresponding to the same gray level is the same, but the voltage VDATA of the data signal corresponding to the same gray level is different. Thus, the mapping relationship between the gray level and the voltage VDATA of the data signal in the two gamma curves is different.

[0093] Specifically, the display panel may further include a control module. The control module is connected to the data signal line. In the first stage, the control module may provide a first data signal to the data signal line based on the first gamma curve. In the second stage, the control module may provide a second data signal to the data signal line based on the second gamma curve. Among them, the gray level corresponding to the first data signal in the first gamma curve is the same as the gray level corresponding to the second data signal in the second gamma curve. Thus, since the mapping relationship between the gray level and the voltage VDATA of the data signal in the two gamma curves is different, the voltage of the second data signal can be greater than the voltage of the first data signal at the same gray level, reducing the display brightness difference between the second stage and the first stage and making the display brightness of the first stage and the second stage consistent.

[0094] An embodiment of the present application provides a display panel. The display panel includes a plurality of pixel circuits. The pixel circuit includes: a data writing module, a driving module, a bias adjustment module, and a light emitting module. The driving module and the light emitting module are sequentially electrically connected between a first power supply line and a second power supply line. The first power supply line is used to provide a power signal to the driving module. The data writing module is electrically connected between the data signal line and the first end of the driving module. The bias adjustment module is electrically connected between the adjustment signal line and the first end of the driving module. The first end of the driving module is electrically connected to the first power supply line. The working cycle of the pixel circuit includes a first stage and a second stage. The image refresh rate in the first stage is less than the image refresh rate in the second stage. The write frame in the second stage includes a reset stage and a first bias stage. The reset stage and the first bias stage at least partially overlap. In the first bias stage, the bias adjustment module is used to provide an adjustment signal sent from the adjustment signal line to the driving module under the control of the first scan signal. The voltage value of the adjustment signal is greater than the voltage value of the power signal.

[0095] In this way, in the second stage with a relatively high image refresh rate, during the reset stage, the voltage at the first end of the driving module is the voltage of the power signal. At this time, the driving module does not perform OBS. During the first bias stage, the voltage at the first end of the driving module is the voltage of the adjustment signal. Since the voltage value of the adjustment signal is greater than the voltage value of the power signal, the driving module performs strong OBS at this time. The bias voltage of the driving module during the first bias stage will be greater than that during the reset stage. As the bias voltage increases, the bias voltages of the driving modules in each pixel circuit all increase, which can quickly restore the characteristics of multiple driving modules to a close level, thereby quickly eliminating the influence of the previous frame, eliminating the residual display image caused by smear, and further reducing the number of high-frequency driving frames inserted in the second stage. This can not only improve the smear problem and enhance the display effect, but also reduce the display power consumption.

[0096] Based on the above display panel, an embodiment of the present application further provides a driving method for a display panel, as shown in Figure 16 FIG. which is a schematic flow chart of a driving method for a display panel provided by an embodiment of the present application. The method may include the following steps.

[0097] S101, in the first bias stage of the write frame in the second stage, control the bias adjustment module to conduct to provide an adjustment signal sent from the adjustment signal line to the driving module.

[0098] In an embodiment of the present application, the working cycle of the pixel circuit may include a first stage and a second stage. The image refresh rate in the first stage may be less than that in the second stage. In the first stage, the display image may be driven at a low frequency, such as 1 Hz, and in the second stage, the display image may be driven at a high frequency, such as 60 Hz. During the operation of the pixel circuit, the first stage and the second stage may alternate. That is to say, between adjacent low-frequency frame images driven in a low-frequency driving manner, high-frequency frame images driven in a high-frequency driving manner are inserted to improve the smear problem and enhance the low-frequency display quality.

[0099] Specifically, in the write frame of the second stage, the working process of the pixel circuit may include a reset stage, a first bias stage, a data writing stage, and a light emitting stage. The reset stage and the first bias stage may at least partially overlap. For example, the time period where the first bias stage is located may be within the time period where the reset stage is located, that is, bias adjustment is performed during the reset process. Or, the first bias stage may also be performed after the reset stage, and the time periods where the two stages are located may partially overlap.

[0100] In the reset stage, the first reference signal VREF1 can be transmitted to the control terminal of the driving module 200 to reset the control terminal of the driving module 200. In the first bias stage, the bias adjustment module 300 can be controlled to conduct, so as to provide an adjustment signal DVH emitted from the adjustment signal line to the driving module 200.

[0101] The voltage value of the adjustment signal can be greater than the voltage value of the power supply signal, and can apply a strong bias voltage to the driving module 200, that is, apply a bias voltage greater than the bias voltage received by the driving module 200 in the reset stage to the driving module 200. The bias voltage of the driving module 200 in the first bias stage will be greater than the bias voltage in the reset stage. As the bias voltage increases, the bias voltages of the driving modules 200 in each pixel circuit all increase, and the characteristics of multiple driving modules 200 can be quickly restored to a close level, thereby quickly eliminating the influence of the previous frame, eliminating the residual display screen caused by ghosting, and further reducing the number of high-frequency driving pictures inserted in the second stage. This can not only improve the ghosting problem and the display effect, but also reduce the display power consumption.

[0102] S102, in the data writing stage of the writing frame in the second stage, control the data writing module to conduct, and write the data signal of the data signal line into the control terminal of the driving module.

[0103] In the embodiment of the present application, in the data writing stage, the data writing module 100 can be controlled to conduct, and the data signal DATA of the data signal line is written into the control terminal of the driving module 200 to complete the writing of the data signal.

[0104] S103, in the light emitting stage of the writing frame in the second stage, control the driving module to conduct, and the driving module generates a driving current and transmits it to the light emitting module to control the light emitting module to emit light.

[0105] In the embodiment of the present application, in the light emitting stage, the driving module 200 can be controlled to conduct, and the driving module 200 generates a driving current and transmits it to the light emitting module 400 to control the light emitting module 400 to emit light.

[0106] In a possible implementation manner, since the display brightness is adjusted based on the gamma curve, the gamma curve can represent the mapping relationship between the display brightness and the gray level, and the display brightness can be adjusted by adjusting the voltage VDATA of the data signal. Therefore, there is also a mapping relationship between the gray level in the gamma curve and the voltage VDATA of the data signal.

[0107] Specifically, the display panel may include a first gamma curve and a second gamma curve. In the first gamma curve and the second gamma curve, the display brightness corresponding to the same gray level is the same, but the voltage VDATA of the data signal corresponding to the same gray level is different. Thus, the mapping relationship between the gray level and the voltage VDATA of the data signal in the two gamma curves is different.

[0108] Specifically, the display panel may further include a control module, which is connected to the data signal line. In the first stage, the control module may provide a first data signal to the data signal line based on the first gamma curve. In the second stage, the control module may provide a second data signal to the data signal line based on the second gamma curve. Among them, the gray level corresponding to the first data signal in the first gamma curve is the same as the gray level corresponding to the second data signal in the second gamma curve. Thus, since the mapping relationship between the gray level and the voltage VDATA of the data signal in the two gamma curves is different, the voltage of the second data signal can be greater than the voltage of the first data signal at the same gray level, reducing the display brightness difference between the second stage and the first stage and making the display brightness of the first stage and the second stage consistent.

[0109] In the embodiment of the present application, the characteristics of multiple driving modules can be quickly restored to a close level, thereby quickly eliminating the influence of the previous picture and eliminating the residual display picture caused by ghosting. Furthermore, the number of high-frequency driving pictures inserted in the second stage can be reduced. This can not only improve the ghosting problem and enhance the display effect, but also reduce the display power consumption.

[0110] Based on the display panel provided in the above embodiments, as Figure 17 shown, the embodiment of the present application further provides a display device. The display device may be, for example, a touch display screen, a mobile phone, a tablet computer, a laptop computer, or a television, or any other electronic device with a display function. The display device includes the aforementioned display panel. The display device has a display area AA and a non-display area NA. The non-display area surrounds the display area and is used to set the traces. The display device adopts the aforementioned display panel, which can quickly restore the characteristics of multiple driving modules to a close level, thereby quickly eliminating the influence of the previous picture and eliminating the residual display picture caused by ghosting. Furthermore, the number of high-frequency driving pictures inserted in the second stage can be reduced. This can not only improve the ghosting problem and enhance the display effect, but also reduce the display power consumption.

[0111] Each embodiment in this specification is described in a progressive manner. The same or similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the method embodiments, since they are basically similar to the device embodiments, they are described relatively simply, and the relevant parts can be referred to the description of the device embodiments.

[0112] The above are only the preferred embodiments of the present application. Although the present application has been disclosed above with preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make many possible changes and modifications to the technical solution of the present application, or modify it into equivalent embodiments with equivalent changes, without departing from the scope of the technical solution of the present application. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of protection of the technical solution of the present application.

Claims

1. A display panel, characterized in that, The display panel includes a plurality of pixel circuits; The pixel circuit includes: a data writing module, a driving module, a bias adjustment module, and a light emitting module; the driving module and the light emitting module are sequentially electrically connected between a first power supply line and a second power supply line, and the first power supply line is used to provide a power signal to the driving module; the data writing module is electrically connected between a data signal line and a first end of the driving module; the bias adjustment module is electrically connected between an adjustment signal line and the first end of the driving module, and the first end of the driving module is electrically connected to the first power supply line; The working cycle of the pixel circuit includes a first stage and a second stage, and the image refresh rate in the first stage is less than that in the second stage; the writing frame in the second stage includes a reset stage and a first bias stage, and the reset stage and the first bias stage at least partially overlap; in the first bias stage, the bias adjustment module is used to provide an adjustment signal sent from the adjustment signal line to the driving module under the control of a first scan signal, and the voltage value of the adjustment signal is greater than the voltage value of the power signal.

2. The display panel according to claim 1, wherein The data writing module is multiplexed as the bias adjustment module; In the first bias stage, the data writing module is used to provide a data signal sent from the data signal line to the driving module under the control of a second scan signal; the second scan signal and the first scan signal are the same signal; Wherein, the voltage value of the data signal is greater than the voltage value of the power signal.

3. The display panel according to claim 1 or 2, characterized in that The holding frame in the second stage includes a second bias stage, and the second bias stage is before the light emitting stage of the holding frame; in the second bias stage, the bias adjustment module is used to provide the adjustment signal to the first end of the driving module under the control of the first scan signal.

4. The display panel according to claim 1 or 2, characterized in that, The writing frame in the second stage further includes a third bias stage, and the third bias stage is after the reset stage; in the third bias stage, the bias adjustment module is used to provide the adjustment signal to the first end of the driving module under the control of the first scan signal.

5. The display panel according to claim 4, wherein In the first bias stage, the bias adjustment module provides a first adjustment signal sent from the adjustment signal line to the driving module under the control of the first scan signal; In the third bias stage, the bias adjustment module provides a second adjustment signal sent from the adjustment signal line to the driving module under the control of the first scan signal; Wherein, the voltage value of the first adjustment signal is the same as the voltage value of the second adjustment signal.

6. The display panel according to claim 1 or 2, wherein The pixel circuit includes a first reset module, a second reset module, a first light emitting control module, a threshold compensation module, a second light emitting control module, and a storage module; The first reset module is electrically connected between a first reference signal line and a control end of the driving module, and is used to provide a first reference signal sent from the first reference signal line to the control end of the driving module under the control of a third scan signal. The second reset module is electrically connected between the second reference signal line and the first end of the light-emitting module. The second end of the light-emitting module is electrically connected to the second power supply line. The second reset module is configured to reset the light-emitting module under the control of a fourth scan signal; The first light-emitting control module is electrically connected between the first power supply line and the first end of the driving module; the threshold compensation module is electrically connected between the control end of the driving module and the second end of the driving module. The threshold compensation module is configured to perform threshold compensation on the driving module under the control of a fifth scan signal; the second light-emitting control module is electrically connected between the second end of the driving module and the first end of the light-emitting module; The storage module is electrically connected between the first power supply line and the control end of the driving module. The control ends of the first light-emitting control module and the second light-emitting control module are respectively electrically connected to a light-emitting control signal line.

7. The display panel according to claim 6, wherein The data writing module includes a first transistor, the second reset module includes a second transistor, the bias adjustment module includes a third transistor, the first light-emitting control module includes a fourth transistor, the driving module includes a fifth transistor. The control end of the first transistor is electrically connected to a second scan signal line. The first end of the first transistor is electrically connected to the data signal line. The second end of the first transistor is electrically connected to the first end of the fifth transistor. The second end of the fifth transistor is electrically connected to the light-emitting module. The control end of the fifth transistor is electrically connected to the first reference signal line. The control end of the third transistor is electrically connected to a first scan signal line. The first end of the third transistor is electrically connected to the adjustment signal line. The second end of the third transistor is electrically connected to the first end of the fifth transistor; The second light-emitting control module includes a sixth transistor, the first reset module includes a seventh transistor, the threshold compensation module includes an eighth transistor, the storage module includes a storage capacitor, and the light-emitting module includes a light-emitting diode.

8. The display panel according to claim 7, characterized in that, The seventh transistor and the eighth transistor are N-type transistors. The first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are P-type transistors.

9. The display panel according to claim 8, wherein, When the bias adjustment module and the data writing module are different modules, the fourth scan signal is multiplexed as the first scan signal; When the data writing module is multiplexed as the bias adjustment module, the fourth scan signal is multiplexed as the second scan signal.

10. The display panel according to claim 1 or 2, wherein In the write frame of the second stage, before the light-emitting stage, the working cycle of the pixel circuit includes a plurality of reset stages, a plurality of first bias stages, and a plurality of data writing stages; at least part of the first bias stage coincides with the reset stage. In the first bias stage, the bias adjustment module provides a first adjustment signal from the adjustment signal line to the driving module under the control of the first scan signal; Among them, the first biasing stage and the data writing stage are alternately performed, and the reset stage and the data writing stage are alternately performed.

11. The display panel according to claim 1 or 2, characterized in that, In the first stage, the data signal line provides a first data signal; in the second stage, the data signal line provides a second data signal; Among them, the voltage of the second data signal is greater than the voltage of the first data signal.

12. The display panel according to claim 11, wherein The display panel includes a first gamma curve and a second gamma curve; in the first gamma curve and the second gamma curve, the display brightness corresponding to the same gray level is the same, and the voltage of the data signal corresponding to the same gray level is different; The display panel further includes a control module connected to the data signal line; In the first stage, the control module provides the first data signal to the data signal line based on the first gamma curve; in the second stage, the control module provides the second data signal to the data signal line based on the second gamma curve; Among them, the gray level corresponding to the first data signal in the first gamma curve is the same as the gray level corresponding to the second data signal in the second gamma curve.

13. A driving method of a display panel, characterized in that, For driving the display panel according to any one of claims 1-12, the method includes: In the first biasing stage of the writing frame in the second stage, control the biasing adjustment module to conduct, so as to provide an adjustment signal emitted from the adjustment signal line to the driving module; the voltage value of the adjustment signal is greater than the voltage value of the power supply signal; In the data writing stage of the writing frame in the second stage, control the data writing module to conduct, and write the data signal of the data signal line into the control end of the driving module; In the light emitting stage of the writing frame in the second stage, control the driving module to conduct, and the driving module generates a driving current and transmits it to the light emitting module to control the light emitting module to emit light.

14. The driving method of the display panel according to claim 13, wherein The display panel includes a first gamma curve and a second gamma curve; in the first gamma curve and the second gamma curve, the display brightness corresponding to the same gray level is the same, and the voltage of the data signal corresponding to the same gray level is different; The display panel further includes a control module connected to the data signal line; the method further includes: In the first stage, the control module provides a first data signal to the data signal line based on the first gamma curve; in the second stage, the control module provides a second data signal to the data signal line based on the second gamma curve; Among them, the gray level corresponding to the first data signal in the first gamma curve is the same as the gray level corresponding to the second data signal in the second gamma curve.

15. A display device, characterized in that, Including the display panel according to any one of claims 1 to 12.

Images