A high-precision flash memory chip reliability prediction model construction method and device

By constructing a high-precision flash memory chip reliability prediction model and using a feature forest model to comprehensively evaluate the number of erases, residence time, and number of reads per page, the problem of low prediction accuracy in existing technologies is solved, achieving more efficient testing and more accurate lifetime prediction.

CN116521402BActive Publication Date: 2026-05-29HUAZHONG UNIV OF SCI & TECH

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HUAZHONG UNIV OF SCI & TECH
Filing Date
2023-03-21
Publication Date
2026-05-29

Smart Images

  • Figure CN116521402B_ABST
    Figure CN116521402B_ABST
Patent Text Reader

Abstract

The application discloses a high-precision flash memory chip reliability prediction model construction method and device, relates to the technical field of data storage, and specifically comprises the following steps: acquiring a first feature data set, and training a first feature model according to the first feature data set; acquiring a second feature data set, and training a second feature model according to the second feature data set; acquiring a third feature data set, and training a third feature model according to the third feature data set; determining the weights of the first feature model, the second feature model and the third feature model; and constructing a feature forest model according to the first feature model, the second feature model, the third feature model and the weights. The application respectively models and comprehensively evaluates the erase times, the residence time and the single-page read times which have the greatest impact on the reliability of flash memory chips, so that the actual use of the flash memory chip can be accurately predicted, and the accuracy of flash memory chip reliability prediction is increased.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of data storage technology, and in particular to a method and apparatus for constructing a high-precision flash memory chip reliability prediction model. Background Technology

[0002] Solid-state drives (SSDs), also known as solid-state drives, are hard drives made using solid-state electronic storage chip arrays. They consist of a control unit and storage units (FLASH chips and DRAM chips). SSDs are completely identical to traditional hard drives in terms of interface specifications and definitions, functions, and usage methods. They also have the same product shape and size, but their I / O performance is significantly improved. They are widely used in military, automotive, industrial control, video surveillance, network monitoring, network terminals, power, medical, aerospace, and navigation equipment, among other fields.

[0003] After prolonged use, the NAND flash memory chips used in solid-state drives (SSDs) will experience an increase in bit error rate and number of errors due to factors such as increased erase (P / E) cycles, data residency, and read interference, until they reach their maximum write cycles, which is the lifespan of an SSD.

[0004] In existing technologies, flash memory chips are typically subjected to repeated destructive tests, consisting of erase, write, hold, and read operations, with each cycle constituting one cycle. This process continues until the chip becomes unusable. Reliability predictions are then made by statistically analyzing the physical quantities of programming, erase, hold, and read times of the flash memory block. However, this full-cycle simulation test is time-consuming, yields limited data, and is inefficient. Furthermore, daily use typically involves random combinations of erase, write, hold, and read operations, rather than full-cycle testing, resulting in low accuracy in reliability predictions based on full-cycle test data. Summary of the Invention

[0005] This application provides a method and apparatus for constructing a high-precision flash memory chip reliability prediction model, which solves the problem of low reliability accuracy in the prior art.

[0006] This application provides a method for constructing a high-precision flash memory chip reliability prediction model, the method comprising:

[0007] Obtain a first feature dataset. Each data point in the first feature dataset includes the main feature of erasure counts, several sub-features, and a result feature. The sub-features are the physical characteristics of the storage block corresponding to the main feature. Extract key data from the data in the first feature dataset to construct a key data sample set. Train a feature decision tree model using a decision tree algorithm on the feature dataset. The splitting variables of the decision tree include the main feature and sub-features corresponding to the feature dataset. Train a key decision tree model using a decision tree algorithm on the key data sample set. The splitting variables of the decision tree include the main feature and sub-features corresponding to the feature dataset. Determine the weights of the key decision tree model and the feature decision tree model. Based on the key decision tree model and the feature decision tree model and their respective weights, determine the first feature model.

[0008] Obtain a second feature dataset, in which each data point includes a main feature of residence time, several sub-features, and a result feature. The sub-features are the physical characteristics of the storage block corresponding to the main feature. Train a second feature model based on the second feature dataset.

[0009] Obtain a third feature dataset, wherein each data point in the third feature dataset includes a main feature of single page read count, several sub-features, and a result feature, wherein the sub-features are the physical characteristics of the storage block corresponding to the main feature, and train a third feature model based on the third feature dataset;

[0010] Determine the weights of the first feature model, the second feature model, and the third feature model;

[0011] A feature forest model is constructed based on the first feature model, the second feature model, the third feature model, and their respective weights.

[0012] Optionally, the sub-features include one or more of the following: number of flash memory pages, number of page layers, and flash memory model, and the resulting feature is the number of errors and / or bit error rate.

[0013] Optionally, determining the weights of the first feature model, the second feature model, and the third feature model includes:

[0014] Calculate the number of erasures in the first feature dataset as a n The average number of errors is b n Calculate the relationship between the average number of errors and the number of erase operations: ; Calculate the residence time in the second feature dataset as c n The average number of errors is d n Calculate the relationship between the average number of errors and the number of dwell operations: ;

[0015] The number of page reads in the third feature dataset is calculated as e.n The average number of errors is f n Calculate the relationship between the average number of errors and read operations: ;

[0016] Normalization is performed to obtain the weights of the first feature model. The weights of the second feature model The weights of the third feature model .

[0017] Optionally, obtaining the first feature dataset includes:

[0018] S101: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0019] S102: The flash memory chip is operated with one write operation and one erase operation as one cycle, and this cycle is repeated for a cycles;

[0020] S103: Perform a data reading operation on the flash memory chip to obtain the result characteristics;

[0021] Repeat steps S101 to S103 until the number of flash memory chip read operations exceeds the first threshold.

[0022] Optionally, obtaining the second feature dataset includes:

[0023] S201: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0024] S202: Heat the flash memory chip and keep it warm;

[0025] S203: After cooling the flash memory chip to room temperature, a read operation is performed to obtain the result characteristics;

[0026] Repeat steps S202 to S203 until the heating and heat preservation time of the flash memory chip exceeds the threshold time.

[0027] Optionally, obtaining the third feature dataset includes:

[0028] S301: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0029] S302: Perform b read operations on a certain storage page in the flash memory chip;

[0030] S303: Perform a read operation on the storage page in the flash memory chip to obtain the result characteristics;

[0031] Repeat steps S302 to S303 until the number of storage page read operations exceeds the second threshold.

[0032] Optionally, training a key decision tree model using a decision tree algorithm on the key data sample set includes:

[0033] The bit error rate extracted from the key data sample set is 3.3 × 10⁻⁶. -4 Up to 10 -3 A high-error-rate sample set N1 was constructed from the data, and samples with a bit error rate greater than 6.7 × 10⁻⁶ were extracted. -3 The data was used to construct a high-error-rate sample set N2;

[0034] A decision tree model with a high error rate is trained using the decision tree algorithm on the sample set with a high error rate, and a decision tree model with a high error rate is trained using the decision tree algorithm on the sample set with a high error rate.

[0035] The ratio of the number of data points m1 in the higher error rate sample set N1 to the number of data points N in the first feature dataset is determined as the weight of the higher error rate decision tree model, and the ratio of the number of data points m2 in the high error rate sample set N2 to the number of data points N in the first feature dataset is determined as the weight of the high error rate decision tree model.

[0036] The key decision tree model is determined based on the decision tree model with higher error rate and the decision tree model with high error rate, as well as their respective weights.

[0037] Optionally, a feature decision tree model is trained using a decision tree algorithm on the feature dataset, including:

[0038] n samples are randomly drawn with replacement from the feature dataset;

[0039] Each of the sample sets is used to construct a decision tree model using the decision tree algorithm;

[0040] A random forest model is constructed using each decision tree model with a weight of 1 / n, serving as the feature decision tree model.

[0041] This application also discloses a high-precision flash memory chip reliability prediction model construction device, the reliability prediction model construction device comprising:

[0042] The first acquisition module is used to acquire a first feature dataset, each data in the first feature dataset including a main feature of erasure count and several sub-features, wherein the sub-features are the physical characteristics of the storage block corresponding to the main feature, and to determine a first feature forest model based on the first feature dataset.

[0043] The second acquisition module is used to acquire a second feature dataset, each data in the second feature dataset including a residence time main feature and several sub-features, the sub-features being the physical characteristics of the storage block corresponding to the main feature, and to determine a second feature forest model based on the second feature dataset.

[0044] The third acquisition module is used to acquire the third feature dataset. Each data in the third feature dataset includes a main feature of single page read count and several sub-features. The sub-features are the physical characteristics of the storage block corresponding to the main feature. The third feature forest model is determined based on the third feature dataset.

[0045] The weight determination module is used to determine the weights of the first feature forest model, the second feature forest model, and the third feature forest model.

[0046] The construction module is used to construct a total feature forest model based on the first feature forest model, the second feature forest model, the third feature forest model, and their respective weights.

[0047] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0048] 1. This application comprehensively evaluates the erase count, dwell time, and single page read count, which have the greatest impact on the reliability of flash memory chips, by modeling them separately. This allows for accurate prediction based on the actual usage of flash memory chips, thereby increasing the accuracy of flash memory chip reliability prediction.

[0049] 2. This application can utilize an improved testing method to perform batch continuous testing on individual features such as erase count, dwell time, and single page read count, thereby improving testing efficiency and saving testing time. It can also perform serial testing on the same flash memory chip to test its bit error rate and number of errors under different erase counts, dwell times, and read interference conditions, thereby reducing testing costs.

[0050] 3. Key data is extracted from the feature dataset to construct high error rate sample sets and relatively high error rate sample sets, and models are built separately. This highlights the role of key data, making the model more sensitive to predicting when flash memory reaches the error rate limit. When in use, bad blocks can be predicted as early as possible, resulting in higher accuracy.

[0051] 4. This application adopts a random sampling method, which makes the model training less prone to overfitting and has good noise resistance. It can also handle high-dimensional data, does not require feature selection, is not sensitive to missing features, and the training can be highly parallelized, which has an advantage in training speed for large sample data. Attached Figure Description

[0052] Figure 1 This is a flowchart illustrating a method for constructing a high-precision flash memory chip reliability prediction model according to this application;

[0053] Figure 2 This is a structural diagram of the feature forest model constructed in the embodiments of this application;

[0054] Figure 3 This is a flowchart of S100 in an embodiment of this application;

[0055] Figure 4 This is a flowchart of S200 in an embodiment of this application;

[0056] Figure 5 This is a flowchart of S300 in an embodiment of this application;

[0057] Figure 6 This is a flowchart of the training of the first feature model in the embodiments of this application;

[0058] Figure 7 This is a structural diagram of the first feature model constructed in the embodiments of this application;

[0059] Figure 8 This is a flowchart of S400 in an embodiment of this application;

[0060] Figure 9 This is a structural block diagram of an embodiment of a high-precision flash memory chip reliability prediction model construction device according to this application. Detailed Implementation

[0061] To better understand the technical solution, the above technical solution will be described in detail below with reference to the accompanying drawings and specific implementation methods.

[0062] This application provides a method for constructing a high-precision flash memory chip reliability prediction model, such as... Figure 1 As shown, it includes:

[0063] S100: Obtain a first feature dataset, where each data in the first feature dataset includes a main feature of the number of erases, several sub-features, and a result feature. The sub-features are the physical characteristics of the storage block corresponding to the main feature. Train a first feature model based on the first feature dataset.

[0064] S200: Obtain the second feature dataset, where each data point in the second feature dataset includes a main feature of residence time, several sub-features, and a result feature. The sub-features are the physical characteristics of the storage block corresponding to the main feature. Train the second feature model based on the second feature dataset.

[0065] S300: Obtain the third feature dataset, wherein each data in the third feature dataset includes a main feature of single page read count, several sub-features and a result feature, wherein the sub-features are the physical characteristics of the storage block corresponding to the main feature, and train the third feature model based on the third feature dataset;

[0066] S400: Determine the weights of the first feature model, the second feature model, and the third feature model;

[0067] S500: Construct a feature forest model based on the first feature model, the second feature model, the third feature model, and their respective weights.

[0068] Once the feature forest model is built, it can be directly applied to predict the reliability of memory chips. In practical use, the memory chip under test can be tested using chip testing instruments. The current number of erases, residence time, and number of single page reads of the memory chip can be obtained in units of storage pages or storage blocks. The obtained current number of erases, residence time, and number of single page reads can be substituted into the feature forest model to predict the bit error rate of the flash memory chip, thereby evaluating the reliability of the flash memory chip.

[0069] like Figure 2 As shown, by modeling and comprehensively evaluating the erase count, dwell time, and single page read count, which have the greatest impact on the reliability of flash memory chips, accurate predictions can be made based on the actual usage of flash memory chips, thereby increasing the accuracy of flash memory chip reliability predictions.

[0070] In practice, improved testing methods can be used to perform batch continuous testing on individual characteristics such as erase count, dwell time, and single page read count, thereby improving testing efficiency and saving testing time. Furthermore, serial testing can be performed on the same flash memory chip to test its bit error rate and number of errors under different erase counts, dwell times, and read interference conditions, thus reducing testing costs.

[0071] Flash memory chips have a maximum number of erasable cycles. As the number of erasable cycles increases, the oxide layer ages, and the charge of the storage cells becomes more prone to abnormalities. This leads to an increase in the bit error rate and the number of errors, meaning a decrease in the reliability of the flash memory chip. Specifically, for example... Figure 3 As shown, obtaining the first feature dataset in S100 includes:

[0072] S101: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0073] S102: The flash memory chip is operated with one write operation and one erase operation as one cycle, and this cycle is repeated for a cycles;

[0074] S103: Perform a data reading operation on the flash memory chip to obtain the result characteristics;

[0075] Repeat steps S101 to S103 until the number of read operations on the flash memory chip exceeds the first threshold.

[0076] Preferably, the range of 'a' is 50 to 200, and the number of times the first threshold is 5000 to 6000.

[0077] For example, the flash memory chip is operated on in units of 100 erase cycles until the number of erase cycles exceeds a first threshold. Then, the test data is collected and organized as the first feature dataset.

[0078] Over time, electrons stored in the memory cells are lost, leading to misinterpretations when reading data. Tests are performed on flash memory chips at consecutive time intervals to obtain the bit error rate and number of errors at different residence times, collecting test data. However, only long residence times cause a significant change in the bit error rate. To improve testing efficiency, the flash memory chips can be heated in an oven. High temperatures accelerate the aging of flash memory chips, thus testing the impact of residence time on the chip. Specifically, such as... Figure 4 As shown, obtaining the second feature dataset in S200 includes:

[0079] S201: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0080] S202: Heat the flash memory chip and keep it warm;

[0081] S203: After cooling the flash memory chip to room temperature, a read operation is performed to obtain the result characteristics;

[0082] Repeat steps S202 to S203 until the flash memory chip heating time exceeds the threshold time.

[0083] Preferably, the chip heating temperature is 75-85℃, the holding time is 2.5-4 hours, and the threshold time is 24-28 hours. The heating temperature and holding time are the same for repeated heating within the threshold time period.

[0084] When reading a single page from a flash memory block, all unread pages are frequently subjected to high voltage, leading to abnormal charge leakage and an increase in the flash memory's bit error rate and number of errors. Specifically, for example... Figure 5 As shown, obtaining the third feature dataset as described in S300 includes:

[0085] S301: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0086] S302: Perform b read operations on a certain storage page in the flash memory chip;

[0087] S303: Perform a read operation on the storage page in the flash memory chip to obtain the result characteristics;

[0088] Repeat steps S302 to S303 until the number of storage page read operations exceeds the second threshold.

[0089] Preferably, the range of b is 500~2000, and the number of times the second threshold is 30000~35000.

[0090] For example, a single page of a flash memory chip is read 30,000 times at intervals of 1,000 times. The bit error rate and number of errors of the flash memory are tested under different numbers of read operations. The test data is collected and organized as the third feature dataset.

[0091] Optionally, 90% of the data obtained in S100, S200, and S300 can be used as the first feature dataset, the second feature dataset, and the third feature dataset for training, while 10% can be used as the test set to validate the trained model. Further, the first feature dataset corresponds to the main feature of erase counts, the second feature dataset to the main feature of dwell time, and the third feature dataset to the main feature of single-page read counts. Each data point in the feature dataset includes, in addition to the main feature, several sub-features composed of the physical characteristics of the storage block corresponding to the main feature. Specifically, sub-features can include one or more of the following: flash memory page count, page layer count, and flash memory model. The flash memory model can be a two-level storage cell (MLC, Multi-Level Cell), a three-level storage cell (TLC, Trinary-Level Cell), or a four-level storage cell (QLC, Quad-Level Cell). Different flash memory models correspond to different page layers; for example, a TLC chip has three layers: top page, middle page, and bottom page. Differences exist between different pages; obtaining this information allows for more accurate classification of the storage blocks corresponding to the main features, improving the accuracy of reliability prediction.

[0092] The data from different pages are categorized, and then the number of erases, the number of flash pages, the number of page layers, and the flash memory model are used as the first feature dataset; the dwell time, the number of flash pages, the number of page layers, and the flash memory model are used as the second feature dataset; and the number of reads per page, the number of flash pages, the number of page layers, and the flash memory model are used as the third feature dataset.

[0093] Since the data structures of the first feature dataset, the second feature dataset, and the third feature dataset are identical except for the main feature, the same algorithm can be used for training. The following section uses the first feature dataset as an example to illustrate how to train a first feature model based on the first feature dataset. Figure 7 and Figure 8 As shown, it specifically includes:

[0094] S10: Extract key data from the data in the first feature dataset to construct a key data sample set. The key data is data with a bit error rate greater than 10. -5 The data.

[0095] Key data are extracted from the data in the first feature dataset to construct a key data sample set. A separate model is built for the key data sample set to make the prediction model more sensitive to high bit error rate situations and to predict bad blocks as early as possible when using it.

[0096] S20: Train a feature decision tree model using the decision tree algorithm on the first feature dataset. The splitting variables of the decision tree include the main features and sub-features corresponding to the feature dataset.

[0097] Decision trees are used for decision-making in a tree-like structure. Decision trees can be constructed based on algorithms such as ID3, C4.5, and CART. In this embodiment, the CART algorithm is used to generate the decision tree. Each internal node of the decision tree represents a judgment on an attribute, each branch represents the output of a judgment result, and finally, each leaf node represents a classification result. During tree generation, it is necessary to select which feature to use for splitting. Generally, the principle for selecting features for sample splitting is to ensure that the nodes after splitting have higher "purity," using the Gini coefficient as a metric. Assuming the current sample set is D, where the proportion of samples in class k is pk (k=1,2...n), the Gini coefficient of D is shown in the following formula.

[0098]

[0099] A smaller Gini coefficient indicates higher purity of the dataset. The following are the implementation steps for constructing a CART decision tree using a binary tree structure.

[0100] Among all possible features A and all their possible split points a, the feature with the smallest Gini index and its corresponding split point are selected as the optimal feature and the optimal split point. Based on the optimal feature and the optimal split point, two child nodes are generated from the current node. By continuously selecting the optimal feature and the optimal split point, a CART decision tree is finally obtained.

[0101] Input: First feature dataset D = {d1,d2, ...,dN}, splitting variable A ∈ {a1,a2, ...,ad}, stopping conditions include: limiting decision tree depth, number of leaf nodes, number of leaf node samples, information gain, etc.

[0102] Output: CART decision tree (Ti,Di,v), where T is a node, D is the dataset split, and v is the optimal split point.

[0103] process:

[0104] (1) Apply v to the first feature dataset D at node T to find the segmentation attribute a.

[0105] (2) Assume that n is the number of child nodes of node T.

[0106] (3) If (T split)

[0107] (4) Divide the dataset D into D1, D2, ..., Dn, and label the splitting attribute a with T.

[0108] (5) Construct the nodes T1, T2, ..., Tn of the child node T, and denote them as edge(T, Ti), and denote the corresponding predicted value as q(T, Ti).

[0109] (6) For each i∈{1,···,n}.

[0110] (7) Construct the CART decision tree (Ti,Di,v).

[0111] (8) End for each.

[0112] (11) End for

[0113] Optionally, S20 trains a feature decision tree model using the decision tree algorithm on the feature dataset, which can be done through random sampling, specifically including:

[0114] S21: Randomly select n sample sets with replacement from the feature dataset;

[0115] For example, the first feature dataset contains 1000 data points, and 10 sample sets with replacement are randomly selected, with 200 data points in each sample set.

[0116] S22: A decision tree model is constructed for each of the aforementioned sample sets using the decision tree algorithm;

[0117] Each sample set uses 200 data points to construct one decision tree model using the decision tree algorithm, and a total of 10 decision tree models are constructed from the 10 sample sets.

[0118] Taking a sample set as an example, the number of erases, the number of flash pages, the number of page layers, and the flash memory type are used as the splitting variables for the decision tree. Based on these variables, each node in the decision tree is divided into two child nodes. An 18kb storage page contains 147,456 storage units. The Gini coefficient is calculated by classifying prediction errors according to the following rules: 0-20 is class 1, with a calculated value of 10; 21-40 is class 2, with a calculated value of 30; 41-60 is class 3, with a calculated value of 50; 61-80 is class 4, with a calculated value of 70; 81-100 is class 5, with a calculated value of 90; 101-120 is class 6, with a calculated value of 110; 121-140 is class 7, with a calculated value of 130; 141-160 is class 8, with a calculated value of 150; 161-180 is class 9, with a calculated value of 170; 181-200 is class 10, with a calculated value of 190; and greater than 200 is class 11, with a calculated value of 200. During model training, a decision tree model is used for classification. During prediction, the predicted values ​​are weighted using the numerical values ​​corresponding to each class.

[0119] Then, when dividing nodes, we hope to reduce uncertainty after node division, group similar data together, and determine whether the data purity after node division is higher, i.e., the Gini coefficient is smaller, and obtain the current optimal feature and optimal split point from all possible features and split points.

[0120]

[0121] Where Gini(D) represents the Gini coefficient of the samples after the nodes are partitioned according to the partitioning variable, p k This represents the proportion of samples in class k.

[0122] Finally, a traversal method is used to iterate through all the splitting variables to obtain the optimal feature and the optimal split point, minimizing the Gini coefficient of the classified data. Each time an optimal feature and optimal split point are selected, the data at that node is divided into two subtrees. By continuously selecting the optimal feature and optimal split point, a CART decision tree is obtained.

[0123] S23: Construct a random forest model as the feature decision tree model, with each decision tree model having a weight of 1 / n.

[0124] For example, a random forest model can be constructed using 10 decision tree models, each with a weight of 1 / 10, as a feature decision tree model.

[0125] Using random sampling makes model training less prone to overfitting and provides good noise resistance. It can also handle high-dimensional data without feature selection, is insensitive to missing features, and allows for highly parallel training, giving it an advantage in training speed for large datasets.

[0126] S30: The key data sample set is used to train a key decision tree model using a decision tree algorithm. The splitting variables of the decision tree include the main features and sub-features corresponding to the feature dataset.

[0127] Specifically, the step S30, which involves training a first key decision tree model using a decision tree algorithm on the key data sample set, may include:

[0128] S31: The bit error rate extracted from the key data sample set is 3.3 × 10⁻⁶. -4 Up to 10 -3 A high-error-rate sample set N1 was constructed from the data, and samples with a bit error rate greater than 6.7 × 10⁻⁶ were extracted. -3 The data was used to construct a high-error-rate sample set N2.

[0129] The key data sample set was further divided, and separate models were built for the high error rate sample set and the relatively high error rate sample set. This highlighted and strengthened the role of key data, making the model more sensitive to predicting when flash memory reaches the error rate limit. When in use, bad blocks can be predicted as early as possible, resulting in higher accuracy.

[0130] For example, for an 18kb storage page containing 147,456 storage cells, data from storage cells with 50-150 errors are extracted to construct a high error rate sample set N1, and data from storage cells with more than 100 errors are extracted to construct a high error rate sample set N2.

[0131] S32: Train a decision tree model with a higher error rate using the decision tree algorithm with the sample set with a higher error rate, and train a decision tree model with a higher error rate using the decision tree algorithm with the sample set with a high error rate.

[0132] For the sample set N1 with a relatively high error rate, the Gini coefficient is calculated by classifying the prediction errors according to the following rules: 50-100 is class 1 with a calculated value of 0; 101-110 is class 2 with a calculated value of 105; 111-120 is class 3 with a calculated value of 115; 121-130 is class 4 with a calculated value of 125; 131-140 is class 5 with a calculated value of 135; and 141-150 is class 6 with a calculated value of 145. Finally, the corresponding CART decision tree is obtained.

[0133] For the high error rate sample set N2 mentioned above, the Gini coefficient is calculated by classifying the prediction errors according to the following rules: 100-150 is class 1, with a calculated value of 0; 151-160 is class 2, with a calculated value of 155; 161-170 is class 3, with a calculated value of 165; 171-180 is class 4, with a calculated value of 175; 181-190 is class 5, with a calculated value of 185; 191-200 is class 6, with a calculated value of 195; and greater than 200 is class 7, with a calculated value of 200. Finally, the corresponding CART decision tree is obtained.

[0134] Setting the calculated value of the low-prediction category to 0 can avoid the influence of the key data sample set on the low-prediction category and improve the accuracy of the prediction.

[0135] S33: The ratio of the number of data points m1 in the higher error rate sample set N1 to the number of data points N in the first feature dataset is determined as the weight of the higher error rate decision tree model, and the ratio of the number of data points m2 in the high error rate sample set N2 to the number of data points N in the first feature dataset is determined as the weight of the high error rate decision tree model.

[0136] S34: Determine the key decision tree model based on the decision tree model with higher error rate and the decision tree model with high error rate, as well as their respective weights.

[0137] During prediction, the feature data corresponding to the flash memory chip to be tested is substituted into the feature model to obtain the predicted classification result. The calculated value corresponding to that class is then used as the predicted value for weighted averaging. Taking the above classification and number of decision trees as an example, the number of erase cycles of the flash memory chip to be tested is substituted into the first feature model. The following example illustrates how this model is used:

[0138] Example 1: Suppose the input data is erased 3000 times, and the random forest model produces 10 predicted classification results as follows: assuming 5 results are in class 4, 3 results are in class 3, and 2 results are in class 1, then the final prediction error of the random forest model is:

[0139] 5 / 10 x 70 + 3 / 10 x 50 + 2 / 10 x 10 = 52

[0140] Simultaneously, the prediction result obtained from the higher bit error rate decision tree model is Class 1, corresponding to 0; the prediction result obtained from the high bit error rate decision tree model is Class 1, corresponding to 0. When the output results of both the higher bit error rate and high bit error rate decision tree models are 0, the prediction result is directly obtained from the random forest model.

[0141] Example 2: Suppose the input data is erased 10,000 times, and the random forest model produces 10 predicted classification results as follows: 4 results are in 5 classes, 3 in 6 classes, and 3 in 4 classes. Then the final prediction error count of the random forest model is:

[0142] 4 / 10 x 90 + 3 / 10 x 110 + 3 / 10 x 70 = 90

[0143] Meanwhile, the prediction result from the higher bit error rate decision tree model is classified as Class 2, corresponding to 105; the result from the high bit error rate decision tree model is classified as Class 1, corresponding to 0. Weighting 105 and 90, assuming N is 100 and m1 is 10, the final prediction result is:

[0144] 90 / 100 x 90 + 10 / 100 x 105 = 91.5

[0145] Example 3: Suppose the input data has been erased 15,000 times. The random forest model produces 10 predicted classification results as follows: 4 results are for classes of 8, 1 is for classes of 9, and 5 are for classes of 7. The final prediction error of the random forest model is:

[0146] 4 / 10x150+1 / 10x170+5 / 10x130=142;

[0147] The decision tree model with a higher bit error rate yields a predicted classification result of 6 classes, corresponding to 145; the decision tree model with a lower bit error rate yields a predicted classification result of 2 classes, corresponding to 155. Assuming N=100, m1=10, m2=10, the final prediction result is calculated as follows:

[0148] 80 / 100x142+10 / 100x145+10 / 100x155=143.6

[0149] S40: Determine the respective weights of the key decision tree model and the feature decision tree model, and determine the first feature forest model based on the key decision tree model, the feature decision tree model, and their respective weights.

[0150] In some embodiments, determining the weights of the first feature forest model, the second feature forest model, and the third feature forest model in step S400 includes:

[0151] S401: Calculate the number of erasure cycles as a n The average number of errors is b n Calculate the relationship between the average number of errors and the number of erase operations: S402: Calculate the dwell time as c n The average number of errors is d nCalculate the relationship between the average number of errors and the number of dwell operations: ;

[0152] S403: Calculate the number of page reads per page as e n The average number of errors is f n Calculate the relationship between the average number of errors and read operations: ;

[0153] S404: Perform normalization to obtain the weights of the first feature forest model. The weights of the second feature forest model The weights of the third feature forest model .

[0154] The average number of errors corresponding to different principal features can reflect the impact of different principal feature operations on the number of errors, i.e., the reliability of flash memory chips. Determining the weights of the first, second, and third feature forest models using the above method allows the influence of the principal features to be matched with the forest models, resulting in higher prediction accuracy.

[0155] For example, after calculation, A=0.1, B=0.4, C=0.01, and normalization, P1=0.1961, P2=0.7843, P3=0.0196. If, in actual prediction, the memory chip under test is tested using a chip testing instrument, and the flash memory chip under test has 3000 erase cycles, a residence time of 6 hours, and 10000 page reads, then substituting the erase cycles into the first feature forest model, the residence time into the second feature forest model, and the page reads into the third feature forest model, we obtain a prediction error of 30 corresponding to the erase cycles, 40 corresponding to the residence time, and 10 corresponding to the page reads. The final prediction result is:

[0156] 30x0.1961+40x0.7843+10x0.0196=37.451

[0157] refer to Figure 9 This paper presents a structural block diagram of an embodiment of a high-precision flash memory chip reliability prediction model construction device according to this application, which may specifically include the following modules:

[0158] The first training acquisition module 601 is used to acquire a first feature dataset, each data in the first feature dataset including a main feature of erasure count and several sub-features, wherein the sub-features are the physical characteristics of the storage block corresponding to the main feature, and a first feature forest model is determined based on the first feature dataset.

[0159] The second training acquisition module 602 is used to acquire a second feature dataset, wherein each data in the second feature dataset includes a main feature of residence time and several sub-features, wherein the sub-features are the physical characteristics of the storage block corresponding to the main feature, and a second feature forest model is determined based on the second feature dataset.

[0160] The third training module 603 is used to acquire a third feature dataset, wherein each data in the third feature dataset includes a main feature of single page read count and several sub-features, wherein the sub-features are the physical characteristics of the storage block corresponding to the main feature, and a third feature forest model is determined based on the third feature dataset.

[0161] The weight determination module 604 is used to determine the weights of the first feature forest model, the second feature forest model, and the third feature forest model.

[0162] The construction module 605 is used to construct a total feature forest model based on the first feature forest model, the second feature forest model, the third feature forest model, and their respective weights.

[0163] Optionally, the weight determination module 604 includes:

[0164] The first calculation submodule is used to calculate the number of erasures (a) in the first feature dataset. n The average bit error rate at that time is b n Calculate the relationship between the average number of errors and the number of erase operations: The second calculation submodule is used to calculate the central residence time of the second feature data as c. n The average bit error rate at that time is d n Calculate the relationship between the average number of errors and the number of dwell operations: ;

[0165] The third calculation submodule is used to calculate the number of page reads in the third feature dataset as e. n The average bit error rate at that time is f n Calculate the relationship between the average number of errors and read operations: ;

[0166] The normalization submodule performs normalization to obtain the weights of the first feature model. The weights of the second feature model The weights of the third feature model .

[0167] Optionally, the first training acquisition module 601 includes a first loop submodule for performing the following steps:

[0168] S101: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0169] S102: The flash memory chip is operated with one write operation and one erase operation as one cycle, and this cycle is repeated for a cycles;

[0170] S103: Perform a data reading operation on the flash memory chip to obtain the result characteristics;

[0171] Repeat steps S101 to S103 until the number of flash memory chip read operations exceeds the first threshold.

[0172] Optionally, the second training acquisition module 602 includes a second loop submodule for performing the following steps:

[0173] S201: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0174] S202: Heat the flash memory chip and keep it warm;

[0175] S203: After cooling the flash memory chip to room temperature, a read operation is performed to obtain the result characteristics;

[0176] Repeat steps S202 to S203 until the heating and heat preservation time of the flash memory chip exceeds the threshold time.

[0177] Optionally, the third training acquisition module 603 includes a third loop submodule for performing the following steps:

[0178] S301: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics;

[0179] S302: Perform b read operations on a certain storage page in the flash memory chip;

[0180] S303: Perform a read operation on the storage page in the flash memory chip to obtain the result characteristics;

[0181] Repeat steps S302 to S303 until the number of storage page read operations exceeds the second threshold.

[0182] Optionally, the first training module 601 further includes:

[0183] The extraction submodule is used to extract key data from the data in the first feature dataset to construct a key data sample set. The key data is data with a bit error rate greater than 3.3 × 10⁻⁶. -4 Data;

[0184] The feature decision tree model training submodule is used to train a feature decision tree model using the decision tree algorithm on the feature dataset. The splitting variables of the decision tree include the main features and sub-features corresponding to the feature dataset.

[0185] The key decision tree model training submodule is used to train the key decision tree model using the decision tree algorithm through the key data sample set. The splitting variables of the decision tree include the main features and sub-features corresponding to the feature dataset.

[0186] The first feature model construction submodule is used to determine the respective weights of the key decision tree model and the feature decision tree model, and to determine the first feature model based on the key decision tree model, the feature decision tree model and their respective weights.

[0187] Optionally, the key decision tree model training submodule is also used for:

[0188] The bit error rate extracted from the key data sample set is 3.3 × 10⁻⁶. -4 Up to 10 -3 A high-error-rate sample set N1 was constructed from the data, and samples with a bit error rate greater than 6.7 × 10⁻⁶ were extracted. -3 The data was used to construct a high-error-rate sample set N2;

[0189] A decision tree model with a high error rate is trained using the decision tree algorithm on the sample set with a high error rate, and a decision tree model with a high error rate is trained using the decision tree algorithm on the sample set with a high error rate.

[0190] The ratio of the number of data points m1 in the higher error rate sample set N1 to the number of data points N in the first feature dataset is determined as the weight of the higher error rate decision tree model, and the ratio of the number of data points m2 in the high error rate sample set N2 to the number of data points N in the first feature dataset is determined as the weight of the high error rate decision tree model.

[0191] The key decision tree model is determined based on the decision tree model with higher error rate and the decision tree model with high error rate, as well as their respective weights.

[0192] Optionally, the feature decision tree model training submodule is also used for:

[0193] n samples are randomly drawn with replacement from the feature dataset;

[0194] Each of the sample sets is used to construct a decision tree model using the decision tree algorithm;

[0195] A random forest model is constructed with each decision tree model having a weight of 1 / n.

[0196] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0197] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0198] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0199] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0200] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0201] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from the scope of the invention.

[0202] The spirit and scope of the invention are as follows: Thus, if these modifications and variations of the invention fall within the scope of the claims of the invention and their equivalents, the invention is also intended to include these modifications and variations.

Claims

1. A method for constructing a high-precision flash memory chip reliability prediction model, characterized in that, The reliability prediction model construction method includes: A first feature dataset is obtained, wherein each data point in the first feature dataset includes a main feature of erasure count, several sub-features, and a result feature. The sub-features are the physical characteristics of the storage block corresponding to the main feature. Key data is extracted from the data in the first feature dataset to construct a key data sample set. A feature decision tree model is trained using a decision tree algorithm on the feature dataset, and the splitting variables of the decision tree include the main feature and sub-features corresponding to the feature dataset. A key decision tree model is trained using a decision tree algorithm on the key data sample set, and the splitting variables of the decision tree include the main feature and sub-features corresponding to the feature dataset. The weights of the key decision tree model and the feature decision tree model are determined, and a first feature model is determined based on the key decision tree model, the feature decision tree model, and their respective weights. Obtain a second feature dataset, in which each data point includes a main feature of residence time, several sub-features, and a result feature. The sub-features are the physical characteristics of the storage block corresponding to the main feature. Train a second feature model based on the second feature dataset. Obtain a third feature dataset, wherein each data point in the third feature dataset includes a main feature of single page read count, several sub-features, and a result feature, wherein the sub-features are the physical characteristics of the storage block corresponding to the main feature, and train a third feature model based on the third feature dataset; Determine the weights of the first feature model, the second feature model, and the third feature model; A feature forest model is constructed based on the first feature model, the second feature model, the third feature model, and their respective weights.

2. The reliability prediction model construction method as described in claim 1, characterized in that, The sub-features include one or more of the following: number of flash memory pages, number of page layers, and flash memory model; the result feature is the number of errors and / or bit error rate.

3. The reliability prediction model construction method as described in claim 1, characterized in that, Determining the weights of the first feature model, the second feature model, and the third feature model includes: Calculate the number of erasures in the first feature dataset as a n The average number of errors is b n Calculate the relationship between the average number of errors and the number of erase operations: ; Calculate the central residence time of the second feature dataset as c n The average number of errors is d n Calculate the relationship between the average number of errors and the number of dwell operations: ; The number of page reads in the third feature dataset is calculated as e. n The average number of errors is f n Calculate the relationship between the average number of errors and read operations: ; Normalization is performed to obtain the weights of the first feature model. The weights of the second feature model The weights of the third feature model .

4. The reliability prediction model construction method as described in claim 1, characterized in that, The process of obtaining the first feature dataset includes: S101: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics; S102: The flash memory chip is operated with one write operation and one erase operation as one cycle, and this cycle is repeated for a cycles; S103: Perform a data reading operation on the flash memory chip to obtain the result characteristics; Repeat steps S101 to S103 until the number of flash memory chip read operations exceeds the first threshold.

5. The reliability prediction model construction method as described in claim 1, characterized in that, The process of obtaining the second feature dataset includes: S201: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics; S202: Heat the flash memory chip and keep it warm; S203: After cooling the flash memory chip to room temperature, a read operation is performed to obtain the result characteristics; Repeat steps S202 to S203 until the heating and heat preservation time of the flash memory chip exceeds the threshold time.

6. The reliability prediction model construction method as described in claim 1, characterized in that, The acquisition of the third feature dataset includes: S301: Write data to the flash memory chip, read the data in the flash memory chip, and obtain the result characteristics; S302: Perform b read operations on a certain storage page in the flash memory chip; S303: Perform a read operation on the storage page in the flash memory chip to obtain the result characteristics; Repeat steps S302 to S303 until the number of storage page read operations exceeds the second threshold.

7. The reliability prediction model construction method as described in claim 6, characterized in that, The step of training a key decision tree model using a decision tree algorithm on the key data sample set includes: The bit error rate extracted from the key data sample set is 3.3 × 10⁻⁶. -4 Up to 10 -3 A high-error-rate sample set N1 was constructed from the data, and samples with a bit error rate greater than 6.7 × 10⁻⁶ were extracted. -3 The data was used to construct a high-error-rate sample set N2; A decision tree model with a high error rate is trained using the decision tree algorithm on the sample set with a high error rate, and a decision tree model with a high error rate is trained using the decision tree algorithm on the sample set with a high error rate. The ratio of the number of data points m1 in the higher error rate sample set N1 to the number of data points N in the first feature dataset is determined as the weight of the higher error rate decision tree model, and the ratio of the number of data points m2 in the high error rate sample set N2 to the number of data points N in the first feature dataset is determined as the weight of the high error rate decision tree model. The key decision tree model is determined based on the decision tree model with higher error rate and the decision tree model with high error rate, as well as their respective weights.

8. The reliability prediction model construction method as described in claim 6, characterized in that, Training a feature decision tree model using the aforementioned feature dataset employs a decision tree algorithm, including: n samples are randomly drawn with replacement from the feature dataset; Each of the sample sets is used to construct a decision tree model using the decision tree algorithm; A random forest model is constructed as a feature decision tree model, with each decision tree model having a weight of 1 / n.

9. A high-precision flash memory chip reliability prediction model construction apparatus, used to execute the high-precision flash memory chip reliability prediction model construction method according to any one of claims 1 to 8, characterized in that, include: The first acquisition module is used to acquire a first feature dataset, each data in the first feature dataset including a main feature of erasure count and several sub-features, wherein the sub-features are the physical characteristics of the storage block corresponding to the main feature, and to determine a first feature forest model based on the first feature dataset. The second acquisition module is used to acquire a second feature dataset, each data in the second feature dataset including a residence time main feature and several sub-features, the sub-features being the physical characteristics of the storage block corresponding to the main feature, and to determine a second feature forest model based on the second feature dataset. The third acquisition module is used to acquire the third feature dataset. Each data in the third feature dataset includes a main feature of single page read count and several sub-features. The sub-features are the physical characteristics of the storage block corresponding to the main feature. The third feature forest model is determined based on the third feature dataset. The weight determination module is used to determine the weights of the first feature forest model, the second feature forest model, and the third feature forest model. The construction module is used to construct a total feature forest model based on the first feature forest model, the second feature forest model, the third feature forest model, and their respective weights.