Digital pixel readout circuit and chip

Abstract

The application provides a digital pixel readout circuit and a chip, and relates to the technical field of image sensors. The digital pixel readout circuit comprises an acceleration unit, a readout comparison unit and a pre-charging unit. The acceleration unit is connected with an output node of a pixel unit and the readout comparison unit, and is used to accelerate the voltage of the output node of the pixel unit; the readout comparison unit is connected with the output node of the pixel unit and the acceleration unit, and is used to amplify the pixel signal of the pixel unit and determine whether the voltage of the output node of the pixel unit is greater than a first preset voltage; and the pre-charging unit is connected with the output node of the pixel unit, and is used to pre-charge the output node of the pixel unit to a second preset voltage. The technical scheme provided in the application embodiment guarantees the fast readout of the digital pixel.

Description

Digital pixel readout circuit and chip Technical Field

[0001] This application relates to the field of image sensor technology, specifically to a digital pixel readout circuit and chip. Background Technology

[0002] With the continuous development of computer vision and image processing technologies and the expansion of their application fields, the demand for high-resolution, high-definition video / images is constantly increasing. In digital-to-digital converter circuits, a current is typically drawn when reading a signal from each pixel in the array. If a large number of pixels need to be read simultaneously, a large current is required. This large current can cause voltage fluctuations in the power supply lines, thereby increasing processing time and power consumption.

[0003] In existing technologies, pre-charge circuits are typically used to reduce the time required for the voltage of the amplifier's internal nodes to rise to the desired voltage. However, in high-resolution digital pixel processing, how to handle large amounts of input information to reduce voltage swing and accelerate the rise of the circuit's internal node voltages has become a technical problem that needs to be solved. Summary of the Invention

[0004] In view of this, embodiments of this application provide a digital pixel readout circuit and chip to solve the problem of slow readout speed of the readout circuit.

[0005] In a first aspect, embodiments of this application provide a digital pixel readout circuit, including: an acceleration unit, a readout comparison unit, and a pre-charge unit. The acceleration unit is connected to the output node of the pixel unit and the readout comparison unit to accelerate the voltage increase of the output node of the pixel unit; the readout comparison unit is connected to the output node of the pixel unit and the acceleration unit to amplify the pixel signal of the pixel unit and determine whether the voltage of the output node of the pixel unit is greater than a first preset voltage; the pre-charge unit is connected to the output node of the pixel unit to pre-charge the output node of the pixel unit to a second preset voltage, where the second preset voltage is less than the first preset voltage.

[0006] Optionally, the acceleration unit includes at least one first transistor, the source of the first transistor is connected to a power supply with a voltage of a third preset voltage, the gate of the first transistor is connected to the output terminal of the readout comparison unit, and the drain of the first transistor is connected to the output node of the pixel unit, wherein the first preset voltage is less than the third preset voltage.

[0007] Optionally, the readout comparison unit includes at least one inverting amplifier. The two input terminals of the inverting amplifier are respectively connected to the output node of the pixel unit and a power supply with a voltage of a first preset voltage. The output terminal of the inverting amplifier is connected to the output line of the acceleration unit and the digital pixel readout circuit.

[0008] Optionally, the readout comparison unit includes an inverting amplifier and a comparator. The two input terminals of the inverting amplifier are connected to the output node of the pixel unit and ground, respectively. The output terminal of the inverting amplifier is connected to the output line of the digital pixel readout circuit. The inverting amplifier is used to amplify the pixel signal of the pixel unit. The two input terminals of the comparator are connected to the output node of the pixel unit and a power supply with a first preset voltage, respectively. The output terminal of the comparator is connected to the acceleration unit. The comparator is used to determine whether the voltage of the output node of the pixel unit is greater than the first preset voltage, and if the voltage of the output node of the pixel unit is greater than the first preset voltage, it drives the acceleration unit.

[0009] Optionally, the pre-charge unit includes at least one second transistor, the source of which is connected to a power supply with a voltage of a second preset voltage, the gate of which is used to receive a pre-charge signal, and the drain of which is connected to the output node of the pixel unit.

[0010] Optionally, during the pre-charging phase, the pre-charging unit is driven by a pre-charging signal. At the initial moment of each pixel information readout, the pre-charging signal outputs a narrow pulse to pre-charge the output node of the pixel unit to a second preset voltage, and then the pre-charging unit is turned off. During the readout amplification phase, if the voltage of the output node of the pixel unit is greater than the first preset voltage, the acceleration unit is turned on; if the voltage of the output node of the pixel unit is less than or equal to the first preset voltage, the acceleration unit is turned off.

[0011] Optionally, if the input voltage at the input terminal of the read comparison unit is less than or equal to a first preset voltage, the read comparison unit outputs a logic high level to accelerate the unit's shutdown.

[0012] Optionally, if the input voltage at the input terminal of the read comparison unit is greater than the first preset voltage, the read comparison unit outputs a logic low level to accelerate the unit's startup.

[0013] Optionally, the activation times of the acceleration unit and the pre-charge unit do not overlap.

[0014] Secondly, embodiments of this application provide a chip that includes the digital pixel readout circuit mentioned in the first aspect.

[0015] The digital pixel readout circuit provided in this application accelerates the voltage rise of the output node of the pixel unit through an acceleration unit; amplifies the pixel signal of the pixel unit through a readout amplification unit and determines whether the voltage of the output node of the pixel unit is greater than a first preset voltage; and precharges the output node of the pixel unit to a second preset voltage through a precharge unit. Therefore, this digital pixel readout circuit precharges the output node of the pixel unit through the precharge unit, thereby improving the drive of its bit lines and thus improving readout efficiency. Furthermore, this application uses an acceleration unit to speed up the establishment of the working voltage, thereby further reducing the readout time. Attached Figure Description

[0016] The above and other objects, features, and advantages of this application will become more apparent from the more detailed description of the embodiments of this application in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this application and form part of the specification. They are used together with the embodiments of this application to explain this application and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.

[0017] Figure 1 is a schematic diagram of the structure of a digital pixel readout circuit provided in an embodiment of this application.

[0018] Figure 2 is a schematic diagram of the structure of a digital pixel readout circuit provided in another embodiment of this application.

[0019] Figure 3 is a schematic diagram of the circuit structure of an acceleration unit provided in an embodiment of this application.

[0020] Figure 4 is a schematic diagram of the circuit structure of a readout comparison unit provided in an embodiment of this application.

[0021] Figure 5 is a processing flowchart of a digital pixel readout circuit according to an embodiment of this application. Detailed Implementation

[0022] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0023] The technical solutions of this application can be applied to high-resolution digital pixel sensors. Of course, the technical solutions of this application can also be applied to other electronic devices that require readout circuitry to read out pixel units, and are not limited to digital pixel sensors. For ease of understanding and explanation, the technical solutions of this application will be described in one or more embodiments below.

[0024] Taking digital pixel readout circuits as an example, static differential amplifiers or current-mode readout circuits are commonly used currently. However, these two types of circuits still have drawbacks such as slow readout speed, high static power consumption, and large area. Latch-type readout amplifiers, which have advantages such as fast readout speed, small area, and low power consumption, cannot be applied to the readout circuits of digital pixel sensors because they use differential inputs.

[0025] This application provides a digital pixel readout circuit, including: an acceleration unit connected to the output node of a pixel unit and a readout comparison unit for accelerating the voltage increase of the output node of the pixel unit; a readout comparison unit connected to the output node of the pixel unit and the acceleration unit for amplifying the pixel signal of the pixel unit and determining whether the voltage of the output node of the pixel unit is greater than a first preset voltage; and a pre-charging unit connected to the output node of the pixel unit for pre-charging the output node of the pixel unit to a second preset voltage. In this application embodiment, the pre-charging unit ensures that the circuit maintains a relatively stable voltage when processing pixel information. The readout comparison unit then determines whether the voltage of the output node of the pixel unit is greater than the first preset voltage, and the acceleration unit accelerates the voltage increase of the output node of the pixel unit.

[0026] Therefore, the embodiments of this application can reduce the voltage swing when processing different numbers of pixel information, and quickly establish the required voltage when the voltage of the output node of the pixel unit is greater than the first preset voltage, effectively reducing the time required for circuit readout and ensuring that the digital pixel readout circuit can quickly read out pixel information.

[0027] Figure 1 is a schematic diagram of the structure of a digital pixel readout circuit provided in an embodiment of this application. As shown in Figure 1, the digital pixel readout circuit provided in this embodiment may include an acceleration unit 101, a readout comparison unit 102, and a pre-charge unit 103.

[0028] The acceleration unit 101 is connected to the output node of the pixel unit and the readout comparison unit 102 to accelerate the voltage increase of the output node of the pixel unit. In addition, the acceleration unit 101 receives the comparison signal output by the readout comparison unit 102 to determine the on or off state of the acceleration unit 101.

[0029] The readout comparison unit 102 is connected to the output node of the pixel unit and the acceleration unit 101 to amplify the pixel signal of the pixel unit and determine whether the voltage of the output node of the pixel unit is greater than a first preset voltage. Furthermore, when the input voltage at the input terminal of the readout comparison unit 102 is less than the first preset voltage, the readout comparison unit 102 outputs a logic high level; when the input voltage at the input terminal of the readout comparison unit 102 is greater than the first preset voltage, the readout comparison unit 102 flips to a logic low level, thereby driving the acceleration unit 101.

[0030] The pre-charge unit 103 is connected to the output node of the pixel unit to pre-charge the output node of the pixel unit to a second preset voltage.

[0031] In this embodiment, the pre-charge unit enables the circuit to obtain a more stable voltage, reducing voltage swing; the readout comparison unit compares the voltage circuit; and the acceleration unit accelerates the voltage of the output node of the pixel unit, allowing the circuit to quickly reach the required voltage, thereby ensuring rapid readout of pixel information in the pixel unit.

[0032] Figure 1 illustrates one digital pixel readout circuit structure. It should be understood that the digital pixel readout circuit can also have other structures. For example, Figure 2 shows another embodiment.

[0033] Figure 2 is a schematic diagram of a digital pixel readout circuit according to another embodiment of this application. As shown in Figure 2, the acceleration unit 201 of the digital pixel readout circuit includes a first transistor. Specifically, the source of the first transistor is connected to a power supply with a voltage of a third preset voltage, the gate of the first transistor is connected to the output terminal of the readout comparison unit 202, and the drain of the first transistor is connected to the output node of the pixel unit. Therefore, in order to minimize the area of ​​the readout circuit, a single first transistor can be used for connection.

[0034] In other embodiments, multiple first transistors can also be used for processing, as shown in FIG3. Specifically, FIG3 shows the circuit structure of the acceleration unit 301 coupled with multiple first transistors according to an embodiment of the present application. The circuit structure shown in FIG3 includes the acceleration unit 301 and the readout comparison unit 302. This circuit structure, by coupling multiple first transistors, further improves the voltage increase rate of the digital pixel readout circuit.

[0035] Referring again to Figure 2, the function of the readout comparison unit 202 is implemented through at least one inverting amplifier. The two input terminals of the inverting amplifier are connected to the output node of the pixel unit and a power supply with a voltage of a first preset voltage, respectively. The output terminal of the inverting amplifier is connected to the output lines of the acceleration unit 201 and the circuit. In practical applications, to minimize the area of ​​the readout circuit, a single inverting amplifier can be used, but multiple inverting amplifiers can also be used to amplify the pixel signal of the pixel unit and determine whether the voltage of the output node of the pixel unit is greater than the first preset voltage.

[0036] In some other embodiments, the function of the readout comparison unit can also be achieved by connecting an inverting amplifier and a comparator. Specifically, in the circuit structure shown in FIG4, the inverting amplifier and the comparator in the readout comparison unit 402 are coupled. The input terminal of the inverting amplifier is connected to the output node of the pixel unit, and the output terminal of the inverting amplifier is connected to the output line of the circuit to amplify the pixel signal of the pixel unit. The two input terminals of the comparator are respectively connected to the output node of the pixel unit and to receive a first preset voltage. The output terminal of the comparator is connected to the acceleration unit 401 to determine whether the voltage of the output node is greater than the first preset voltage, so as to drive the acceleration unit 401.

[0037] Referring again to Figure 2, the pre-charge unit 203 includes a second transistor. The source of the second transistor is connected to a power supply with a second preset voltage, the gate of the second transistor is used to receive a pre-charge signal, and the drain of the second transistor is connected to the output node of the pixel unit. Therefore, in practical applications, to minimize the area of ​​the readout circuit, a single second transistor can be used, but multiple second transistors can also be connected. The circuit structure of the pre-charge unit 203 with multiple second transistors coupled is similar to the circuit structure of the acceleration unit 301 with multiple first transistors coupled in Figure 3.

[0038] Figure 5 is a processing flowchart of a digital pixel readout circuit according to an embodiment of this application. As shown in Figure 5, the digital pixel readout circuit provided in this embodiment involves the following processing steps.

[0039] Step S110: Precharge the output node of the pixel unit to the second preset voltage.

[0040] Specifically, the pre-charge unit is driven by a pre-charge signal. At the initial moment of each pixel information reading, the pre-charge signal outputs a narrow pulse to pre-charge the output node of the pixel unit to a second preset voltage, and then the pre-charge unit is turned off.

[0041] Step S120: Determine whether the voltage of the output node of the pixel unit is greater than the first preset voltage.

[0042] If the judgment result of step S120 is yes, then step S130 is executed; if the judgment result of step S120 is no, then step S140 is executed. Specifically, the voltage of the output node of the pixel unit is determined by the read comparison unit to be greater than the first preset voltage. If yes, the acceleration unit is turned on. If no, the acceleration unit is turned off.

[0043] Step S130: The acceleration unit is turned on.

[0044] Step S140: The acceleration unit is turned off.

[0045] Furthermore, if the input voltage at the input terminal of the read comparison unit is less than the first preset voltage, the read comparison unit outputs a logic high level, and the acceleration unit cannot be turned on.

[0046] Furthermore, if the input voltage at the input terminal of the read comparison unit is greater than the first preset voltage, the output of the read comparison unit flips to a logic low level, and the acceleration unit is driven to turn on.

[0047] Furthermore, the activation times of the acceleration unit and the pre-charge unit do not overlap, thereby ensuring that the static power consumption of the circuit is zero.

[0048] In summary, one embodiment of this application provides a digital pixel readout circuit that pre-charges the circuit before reading out pixel information, reducing the driving time required by the circuit. Furthermore, by activating the acceleration unit when the voltage of the output node of the pixel unit is greater than a first preset voltage, the delay time of pixel information readout is reduced, thus solving the problem of long readout time caused by large voltage swing and slow voltage increase rate during digital pixel readout.

[0049] According to another embodiment of this application, a chip is provided that includes the digital pixel readout circuit mentioned in any of the above embodiments. It will be understood that, in addition to the digital pixel readout circuit mentioned in any of the above embodiments, the chip may also include other conventional logic circuits.

[0050] In other words, the chip may include one or more digital pixel readout circuits. When it is necessary to read the pixel information of a pixel unit, the digital pixel readout circuit is turned on to ensure fast readout of the pixel unit.

[0051] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0052] The block diagrams of devices, apparatuses, devices, and systems involved in this application are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0053] It should also be noted that in the apparatus, equipment, and methods of this application, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this application.

[0054] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this application. Therefore, this application is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0055] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A digital pixel readout circuit, characterized in that, The system includes an acceleration unit, a readout comparison unit, and a pre-charge unit. The acceleration unit is connected to the output node of the pixel unit and the readout comparison unit to accelerate and raise the voltage of the output node of the pixel unit. The readout comparison unit, also connected to the output node of the pixel unit and the acceleration unit, amplifies the pixel signal of the pixel unit and determines whether the voltage of the output node of the pixel unit is greater than a first preset voltage. When the voltage of the output node of the pixel unit is greater than the first preset voltage, the acceleration unit is driven. The pre-charge unit, connected to the output node of the pixel unit, pre-charges the output node of the pixel unit to a second preset voltage, which is less than the first preset voltage. The acceleration unit includes at least one first transistor. The source of the first transistor is connected to a power supply with a third preset voltage. The gate of the first transistor is connected to the output terminal of the readout comparison unit, and the drain of the first transistor is connected to the output node of the pixel unit. The first preset voltage is less than the third preset voltage.

2. The digital pixel readout circuit according to claim 1, characterized in that, The readout comparison unit includes at least one inverting amplifier. The two input terminals of the inverting amplifier are respectively connected to the output node of the pixel unit and a power supply with a voltage of the first preset voltage. The output terminal of the inverting amplifier is connected to the output line of the acceleration unit and the digital pixel readout circuit.

3. The digital pixel readout circuit according to claim 1, characterized in that, The readout comparison unit includes an inverting amplifier and a comparator. The two input terminals of the inverting amplifier are connected to the output node of the pixel unit and ground, respectively. The output terminal of the inverting amplifier is connected to the output line of the digital pixel readout circuit. The inverting amplifier is used to amplify the pixel signal of the pixel unit. The two input terminals of the comparator are connected to the output node of the pixel unit and a power supply with a voltage of the first preset voltage, respectively. The output terminal of the comparator is connected to the acceleration unit. The comparator is used to determine whether the voltage of the output node of the pixel unit is greater than the first preset voltage, and if the voltage of the output node of the pixel unit is greater than the first preset voltage, it drives the acceleration unit.

4. The digital pixel readout circuit according to claim 1, characterized in that, The pre-charge unit includes at least one second transistor, the source of which is connected to a power supply with a voltage of the second preset voltage, the gate of which is used to receive a pre-charge signal, and the drain of which is connected to the output node of the pixel unit.

5. The digital pixel readout circuit according to claim 1, characterized in that, During the pre-charging phase, the pre-charging unit is driven by a pre-charging signal. At the initial moment of each pixel information reading, the pre-charging signal outputs a narrow pulse to pre-charge the output node of the pixel unit to the second preset voltage, and then the pre-charging unit is turned off. During the readout amplification stage, if the voltage of the output node of the pixel unit is greater than the first preset voltage, the acceleration unit is turned on. If the voltage of the output node of the pixel unit is less than or equal to the first preset voltage, the acceleration unit is turned off.

6. The digital pixel readout circuit according to claim 5, characterized in that, When the input voltage at the input terminal of the read comparison unit is less than or equal to the first preset voltage, the read comparison unit outputs a logic high level so that the acceleration unit is turned off.

7. The digital pixel readout circuit according to claim 5, characterized in that, When the input voltage at the input terminal of the read comparison unit is greater than the first preset voltage, the read comparison unit outputs a logic low level so that the acceleration unit can be turned on.

8. The digital pixel readout circuit according to claim 5, characterized in that, The activation times of the acceleration unit and the pre-charging unit do not overlap.

9. A chip, characterized in that, Includes the digital pixel readout circuit as described in any one of claims 1 to 8.

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