Display substrate and display device

Abstract

The display substrate and the display device provided by the present disclosure include a substrate, which includes a display area and a non-display area surrounding the display area; a dam, located in the non-display area and at least partially surrounding the display area; a power line, in the non-display area on one side of the display area, the power line includes a first part and a second part integrally arranged, the orthographic projection of the first part on the substrate substantially coincides with the orthographic projection of the dam on the substrate, and the orthographic projection of the second part on the substrate does not overlap with the orthographic projection of the dam on the substrate; an anode conductive layer, located on the side of the layer where the power line is located away from the substrate, the anode conductive layer includes a protection structure at least partially located in the non-display area, and the protection structure at least covers at least part of the edge of the second part.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and in particular, to a display substrate and a display device. Background Art

[0002] In recent years, organic light-emitting diode (OLED) displays, as a new type of flat panel display, have gradually received more attention. Due to their excellent characteristics such as active light emission, high brightness, high resolution, wide viewing angle, fast response speed, small thickness, low power consumption, flexibility, wide operating temperature range, and simple structure and manufacturing process, they have broad application prospects. Summary of the Invention

[0003] The display substrate and the display device provided by the embodiments of the present disclosure are specifically as follows:

[0004] On the one hand, the embodiments of the present disclosure provide a display substrate, including:

[0005] A substrate, including a display area and a non-display area located around the display area;

[0006] A barrier rib, located in the non-display area and at least partially surrounding the display area;

[0007] A power line, in the non-display area on one side of the display area, the power line includes a first part and a second part integrally arranged, a positive projection of the first part on the substrate substantially coincides with a positive projection of the barrier rib on the substrate, and a positive projection of the second part on the substrate does not overlap with a positive projection of the barrier rib on the substrate;

[0008] An anode conductive layer, located on a side of the layer where the power line is located away from the substrate, the anode conductive layer includes a protection structure at least partially located in the non-display area, and the protection structure at least covers at least part of the edge of the second part.

[0009] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, the protection structure completely covers the second part.

[0010] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, the protection structure covers the edge of the second part and exposes the remaining area of the second part.

[0011] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, a first source-drain metal layer is further included between the substrate and the anode conductive layer, and the power line includes a first sub-power line located in the first source-drain metal layer.

[0012] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, a second source-drain metal layer is further included between the first source-drain metal layer and the anode conductive layer;

[0013] The power supply line further includes a second sub-power supply line located at the second source-drain metal layer, and the second sub-power supply line at least covers the edge of the first sub-power supply line.

[0014] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the second sub-power supply line completely covers the first sub-power supply line.

[0015] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the second sub-power supply line covers the edge of the first sub-power supply line and exposes the remaining area of the first sub-power supply line.

[0016] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the protection structure at least covers at least a part of the edge of the second part in the second sub-power supply line.

[0017] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the protection structure also at least covers at least a part of the edge of the first part.

[0018] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the power supply line includes a first-level power supply line and a second-level power supply line. Among them, the protection structure is discontinuously arranged at the gap between the first-level power supply line and the second-level power supply line.

[0019] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the edge of the first part and / or the edge of the second part includes an irregular structure.

[0020] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the edge shape of the protection structure is substantially the same as the edge shape of the second part.

[0021] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the non-display area includes: a first non-display area for bonding with a chip, and the first non-display area includes a packaging area and a water and oxygen isolation area arranged in sequence in a direction away from the display area;

[0022] The dam in the first non-display area is located in the packaging area, and the second part is located in the packaging area and the water and oxygen isolation area.

[0023] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, the first non-display area further includes a fan-out area and a bonding area, wherein the fan-out area connects the water and oxygen isolation area and the bonding area;

[0024] The power line further includes a third branch located in the fan-out area, and the third branch is integrally provided with the second branch.

[0025] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, a planarization layer is further included, the planarization layer is located between the layer where the power line is located and the anode conductive layer, and the planarization layer is provided on the entire surface of the fan-out area.

[0026] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, the protection structure at least covers at least part of the edge of the third branch.

[0027] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, a plurality of touch lines are further included, located in the non-display area, and the plurality of touch lines are located on the side of the layer where the dam is located away from the substrate; at least part of the projections of the touch lines on the substrate overlap with the projections of the power lines on the substrate, and at least part of the protection structure is located in the overlapping area.

[0028] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, at least part of the touch lines include conductive winding portions so that the resistances of the respective touch lines are substantially the same, and the projections of the conductive winding portions on the substrate are located between the projections of the dam on the substrate and the display area.

[0029] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, a bridging layer and a touch layer that are insulated from each other are further included, and the bridging layer is located between the layer where the dam is located and the touch layer;

[0030] The touch line includes a first sub-touch line and a second sub-touch line that are electrically connected to each other, wherein the first sub-touch line is located in the bridging layer and the second sub-touch line is located in the touch layer.

[0031] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, a plurality of touch electrodes located in the display area are further included, and the touch electrodes are electrically connected to the touch lines; the touch electrodes include a first sub-touch electrode and a second sub-touch electrode that are electrically connected to each other, wherein the first sub-touch electrode is located in the bridging layer and the second sub-touch electrode is located in the touch layer.

[0032] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, an insulating layer is further included between the touch layer and the bridging layer. The insulating layer includes a plurality of through holes that connect the first sub-touch electrodes and the second sub-touch electrodes, and the plurality of through holes are evenly distributed in the display area.

[0033] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the plurality of touch electrodes include a plurality of first touch electrodes extending in a first direction and a plurality of second touch electrodes extending in a second direction; the plurality of touch lines include a plurality of first touch lines and a plurality of second touch lines; wherein, the first touch electrodes are electrically connected to the first touch lines, and the second touch electrodes are electrically connected to the second touch lines.

[0034] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the non-display area includes a first non-display area and a second non-display area that are oppositely arranged, and a third non-display area and a fourth non-display area that are oppositely arranged. Among them, the first non-display area is a first non-display area for chip bonding, and the third non-display area and the fourth non-display area are respectively connected to the first non-display area and the second non-display area;

[0035] The plurality of second touch lines extend from the third non-display area and the fourth non-display area to the first non-display area;

[0036] Some of the first touch lines extend from the second non-display area and the third non-display area to the first non-display area in sequence, and the remaining first touch lines extend from the second non-display area and the fourth non-display area to the first non-display area in sequence, and in the third non-display area and the fourth non-display area, the first touch lines are located on the side of the second touch lines away from the display area.

[0037] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the non-display area includes a first non-display area and a second non-display area that are oppositely arranged, and a third non-display area and a fourth non-display area that are oppositely arranged. Among them, the first non-display area is a first non-display area for chip bonding, and the third non-display area and the fourth non-display area are respectively connected to the first non-display area and the second non-display area;

[0038] The plurality of second touch lines extend from the fourth non-display area to the first non-display area;

[0039] Some of the first touch lines extend from the second non-display area and the third non-display area to the first non-display area in sequence, and the remaining first touch lines are located in the first non-display area.

[0040] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, there is further included at least one touch chip, and the plurality of touch lines are bonded and connected to the touch chip.

[0041] On the other hand, the embodiments of the present disclosure provide a display device, including the above display substrate provided by the embodiments of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 is an electron microscope image of side corrosion of a power line in the related art;

[0043] Figure 2 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure;

[0044] Figure 3 is Figure 2 an enlarged structural diagram of the Z1 area in

[0045] Figure 4 is Figure 3 an enlarged structural diagram of the Z2 area in

[0046] Figure 5 is a sectional view along the Figure 4 I-I' line in

[0047] Figure 6 is a sectional view along the Figure 4 II-II' line in

[0048] Figure 7 is an electron microscope image of a power line without side corrosion provided by an embodiment of the present disclosure;

[0049] Figure 8 is a schematic diagram of a protection structure covering a power line provided by an embodiment of the present disclosure;

[0050] Figure 9 is a sectional view along the Figure 8 III-III' line in

[0051] Figure 10 is a sectional view along the Figure 4 I-I' line in

[0052] Figure 11 is a sectional view along the Figure 8 III-III' line in

[0053] Figure 12 is a sectional view along the Figure 4 I-I' line in

[0054] Figure 13 is a sectional view along the Figure 8Another sectional view along line III-III';

[0055] Figure 14 Another schematic diagram of the protection structure covering the power cord provided by the present disclosure;

[0056] Figure 15 Along Figure 14 A sectional view along line IV-IV' in;

[0057] Figure 16 For Figure 2 Another enlarged structural diagram of area Z1 in;

[0058] Figure 17 For Figure 16 An enlarged structural diagram of area Z3 in;

[0059] Figure 18 Along Figure 17 A sectional view along line V-V' in;

[0060] Figure 19 For Figure 3 Another enlarged structural diagram of area Z2 in;

[0061] Figure 20 For Figure 3 Another enlarged structural diagram of area Z2 in;

[0062] Figure 21 Along Figure 20 A sectional view along VI-VI" in;

[0063] Figure 22 For Figure 3 Another enlarged structural diagram of area Z2 in;

[0064] Figure 23 Along Figure 22 A sectional view along VII-VII" in;

[0065] Figure 24 For Figure 3 Another enlarged structural diagram of area Z2 in;

[0066] Figure 25 An electron microscope image of the short circuit between the bridging layer and the power cord in the related art;

[0067] Figure 26 Along Figure 24 A sectional view along line VIII-XIII" in;

[0068] Figure 27 A schematic diagram of the touch electrode in the present disclosure;

[0069] Figure 28 For Figure 25Schematic diagram of the middle bridging layer;

[0070] Figure 29 For Figure 25 Schematic diagram of the middle touch layer;

[0071] Figure 30 Another schematic diagram of the display substrate provided by the embodiments of the present disclosure;

[0072] Figure 31 Another schematic diagram of the display substrate provided by the embodiments of the present disclosure;

[0073] Figure 32 Another schematic diagram of the display substrate provided by the embodiments of the present disclosure;

[0074] Figure 33 Partial structural schematic diagram of the dam;

[0075] Figure 34 For along Figure 4 Another cross-sectional view along line I-I' in the middle;

[0076] Figure 35 For along Figure 8 Another cross-sectional view along line III-III' in the middle;

[0077] Figure 36 For along Figure 4 Another cross-sectional view along line I-I' in the middle;

[0078] Figure 37 For along Figure 8 Another cross-sectional view along line III-III' in the middle;

[0079] Figure 38 For along Figure 14 Another cross-sectional view along line IV-IV' in the middle;

[0080] Figure 39 For along Figure 4 Another cross-sectional view along line I-I' in the middle;

[0081] Figure 40 For along Figure 4 Another cross-sectional view along line I-I' in the middle;

[0082] Figure 41 For along Figure 4 Another cross-sectional view along line I-I' in the middle;

[0083] Figure 42 For along Figure 4 Another cross-sectional view along line I-I' in the middle;

[0084] Figure 43 For along Figure 8Another sectional view taken along line III-III';

[0085] Figure 44 For along Figure 8 Another sectional view taken along line III-III';

[0086] Figure 45 For along Figure 8 Another sectional view taken along line III-III';

[0087] Figure 46 For along Figure 8 Another sectional view taken along line III-III';

[0088] Figure 47 For along Figure 14 Another sectional view taken along line IV-IV';

[0089] Figure 48 It is a schematic structural diagram of a sub-pixel in the display area. Detailed implementation manners

[0090] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. It should be noted that the sizes and shapes of the various figures in the drawings do not reflect the true proportions, and the purpose is only to schematically illustrate the content of the present disclosure. Also, the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions throughout.

[0091] Unless otherwise defined, the technical terms or scientific terms used herein shall have the ordinary meanings understood by those of ordinary skill in the art to which the present disclosure pertains. The "first", "second", and similar terms used in the specification and claims of the present disclosure do not denote any order, quantity, or importance, but are only used to distinguish different components. The terms such as "comprising" or "including" mean that the elements or items appearing before this word cover the elements or items listed after this word and their equivalents, without excluding other elements or items. The terms such as "inside", "outside", "above", "below", etc. are only used to represent relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0092] The OLED display panel in the related art includes a substrate, and a driving circuit, a light-emitting device, a barrier rib, and a power line disposed on the substrate. The driving circuit and the light-emitting device are located in the display area, the barrier rib and the power line are located in the non-display area, and the barrier rib straddles the power line. The power line is usually made of the source-drain metal layer of the transistor included in the driving circuit, and the barrier rib is usually made of an organic insulating layer located on the side of the driving circuit away from the substrate. To form the barrier rib, it is necessary to remove the organic insulating layer near the barrier rib, resulting in only an inorganic insulating layer covering the power line near the barrier rib. In the subsequent process of manufacturing the connection electrode (CE, used to connect the driving circuit and the light-emitting device), it is necessary to form the connection electrode (CE) through an etching process, but this etching process will over-etch the inorganic insulating layer and expose the side surface of the power line. The etching solution of the anode (AND) included in the light-emitting device will contact the exposed side surface of the power line, causing side corrosion (undercut), as Figure 1 shown. Specifically, Figure 1 the platinum (Pt) in Figure 1 is sprayed to test the side corrosion phenomenon of the power line (SD). As can be seen from Figure 1 the platinum (Pt) breaks in the side surface of the power line (SD) (

[0093] the area within the dashed box in Figures 2 to 6 ), thus confirming the existence of side corrosion. After the side surface of the power line is corroded, water and oxygen enter the display area along the corroded side surface of the power line, which will cause the encapsulation reliability to fail (GDSX) and dark spot defects to appear.

[0094] A substrate 101, including a display area AA and a non-display area BB located around the display area AA;

[0095] A barrier rib 102, located in the non-display area BB and disposed around the display area AA;

[0096] A power line 103, within the non-display area BB on the side of the display area AA. The power line 103 includes a first branch 103a and a second branch 103b integrally provided. The orthographic projection of the first branch 103a on the substrate 101 substantially coincides with the orthographic projection of the barrier rib 102 on the substrate 101, and the orthographic projection of the second branch 103b on the substrate 101 does not overlap with the orthographic projection of the barrier rib 102 on the substrate 101;

[0097] The anode conductive layer 104 is located on the side of the layer where the power line 103 is located and away from the substrate 101. The anode conductive layer 104 includes a protection structure 1041 that is at least partially located in the non-display area BB. The protection structure 1041 at least covers at least a part of the edge of the second branch 103b. Further, the protection structure 1041 at least covers the edge of the second branch 103b, which is equivalent to the protection structure 1041 being in contact with at least the side surface of the second branch 103b and a part of the upper surface adjacent to the side surface (i.e., a part of the surface on the side away from the substrate 101).

[0098] In the above display substrate provided by the embodiments of the present disclosure, the second branch 103b of the power line 103 is not covered by the dam 102. In the present disclosure, a protection structure 1041 that at least covers at least a part of the edge of the second branch 103b is provided. Further, it also includes a protection structure 1041 that at least covers the edge of the second branch 103b.

[0099] In some embodiments, the protection structure 1041 is located in the anode conductive layer 104, so that the anode of the anode conductive layer 104 and the protection structure 1041 can be prepared by the same etching process, thereby avoiding the corrosion of the edge of the second branch 103b by the etching solution used in the etching process of the anode. And, since the first branch 103a in the power line 103 is covered by the dam 102, the dam 102 can play a protective role for the first branch 103a, so that the first branch 103a is protected from the corrosion of the etching solution used for the anode, thereby effectively improving the packaging reliability and solving the problem of dark spot defects. In order to test whether side corrosion occurs in the power line 103 (SD), a layer of platinum (Pt) is also sprayed on the power line 103 covered by the protection structure 1041, and the result is as Figure 7 shown. As can be seen from Figure 7 it, the platinum (Pt) does not break on the side surface of the power line 103 (SD) ( Figure 7 the area within the dashed box in), so it is confirmed that the protection structure 1041 effectively prevents side corrosion.

[0100] In addition, since the edge of the second branch 103b is protected by the protection structure 1041 of the anode conductive layer 104, there is no need to provide an inorganic insulating layer for protecting the power line 103 in the related art. Thus, the mask process of the inorganic insulating layer is saved, the number of film layers is reduced, which is beneficial to improving production efficiency, reducing production costs, and the thin and light design of the product.

[0101] In some embodiments, a protection structure 1041 can also be provided at least on a part of the edge of the first branch 103a, further protecting the first branch 103a from the corrosion of the etching solution used for the anode.

[0102] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 2 and Figure 6 shown, the barrier rib 102 may include a first barrier rib 102' and a second barrier rib 102". The second barrier rib 102" surrounds the first barrier rib 102'. The first barrier rib 102' and the second barrier rib 102" may be multi-layer structures, and the multi-layers are respectively located in the first planarization layer (PLN1), the second planarization layer (PLN2), the pixel definition layer (PDL), and the support layer (PS) to maximize the extension of the water and oxygen invasion path and improve the packaging reliability. Of course, in specific implementation, the barrier rib 102 is not limited to the above-mentioned layer structure and may include at least one layer structure provided on the same layer as the layer in the display area AA. The barrier rib 102 may also be one or more than two. The layer composition of each barrier rib 102 may be the same or different, the number of layers may be the same or different, and the height may be the same or different.

[0103] The barrier rib 102 may be a fully enclosed structure or include some discontinuous voids. In some embodiments, as Figure 32 shown, at least one barrier rib 102 of the display substrate bifurcates into two sub-barrier parts dam near the part close to the first non-display area BB1, and the left and right sides of the barrier rib 102 may be substantially symmetric. In this way, at least one barrier rib 102 forms two sub-barrier parts dam between the display area AA and the bending area BD, which is more helpful to prevent the first planarization layer (PLN1) from entering the bending area BD. When the display substrate includes two or more barrier ribs 102, the barrier rib 102 close to the display area AA may bifurcate into two sub-barrier parts dam near the part close to the first non-display area BB1. Figure 32 In the embodiment shown, the display substrate includes a first barrier rib 102' and a second barrier rib 102' located on the side of the first barrier rib 102' away from the display area AA. The first barrier rib 102' bifurcates into two sub-barrier parts dam near the part close to the first non-display area BB1.

[0104] In some embodiments, the barrier rib 102 is discontinuous in the non-display area, that is, the barrier rib 102 is provided with notches 1023 at some positions in the non-display area. As Figure 33As shown, the barrier dam 102 includes a first barrier section 1021 and a second barrier section 1022. The first barrier section 1021 and the second barrier section 1022 are arranged at intervals, and a notch 1023 is formed between the first barrier section 1021 and the second barrier section 1022. The display substrate further includes a buffer portion 1023' on the side of the first barrier section 1021 away from the display area AA. The notch 1023 between the first barrier section 1021 and the second barrier section 1022 is opposite to the buffer portion 1023'. When the organic material flows out through the notch 1023 between the first barrier section 1021 and the second barrier section 1022, its speed is relatively fast. After flowing out from the notch 1023, the organic material bypasses the buffer portion 1023' and flows out from both sides of the buffer portion 1023', and the buffer portion 1023' can slow down the speed of the organic material overflowing outward. Figure 33 Only a partial structure of the barrier dam 102 is schematically shown. The barrier dam 102 can form notches 1023 at multiple locations, and buffer portions 1023' can be respectively provided on the side of each notch 1023 away from the display area AA.

[0105] Furthermore, as Figure 33 shown, both ends of the buffer portion 1023' are bent towards the display area AA to further slow down the speed of the organic material overflowing outward. The length of the buffer portion 1023' can be greater than the size of the notch 1023 between the first barrier section 1021 and the second barrier section 1022 to more effectively slow down the speed of the organic material overflowing outward. The buffer portion 1023' can be wavy, straight, polyline-shaped, arc-shaped, etc.

[0106] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 4 and Figure 5 shown, the protection structure 1041 can completely cover the second branch 103b; or, as Figure 8 and Figure 9 shown, the protection structure 1041 can cover the edge of the second branch 103b and expose the remaining area of the second branch 103b. Figure 4 、 Figure 5 、 Figure 8 and Figure 9The protection structure 1041 wraps the edges of the second branch 103b, effectively preventing lateral corrosion of the second branch 103b. Moreover, in the related art, the anode conductive layer 104 is a stacked structure composed of indium tin oxide / silver / indium tin oxide (ITO / Ag / ITO). Since indium tin oxide has a relatively high resistance value, the larger the area of the protection structure 1041 covering the second branch 103b on the anode conductive layer 104, the greater the overall resistance between the second branch 103b and the protection structure 1041. This larger resistance will cause power signal loss during transmission. Therefore, when the protection structure 1041 only wraps the edges of the second branch 103b and exposes the remaining area of the second branch 103b, the covering area of the protection structure 1041 can be effectively reduced, which helps to lower the overall resistance between the second branch 103b and the protection structure 1041 and ensure the authenticity of the power signal.

[0107] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 5 and Figure 9 shown, it may further include a first source-drain metal layer (SD1) located between the substrate 101 and the anode conductive layer 104. The power line 103 may include a first sub-power line 1031 located in the first source-drain metal layer (SD1). By disposing the first sub-power line 1031 in the first source-drain metal layer (SD1), the fabrication of the first sub-power line 1031 can be completed while fabricating the related structures (such as the source / drain electrodes of transistors) in the first source-drain metal layer (SD1). Thus, the film layer for separately disposing the first sub-power line 1031 can be avoided, reducing the number of film layers and facilitating the thin and light design of the product. Optionally, the first source-drain metal layer (SD1) may be a stacked structure composed of titanium / aluminum / titanium (Ti / Al / Ti).

[0108] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figures 10 to 13 shown, it may further include a second source-drain metal layer (SD2) located between the first source-drain metal layer (SD1) and the anode conductive layer 104; the power line 103 may further include a second sub-power line 1032 located in the second source-drain metal layer (SD2), and the second sub-power line 1032 covers at least part of the edges of the first sub-power line 1031. The power line 103 adopts a double-layer structure of the first sub-power line 1031 and the second sub-power line 1032, which helps to reduce the overall resistance of the power line 103 and ensure the authenticity of the power signal. Optionally, the second source-drain metal layer (SD2) may be a stacked structure composed of titanium / aluminum / titanium (Ti / Al / Ti).

[0109] Furthermore, in some embodiments, as Figures 34 to 47As shown, it may further include a third source-drain metal layer (SD3) located between the second source-drain metal layer (SD2) and the anode conductive layer 104; the power supply line 103 may further include a third sub-power supply line 1033 of the third source-drain metal layer (SD3), and the third sub-power supply line 1033 at least covers at least a part of the edge of the first sub-power supply line 1031. For example, the third sub-power supply line 1033 at least covers the edge of the first sub-power supply line 1031. The power supply line 103 adopts a double-layer structure of the first sub-power supply line 1031 and the third sub-power supply line 1032 (as Figures 34 to 38 shown), or adopts a three-layer structure of the first sub-power supply line 1031, the second sub-power supply line 1032 and the third sub-power supply line 1033 (as Figures 39 to 47 shown), which is beneficial to reducing the overall resistance of the power supply line 103 and ensuring the authenticity of the power signal. In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 10 and Figure 11 shown, the second sub-power supply line 1032 may completely cover the first sub-power supply line 1031; or, as Figures 12 to 15 shown, the second sub-power supply line 1032 may cover the edge of the first sub-power supply line 1031 and expose the remaining area of the first sub-power supply line 1031; both of these covering methods can effectively reduce the overall resistance of the power supply line 103 and ensure the authenticity of the power signal. Of course, the second sub-power supply line 1032 may also only cover the position of the second branch 103b in the first sub-power supply line 1031 and be disconnected at the position of the first branch 103a in the first sub-power supply line 1031, which is not limited here.

[0110] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 5 and Figure 9 shown, when the power supply line 103 is only composed of the first sub-power supply line 1031, the protection structure 1041 at least covers the edge of the second branch 103b in the first sub-power supply line 1031; for example, in Figure 5 , the protection structure 1041 completely covers the edge of the second branch 103b in the first sub-power supply line 1031; and in Figure 9 , the protection structure 1041 covers the edge of the first sub-power supply line 1031 and exposes the remaining area of the first sub-power supply line 1031. And as Figures 10 to 15 shown, when the power supply line 103 is composed of the first sub-power supply line 1031 and the second sub-power supply line 1032, the second sub-power supply line 1032 at least covers the edge of the first sub-power supply line 1031. At this time, in order to prevent the etching solution used for the anode from corroding the side surface of the power supply line 103, the edge of the second sub-power supply line 1032 needs to be protected, that is, the protection structure 1041 needs to at least cover the edge of the second sub-power supply line 1032. Specifically, in Figure 10 and Figure 11In [description], the second sub-power line 1032 completely wraps the edge of the first sub-power line 1031; in Figures 12 to 13 In [description], the second sub-power line 1032 wraps the edge of the first sub-power line 1031 and exposes the remaining area of the first sub-power line 1031. Correspondingly, in Figure 10 and Figure 12 In [description], the protection structure 1041 completely wraps the edge of the second branch 103b of the first sub-power line 1031 and the second sub-power line 1032; in Figure 11 , Figure 14 and Figure 15 In [description], the protection structure 1041 wraps the edge of the second branch 103b of the second sub-power line 1032 and exposes the remaining area of the second branch 103b of the second sub-power line 1032, and in Figure 14 and Figure 15 In [description], the protection structure 1041 also exposes a partial non-edge area of the second branch 103b of the first sub-power line 1031; in Figure 13 In [description], the protection structure 1041 completely wraps the edge of the second branch 103b of the second sub-power line 1032 and exposes a partial non-edge area of the second branch 103b of the first sub-power line 1031. When the power line 103 is composed of the first sub-power line 1031 and the third sub-power line 1033, the relevant content when the power line 103 is composed of the first sub-power line 1031 and the second sub-power line 1032 can be referred to and will not be elaborated here. When the power line 103 is composed of the first sub-power line 1031, the second sub-power line 1032, and the third sub-power line 1033, as Figures 39 to 42 shown, the protection structure 1041 can completely wrap the first sub-power line 1031, the second sub-power line 1032, and the third sub-power line 1033; or, as Figures 43 to 47 shown, the protection structure 1041 can completely wrap the edge of the third sub-power line 1033 and the edge of the second sub-power line 1032 that is not blocked by the third sub-power line 1033.

[0111] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figures 16 to 18As shown, the protection structure 1041 can also at least cover at least part of the edge of the first branch 103a. Optionally, the protection structure 1041 at least covers the edge of the first branch 103a. For example, the protection structure 1041 can also completely cover the edge of the first branch 103a, or the protection structure 1041 covers the edge of the first branch 103a and exposes the remaining area of the first branch 103a. That is to say, the protection structure 1041 can be continuously arranged at least at the edges of the first branch 103a and the second branch 103b. This continuous arrangement of the protection structure 1041 is beneficial to the production of the protection structure 1041 on the one hand. On the other hand, since the first branch 103a and the barrier dam 102 are stacked, it is equivalent to adding the protection structure 1041 between the barrier dam 102 and the first branch 103a, so that the height of the position where the barrier dam 102 is located increases due to the existence of the protection structure 1041, thereby better blocking the invasion of water and oxygen and effectively improving the packaging reliability.

[0112] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 2 and Figure 16 shown, the power line 103 can include a first-level power line VDD and a second-level power line VSS. Among them, the protection structure 1041 is discontinuously arranged at the gap between the first-level power line VDD and the second-level power line VSS to ensure the independent transmission of the first-level power signal and the second-level power signal and avoid mutual interference between the two.

[0113] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 4 , Figure 8 , Figure 14 , Figure 17 and Figure 19 shown, the edge of the first branch 103a and / or the edge of the second branch 103b can include an irregular structure (such as a wavy structure) to extend the water and oxygen invasion path and improve the packaging reliability.

[0114] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 19 shown, in order to obtain a better covering effect, the edge shape of the protection structure 1041 can be substantially the same as the edge shape of the second branch 103b (that is, it can be exactly the same or there can be errors caused by manufacturing processes, etc.). Of course, as Figure 4 , Figure 8 , Figure 14 and Figure 17 shown, the edge shape of the protection structure 1041 can also be linear, which is not limited herein.

[0115] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, asFigure 2 , Figure 4 , Figure 8 , Figure 14 and Figure 17 As shown in Figure 17 , the non-display area BB may include a first non-display area BB1 for bonding with a chip. The first non-display area BB1 includes a packaging area BB101 and a water and oxygen isolation area BB102 arranged in sequence in a direction away from the display area AA. The dam 102 within the first non-display area BB1 is located in the packaging area BB101, and the second part 103b is located in the packaging area BB101 and the water and oxygen isolation area BB102 to better prevent the intrusion of water and oxygen and effectively improve the packaging reliability.

[0116] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 2 , Figure 4 , Figure 8 , Figure 14 , Figure 17 and Figure 20 shown, the first non-display area BB1 may further include a fan-out area BB103 and a bonding area BB104. Among them, the fan-out area BB103 connects the water and oxygen isolation area BB102 and the bonding area BB104. The power line 103 may further include a third part 103c located in the fan-out area BB103, and the third part 103c is integrally arranged with the second part 103b to provide a power signal for the power line 103 by binding to the chip after the power line 103 extends to the bonding area BB104.

[0117] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 20 and Figure 21 shown, it may further include a planarization layer 105 (i.e., the above-mentioned second planarization layer PLN2). The planarization layer 105 is located between the layer where the power line 103 is located and the anode conductive layer 104, and the planarization layer 105 is provided on the entire surface of the fan-out area BB103 to protect the third part 103c through the planarization layer 105 and avoid side corrosion of the third part 103c caused by the etching solution used for the anode.

[0118] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 22 and Figure 23 shown, the protection structure 1041 may further at least cover the edge of the third part 103c. For example, the protection structure 1041 completely covers the edge of the third part 103c, or the protection structure 1041 covers the edge of the third part 103c and exposes the remaining part of the third part 103c to protect the third part 103c through the protection structure 1041 and avoid side corrosion of the third part 103c caused by the etching solution used for the anode.

[0119] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 2 and Figure 24 shown, it may further include a plurality of touch lines 106 located in the non-display area BB. The plurality of touch lines 106 are located on the side of the layer where the dam 102 is located away from the substrate 101; at least a part of the touch lines 106 overlaps with the orthographic projection of the power line 103 on the substrate 101. At least a part of the protection structure is located in the overlapping area.

[0120] As Figure 25 shown, there is a problem of side corrosion in the power line 103 (SD) in the related art. When depositing the subsequent buffer layer (Buffer, BFR), the buffer layer (BFR) will break at the side corrosion (as shown by the dotted line box), resulting in a short circuit (Short) between the touch line 106 of the bridge layer (M1) and the power line 103 (SD) after the coating of the bridge layer (M1) on the buffer layer is completed. However, in the present disclosure, the protection structure 1041 at least covers the edge of the second part 103b, avoiding side corrosion of the power line 103, thereby effectively preventing the short circuit between the touch line 106 and the power line 103.

[0121] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 2 shown, at least a part of the touch lines 106 includes a conductive winding part C, so that the resistance of each touch line 106 is substantially the same, that is, the resistance difference of each touch line 106 is within an acceptable range (for example, ±10%). The orthographic projection of the conductive winding part C on the substrate 101 is located between the orthographic projection of the dam 102 on the substrate 101 and the display area AA. By winding at least a part of the touch lines 106, the resistance of each touch line 106 can be made substantially the same, ensuring that the signal delay (RC delay) effect of each touch line 106 is basically the same, so that the magnitude of the signal loaded on the touch electrode 107 electrically connected to the touch line 106 is substantially the same, thereby improving the influence of the large difference in the resistance of each touch line 106 on touch and facilitating the improvement of touch performance. Moreover, the conductive winding part C of the present disclosure is arranged in the area between the dam 102 and the display area AA, which can make reasonable use of the space inside the dam 102, so that it is not necessary to increase the width of the non-display area BB.

[0122] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 24 and Figure 26As shown, it may also include a mutually insulated bridge layer (M1) and a touch layer (M2), wherein the bridge layer (M1) is located between the layer where the barrier dam 102 is located and the touch layer (M2); the touch line 106 includes a first sub-touch line 1061 and a second sub-touch line 1062 electrically connected to each other, wherein the first sub-touch line 1061 is located in the bridge layer (M1), and the second sub-touch line 1062 is located in the touch layer (M2). This double-layer wiring method of the touch line 106 can not only effectively reduce the resistance of the touch line 106, but also ensure that after one layer of the wiring is partially broken, the continuity of the touch line 106 can still be ensured through the other layer of wiring, thereby effectively solving the problem that the single-layer wiring is easily broken and causes touch failure. In some embodiments, a through hole can be set in the insulating layer between the bridge layer (M1) and the touch layer (M2) at a preset distance (for example, 100 μm) in the non-display area BB, so that the two layers of wiring of the touch line 106 are electrically connected via the through hole.

[0123] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, if Figure 2 , Figures 27 to 29 As shown, it can also include a plurality of touch electrodes 107 located in the display area AA, and the touch electrodes 107 are electrically connected to the touch lines 106; the touch electrodes 107 include a first sub-touch electrode 1071 and a second sub-touch electrode 1072 electrically connected to each other, wherein the first sub-touch electrode 1071 is located in the bridge layer (M1), and the second sub-touch electrode 1072 is located in the touch layer (M2). This double-layer setting of the touch electrode 107 can not only effectively reduce the resistance of the touch electrode 107, but also ensure that after one layer of the sub-touch electrode 107 is partially broken, the continuity of the touch electrode 107 can still be ensured by another layer of sub-touch electrodes, thereby effectively solving the problem that the single-layer touch electrode 107 is easily broken and causes touch failure. In some embodiments, a through hole V may be provided in the insulating layer between the bridge layer (M1) and the touch layer (M2) at a preset distance (e.g., 100 μm) in the display area AA, so that the first sub-touch electrode 1071 and the second sub-touch electrode 1072 are electrically connected via the through hole V. In addition, since the present disclosure can realize the touch function by using the touch layer (M2) and the bridge layer (M1) in the display substrate, there is no need for an external touch control module (TSP), thereby reducing the thickness of the display substrate, which is conducive to folding; at the same time, there is no fitting tolerance, and the frame width can be reduced.

[0124] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, if Figure 28 As shown, a plurality of through holes V connecting the first sub-touch electrode 1071 and the second sub-touch electrode 1072 may be evenly distributed in the display area AA to improve the afterimage of the through holes V that can be seen and achieve the effect of eliminating the image of the through holes V.

[0125] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 2 shown, the plurality of touch electrodes 107 may include a plurality of first touch electrodes 107' extending along a first direction Y, and a plurality of second touch electrodes 107" extending along a second direction X; the plurality of touch lines 106 include a plurality of first touch lines 106' and a plurality of second touch lines 106"; wherein, the first touch electrode 107' is electrically connected to the first touch line 106', and the second touch electrode 107" is electrically connected to the second touch line 106".

[0126] Optionally, in the above display substrate provided by the embodiments of the present disclosure, the first touch electrode 107' may be a touch driving electrode (Tx), and the first touch line 106' is correspondingly a touch driving line; the second touch electrode 107" may be a touch sensing electrode (Rx), and the second touch line 106" is correspondingly a touch sensing line; or, the first touch electrode 107' is a touch sensing electrode, and the first touch line 106' is correspondingly a touch sensing line; the second touch electrode 107" is a touch driving electrode, and the second touch line 106" is correspondingly a touch driving line.

[0127] As Figure 2 can be seen, the first touch electrode 107' extending along the first direction Y is disconnected by the second touch electrode 107" extending along the second direction X in the same layer. Therefore, in order to ensure the continuity of the first touch electrode 107', the bridging portion BD of the bridging layer (M1) can be used to connect the disconnected second touch electrodes 107".

[0128] In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as Figure 2 and Figure 30 shown, the non-display area BB may include a first non-display area BB1 and a second non-display area BB2 that are opposite to each other, and a third non-display area BB3 and a fourth non-display area BB4 that are opposite to each other, wherein the first non-display area BB1 is a first non-display area BB1 for chip bonding, and the third non-display area BB3 and the fourth non-display area BB4 are respectively connected to the first non-display area BB1 and the second non-display area BB2; when the size of the display substrate is relatively large (for example, the display substrate is a notebook, etc.), more touch electrodes 107 need to be provided, and correspondingly more touch lines 106 are required. In order to ensure the narrow border effect, as Figure 30As shown, multiple second touch lines 106” can be set to extend from the third non-display area BB3 and the fourth non-display area BB4 and fold towards the first non-display area BB1; some of the first touch lines 106’ extend from the second non-display area BB2 and the third non-display area BB3 and fold towards the first non-display area BB1 in sequence, and the remaining first touch lines 106’ extend from the second non-display area BB2 and the fourth non-display area BB4 and fold towards the first non-display area BB1 in sequence. And within the third non-display area BB3 and the fourth non-display area BB4, the first touch lines 106’ are located on the side of the second touch lines 106” away from the display area AA. When the size of the display substrate is small (for example, the display substrate is a mobile phone, etc.), fewer touch electrodes 107 need to be set, and correspondingly fewer touch lines 106 are required. To ensure the narrow bezel effect, as Figure 2 shown, multiple second touch lines 106” can extend from the fourth non-display area BB4 and fold towards the first non-display area BB1; some of the first touch lines 106’ can extend from the second non-display area BB2 and the third non-display area BB3 and fold towards the first non-display area BB1 in sequence, and the remaining first touch lines 106’ can be located within the first non-display area BB1.

[0129] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, as Figure 31 shown, it may further include at least one touch chip 108, and multiple touch lines 106 are bound and connected to the touch chip 108. The touch chip 108 can be a chip on film (COF).

[0130] In some embodiments, as Figure 48 shown, the driving circuit layer is located on the substrate 101, and a pixel circuit 109 of sub-pixels is provided in the driving circuit layer. The pixel circuit 109 is used to drive the sub-pixels to emit light. The pixel circuit includes a thin film transistor (TFT), and may also include a capacitor Cst. For example, the pixel circuit 109 can be a 1T pixel circuit, a 2T1C pixel circuit, a 3T1C pixel circuit, a 4T1C pixel circuit, a 5T1C pixel circuit, a 6T1C pixel circuit, or a 7T1C pixel circuit.

[0131] In some embodiments, as Figure 48 shown, the light-emitting layer EL is located on the side of the driving circuit layer 109 away from the substrate 101. The light-emitting layer EL may include a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B, but is not limited thereto. The red sub-pixel R is used to emit red light, the green sub-pixel G is used to emit green light, and the blue sub-pixel B is used to emit blue light.

[0132] In some embodiments, the light-emitting layer EL is an organic light-emitting layer. The red sub-pixel R, the green sub-pixel G, and the blue sub-pixel B are all OLED (organic light-emitting diode) sub-pixels.

[0133] In some embodiments, asFigure 48 As shown, the encapsulation layer 110 is located on the side of the light-emitting layer EL away from the substrate 101, and is used to prevent water and oxygen from eroding the light-emitting layer. The encapsulation layer 110 includes a first inorganic encapsulation layer 1101, an organic encapsulation layer 1102, and a second inorganic encapsulation layer 1103. The first inorganic encapsulation layer 1101 is located on the side of the light-emitting layer EL away from the substrate 101, the organic encapsulation layer 1102 is located on the side of the first inorganic encapsulation layer 1101 away from the substrate 101, and the second inorganic encapsulation layer 1103 is located on the side of the organic encapsulation layer 1102 away from the substrate 101. The organic encapsulation layer 1102 can be formed by an inkjet printing (IJP) process. In addition, the display substrate may further include a cathode CAD, a gate insulating layer GI, a first interlayer dielectric layer ILD1, a second interlayer dielectric layer ILD2, etc. Other essential components of the display substrate are understood to be possessed by those of ordinary skill in the art, and will not be elaborated herein, nor should they be construed as a limitation to the present disclosure.

[0134] Based on the same inventive concept, the present disclosure also provides a display device, including the above-mentioned display substrate provided by the embodiments of the present disclosure. The display substrate may be an OLED, QLED, or other display substrates. Since the principle of solving problems of this display device is similar to that of the above-mentioned display substrate, the implementation of this display device may refer to the embodiments of the above-mentioned display substrate, and the repeated parts will not be elaborated.

[0135] In some embodiments, the above-mentioned display device provided by the embodiments of the present disclosure may be: a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, a smart watch, a fitness wristband, a personal digital assistant, or any other product or component with a display function. The display device provided by the embodiments of the present disclosure may further include, but is not limited to: a radio frequency unit, a network module, an audio output unit, an input unit, a sensor, a display unit, a user input unit, an interface unit, a memory, a processor, and a power supply, etc. Those skilled in the art can understand that the composition of the above-mentioned display device does not constitute a limitation to the display device. The display device may include more or fewer of the above-mentioned components, or combine certain components, or have different component arrangements.

[0136] Although the preferred embodiments of the present disclosure have been described, it should be understood that those skilled in the art can make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if these modifications and variations of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalent technologies, the present disclosure also intends to include these changes and modifications.

Claims

1. A display substrate, wherein, Comprising: A substrate, including a display area and a non-display area surrounding the display area; A dam, located in the non-display area and at least partially surrounding the display area; A power line, in the non-display area on one side of the display area, the power line includes a first branch and a second branch integrally arranged, the orthographic projection of the first branch on the substrate substantially coincides with the orthographic projection of the dam on the substrate, and the orthographic projection of the second branch on the substrate does not overlap with the orthographic projection of the dam on the substrate; An anode conductive layer, on the side of the layer where the power line is located away from the substrate, the anode conductive layer includes a protection structure at least partially located in the non-display area, the protection structure covers the edge of the second branch and exposes the remaining area of the second branch.

2. The display substrate according to claim 1, wherein It further includes a first source-drain metal layer between the substrate and the anode conductive layer, and the power line includes a first sub-power line located in the first source-drain metal layer.

3. The display substrate according to claim 2, wherein, It further includes a second source-drain metal layer between the first source-drain metal layer and the anode conductive layer; The power line further includes a second sub-power line located in the second source-drain metal layer, and the second sub-power line at least covers the edge of the first sub-power line.

4. The display substrate according to claim 3, wherein, The second sub-power line completely covers the first sub-power line.

5. The display substrate according to claim 3, wherein, The second sub-power line covers the edge of the first sub-power line and exposes the remaining area of the first sub-power line.

6. The display substrate according to any one of claims 3 to 5, wherein, The protection structure at least covers at least part of the edge of the second branch in the second sub-power line.

7. The display substrate according to any one of claims 1 to 5, wherein, The protection structure also at least covers at least part of the edge of the first branch.

8. The display substrate according to any one of claims 1 to 5, wherein The power line includes a first-level power line and a second-level power line, wherein the protection structure is discontinuously arranged at the gap between the first-level power line and the second-level power line.

9. The display substrate according to any one of claims 1 to 5, wherein, The edge of the first branch and / or the edge of the second branch includes an irregular structure.

10. The display substrate according to claim 9, wherein, The edge shape of the protection structure is the same as the edge shape of the second branch.

11. The display substrate according to any one of claims 1 to 5 and 10, wherein The non-display area includes: a first non-display area for bonding with a chip, the first non-display area includes a packaging area and a water-oxygen isolation area arranged in sequence in the direction away from the display area; The dam in the first non-display area is located in the packaging area, and the second branch is located in the packaging area and the water-oxygen isolation area.

12. The display substrate according to claim 11, wherein, The first non-display area further includes a fan-out area and a bonding area, wherein the fan-out area connects the water-oxygen isolation area and the bonding area; The power line further includes a third branch located in the fan-out area, and the third branch is integrally arranged with the second branch.

13. The display substrate according to claim 12, wherein, It further includes a planarization layer, the planarization layer is located between the layer where the power line is located and the anode conductive layer, and the planarization layer is arranged on the entire surface of the fan-out area.

14. The display substrate according to claim 13, wherein, The protection structure also at least covers at least part of the edge of the third branch.

15. The display substrate according to any one of claims 1 to 5, 10, and 12 to 14, wherein, It further includes a plurality of touch lines located in the non-display area, on a side of the layer where the dam is located away from the substrate; at least a part of the positive projection of the touch lines on the substrate overlaps with the positive projection of the power line on the substrate, and at least a part of the protection structure is located in the overlapping area.

16. The display substrate according to claim 15, wherein, At least a part of the touch lines includes conductive winding portions to make the resistance of each touch line the same, and the positive projection of the conductive winding portions on the substrate is located between the positive projection of the dam on the substrate and the display area.

17. The display substrate according to claim 16, wherein, It further includes an insulating bridge layer and a touch layer, and the bridge layer is located between the layer where the dam is located and the touch layer; The touch line includes a first sub-touch line and a second sub-touch line that are electrically connected to each other. Among them, the first sub-touch line is located in the bridge layer, and the second sub-touch line is located in the touch layer.

18. The display substrate according to claim 17, wherein, It further includes a plurality of touch electrodes located in the display area, and the touch electrodes are electrically connected to the touch lines; the touch electrodes include a first sub-touch electrode and a second sub-touch electrode that are electrically connected to each other. Among them, the first sub-touch electrode is located in the bridge layer, and the second sub-touch electrode is located in the touch layer.

19. The display substrate according to claim 18, wherein, It further includes an insulating layer located between the touch layer and the bridge layer. The insulating layer includes a plurality of through holes that connect the first sub-touch electrode and the second sub-touch electrode, and the plurality of through holes are evenly distributed in the display area.

20. The display substrate according to claim 18 or 19, wherein The plurality of touch electrodes includes a plurality of first touch electrodes extending in a first direction and a plurality of second touch electrodes extending in a second direction; the plurality of touch lines includes a plurality of first touch lines and a plurality of second touch lines; among them, the first touch electrodes are electrically connected to the first touch lines, and the second touch electrodes are electrically connected to the second touch lines.

21. The display substrate according to claim 20, wherein, The non-display area includes a first non-display area and a second non-display area facing each other, and a third non-display area and a fourth non-display area facing each other. Among them, the first non-display area is the first non-display area for chip bonding, and the third non-display area and the fourth non-display area are respectively connected to the first non-display area and the second non-display area; The plurality of second touch lines extend from the third non-display area and the fourth non-display area and fold towards the first non-display area; Part of the first touch lines extend from the second non-display area and the third non-display area and fold towards the first non-display area in sequence, and the remaining first touch lines extend from the second non-display area and the fourth non-display area and fold towards the first non-display area in sequence. And in the third non-display area and the fourth non-display area, the first touch lines are located on a side of the second touch lines away from the display area.

22. The display substrate according to claim 20, wherein, The non-display area includes a first non-display area and a second non-display area facing each other, and a third non-display area and a fourth non-display area facing each other. Among them, the first non-display area is the first non-display area for chip bonding, and the third non-display area and the fourth non-display area are respectively connected to the first non-display area and the second non-display area; The multiple second touch lines extend from the fourth non-display area and fold towards the first non-display area; Some of the first touch lines extend from the second non-display area and the third non-display area and fold towards the first non-display area in sequence, and the remaining first touch lines are located in the first non-display area.

23. The display substrate according to any one of claims 16 to 19, 21, and 22, wherein, It further includes at least one touch chip, and the multiple touch lines are bound and connected to the touch chip.

24. A display device, wherein, It includes a display substrate according to any one of claims 1 to 23.

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