A clock calibration method, apparatus, device, and storage medium

Abstract

The application discloses a clock calibration method, device, equipment and storage medium. First, a current master-slave time deviation and a slave master time deviation are calculated according to measurement data. The master-slave time deviation contains a forward network delay when a master clock transmits a message to a slave clock. The slave master time deviation contains a reverse network delay when the slave clock transmits a message to the master clock. Then, a first clock calibration quantity is determined according to the master-slave time deviation, the slave master time deviation and a preset asymmetric compensation quantity. The asymmetric compensation quantity is used to compensate for the asymmetric bidirectional network delay between two network nodes where the master and slave clocks are located in the PTP network, so that the accuracy of the first clock calibration quantity is improved. Finally, the slave clock is calibrated according to the determined first clock calibration quantity, the master-slave clock synchronization task is realized, and the time synchronization precision of the PTP network is improved.

Description

Technical Field

[0001] This application relates to the field of network time synchronization technology, and more specifically, to a clock calibration method, apparatus, device, and storage medium. Background Technology

[0002] The IEEE 1588 standard, or Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, defines the Precision Time Protocol (PTP). In a PTP network using the PTP protocol, the Ordinary Clock (OC) includes two types: a master clock and a slave clock. The basic principle of the PTP protocol in a PTP network is to periodically correct the slave clock of the PTP network through synchronization messages, so that the slave clock of the PTP network remains synchronized with the master clock.

[0003] Since the master clock and slave clock are located at different network nodes, the transmission of messages between the two network nodes takes a certain amount of time. In other words, there is a certain network delay in the clock calibration amount determined based on the synchronization message. It is difficult to achieve synchronization between the master and slave clocks based on this clock calibration amount, resulting in low time synchronization accuracy of the PTP network. Summary of the Invention

[0004] In view of the above problems, this application is made to provide a clock calibration method, apparatus, device and storage medium to realize the clock calibration task of PTP network and improve the time synchronization accuracy of PTP network.

[0005] The specific plan is as follows:

[0006] In a first aspect, a clock calibration method is provided, the method comprising:

[0007] Acquire the first set of measurement data for the target network, which is a PTP network using Precision Time Protocol (PTP). The first set of measurement data includes: t1 timestamp when the master clock of the target network sends a first synchronization message to the slave clock of the target network; t2 timestamp when the slave clock receives the first synchronization message; t3 timestamp when the slave clock sends a first delay request message to the master clock; and t4 timestamp when the master clock receives the first delay request message.

[0008] Calculate the difference between the t2 timestamp and the t1 timestamp to obtain the master-slave time deviation;

[0009] Calculate the difference between the t4 timestamp and the t3 timestamp to obtain the master time offset;

[0010] Based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetric compensation amount, a first clock calibration amount is determined; wherein, the asymmetric compensation amount is determined based on several sets of measurement data of the target network and is used to compensate for the time value of asymmetric network delay between the master and slave clocks.

[0011] The slave clock is calibrated based on the first clock calibration value.

[0012] Secondly, a clock calibration device is provided, the device comprising:

[0013] The measurement data acquisition unit is used to acquire a first set of measurement data of the target network, wherein the target network is a PTP network using Precision Time Protocol (PTP). The first set of measurement data includes: t1 timestamp when the master clock of the target network sends a first synchronization message to the slave clock of the target network; t2 timestamp when the slave clock receives the first synchronization message; t3 timestamp when the slave clock sends a first delay request message to the master clock; and t4 timestamp when the master clock receives the first delay request message.

[0014] The time deviation calculation unit is used to calculate the difference between the t2 timestamp and the t1 timestamp to obtain the master-slave time deviation, and to calculate the difference between the t4 timestamp and the t3 timestamp to obtain the slave-master time deviation.

[0015] An asymmetric compensation unit is used to determine a first clock calibration amount based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetric compensation amount; wherein the asymmetric compensation amount is determined based on several sets of measurement data of the target network and is used to compensate for the time value of asymmetric network delay between the master and slave clocks.

[0016] A clock calibration unit is used to calibrate the slave clock according to the first clock calibration amount.

[0017] Thirdly, a clock calibration device is provided, comprising: a memory and a processor;

[0018] The memory is used to store programs;

[0019] The processor is used to execute the program to implement the various steps of the clock calibration method described above.

[0020] Fourthly, a storage medium is provided on which a computer program is stored, which, when executed by a processor, implements the various steps of the clock calibration method described above.

[0021] Using the above technical solution, this application first calculates the current master-slave time deviation and slave-master time deviation based on measurement data. The master-slave time deviation includes the forward network delay when the master clock transmits messages to the slave clock, and the slave-master time deviation includes the reverse network delay when the slave clock transmits messages to the master clock. Then, based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetry compensation amount, a first clock calibration amount is determined. Finally, based on the determined first clock calibration amount, the slave clock is calibrated.

[0022] When performing clock calibration, this application considers the network latency caused by message transmission and uses the asymmetric compensation amount to compensate for the asymmetric bidirectional network latency between the two network nodes where the master and slave clocks are located in the PTP network, thereby determining a more accurate first clock calibration amount. The slave clock is then calibrated using the first clock calibration amount, ultimately improving the time synchronization accuracy of the PTP network. Attached Figure Description

[0023] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0024] Figure 1 A schematic diagram of the message transmission process during clock calibration in a PTP network is shown.

[0025] Figure 2 A schematic flowchart illustrating a clock calibration method provided in an embodiment of this application;

[0026] Figure 3 A flowchart illustrating another clock calibration method provided in an embodiment of this application;

[0027] Figure 4 A schematic diagram of the structure of a time synchronization detection device for a PTP network is shown.

[0028] Figure 5 A schematic flowchart illustrating another clock calibration method provided in this application embodiment;

[0029] Figure 6 A schematic flowchart illustrating another clock calibration method provided in this application embodiment;

[0030] Figure 7 An example is provided: a graph showing the change in standard deviation;

[0031] Figure 8 An example is shown by plotting the peak-to-peak value variation.

[0032] Figure 9 This is a schematic diagram of the structure of a clock calibration device provided in an embodiment of this application;

[0033] Figure 10 This is a schematic diagram of the clock calibration device provided in an embodiment of this application. Detailed Implementation

[0034] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0035] The inventors of this application have discovered that the problem of inaccurate clock calibration caused by network latency can be solved by calculating the network latency between the network node where the master clock resides (hereinafter referred to as the master clock) and the network node where the slave clock resides (hereinafter referred to as the slave clock). Specifically, Figure 1 Taking a slave clock as an example, this paper illustrates a clock calibration process in a PTP network, where an announcement message is used to establish a synchronization hierarchy, combined with... Figure 1 As shown, the process may include:

[0036] The first step is for the master clock to send a synchronization message (Sync) to the slave clock.

[0037] The second step is to record the timestamp t2 when the synchronization message is received from the clock record. The master clock time corresponding to the timestamp t2 can be denoted as t. 2m Timestamp.

[0038] The third step is to obtain the t1 timestamp from the clock when the master clock sends the synchronization message.

[0039] Specifically, the slave clock can determine whether it is in single-step or double-step transmission mode by reading relevant information in the synchronization message. In single-step mode, the t1 timestamp is the estimated transmission time of the synchronization message by the master clock, and the synchronization message includes the t1 timestamp. Therefore, in single-step mode, the slave clock obtains the t1 timestamp by reading the synchronization message. In double-step mode, the t1 timestamp is the actual time when the master clock sends the synchronization message, and after sending the synchronization message, the master clock sends a follow-up message to the slave clock. The follow-up message includes the t1 timestamp. Therefore, in double-step mode, the slave clock obtains the t1 timestamp by reading the follow-up message. In general, the synchronization message and the follow-up message are used to provide synchronization time information on the master clock side.

[0040] Step 4: Send a delay request message (Delay_Req) ​​from the slave clock to the master clock, and record the t3 timestamp when sending the delay request message. The master clock time corresponding to the t3 timestamp can be denoted as t. 3m Timestamp.

[0041] Step 5: The master clock records the t4 timestamp when it receives the delay request message, writes the t4 timestamp into the delay response message (Delay_Resp), and sends the delay response message to the slave clock.

[0042] Step 6: Read the delayed response message from the clock and obtain the t4 timestamp.

[0043] In other words, the four timestamps t1 to t4 can be obtained from the clock using the synchronization message, the delay request message, and the delay response message, thereby calculating the network delay between the master and slave clocks.

[0044] Step 7: Based on the four timestamps t1 to t4, calibrate the local time, which is the time of the slave clock.

[0045] Specifically, the time deviation between the master clock and the slave clock can be obtained from (t2-t1) or (t4-t3), and the average network delay can be obtained from (t2-t1+t4-t3) / 2. The clock calibration amount is determined based on the time deviation and the average network delay, and then the slave clock is calibrated using the clock calibration amount to achieve the master-slave clock synchronization task.

[0046] After further analysis of the above-mentioned solution, the inventors of this application discovered that although the solution considers network latency, in practical applications, the different bidirectional communication paths between the two network nodes result in different times for bidirectional communication. In other words, the time spent by the master clock sending a message to the slave clock is not equal to the time spent by the slave clock sending a message to the master clock, indicating a problem of bidirectional network latency asymmetry. Therefore, the clock calibration amount determined based on the average network latency is inaccurate, making it difficult to achieve master-slave clock synchronization.

[0047] To address this issue, this application provides a clock calibration scheme to resolve the asymmetric network delay problem between master and slave clocks in a PTP network, thereby enabling master-slave clock synchronization in the PTP network and improving the time synchronization accuracy of the PTP network.

[0048] The proposed solution can be implemented based on a terminal with data processing capabilities, such as a computer, server, or cloud platform.

[0049] Figure 2 This is a schematic flowchart illustrating a clock calibration method according to an embodiment of this application. (In conjunction with...) Figure 2 As shown, the method may include the following steps:

[0050] Step S101: Obtain the first set of measurement data for the target network.

[0051] The target network is a PTP network using the Precision Time Protocol (PTP), which may include a master clock and a slave clock. The first set of measurement data includes: timestamp t1 when the master clock of the target network sends a first synchronization message to the slave clock of the target network; timestamp t2 when the slave clock receives the first synchronization message; timestamp t3 when the slave clock sends a first delay request message to the master clock; and timestamp t4 when the master clock receives the first delay request message. For an explanation of the four timestamps t1 to t4, please refer to [reference needed]. Figure 1 .

[0052] Step S102: Calculate the difference between the t2 timestamp and the t1 timestamp to obtain the master-slave time deviation.

[0053] The master-slave time deviation can be expressed as Dms = t2 - t1, which includes the forward network delay when the master clock transmits the synchronization message to the slave clock, and the actual master-slave time difference.

[0054] Step S103: Calculate the difference between the t4 timestamp and the t3 timestamp to obtain the master time deviation.

[0055] The slave-master time offset can be expressed as Dsm = t4 - t3, which includes the reverse network delay when the slave clock transmits the delay request message to the master clock, and the actual slave-master time difference. Typically, the forward network delay and the reverse network delay are not equal.

[0056] Step S104: Determine the first clock calibration amount based on the master-slave time deviation, the slave-master time deviation, and the preset asymmetry compensation amount.

[0057] It should be noted that in a defined PTP network, the two network nodes containing the master and slave clocks are fixed, and the bidirectional transmission path between the two network nodes is fixed. Therefore, under ideal network conditions, the difference in bidirectional network delay between the master and slave clocks is fixed. Considering practical situations, under non-ideal network conditions, the difference in bidirectional network delay between the master and slave clocks approaches a fixed value. Based on the above, a preset asymmetric compensation amount can be used to characterize the difference in bidirectional network delay between the master and slave clocks. This asymmetric compensation amount can be a time value determined based on several sets of measurement data of the target network, used to compensate for the asymmetric network delay between the master and slave clocks, and can be applied to most calibration processes of the target network.

[0058] Therefore, after compensating for the master-slave time deviation and the slave-master time deviation using the asymmetric compensation amount, the forward network delay in the compensated master-slave time deviation is approximately consistent with the reverse network delay in the compensated slave-master time deviation. Based on this, a more accurate average network delay can be determined, and thus a more accurate first clock calibration amount can be determined.

[0059] Step S105: Calibrate the slave clock according to the first clock calibration value.

[0060] The clock calibration method described above takes into account the network latency caused by message transmission when performing clock calibration, and uses the asymmetric compensation amount to compensate for the asymmetric bidirectional network latency between the two network nodes where the master and slave clocks are located in the PTP network. This solves the problem of asymmetric bidirectional network latency and can determine a more accurate first clock calibration amount. Then, the slave clock is calibrated using the first clock calibration amount, which ultimately improves the time synchronization accuracy of the PTP network.

[0061] Figure 3 This is a schematic flowchart illustrating another clock calibration method according to an embodiment of this application, combined with... Figure 3 As shown, the method may include the following steps:

[0062] Steps S201-S203 are the same as steps S101-S103 described above, and will not be repeated here.

[0063] Step S204: Determine whether the master-slave time deviation and the slave-master time deviation meet the preset time deviation threshold condition. If so, proceed to step S205.

[0064] The time deviation threshold condition includes: the master-slave time deviation is within a preset master-slave time deviation range, and the slave-master time deviation is within a preset slave-master time deviation range.

[0065] It should be noted that, based on several sets of historical measurement data of the target network, several historical master-slave time deviations can be calculated. Statistical analysis of these deviations reveals that, in practical applications, they exhibit a normal or approximately normal distribution. Therefore, the range of the master-slave time deviation can be determined using the 3σ principle of normal distribution. The process for determining the range of the slave-master time deviation can refer to the process for determining the range of the master-slave time deviation.

[0066] The situation where the master-slave time deviation and the slave-master time deviation do not meet the preset time deviation threshold conditions indicates that the current master-slave time deviation or slave-master time deviation exceeds the corresponding time deviation range, which may be an occasional abnormal data (i.e., outlier). In this case, the master-slave time deviation and the slave-master time deviation are discarded, and step S205 and subsequent steps are not executed to avoid introducing clock calibration errors caused by abnormal data.

[0067] Steps S205-S206 are the same as steps S104-S105 above, and will not be repeated here.

[0068] The above method determines the master-slave time deviation and the slave-master time deviation before clock calibration. If the master-slave time deviation and the slave-master time deviation meet the time deviation threshold condition, the slave clock is calibrated. This can avoid introducing clock calibration errors caused by abnormal data, thereby improving the time synchronization accuracy of the PTP network.

[0069] In some embodiments provided in this application, the asymmetric compensation amount is determined based on the time deviation difference of each of the plurality of sets of measurement data, wherein the time deviation difference is the difference between the master-slave time deviation and the slave-master time deviation.

[0070] Specifically, the asymmetric compensation amount can be expressed as Δd. For example, the asymmetric compensation amount can be the average of the differences between various time deviations, and the process of determining the asymmetric compensation amount can include:

[0071] Step A: Obtain several sets of measurement data and calculate several master-slave time deviations Dms and several slave-master time deviations Dsm;

[0072] Step B: According to the mean theorem, the mean of several master-slave time deviations Dms is averaged to obtain the master-slave time mean deviation value Dms_mean;

[0073] Step C: According to the mean theorem, the mean of several slave time deviations Dsm is averaged to obtain the slave time mean deviation value Dsm_mean.

[0074] Step D: Calculate the asymmetric compensation amount △d from the master-slave time mean deviation value Dms_mean and the slave-master time mean deviation value Dsm_mean, where △d = Dms_mean - Dsm_mean.

[0075] Optionally, the aforementioned time deviation threshold conditions can be used to preprocess the several sets of measurement data to filter out abnormal historical master-slave time deviations and abnormal historical slave-master time deviations, and then the asymmetric compensation amount can be determined using the preprocessed several sets of measurement data.

[0076] Based on the above, step S104, determining the first clock calibration amount according to the master-slave time deviation, the slave-master time deviation, and the preset asymmetry compensation amount, may include:

[0077] Step E: Calculate the sum of the asymmetric compensation amount and the slave-master time deviation to obtain the compensated slave-master time deviation.

[0078] The compensated slave-master time offset can be expressed as Dsm', where Dsm' = Dsm + Δd. Step E above is equivalent to using the asymmetric compensation amount to compensate for the t4 timestamp; that is, the asymmetric network delay can be compensated by updating the t4 timestamp.

[0079] Step F: Calculate the average value of the master-slave time deviation and the compensated master-slave time deviation to obtain the average delay.

[0080] The average delay can be expressed as D, where D = (Dms + Dsm') / 2.

[0081] Step G: Use the difference between the master-slave time deviation and the average delay as the first clock calibration value.

[0082] The first clock calibration quantity can be expressed as θ1, where θ1 = Dms - D.

[0083] In another possible implementation, the asymmetric compensation amount can be the difference between the master-slave time deviation and the master-slave time deviation. Based on the above, the asymmetric compensation amount is used to compensate for the master-slave time deviation so that the forward network delay in the compensated master-slave time deviation is approximately consistent with the reverse network delay in the master-slave time deviation. Then, the average value of the compensated master-slave time deviation and the master-slave time deviation is used as the average delay. Based on the master-slave time deviation after removing the average delay, the slave clock is calibrated.

[0084] Considering the instability of network conditions in practical applications, which causes network latency jitter between master and slave clocks, this application also provides a jitter optimization scheme to solve the problem of network latency jitter and further improve the time synchronization accuracy of PTP networks.

[0085] Figure 4 This example illustrates the structure of a time synchronization detection device for a PTP network, combined with... Figure 4 As shown, the time synchronization detection device includes a switch 4_1, a master clock 4_2, a slave clock 4_3, a time interval counter 4_4, and a data analyzer 4_5.

[0086] In this system, the master clock 4_2 and the slave clock 4_3 transmit messages through a switch 4_1 (e.g., a regular switch) to achieve master-slave clock synchronization. During time synchronization detection, the master clock 4_2 and the slave clock 4_3 each output periodic second pulses (1pps) to a time interval counter 4_4 for time difference statistics. For example, the time interval counter 4_4 uses the 1pps second pulse output by the master clock 4_2 as an opening signal and the 1pps second pulse output by the slave clock 4_3 as a closing signal to calculate the time difference between the master and slave clocks. Then, the time interval counter 4_4 outputs the statistical data of several sets of second pulses to a data analyzer 4_5 for data analysis. The statistical data refers to the time deviation between the master clock and the slave clock. The obtained statistical analysis results can include the variance and peak-to-peak value of the statistical data for each set of second pulses. The peak-to-peak value refers to the difference between the largest and smallest time deviations in the statistical data of the current set of second pulses.

[0087] After calibrating the master clock 4_2 and slave clock 4_3 using steps S101-S105 or S201-S206 described above, the inventors of this application performed further clock calibration on the master clock 4_2 and slave clock 4_3. Specifically, they gradually increased the difference between the calculated actual value of the relative time difference and the amount of clock calibration to be used, that is, they gradually decreased the amount of clock calibration to be used, and calibrated the slave clock using the reduced amount of clock calibration; and after each clock calibration, they used... Figure 4 The time synchronization detection device shown was used for testing. By comparing the data analysis results of each group of second pulses, it was found that reducing the amount of clock calibration required can reduce the impact of jitter on clock calibration, reduce master-slave clock deviation, and improve the time synchronization accuracy of the PTP network.

[0088] Based on the above test results, the jitter optimization scheme provided in this application may include: after calibrating the slave clock according to the first clock calibration amount in step S105 above, performing the following steps:

[0089] Step H: Obtain the second set of measurement data for the calibrated target network.

[0090] The second set of measurement data includes: the t1' timestamp when the master clock sends the second synchronization message to the slave clock; the t2' timestamp when the slave clock receives the second synchronization message; the t3' timestamp when the slave clock sends the second delay request message to the master clock; and the t4' timestamp when the master clock receives the second delay request message. The explanation of the four timestamps t1' to t4' can be found in the t1 to t4 timestamps above. The t1 to t4 timestamps represent the time synchronization state of the target network without asymmetric compensation, while the t1' to t4' timestamps represent the time synchronization state of the target network after asymmetric compensation.

[0091] Step 1: Based on the second set of measurement data, calculate the actual value θ of the relative time difference.

[0092] Wherein, the actual value of the relative time difference θ = (t2' - t1' - t4' + t3') / 2.

[0093] Step J: Determine the second clock calibration amount corresponding to the actual value θ of the relative time difference according to the preset rules.

[0094] Wherein, the second clock calibration amount is less than or equal to the actual value θ of the relative time difference.

[0095] Step K: Calibrate the slave clock according to the second clock calibration value.

[0096] In one possible implementation, step J above, determining the second clock calibration amount corresponding to the actual value θ of the relative time difference according to a preset rule, may include:

[0097] Using an α filter, the second clock calibration value corresponding to the actual value θ of the relative time difference is calculated, wherein the value of α in the α filter is greater than or equal to 1.

[0098] The α filter uses a proportionally convergent filtering form, which is a fixed transformation form of Kalman filtering. Its expression is u = θ / α, where the parameter u is the second clock calibration amount and the parameter α is the filter factor (also called the calibration factor). That is to say, the second clock calibration amount is 1 / α of the actual value of the calculated relative time difference.

[0099] The above scheme utilizes the reduced relative time difference (i.e., the second clock calibration amount) to calibrate the slave clock, thereby achieving jitter optimization of the PTP network and further improving the time synchronization accuracy of the PTP network.

[0100] Due to network factors, abnormal jitter may occur during the clock calibration process of a PTP network. To avoid introducing clock calibration errors caused by abnormal jitter, Figure 5This example illustrates a flowchart of yet another clock calibration method, combined with... Figure 5 As shown, the method may include the following steps:

[0101] Step S301: Based on the preset asymmetric compensation amount, calibrate the slave clock of the target network.

[0102] Specifically, the calibration process in step S301 includes steps S101-S105 or S201-S206 as described above.

[0103] Step S302: Obtain the second set of measurement data for the calibrated target network.

[0104] Step S303: Based on the second set of measurement data, calculate the actual value θ of the relative time difference.

[0105] Step S304: Determine whether the actual value θ of the relative time difference meets the preset threshold condition. If so, proceed to step S305.

[0106] Since the actual value θ of the relative time difference is usually small after the calibration described in step S301, if the actual value θ of the relative time difference does not meet the threshold condition, it can indicate that the current jitter is more serious and the actual value θ of the relative time difference is abnormal. In this case, step S305 and subsequent steps are not executed to avoid introducing clock calibration errors caused by abnormal data.

[0107] Optionally, the threshold condition may include: the actual value θ of the relative time difference is less than or equal to a preset threshold.

[0108] Step S305: Determine the second clock calibration amount corresponding to the actual value θ of the relative time difference according to the preset rules.

[0109] Step S306: Calibrate the slave clock according to the second clock calibration value.

[0110] For an explanation of steps S302, S303, S305 and S306 above, please refer to step HK above.

[0111] The clock calibration scheme described above only performs jitter optimization when the actual value of the relative time difference meets the threshold condition. This avoids introducing clock calibration errors caused by abnormal data and improves the time synchronization accuracy of the PTP network.

[0112] Figure 6 This is a flowchart illustrating another clock calibration method according to an embodiment of this application, combined with... Figure 6 As shown, the method may include the following steps:

[0113] Steps S401-S403 are the same as steps S301-S303 described above, and will not be repeated here.

[0114] Step S404: Using the α filter, calculate the second clock calibration value corresponding to the actual value θ of the relative time difference, where the initial value of α is equal to 1.

[0115] Step S405 is the same as step S306 described above, and will not be repeated here.

[0116] Step S406: Determine whether the time deviation between the master clock and the slave clock meets the preset smoothing condition. If not, proceed to step S407.

[0117] It should be noted that if the time deviation between the master clock and the slave clock meets the smoothing condition, it can be characterized that the current clock has approached the synchronization limit of the target network, and step S407 will no longer be executed, so as to reduce the overhead of the clock calibration process.

[0118] In one possible implementation, one can utilize Figure 4 The data analysis results of the data analyzer in the time synchronization detection device are used to make a judgment. Specifically, it is determined whether the statistical results of a set of second pulses corresponding to the current calibration factor α meet the corresponding smoothing conditions. The statistical results are the standard deviation or peak-to-peak value. The smoothing conditions indicate that the difference between the statistical results after two adjacent clock calibrations is small. If not, step S407 is executed.

[0119] Step S407: Increase the value of α of the α filter and return to step S404.

[0120] The above-described scheme performs multiple jitter optimizations after clock calibration based on asymmetric compensation, which can further improve the time synchronization accuracy of the PTP network. Furthermore, the number of jitter optimizations is determined according to the smoothing condition. If the smoothing condition is met, jitter optimization is no longer performed, and clock calibration ends, which can reduce the overhead of the clock calibration process.

[0121] In some embodiments provided in this application, the smoothing conditions may include:

[0122] If the change in time deviation between the master clock and the slave clock is less than a preset threshold in two consecutive tests, wherein the change in time deviation is the change in master-slave time deviation after the current clock calibration compared to the master-slave time deviation after the previous clock calibration.

[0123] Optionally, the method may further include:

[0124] The actual value of the relative time difference is determined, and if the actual value θ of the relative time difference meets the preset threshold condition, step S404 is executed.

[0125] For example, the threshold condition may include: the actual value θ of the relative time difference is less than or equal to twice the historical value of the relative time difference, where the historical value of the relative time difference is the actual value of the relative time difference used during the last clock calibration.

[0126] In execution Figure 6 During the clock calibration process shown, it is possible to use Figure 4 The time synchronization detection device shown detects the synchronization performance of the target network. Specifically, when α = 1, the actual network latency jitter of the target network can be detected; then α is gradually increased, and statistical results of each group of second pulses corresponding to different calibration factors are obtained. The statistical results include standard deviation and peak-to-peak value, and are used to characterize the synchronization performance of the master-slave clock. For example, the adjustment step of α can be set to 1. Table 1 illustrates the change in the synchronization performance of the master-slave clock of the target network with the calibration factor α.

[0127] Table 1

[0128]

[0129] Based on Table 1, Figure 7 The standard deviation variation curves shown in Table 1 are illustrated. Figure 8 The peak-to-peak value variation curves shown in Table 1 are illustrated. Figure 7 , Figure 8 As shown, with the increase of α, the changes in standard deviation and peak-to-peak value tend to level off. For example, the curve segment corresponding to α≥5 can be called the smooth, gradually changing region, corresponding to the synchronization limit of the target network. Combined with... Figure 7-8 As shown, the purpose of using the α filter for jitter optimization is to adjust the calibration factor α so that the synchronization accuracy of the target network enters the smooth, gradually changing region, approaching the optimal synchronization accuracy of the target network.

[0130] The clock calibration apparatus provided in the embodiments of this application is described below. The clock calibration apparatus described below can be referred to in correspondence with the clock calibration method described above.

[0131] See Figure 9 , Figure 9 This is a schematic diagram of the structure of a clock calibration device disclosed in an embodiment of this application.

[0132] like Figure 9 As shown, the device may include:

[0133] The measurement data acquisition unit 11 is used to acquire a first set of measurement data of the target network, wherein the target network is a PTP network using Precision Time Protocol (PTP). The first set of measurement data includes: a t1 timestamp when the master clock of the target network sends a first synchronization message to the slave clock of the target network; a t2 timestamp when the slave clock receives the first synchronization message; a t3 timestamp when the slave clock sends a first delay request message to the master clock; and a t4 timestamp when the master clock receives the first delay request message.

[0134] The time deviation calculation unit 12 is used to calculate the difference between the t2 timestamp and the t1 timestamp to obtain the master-slave time deviation, and to calculate the difference between the t4 timestamp and the t3 timestamp to obtain the slave-master time deviation;

[0135] The asymmetric compensation unit 13 is used to determine a first clock calibration amount based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetric compensation amount; wherein the asymmetric compensation amount is determined based on several sets of measurement data of the target network and is used to compensate for the time value of asymmetric network delay between the master and slave clocks.

[0136] The clock calibration unit 14 is used to calibrate the slave clock according to the first clock calibration amount.

[0137] In some embodiments provided in this application, the asymmetric compensation amount may be determined based on the time deviation difference of each of the plurality of sets of measurement data, wherein the time deviation difference is the difference between the master-slave time deviation and the slave-master time deviation.

[0138] Based on the above, the process by which the asymmetric compensation unit 13 determines the first clock calibration amount according to the master-slave time deviation, the slave-master time deviation, and the preset asymmetric compensation amount may include:

[0139] The sum of the asymmetric compensation amount and the slave-master time deviation is calculated to obtain the compensated slave-master time deviation;

[0140] Calculate the average of the master-slave time deviation and the compensated master-slave time deviation to obtain the average delay;

[0141] The difference between the master-slave time deviation and the average delay is used as the first clock calibration value.

[0142] In some embodiments provided in this application, the device may further include a time deviation judgment unit, used to determine whether the master-slave time deviation and the slave-master time deviation meet a preset time deviation threshold condition. The time deviation threshold condition includes: the master-slave time deviation belongs to a preset master-slave time deviation range, and the slave-master time deviation belongs to a preset slave-master time deviation range; if so, then the step of determining a first clock calibration amount based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetry compensation amount is executed.

[0143] In some embodiments provided in this application, the measurement data acquisition unit 11 can also be used to acquire a second set of measurement data of the calibrated target network after calibrating the slave clock according to the first clock calibration amount. The second set of measurement data includes: t1' timestamp when the master clock sends the second synchronization message to the slave clock, t2' timestamp when the slave clock receives the second synchronization message, t3' timestamp when the slave clock sends the second delay request message to the master clock, and t4' timestamp when the master clock receives the second delay request message.

[0144] Based on the above, the device may further include a relative time difference calculation unit and a jitter optimization unit;

[0145] The relative time difference calculation unit is used to calculate the actual value θ of the relative time difference based on the second set of measurement data, where θ = (t2' - t1' - t4' + t3') / 2;

[0146] The jitter optimization unit is used to determine the second clock calibration amount corresponding to the actual value θ of the relative time difference according to a preset rule, wherein the second clock calibration amount is less than or equal to the actual value θ of the relative time difference.

[0147] Based on the above, the clock calibration unit 14 is also used to calibrate the slave clock according to the second clock calibration amount.

[0148] In some embodiments provided in this application, the device may further include a relative time difference determination unit, used to determine whether the actual value θ of the relative time difference meets a preset threshold condition; if so, then perform the step of determining the second clock calibration amount corresponding to the actual value θ of the relative time difference according to a preset rule.

[0149] In some embodiments provided in this application, the process by which the jitter optimization unit determines the second clock calibration amount corresponding to the actual value θ of the relative time difference according to a preset rule may include:

[0150] Using an α filter, the second clock calibration value corresponding to the actual value θ of the relative time difference is calculated, where the initial value of α is equal to 1.

[0151] Based on the above, the device may further include a smoothing condition judgment unit, which, after calibrating the slave clock according to the second clock calibration amount, determines whether the time deviation between the master clock and the slave clock meets a preset smoothing condition; if not, increases the α value of the α filter and returns to the step of using the α filter to calculate the second clock calibration amount corresponding to the actual value θ of the relative time difference.

[0152] In some embodiments provided in this application, the smoothing conditions may include:

[0153] If the change in time deviation between the master clock and the slave clock is less than a preset threshold in two consecutive tests, wherein the change in time deviation is the change in master-slave time deviation after the current clock calibration compared to the master-slave time deviation after the previous clock calibration.

[0154] The clock calibration device provided in this application embodiment can be applied to clock calibration equipment, such as terminals: mobile phones, computers, etc. Optionally, Figure 10 The hardware structure block diagram of the clock calibration device is shown, with reference to... Figure 10 The hardware structure of the clock calibration device may include: at least one processor 1, at least one communication interface 2, at least one memory 3, and at least one communication bus 4;

[0155] In this embodiment, the number of processor 1, communication interface 2, memory 3, and communication bus 4 is at least one, and processor 1, communication interface 2, and memory 3 communicate with each other through communication bus 4.

[0156] Processor 1 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention.

[0157] Memory 3 may include high-speed RAM, and may also include non-volatile memory, such as at least one disk storage device;

[0158] The memory stores a program, which the processor can call. The program is used for:

[0159] Acquire the first set of measurement data for the target network, which is a PTP network using Precision Time Protocol (PTP). The first set of measurement data includes: t1 timestamp when the master clock of the target network sends a first synchronization message to the slave clock of the target network; t2 timestamp when the slave clock receives the first synchronization message; t3 timestamp when the slave clock sends a first delay request message to the master clock; and t4 timestamp when the master clock receives the first delay request message.

[0160] Calculate the difference between the t2 timestamp and the t1 timestamp to obtain the master-slave time deviation;

[0161] Calculate the difference between the t4 timestamp and the t3 timestamp to obtain the master time offset;

[0162] Based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetric compensation amount, a first clock calibration amount is determined; wherein, the asymmetric compensation amount is determined based on several sets of measurement data of the target network and is used to compensate for the time value of asymmetric network delay between the master and slave clocks.

[0163] The slave clock is calibrated based on the first clock calibration value.

[0164] Optionally, the refined and extended functions of the program can be found in the description above.

[0165] This application embodiment also provides a storage medium that can store a program suitable for execution by a processor, the program being used for:

[0166] Acquire the first set of measurement data for the target network, which is a PTP network using Precision Time Protocol (PTP). The first set of measurement data includes: t1 timestamp when the master clock of the target network sends a first synchronization message to the slave clock of the target network; t2 timestamp when the slave clock receives the first synchronization message; t3 timestamp when the slave clock sends a first delay request message to the master clock; and t4 timestamp when the master clock receives the first delay request message.

[0167] Calculate the difference between the t2 timestamp and the t1 timestamp to obtain the master-slave time deviation;

[0168] Calculate the difference between the t4 timestamp and the t3 timestamp to obtain the master time offset;

[0169] Based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetric compensation amount, a first clock calibration amount is determined; wherein, the asymmetric compensation amount is determined based on several sets of measurement data of the target network and is used to compensate for the time value of asymmetric network delay between the master and slave clocks.

[0170] The slave clock is calibrated based on the first clock calibration value.

[0171] Optionally, the refined and extended functions of the program can be found in the description above.

[0172] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0173] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The various embodiments can be combined as needed, and the same or similar parts can be referred to each other.

[0174] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A clock calibration method, characterized in that, The method includes: Acquire the first set of measurement data for the target network, which is a PTP network using Precision Time Protocol (PTP). The first set of measurement data includes: t1 timestamp when the master clock of the target network sends a first synchronization message to the slave clock of the target network; t2 timestamp when the slave clock receives the first synchronization message; t3 timestamp when the slave clock sends a first delay request message to the master clock; and t4 timestamp when the master clock receives the first delay request message. Calculate the difference between the t2 timestamp and the t1 timestamp to obtain the master-slave time deviation; Calculate the difference between the t4 timestamp and the t3 timestamp to obtain the master time offset; Based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetric compensation amount, a first clock calibration amount is determined; wherein, the asymmetric compensation amount is determined based on several sets of measurement data of the target network and is used to compensate for the time value of asymmetric network delay between the master and slave clocks. The slave clock is calibrated based on the first clock calibration value; Acquire a second set of measurement data for the calibrated target network. The second set of measurement data includes: t1' timestamp when the master clock sends the second synchronization message to the slave clock, t2' timestamp when the slave clock receives the second synchronization message, t3' timestamp when the slave clock sends the second delay request message to the master clock, and t4' timestamp when the master clock receives the second delay request message. Based on the second set of measurement data, the actual value of the relative time difference θ is calculated, where θ = (t2' - t1' - t4' + t3') / 2; According to preset rules, a second clock calibration amount corresponding to the actual value θ of the relative time difference is determined, wherein the second clock calibration amount is less than or equal to the actual value θ of the relative time difference; The slave clock is calibrated according to the second clock calibration value.

2. The method according to claim 1, characterized in that, The asymmetric compensation amount is determined based on the time deviation difference of each of the several sets of measurement data, wherein the time deviation difference is the difference between the master-slave time deviation and the slave-master time deviation. The step of determining the first clock calibration amount based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetry compensation amount includes: The sum of the asymmetric compensation amount and the slave-master time deviation is calculated to obtain the compensated slave-master time deviation; Calculate the average of the master-slave time deviation and the compensated master-slave time deviation to obtain the average delay; The difference between the master-slave time deviation and the average delay is used as the first clock calibration value.

3. The method according to claim 1, characterized in that, The method further includes: Determine whether the master-slave time deviation and the slave-master time deviation meet the preset time deviation threshold conditions. The time deviation threshold conditions include: the master-slave time deviation belongs to the preset master-slave time deviation range, and the slave-master time deviation belongs to the preset slave-master time deviation range. If so, then the step of determining the first clock calibration amount based on the master-slave time deviation, the slave-master time deviation, and the preset asymmetry compensation amount is executed.

4. The method according to claim 1, characterized in that, The method further includes: Determine whether the actual value θ of the relative time difference meets the preset threshold condition; If so, then proceed with the step of determining the second clock calibration amount corresponding to the actual value θ of the relative time difference according to preset rules.

5. The method according to claim 1, characterized in that, The step of determining the second clock calibration value corresponding to the actual value θ of the relative time difference according to a preset rule includes: Using an α filter, the second clock calibration value corresponding to the actual value θ of the relative time difference is calculated, where the initial value of α is equal to 1; After calibrating the slave clock according to the second clock calibration value, the method further includes: Determine whether the time deviation between the master clock and the slave clock meets the preset smoothing condition; If not, increase the value of α in the α filter and return to the step of using the α filter to calculate the second clock calibration amount corresponding to the actual value θ of the relative time difference.

6. The method according to claim 5, characterized in that, The smoothing conditions include: If the change in time deviation between the master clock and the slave clock is less than a preset threshold in two consecutive tests, wherein the change in time deviation is the change in master-slave time deviation after the current clock calibration compared to the master-slave time deviation after the previous clock calibration.

7. A clock calibration device, characterized in that, The device includes: The measurement data acquisition unit is used to acquire a first set of measurement data of the target network, wherein the target network is a PTP network using Precision Time Protocol (PTP). The first set of measurement data includes: t1 timestamp when the master clock of the target network sends a first synchronization message to the slave clock of the target network; t2 timestamp when the slave clock receives the first synchronization message; t3 timestamp when the slave clock sends a first delay request message to the master clock; and t4 timestamp when the master clock receives the first delay request message. The time deviation calculation unit is used to calculate the difference between the t2 timestamp and the t1 timestamp to obtain the master-slave time deviation, and to calculate the difference between the t4 timestamp and the t3 timestamp to obtain the slave-master time deviation. An asymmetric compensation unit is used to determine a first clock calibration amount based on the master-slave time deviation, the slave-master time deviation, and a preset asymmetric compensation amount; wherein the asymmetric compensation amount is determined based on several sets of measurement data of the target network and is used to compensate for the time value of asymmetric network delay between the master and slave clocks. A clock calibration unit is used to calibrate the slave clock according to the first clock calibration amount; The measurement data acquisition unit is further configured to acquire a second set of measurement data of the calibrated target network after calibrating the slave clock according to the first clock calibration amount. The second set of measurement data includes: t1' timestamp when the master clock sends the second synchronization message to the slave clock, t2' timestamp when the slave clock receives the second synchronization message, t3' timestamp when the slave clock sends the second delay request message to the master clock, and t4' timestamp when the master clock receives the second delay request message. The relative time difference calculation unit is used to calculate the actual value θ of the relative time difference based on the second set of measurement data, where θ = (t2' - t1' - t4' + t3') / 2; The jitter optimization unit is used to determine the second clock calibration amount corresponding to the actual value θ of the relative time difference according to a preset rule, wherein the second clock calibration amount is less than or equal to the actual value θ of the relative time difference.

8. A clock calibration device, characterized in that, include: Memory and processor; The memory is used to store programs; The processor is configured to execute the program to implement the various steps of the clock calibration method as described in any one of claims 1-6.

9. A storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the various steps of the clock calibration method as described in any one of claims 1-6.

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