Power line design modifications to mitigate vertical frequency band crosstalk

Abstract

A technique for providing uniform brightness across a computing device display, such as an active-matrix organic light-emitting diode (AMOLED) display. In some examples, the computing device display may include a hole within the active area of ​​the display, which may be used for a camera, button, or some other function. This hole may cause uneven voltage drops in the power supply network in the active area near the hole. The power supply network supplies electrical power to the components of the display. The technique of this invention includes portions of the power supply network not connected to the voltage supply bus to ensure uniform voltage drops across the active area of ​​the display.

Description

Background Technology

[0001] Computing devices may include a display panel that forms an image. The display panel may include an active area defined by an array of pixels, each pixel including one or more light-emitting elements configured to generate light using electrical energy. In some examples, the display panel may include a gap between the outline of the display panel and the outline of the active area. This gap may be referred to as a border. Pixels may receive electrical energy from a power supply bus to generate light. Summary of the Invention

[0002] Generally, this disclosure describes a display panel, such as an active-matrix organic light-emitting diode (AMOLED) display panel, that provides uniform brightness. Pixels of an AMOLED display can receive electrical power via a power supply network including column traces and row traces. The column traces can be coupled to and receive electrical power from a voltage supply bus located at a first end of the display panel. In some examples, the display panel may include a window (e.g., a hole) defined by a window boundary within the active area of ​​the display panel, which may be used for a camera, button, or some other function. This window may cause non-uniform voltage drops in the power supply network in the active area region near the hole (e.g., in the region between the window and the first end of the display panel). Such non-uniform voltage drops can cause distortion of the displayed image, which may be undesirable.

[0003] According to one or more aspects of this disclosure, one or more of the column traces may be disconnected, for example, not directly connected to the voltage supply bus. For example, a subset of the column traces intersecting the window may not be connected to the voltage supply bus. Instead, the subset of column traces not connected to the voltage supply bus may receive power from the voltage supply bus via circuitry including other column traces and row traces. In this way, this disclosure achieves a uniform voltage drop across the active area of ​​the display device.

[0004] In one example, this disclosure describes an apparatus including a display panel comprising: a plurality of pixel circuits arranged in a matrix, the matrix including windows excluding the pixel circuits; a voltage supply bus positioned at an end of the display panel; a voltage supply grid configured to transmit electrical signals from the voltage supply bus to the plurality of pixel circuits, the voltage supply grid including a plurality of column traces and a plurality of row traces, wherein a first subset of the plurality of column traces is connected to the voltage supply bus, and wherein a second subset of the plurality of column traces is not connected to the voltage supply bus, the second subset of the column traces including at least column traces aligned with the windows; and one or more interconnections between the column traces of the plurality of column traces and the row traces of the plurality of row traces.

[0005] In another example, this disclosure describes a method of configuring a device including a display panel, the method comprising: displaying an image by a plurality of pixel circuits arranged in a matrix, the matrix including a window excluding the pixel circuits; transmitting electrical signals by a voltage supply bus to a first subset of a plurality of column traces; transmitting electrical signals by the first subset of column traces to a plurality of row traces; transmitting electrical signals by a plurality of row circuits to a second subset of the plurality of column traces, wherein the second subset of column traces includes at least column traces aligned with the window, and wherein the plurality of column traces and the plurality of row traces form a voltage supply grid from which electrical signals are transmitted to the plurality of pixel circuits.

[0006] Details of one or more examples of this disclosure are set forth in the accompanying drawings and the following description. Other features, objectives, and advantages of this disclosure will be apparent from the description and drawings and from the claims. Attached Figure Description

[0007] Figure 1 This is a conceptual diagram showing an example computing device with a display panel that includes windows in an active area.

[0008] Figure 2 This is a conceptual diagram illustrating a display device having multiple rounded corner areas according to an aspect of the present invention.

[0009] Figure 3A This is a schematic diagram showing an example pixel circuit that can be arranged in a pixel circuit matrix.

[0010] Figure 3B This is a schematic diagram showing an example column trace of a voltage supply matrix, where the traces between the interconnections of the column traces are modeled as resistors.

[0011] Figures 4A-4C This is a conceptual diagram of an exemplary display panel showing a voltage supply matrix and one or more traces that can interrupt the voltage supply matrix.

[0012] Figures 5A-5C This is a conceptual diagram showing an exemplary voltage supply grid, in which a subset of the column traces aligned with the window are not connected to the voltage supply bus.

[0013] Figures 6A-6C This is a conceptual diagram showing an example voltage supply grid, where a subset of column traces in the corner area of ​​the display is not connected to the voltage supply bus.

[0014] Figure 7 This is a flowchart illustrating an example operation of the display device of this disclosure. Detailed Implementation

[0015] Figure 1This is a conceptual diagram illustrating an example computing device with a display panel that includes windows in an active area. Figure 1 As shown in the example, display panel 100 may include an active display area 102, which may include rounded corner areas 104 and 122. Display panel 100 may be included in a computing device. Examples of such computing devices include, but are not limited to, mobile phones, camera devices, smart displays, tablet computers, laptop computers, desktop computers, gaming systems, media players, e-book readers, television platforms, vehicle infotainment systems, or head-mounted units or wearable computing devices (e.g., computerized watches, head-mounted devices such as VR / AR headsets, computerized glasses, computerized gloves). Examples of display panel 100 include, but are not limited to, liquid crystal displays (LCDs), light-emitting diode (LED) displays, organic light-emitting diode (OLED) displays, active-matrix organic light-emitting diode (“AMOLED”) displays, micro-LED displays, or similar monochrome or color displays capable of outputting visual information to a user of display panel 100.

[0016] like Figure 1 As shown in the example, the active area 102 of the display panel may include a first end 106, a second end 108, a first side 110, and a second side 112. The rounded corner area 104 may be located on or near the first end 106 of the active area 102 of the display panel. For example, as... Figure 1 As shown, the rounded corner region 104 can be located between the first end 106 and the second side 112. Although Figure 1 The example illustrates a display panel including a first end 106, a second end 108, a first side 110, and a second side 112, but it should be apparent that the technology of this disclosure can also be applied to display panels with different geometries. For example, the technology of this disclosure is applicable to circular display panels and display panels having more than two ends and / or two sides. Furthermore, although... Figure 1 The example shows a rounded corner region 104 located between the first end 106 and the second side 112, but it should be apparent that the techniques of this disclosure can also be applied to rounded corner regions located between the other end and the other side of the display panel. For example, the rounded corner region may be located between the first end and the first side of the display panel, between the second end and the first side of the display panel, and / or between the second end and the second side of the display panel.

[0017] The display panel may include a window 114 defined by a window boundary 116. The window 114 may provide space for a camera, buttons, sensors such as a light sensor, or other components. The window 114 may be located anywhere within the active area 102 of the display panel, for example, as... Figure 1As shown in the example, it is located near the center of the first side 110. In other examples, the window 114 may be located near one of the corners of the center of the active area 102 of the display panel, including near the foldable portion of the active area 102 of the display panel. Figure 1 (not shown in the image), or in any other location.

[0018] One or more regions of the active area 102 of the display panel may be defined with reference to window 114 (e.g., one or more regions may be defined to be aligned with window 114, such as regions 120 and 124). Region 120 may extend from window 114 to the first end 106 and the second end 108. Region 124 may extend from window 114 to the first side 110 and the second side 112. Region 126 may be described as being in region 120 aligned with window 114 and near the edge of the display panel 100 close to window 114—in Figure 1 In the example, for instance, the first side 110—between. Region 128 can be described as a region symmetrically positioned near the side of the display panel 100 away from window 114—for example, side 112. Like region 120, regions 126 and 128 can extend from the first end 106 to the second end 108.

[0019] As discussed in further detail below, the active area 102 of the display panel may include an array of pixel circuits divided into rows and columns. The operation of the pixel circuits of this disclosure can be controlled using electrical signals relayed via multiple traces (e.g., pixel circuit traces or other conductive paths) embedded in the display panel 100. A voltage supply bus may extend perpendicular to the columns of the pixel circuits, and each of the column traces may be directly connected to the voltage supply bus. However, pixel circuit traces directly connected to the voltage supply bus may require a significant area in the rounded corner area 104. Typically, to accommodate these pixel circuit traces directly connected to the voltage supply bus, the display panel bezel size, including the bezel size in the rounded corner area 104, and / or the display corner curvature may be modified. However, increasing the display panel bezel size and / or modifying the display corner curvature may be undesirable (e.g., for aesthetic reasons).

[0020] In some examples, one or more column traces may be disconnected from the voltage supply bus, for example, in region 120, near curved region 104, or in other regions. Not directly connecting one or more column traces to the voltage supply bus may cause electrical signals from the voltage supply bus to traverse one or more row traces and the interconnections between the row and column traces. In some examples, altering the routing of electrical signals in this way can avoid uneven brightness in some regions—for example, between region 126 and region 120.

[0021] For the sake of simplicity, in this disclosure, a "column" or column trace may be described as extending from end 106 to end 108 and approximately parallel to sides 110 and 112. A "row" or row trace may be described as extending from side 110 to side 112 and approximately parallel to ends 106 and 108, and approximately perpendicular to the column. However, rows and columns are merely examples to illustrate the techniques of this disclosure. Users can rotate the display panel 100 to any angle, and therefore columns may not be vertical but are still considered columns, and rows may not be horizontal but are still considered rows.

[0022] Figure 2 This is a diagram illustrating an enlarged example of a display panel according to one or more technologies of this disclosure. Display panel 200 is as described above regarding... Figure 1 An example of a described display panel 100. End 206 is an example of a first end 106, first side 210 is an example of a first side 110, and second side 212 is an example of a second side 112, and rounded corner area 204 is... Figure 1 An example of the rounded corner area 104 depicted in the image.

[0023] like Figure 2 As shown in the example, the display panel 200 may include a plurality of pixel circuits 242 and a voltage supply bus 234. Figure 2 The example illustrates pixel circuitry 242 divided into three regions 230A, 230B, and 230C. Pixel circuitry 230 together constitute the active area 202 of the display panel. Pixel circuitry 230 is arranged in multiple columns and can receive power via multiple column traces 232A and 232B, collectively referred to as column traces 232. Pixel circuitry in region 230B can receive power from column trace 232A, which is connected to a voltage supply bus 234 (e.g., directly connected to the voltage supply bus 234). Figure 2 In one example, the pixel circuitry in regions 230A and 230C can receive power from column traces that are disconnected from the voltage supply bus 234 (e.g., not directly connected to the voltage supply bus 234). In other examples, one or more column traces in regions 230A and / or 230C may be connected to the voltage supply bus 234, such as column trace 232C. In this disclosure, a subset of column traces 232A connected to the voltage supply bus 234 can be described as a first subset of a plurality of column traces. A subset of column traces 232B not directly connected to the voltage supply bus 234 can be described as a second subset of a plurality of column traces. Column trace 232B may be indirectly connected to the voltage supply bus 234 via one or more row traces and interconnections.

[0024] exist Figure 2In one example, the voltage supply bus 234 may define a length 236 extending along a first subset 232A of the column traces connected to the voltage supply bus 234. In other words, in some examples, the column traces 232C may not be connected to the voltage supply bus 234, and the length 238 of the voltage supply bus 234 may be removed. Removing unnecessary portions of the voltage supply bus 234 can provide advantages such as providing space for other structures (e.g., signal / power lines, integrated row driver circuitry, etc.) in the bezel area of ​​the rounded corner region—e.g., region 204—and allowing the display panel bezel size to be reduced as desired.

[0025] Pixel circuitry 230 is also arranged in multiple rows 240. In some examples, the pixel circuitry is directly coupled to and receives power directly from the column traces. In other examples, the multiple rows of pixel circuitry can be connected via multiple row traces on a layer separate from the column trace layer. Figure 2 (Not shown in the image) receives power. In some examples, multiple row traces form an electrical connection between column traces.

[0026] Figure 3A This is a schematic diagram illustrating an example pixel circuit that can be arranged in a pixel circuit matrix. Pixel circuit 342 is mentioned above regarding... Figure 2 An example of pixel circuit 242 of the plurality of pixel circuits in the described display panel 200.

[0027] The pixel circuit 342 of circuit 300 may include an OLED 312, wherein the cathode of OLED 312 is connected to reference line Vss 314, and the anode of OLED 312 is connected to the output terminal of transistor T1308. Figure 3A In the example, T1 308 is depicted as a P-type metal-oxide-semiconductor field-effect transistor (MOSFET), but in other examples, it can be implemented by another type of switch. T1 308 can control the current I from the column traces that supply power Vdd 332 to the OLED 312. OLED 310. The column trace with voltage Vdd 332 is the one mentioned above. Figure 2 Examples of column traces 232A and 232B are described. In other examples, pixel circuit 342 can be derived from the above description. Figure 2 One of the row traces in row 240 described receives power. The column traces and row traces of the display panel are a power supply network that can supply power to illumination elements—e.g., OLED 312 of pixel circuitry 342. In this disclosure, the power supply network may also be referred to as a voltage supply grid, which can transmit electrical signals from a voltage supply bus—e.g., Figure 2 The voltage supply bus 234 depicted in the diagram transmits signals to multiple pixel circuits. The electrical signals are power signals used by the multiple pixel circuits to emit light.

[0028] The gate of transistor T1 308 is connected to the output terminal of transistor T2 316 and to Vdd 332 via capacitor Cst 306. The input terminal of transistor T2 316 is connected to DATA[k]302 and controlled by SCAN[N]304 connected to the gate of T2 316.

[0029] Figure 3B This is a schematic diagram showing an example column trace of a voltage supply bus, where the traces between the interconnections of the column traces are modeled as resistors. Voltage supply bus 334 is mentioned above regarding... Figure 2 An example of the voltage supply bus 234 described. Figure 3B Column trace 333 is an example of one of the column traces 232A connected to the voltage supply bus. The column trace portion connecting each pixel circuit in the column can cause a voltage drop. Figure 3B In the example, the voltage drop is modeled as a 10-ohm (10Ω) resistor. It should be noted that... Figure 3B The values ​​depicted are chosen solely for illustrative purposes. In other examples, these values ​​may differ. Figure 3B The values ​​shown. An example of 1 milliampere (mA) current can cause a voltage drop of 1 millivolt (mV) between each pixel circuit.

[0030] Figures 4A-4C This is a conceptual diagram showing an example display panel with a voltage supply matrix, which includes windows that can interrupt one or more traces of the voltage supply matrix. Display panel 400 is described above regarding... Figure 1 and Figure 2 Examples of the described display panels 100 and / or 200.

[0031] like Figure 1 As described, in Figure 4A and Figure 4B In one example, the active area 402 of the display panel may include a first end 406, a second end 408, a first side 410, and a second side 412. The display panel may include a window 414 defined by a window boundary 416. The window 414 may be located anywhere within the active area 402 of the display panel, for example, near the center of the first side 410, as shown in the example of FIG4. In other examples, the window 414 may be located elsewhere within the active area 402.

[0032] The active area 402, first end 406, second end 408, first side 410, second side 412, and window 414 of the display panel, defined by window boundary 416 and column trace 432, are respectively the above-mentioned... Figure 1 and Figure 2The described display panel includes active areas 102 and / or 202, first ends 106 and / or 206, second end 108, first sides 110 and / or 210, second sides 112 and / or 212, window 114, and column trace 232. Thus, the characteristics and functions of the display panel active areas 402, first ends 406, second ends 408, first sides 410, second sides 412, window 414, and column trace 432 can be similar to or the same as the characteristics and functions of the display panel active areas 102 and / or 202, first ends 106 and / or 206, second ends 108, first sides 110 and / or 210, second sides 112 and / or 212, window 114, and column trace 232, respectively.

[0033] The display panel 400 may also include a plurality of pixel circuits, which include illumination elements configured to emit light, as described above with respect to Figure 3. Figure 4B and Figure 4C As shown, pixel circuit ( Figures 4A-4C (Not shown) This can be located at one or more interconnects 450 between column traces 432 and row traces 452 of the voltage supply grid of the display panel 400. As described above regarding Figure 2 The column trace 432 can be connected to the voltage supply bus 434. The voltage supply bus 434 can connect the power supply connection Vdd 454 to the display panel 400 (in...). Figures 4A-4C The power supply to the computing device (not shown). Interconnect 450 can conduct electrical signals from the voltage supply bus to the row trace 452 via the column trace 432. For a column trace 432 not connected to the voltage supply bus 434, interconnect 450 can conduct electrical signals to the disconnected column trace 432 via the row trace 452. In this way, the pixel circuit can receive power via either or both of the row trace 452 and column trace 432 of the voltage supply grid.

[0034] In some examples, row trace 452 may be on a layer separate from column trace 432. In addition to interconnect 450, layer column trace 432 may be electrically isolated from layer row trace 452. In some examples, horizontal Vdd lines (e.g., row trace 452) may have relatively high sheet resistance compared to column trace 432. Vertical Vdd lines—e.g., column trace 432—may have relatively low sheet resistance compared to row trace 452. A reference layer, such as Vss 314 described above with respect to Figure 3, may be a third layer electrically isolated from row trace layer 452 and column trace layer 432.

[0035] Window 414 can be used to define one or more areas of the active area 402 of the display panel. For example, areas can be aligned with window 414, such as areas 420 and 424. Area 420, aligned with window 414, can extend from the window to the first end 406 and the second end 408. (As mentioned above...) Figure 3B The column trace 432 may have a voltage drop for each pixel circuit starting from the connection to the voltage supply bus, for example, near end 406 and extending along the column trace to end 408. For region 458, which may extend from the voltage supply bus to window 414 within region 420, the voltage drop for each pixel or interconnect 450 may be as shown by column trace 333 in FIG3. For region 456, which may be within region 420 between the interruption in the column trace caused by window 414 and end 408, electrical signals may reach the column trace in region 456 by first passing through one or more interconnects 450 and along one or more row traces 452—for example, in region 424—before reconnecting to the column trace in 456 via interconnects 450. Therefore, the voltage of each pixel circuit in region 456 may be different when compared with adjacent pixels located on the same row in region 427. Region 427 may include column trace 432 from window 414 to side 412. Because the voltage of the pixel circuits may differ in different areas, the display may behave differently in each area. For example, the light emitted by the pixel circuits in area 427 and the same programmed pixel circuits in area 456 may differ.

[0036] exist Figure 4A and Figure 4B In some examples, region 426 is between region 420 and the edge of display panel 400 near window 414—for example, first side 410. In some examples, column traces 432 in region 426 may be connected to a voltage supply bus and therefore may have a voltage drop pattern similar to that of column traces 432 in regions 427 and 458. However, column traces 432 in region 456 may have a different voltage drop pattern because column traces 432 in region 456 are not directly connected to a voltage supply bus but receive power from one or more row traces 452 and interconnects 450. In some examples, the processing circuitry of the device using display panel 400 ( Figures 4A-4C (Not shown in the image) can execute complex algorithms to compensate for different performance in different regions.

[0037] In addition to uneven brightness caused by the discontinuity of the column trace 432 of window 414 in region 420, display panel 400 may also experience pixel crosstalk. Some examples of pixel crosstalk types can include electrical crosstalk or optical crosstalk. For example, pixel crosstalk may be caused by either or both of electrical coupling or optical coupling between adjacent pixels in the active region 402 of the display matrix. Electrical crosstalk may be caused by lateral current flowing through a common layer, while optical crosstalk may be caused by light leakage through non-addressed pixels. In some examples, pixel crosstalk can reduce contrast ratio and impede the color gamut of a computing device display.

[0038] Other types of crosstalk OLED display panels 400 may include "bright crosstalk" and "dark crosstalk". In this disclosure, bright crosstalk refers to the phenomenon that an OLED with more black (unlit) pixels (OLEDs) tends to be brighter than an OLED with fewer black (unlit) pixels (OLEDs). Dark crosstalk refers to the opposite of bright crosstalk, i.e., the phenomenon that an OLED with more black (unlit) pixels (OLEDs) tends to be darker than an OLED with fewer black (unlit) pixels (OLEDs).

[0039] Bright crosstalk may be caused by differences in the absorbed current of each row of the OLED display panel 400. Dark crosstalk may be caused by differences in the amount of parasitic capacitance associated with the display data that depends on each row (e.g., the display data received via data[k]302 as described above with respect to Figure 3). When the OLED is not lit, the parasitic capacitance associated with the OLED in the pixel circuitry—e.g., OLED 312—may be larger than when the OLED is lit, because the conducting OLED can reduce the associated parasitic capacitance. A row with more unlit OLEDs may have a larger total parasitic capacitance than a row with fewer unlit OLEDs. Because a row with larger parasitic capacitance may have a larger time constant (RC time constant), and therefore requires a longer time to drive the OLEDs in the row with the larger time constant.

[0040] exist Figure 4BIn the example, region 428 is symmetrically positioned near one side of display panel 400—e.g., side 412—and away from window 414. In some examples, region 428 may be symmetrical to region 426 and therefore include approximately the same number of column traces 432 as in region 426. When the column traces in region 426 are directly connected to the voltage supply bus, and the column traces in region 428 are also directly connected to the voltage supply bus, then the pixel circuits connected to those column traces can have similar voltage drop characteristics to each other, as well as characteristics similar to those of the column traces 432 in region 427. In other examples, region 428 may be symmetrical to both regions 420 and 426. Developing compensation algorithms for display panel 400 with many different regions to provide uniform luminance and mitigate crosstalk can be complex and result in long development times for testing, development, verification, and production. In some examples, one or more column traces may be disconnected from the voltage supply bus, for example, in region 458, region 428, or other regions. As mentioned above regarding Figure 1 and Figure 2 Disconnecting one or more column traces allows electrical signals from the voltage supply bus to pass through one or more row traces and the interconnects between the row and column traces. In some examples, altering the routing of electrical signals in this way can avoid uneven brightness in certain areas.

[0041] Figures 5A-5C This is a conceptual diagram showing an example voltage supply grid, where a subset of the column traces aligned with the window are not connected to the voltage supply bus. Unless otherwise noted, display panel 500 is as described above regarding... Figure 1 , Figure 2 The examples of display panels 100, 200 and 400 described in Figure 4 can have the same functions and features.

[0042] like Figure 5A and Figure 5B The example of the display panel 500 shown includes an active area 502 with window 514, areas 520, 556, 558, and 528, and a power supply connection Vdd 554. As described above with respect to Figure 4, area 520 includes a subset of column traces 532B aligned with window 514. Compared to Figure 4, and as described above with respect to... Figure 2The column traces 532B are a subset of the column traces that are not directly connected to the voltage supply bus 534. The column traces 532A in regions 526 and 527 are directly connected to the voltage supply bus 534. In the display panel 500, by disconnecting the column traces 532B in region 520 from the voltage supply bus 534, a portion of the column traces 532B in region 558 can resemble the column traces in region 556. As described above with respect to FIG4, the column traces in region 558 are also within region 520 and are located between the voltage supply bus 534 at window 514 and end 506. The column traces in region 556 are within region 520 and are located between window 514 and end 508. The column traces in region 558 can have similar voltage drop characteristics to the column traces in region 556 because, in both regions 556 and 558, the column traces can be connected via one or more row traces 552 and interconnects (…). Figures 5A-5C (Not shown) Power is received from the voltage supply bus 534. In this way, the techniques of this disclosure for the display panel 500 can improve brightness uniformity when compared with the display panel 400 described above with respect to FIG. 4. In other words, the display panel 500 can have fewer areas with different voltage drop characteristics compared with the display panel 400, and therefore it is less complicated to compensate for differences in the active area 502. The techniques of this disclosure can also reduce crosstalk problems and contribute to improved brightness uniformity.

[0043] In some examples, display panel 500 may also include column traces 532B in region 528 that are not directly connected to the voltage supply bus 534, but are indirectly connected to the voltage supply bus 534 via one or more row traces and interconnects. Similar to region 428 described above with respect to FIG4, region 528 is symmetrically arranged relative to region 520 and is close to side 512 and away from window 514. In display panel 500, region 528 is symmetrical to region 520 and therefore includes approximately the same number of column traces 532B as in region 520. The column traces 532B in both regions 520 and 528 are a subset of the column traces that are not directly connected to the voltage supply bus 534. Therefore, the pixel circuitry connected to column traces 532B can have similar voltage drop characteristics in both regions 520 and 528, which can contribute to brightness uniformity in active region 502.

[0044] Similarly, column traces 532A in region 560 can be symmetrical to column traces 532A in region 526. For example, a subset of the column traces can be directly connected to the voltage supply bus 534 and positioned close to one side of the display panel 500. Therefore, the column traces along side 510—subsets 532A and 532B—can have similar characteristics to the column traces along side 512. The pixel circuits connected to these column traces in regions 526, 520, 528, and 560 can have similar voltage drop characteristics and can contribute to the uniformity of light in the active region 502.

[0045] Figures 6A-6C This is a conceptual diagram showing an example voltage supply grid, where a subset of column traces in the corner areas of the display are not connected to the voltage supply bus. Unless otherwise noted, display panel 600 is as described above regarding... Figure 1 , Figure 2 The examples of display panels 100, 200 and 400 described in Figure 4 can have the same functions and features.

[0046] like Figure 6A and Figure 6B The example of the display panel 600 shown includes an active area 602 with a window 614, areas 620, 656, 658, and 628, and a power supply connection Vdd 654 at end 606 and opposite end 608. As described above with respect to FIG. 5, area 620 includes a subset of column traces 632B aligned with window 614. Compared to FIG. 4, and as described above with respect to... Figure 2 Column traces 632B are a subset of column traces that are not directly connected to the voltage supply bus 634. Column traces 632A in regions 626 and 627 are directly connected to the voltage supply bus 634. As described above with respect to FIG5, for display panel 600, by not connecting column traces 632B in region 620 to the voltage supply bus 634, a portion of column traces 632B in region 658 can be similar to the column traces in region 656. Therefore, the column traces in region 658 can have similar voltage drop characteristics to the column traces in region 656, because in both regions 656 and 658, the column traces can be connected via one or more row traces 652 and interconnects (…). Figures 6A-6C (Not shown) Receives power from voltage supply bus 634.

[0047] Additionally, for display panel 600, a subset of column traces 632B disconnected from voltage supply bus 634 may include those column traces in region 626. Similar to regions 426 and 526 described above with respect to Figures 4 and 5, region 626 includes column traces located between the window 414 in region 620 and the side 610 of display panel 600 near window 614. However, compared to the column traces in regions 426 and 526, column traces 632B in region 626 are included in a subset of the plurality of column traces not connected to voltage supply bus 634.

[0048] In this way, the technology of this disclosure for display panel 600 can improve brightness uniformity when compared with display panel 400 described above with respect to FIG. 4. In other words, compared with display panel 400, display panel 600 can have fewer areas with different voltage drop characteristics, and therefore can compensate for differences in active region 602 with less complexity. When compared with display panel 500, the column traces in the disconnected region 626 can also result in fewer areas with different voltage drop characteristics in display panel 600. Similar to display panel 500, as described above with respect to... Figures 6A-6C The techniques described in this disclosure can also reduce crosstalk problems and help improve brightness uniformity.

[0049] As mentioned above Figure 5C As described, in some examples, the display panel 600 may also disconnect the column traces 532B in region 528. Region 628 is a region symmetrically arranged relative to combined regions 626 and 620, close to side 612 and away from window 614. In display panel 500, region 528 is symmetrical to region 520 and therefore includes approximately the same number of column traces 532B as in region 520. As mentioned above, the column traces 632B in regions 620, 626, and 628 are a subset of the column traces not directly connected to the voltage supply bus 534. Therefore, the pixel circuits connected to column traces 532B can have similar voltage drop characteristics in regions 620, 626, and 628, which can contribute to brightness uniformity in active region 602.

[0050] exist Figure 6A and Figure 6CIn the example, the portion of voltage supply bus 634 indicated by 670 is not connected to any column trace. Therefore, voltage supply bus 634 does not need to extend beyond the last connected column trace 632A towards side 610 or side 612. In some examples, portion 670 of voltage supply bus 634 can be removed from the corner area, which can help reduce the width of the display corner bezel. In some examples, removing portion 670 can provide space for other signal lines or other components near the rounded corner area. In other words, the portion 670 of the multiple column traces located near the column trace aligned with window 614—for example, the column trace in area 620—and the column trace of the display panel near side 610 close to window 614 can be removed from voltage supply bus 634. Without portions 670 near side 610 and near side 612, voltage supply bus 634 defines the length extending along a subset of column traces 632A connected to voltage supply bus 634.

[0051] Figure 7 This is a flowchart illustrating an example operation of the display device of this disclosure. Unless otherwise indicated, Figure 7 The box will be based on Figures 5A-5C Describe it.

[0052] like Figure 7 As can be seen in the example, multiple pixel circuits are arranged in a matrix, for example, such as Figure 2 As shown, the display panel 500 can be configured to display an image (700) on the active area 502 of the display panel 500. The image may include colors, text, control features, graphical user interface elements, etc. The matrix of pixel circuits may include a window 514 that does not include pixel circuits. As described above, the window 514 may be included to enable a sensor, such as a camera, to capture light passing through the display panel 500.

[0053] The voltage supply bus 534 can transmit electrical signals, such as power signals, to a subset of column traces 532A connected to the voltage supply bus 534 (705). As described above with respect to FIG4, the subset of column traces 532A can further conduct electrical signals to other pixel circuits via interconnects 450 and row traces 452 (710). In other words, the voltage supply grid of a display panel 500, which may include multiple layers, can conduct electrical signals to multiple pixel circuits (715).

[0054] This disclosure can also be described by the following examples.

[0055] Example 1: An apparatus including a display panel comprising: a plurality of pixel circuits arranged in a matrix, the matrix including a window, the window not including the pixel circuits; a voltage supply bus positioned at an end of the display panel; a voltage supply grid configured to transmit electrical signals from the voltage supply bus to the plurality of pixel circuits, the voltage supply grid including a plurality of column traces and a plurality of row traces, wherein a first subset of the plurality of column traces is connected to the voltage supply bus, and wherein a second subset of the plurality of column traces is not connected to the voltage supply bus, the second subset of the column traces including at least column traces aligned with the window; and one or more interconnections between the column traces of the plurality of column traces and the row traces of the plurality of row traces.

[0056] Example 2: The device of Example 1, wherein the second subset of column traces further includes a column trace among a plurality of column traces located between the window-aligned column trace and the edge of the display panel near the window.

[0057] Example 3: The device of Example 2, wherein the voltage supply bus defines the length of the first subset extending along the column trace.

[0058] Example 4: The device of Example 2, wherein a portion of the voltage supply bus is removed near the column trace of the multiple column traces located between the window-aligned column trace and the edge of the display panel near the window.

[0059] Example 5: The device of Example 1, wherein the second subset of column traces comprises column traces of a plurality of column traces that are symmetrically arranged near the side of the display panel away from the window.

[0060] Example 6: The device of Example 1, wherein the electrical signal is an electrical signal used by multiple pixel circuits to emit light.

[0061] Example 7: The device of Example 1, which further includes a camera configured to capture images via a window.

[0062] Example 8: The device of Example 1, wherein the voltage supply grid comprises a first layer and a second layer, wherein the first layer comprises a plurality of column traces, and wherein the second layer comprises a plurality of row traces.

[0063] Example 9: The device of Example 8, wherein a first layer defines a first thin-film resistor and a second layer defines a second thin-film resistor, and wherein the first thin-film resistor is less than the second thin-film resistor.

[0064] Example 10: The device of Example 8, wherein, apart from one or more interconnections between column traces of a plurality of column traces and row traces of a plurality of row traces, the first layer is electrically isolated from the second layer.

[0065] Example 11: A method of configuring a device including a display panel includes: displaying an image by a plurality of pixel circuits arranged in a matrix, the matrix including a window that does not include the pixel circuits; transmitting electrical signals from a voltage supply bus to a first subset of a plurality of column traces; transmitting electrical signals from the first subset of column traces to a plurality of row traces; transmitting electrical signals from a plurality of row circuits to a second subset of the plurality of column traces, wherein the second subset of column traces includes at least column traces aligned with the window, and wherein the plurality of column traces and the plurality of row traces form a voltage supply grid from which electrical signals are transmitted to the plurality of pixel circuits.

[0066] Example 12: The method of Example 11 further includes capturing one or more images by a camera via a window.

[0067] Example 13: The method of Example 11, wherein a first subset of the column traces is directly connected to the voltage supply bus, and wherein a second subset of the column traces is not directly connected to the voltage supply bus.

[0068] Various examples of this disclosure have been described. These and other examples are within the scope of the appended claims.

Claims

1. An apparatus including a display panel, the display panel comprising: Multiple pixel circuits are arranged in a matrix, the matrix including a window, the window not including the pixel circuits; A voltage supply bus, wherein the voltage supply bus is located at a first end of the display panel; A voltage supply grid, configured to transmit electrical signals from the voltage supply bus to the plurality of pixel circuits, the voltage supply grid including a plurality of column traces and a plurality of row traces, wherein a first subset of the plurality of column traces is directly connected to the voltage supply bus, wherein a second subset of the column traces includes all of the column traces aligned with the window, wherein the column traces of the second subset of the plurality of column traces include a first portion between the window and a first end and a second portion between the window and a second end of the display panel opposite the first end, and wherein neither the first portion nor the second portion of the second subset of the plurality of column traces is directly connected to the voltage supply bus; as well as One or more interconnects are provided between column traces and row traces of the plurality of column traces, wherein a second subset of the plurality of column traces is indirectly connected to the voltage supply bus via a first subset of the plurality of column traces and the row traces.

2. The device according to claim 1, wherein, The second subset of column traces further includes the column trace located between the column trace aligned with the window and the edge of the display panel near the window.

3. The device according to claim 1, wherein, The voltage supply bus defines the length of the first subset extending along the column trace.

4. The device according to claim 1, wherein, A portion of the voltage supply bus is removed near the column trace that is aligned with the window and the edge of the display panel near the window.

5. The device according to claim 1, wherein, The second subset of column traces includes column traces among the plurality of column traces, which are column traces symmetrically arranged on the side of the display panel away from the window.

6. The device according to claim 1, wherein, The electrical signal is a power signal used by the plurality of pixel circuits to emit light.

7. The device of claim 1, further comprising a camera configured to capture images via the window.

8. The device according to claim 1, in, The voltage supply grid includes a first layer and a second layer. The first layer includes the plurality of column traces, and The second layer includes the plurality of line traces.

9. The device according to claim 8, in, The first layer defines a first thin-film resistor, and the second layer defines a second thin-film resistor, and Wherein, the resistance of the first thin layer is less than that of the second thin layer.

10. The device according to claim 8, wherein, Apart from the one or more interconnections between the column traces of the plurality of column traces and the row traces of the plurality of row traces, the first layer is electrically isolated from the second layer.

11. An apparatus including a display panel, the display panel comprising: Multiple pixel circuits are arranged in a matrix, the matrix including a window, the window not including the pixel circuits; A voltage supply bus, which is located at the end of the display panel; A voltage supply grid, configured to transmit electrical signals from the voltage supply bus to the plurality of pixel circuits, the voltage supply grid including a plurality of column traces and a plurality of row traces, wherein a first subset of the plurality of column traces is directly connected to the voltage supply bus, wherein a second subset of the column traces includes all of the column traces aligned with the window, and wherein a portion of the voltage supply bus is removed near the column traces of the plurality of column traces located between the column traces aligned with the window and the edge of the display panel near the window; as well as One or more interconnects are provided between column traces and row traces of the plurality of column traces, wherein a second subset of the plurality of column traces is indirectly connected to the voltage supply bus via a first subset of the plurality of column traces and the row traces.

12. An apparatus including a display panel, the display panel comprising: Multiple pixel circuits are arranged in a matrix, the matrix including a window, the window not including the pixel circuits; A voltage supply bus, which is located at the end of the display panel; A voltage supply grid, configured to transmit electrical signals from the voltage supply bus to the plurality of pixel circuits, the voltage supply grid comprising a plurality of column traces and a plurality of row traces, wherein a first subset of the plurality of column traces is directly connected to the voltage supply bus, and wherein a second subset of the column traces comprises all of the column traces aligned with the window, wherein: The voltage supply grid includes a first layer and a second layer. The first layer defines the first thin-film resistance. The second layer defines a second thin-film resistance, wherein the first thin-film resistance is smaller than the second thin-film resistance. The first layer includes the plurality of column traces, and The second layer includes the plurality of trace lines; and One or more interconnects are provided between column traces and row traces of the plurality of column traces, wherein a second subset of the plurality of column traces is indirectly connected to the voltage supply bus via a first subset of the plurality of column traces and the row traces.

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