Display panel and display device

Abstract

Embodiments of the present application provide a display panel and a display device, and relate to the display field, and are used for improving the thickness uniformity of a guide film. The display panel comprises: an array substrate comprising a control transistor, a pixel electrode, a common electrode and a touch signal line, wherein the pixel electrode is electrically connected to the control transistor through a first via, and the common electrode is electrically connected to the touch signal line through a second via; a color film substrate arranged opposite to the array substrate, comprising a first shielding part extending along a first direction, and the first shielding part overlaps the control transistor and the first via in a direction perpendicular to a plane where the display panel is located; wherein the second via comprises a first sub-via, the first sub-via is located between two pixel electrodes adjacent in the first direction in the direction perpendicular to the plane where the display panel is located, and the first sub-via does not overlap the first shielding part.

Description

[Technical Field]

[0001] This invention relates to the field of display technology, and more particularly to a display panel and display device. [Background Technology]

[0002] Liquid crystal display (LCD) panels utilize the principle of liquid crystal twisting when energized to display images. An LCD panel mainly consists of an array substrate, a color filter substrate, and a liquid crystal layer disposed between the two substrates. To ensure the liquid crystal molecules are regularly aligned and have a certain pretilt angle, an alignment-treated guide film is also disposed on the side of the array substrate and the color filter substrate closest to the liquid crystal layer.

[0003] However, the thickness uniformity of the guide film formed on the inner side of the array substrate is currently poor, which will have an adverse effect on the display and cause uneven display of the image. [Summary of the Invention]

[0004] In view of this, embodiments of the present invention provide a display panel and a display device to improve the thickness uniformity of the guide film.

[0005] On one hand, embodiments of the present invention provide a display panel, including:

[0006] An array substrate includes a control transistor, a pixel electrode, a common electrode, and a touch signal line, wherein the pixel electrode is electrically connected to the control transistor through a first via, and the common electrode is electrically connected to the touch signal line through a second via.

[0007] The color filter substrate disposed opposite to the array substrate includes a first blocking portion extending along a first direction, wherein the first blocking portion overlaps with the control transistor and the first via in a direction perpendicular to the plane of the display panel.

[0008] The second via includes a first sub-via. In a direction perpendicular to the plane of the display panel, the first sub-via is located between two adjacent pixel electrodes in the first direction, and the first sub-via does not overlap with the first blocking portion.

[0009] On the other hand, embodiments of the present invention provide a display device including the above-described display panel.

[0010] One of the above technical solutions has the following beneficial effects:

[0011] In this embodiment of the invention, the position of at least a portion of the second vias (first sub-vias) is adjusted. By placing the first sub-vias between two adjacent pixel electrodes in a first direction and ensuring that the first sub-vias do not overlap with the first shielding portion, the distance between the first sub-vias and the first vias can be increased, making the first sub-vias farther apart than the first vias. This prevents the flatness of the pixel electrode film above the first via from affecting the flowability of the PI material around the first sub-via during subsequent coating of PI material to form a guide film. This ensures a uniform distribution of PI material near the first sub-via, effectively improving the thickness uniformity of the guide film around the first sub-via. Furthermore, it prevents the torsion and tilt angles of the liquid crystal molecules around the first sub-via from becoming disordered, and avoids deviations in the deflection state of these liquid crystal molecules under an electric field. This effectively improves the bright spot phenomenon caused by light leakage and prevents regular diagonal lines from appearing on the screen displayed on the display panel.

[0012] Moreover, by adopting the technical solution provided in the embodiments of the present invention, the risk of displacement of the support column caused by uneven thickness of the guide film can be reduced, and thus the problem of vibration breakage spot can be effectively improved when the display panel is subjected to vibration test. [Attached Image Description]

[0013] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of a display panel structure in the prior art;

[0015] Figure 2 This is a top view of a display panel in the prior art;

[0016] Figure 3 This is a top view of the display panel provided in an embodiment of the present invention;

[0017] Figure 4 for Figure 3 A sectional view along the A1-A2 direction;

[0018] Figure 5 Another top view of the display panel provided in an embodiment of the present invention;

[0019] Figure 6 This is another top view of the display panel provided in an embodiment of the present invention;

[0020] Figure 7 for Figure 6 A magnified view of a portion of the image;

[0021] Figure 8 A schematic diagram of driving voltage and transmittance provided by the present invention and its embodiments;

[0022] Figure 9 This is yet another top view of the display panel provided in an embodiment of the present invention;

[0023] Figure 10 This is yet another top view of the display panel provided in an embodiment of the present invention;

[0024] Figure 11 This is yet another top view of the display panel provided in an embodiment of the present invention;

[0025] Figure 12 This is yet another top view of the display panel provided in an embodiment of the present invention;

[0026] Figure 13 This is yet another top view of the display panel provided in an embodiment of the present invention;

[0027] Figure 14 This is a simplified structural diagram of a display panel provided in an embodiment of the present invention;

[0028] Figure 15 This is a simplified structural diagram of a display panel provided in an embodiment of the present invention;

[0029] Figure 16 This is yet another top view of the display panel provided in an embodiment of the present invention;

[0030] Figure 17 This is yet another top view of the display panel provided in an embodiment of the present invention;

[0031] Figure 18 This is a schematic diagram of a display device provided in an embodiment of the present invention.

Detailed Implementation Methods

[0032] To better understand the technical solution of the present invention, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0033] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0034] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0035] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0036] In existing display panels, such as Figure 1 and Figure 2 As shown, Figure 1 This is a schematic diagram of a display panel structure in the prior art. Figure 2 This is a top view of a display panel in the prior art. The display panel includes an array substrate 101, which includes a control transistor 102, pixel electrodes 103, and a common electrode 104. The control transistor 102 is electrically connected to a data line (Data) and a gate line (Gate), respectively. The pixel electrodes 103 are electrically connected to the control transistor 102 through a first via 105. The common electrode 104 is electrically connected to a touch signal line 107 through a second via 106. The touch signal line 107 is used to transmit a common voltage and a touch driving voltage to the common electrode 104 in a time-division manner during the display period and the touch period, so that the display panel has both display and touch functions. Moreover, in order to reduce the number of photomasks required in the display panel manufacturing process, the touch signal line 107 can be arranged on the same layer as the data line (Data).

[0037] During their research, the inventors discovered that in current via designs, the second via 106 is typically positioned next to the first via 105 so that it can be shielded by the first shielding portion 109 extending in the same direction as the gate line in the color filter substrate. However, because the pixel electrode 103 is recessed in the first via 105 during its formation, the surface flatness of the pixel electrode 103 above the first via 105 is very poor. Furthermore, since the pixel electrode 103 is located on the side of the common electrode 104 closest to the light-emitting surface of the display panel, the flatness of the pixel electrode 103 film layer significantly affects the flowability of the surrounding PI material during subsequent coating of polyimide (PI) material to form the guide film 108. When the second via 106 is close to the first via 105, the PI material at this location has poor flowability due to the flatness of the film layer of the pixel electrode 103 above the first via 105. Furthermore, the small gap within the second via 106 causes the PI material near the second via 106 to be unevenly distributed, resulting in a thicker PI material inside the second via 106 and a thinner PI material around its perimeter. For example, the thickness of the PI material around the second via 106 may be approximately 300 μm, while the thickness of the PI material inside the second via 106 may be over 4000 μm.

[0038] The thickness difference of this guiding film 108 significantly affects the twist and tilt angles of the liquid crystal molecules near the second via 106, as well as their deflection under an electric field. When light leaks from the edge of the second via 106 into the light-emitting area of ​​the sub-pixel, it affects the display within that area. Especially in low grayscale displays, this can cause noticeable bright spots in the light-emitting area, resulting in regular, uniform diagonal lines on the displayed image.

[0039] To address this, embodiments of the present invention provide a display panel, such as... Figure 3 and Figure 4 As shown, Figure 3 This is a top view of the display panel provided in an embodiment of the present invention. Figure 4 for Figure 3 A cross-sectional view along the A1-A2 direction shows that the display panel includes an array substrate 1 and a color filter substrate 2 disposed opposite to the array substrate 1. The array substrate 1 includes a control transistor 3, a pixel electrode 4, a common electrode 5, and a touch signal line 6. The pixel electrode 4 is electrically connected to the control transistor 3 through a first via 7, and the common electrode 5 is electrically connected to the touch signal line 6 through a second via 8. The color filter substrate 2 includes a first blocking portion 9 extending along a first direction x. In a direction perpendicular to the plane of the display panel, the first blocking portion 9 overlaps with the control transistor 3 and the first via 7.

[0040] The second via 8 includes a first sub-via 10. In a direction perpendicular to the plane of the display panel, the first sub-via 10 is located between two adjacent pixel electrodes 4 in the first direction x, and the first sub-via 10 does not overlap with the first blocking portion 9.

[0041] In this embodiment of the invention, the position of at least a portion of the second via 8 (first sub-via 10) is adjusted. By placing the first sub-via 10 between two adjacent pixel electrodes 4 in the first direction x and ensuring that the first sub-via 10 does not overlap with the first shielding portion 9, the distance between the first sub-via 10 and the first via 7 can be increased, making the first sub-via 10 and the first via 7 more distant. Thus, when subsequently coating PI material to form a guide film, the flatness of the film layer of the pixel electrode 4 above the first via 7 can be prevented from affecting the flowability of the PI material around the first sub-via 10, ensuring a uniform distribution of the PI material near the first sub-via 10. This effectively improves the thickness uniformity of the guide film around the first sub-via 10, thereby preventing the twisting and tilting angles of the liquid crystal molecules around the first sub-via 10 from becoming disordered, and preventing deviations in the deflection state of these liquid crystal molecules under an electric field. This effectively improves the bright spot phenomenon caused by light leakage and prevents regular diagonal lines from appearing on the screen displayed on the display panel.

[0042] Moreover, by adopting the technical solution provided in the embodiments of the present invention, the risk of displacement of the support column caused by uneven thickness of the guide film can be reduced, and thus the problem of vibration breakage spot can be effectively improved when the display panel is subjected to vibration test.

[0043] In one feasible implementation, such as Figure 5 As shown, Figure 5 In another top view of the display panel provided in an embodiment of the present invention, the pixel electrode 4 includes a first electrode portion 11 and a second electrode portion 12 connected together. The first electrode portion 11 and the second electrode portion 12 are arranged along a second direction y, and the extending directions of the first electrode portion 11 and the second electrode portion 12 intersect. In a direction perpendicular to the plane of the display panel, a first sub-via 10 is located on one side of the junction of the first electrode portion 11 and the second electrode portion 12, and the second direction y intersects with the first direction x.

[0044] That is, in this structure, the pixel electrode 4 is a dual-domain electrode structure, and the first sub-via 10 is located at the domain line position in the middle of the pixel electrode 4.

[0045] When the pixel electrode 4 adopts a dual-domain design, the rotation efficiency of liquid crystal molecules at the junction between the first electrode portion 11 and the second electrode portion 12 is usually low, resulting in a much lower luminous intensity of the sub-pixel at this junction compared to other locations. In this embodiment of the invention, by designing the first sub-via 10 at the junction between the first electrode portion 11 and the second electrode portion 12, the impact of the first sub-via 10 on the display can be further weakened. For example, even if there are still some unevenness in the guide film near the first sub-via 10, or in combination with... Figure 6 Even if a third blocking part 14 is set above the first sub-via 10 to block it, resulting in a certain loss of transmittance, the impact on the overall display of the sub-pixel is negligible.

[0046] In one feasible implementation, such as Figure 6 and Figure 7 As shown, Figure 6 This is another top view of the display panel provided in an embodiment of the present invention. Figure 7 for Figure 6 The enlarged schematic diagram shows that the color filter substrate 2 also includes a second blocking portion 13 and a third blocking portion 14. The extension direction of the second blocking portion 13 intersects with the first direction x, and the third blocking portion 14 protrudes from the second blocking portion 13 in the first direction x. In the direction perpendicular to the plane of the display panel, the third blocking portion 14 overlaps with the first sub-via 10, so that the first sub-via 10 can be blocked by the third blocking portion 14 to prevent the first sub-via 10 from being visible to the human eye.

[0047] It should be noted that the size of the first sub-via 10 is very small compared to the entire light-emitting area of ​​the sub-pixel. Therefore, even if the position of the first sub-via 10 is adjusted and a third blocking part 14 is added above the first sub-via 10, the third blocking part 14 will not have a significant impact on the light transmittance of the light-emitting area of ​​the sub-pixel.

[0048] To address this, the inventors tested five display panels. These five display panels required different driving voltages to the pixel electrode 4 when displaying a white image. In other words, the transmittance of liquid crystal molecules to light was different under the electric field formed by the driving voltage.

[0049] Taking the first sub-via 10 located at the junction of the first electrode portion 11 and the second electrode portion 12 as an example, such as Figure 8 As shown, Figure 8 This is a schematic diagram of the driving voltage and transmittance provided by the present invention and its embodiments, wherein, Figure 8Curve A in the figure represents the relationship between driving voltage and transmittance in the prior art, while curve B represents the relationship between driving voltage and transmittance in the embodiment of the present invention. In the first display panel, when controlling the display panel to display a white image, a driving voltage of 4.5V needs to be provided to the pixel electrode 4. When using the existing design (the second via overlaps with the first blocking part), the transmittance of liquid crystal molecules to light under the electric field formed by the 4.5V driving voltage is 3.816%. When using the design of the present invention (adjusting the position of the first sub-via 10 and adding a third blocking part 14 above the first sub-via 10 to block it), the transmittance of liquid crystal molecules to light under the electric field formed by the 4.5V driving voltage is 3.806%, which is 0.265% lower than the existing design.

[0050] In the second display panel, when controlling the display panel to display a white screen, a 5V driving voltage needs to be provided to the pixel electrode 4. With the existing design, the transmittance of liquid crystal molecules to light under the electric field formed by the 5V driving voltage is 4.177%. With the design of the present invention, the transmittance of liquid crystal molecules to light under the electric field formed by the 5V driving voltage is 4.166%, which is 0.266% lower than the existing design.

[0051] In the third display panel, when controlling the display panel to display a white screen, a driving voltage of 5.5V needs to be provided to the pixel electrode 4. With the existing design, the transmittance of liquid crystal molecules to light under the electric field formed by the driving voltage of 5.5V is 4.363%. With the design of the present invention, the transmittance of liquid crystal molecules to light under the electric field formed by the driving voltage of 5.5V is 4.351%, which is 0.275% lower than the existing design.

[0052] In the fourth display panel, when controlling the display panel to display a white screen, a 6V driving voltage needs to be provided to the pixel electrode 4. With the existing design, the transmittance of liquid crystal molecules to light under the electric field formed by the 6V driving voltage is 4.424%. With the design of the present invention, the transmittance of liquid crystal molecules to light under the electric field formed by the 6V driving voltage is 4.411%, which is 0.276% lower than the existing design.

[0053] In the fifth display panel, when controlling the display panel to display a white screen, a driving voltage of 6.5V needs to be provided to the pixel electrode 4. With the existing design, the transmittance of liquid crystal molecules to light under the electric field formed by the driving voltage of 6.5V is 4.403%. With the design of the present invention, the transmittance of liquid crystal molecules to light under the electric field formed by the driving voltage of 6.5V is 4.391%, which is 0.275% lower than the existing design.

[0054] In summary, after adjusting the position of the first sub-via 10 and adding a third blocking part 14 for blocking it, the third blocking part 14 has an effect of only about 0.28% on the transmittance of the light-emitting area of ​​the sub-pixel, which is almost negligible.

[0055] In one feasible implementation, such as Figure 9 As shown, Figure 9 This is another top view of the display panel provided in an embodiment of the present invention. The display panel includes a plurality of pixel regions 15, each pixel region 15 including a plurality of pixel electrodes 4 arranged along a first direction x. The display panel also includes a data line Data, which is electrically connected to a control transistor 3 and extends in a direction intersecting the first direction x. In a direction perpendicular to the plane of the display panel, the data line Data is located on the same side of the pixel electrode 4 coupled to it in the first direction x, and the touch signal line 6 is located between adjacent pixel regions 15 in the first direction x.

[0056] This design does not change the original arrangement of the data line and touch signal line 6; it only adjusts the position of the first sub-via 10, resulting in a minor change to the original design. Furthermore, since the spacing between two adjacent pixel areas 15 is usually greater than the distance between two adjacent pixel electrodes 4 within the same pixel area 15, when the touch signal line 6 is located between two adjacent pixel areas 15, there will be sufficient width between them to accommodate the first sub-via 10, which helps optimize the layout design of the first sub-via 10.

[0057] In one feasible implementation, such as Figures 10-12 As shown, Figure 10 This is another top view of the display panel provided in an embodiment of the present invention. Figure 11 This is another top view of the display panel provided in an embodiment of the present invention. Figure 12 This is another top view of the display panel provided in an embodiment of the present invention. The touch signal line 6 includes at least one first touch line segment 16, which is electrically connected to the common electrode 5 through a first sub-via 10. The display panel also includes a data line Data, which includes a data line segment 17, which is electrically connected to the control transistor 3.

[0058] The display panel includes a plurality of pixel regions 15, each pixel region 15 including a plurality of pixel electrodes 4 arranged along a first direction x. Pixel regions 15 include a first pixel region 18, and the pixel electrodes 4 in the first pixel region 18 include a first pixel electrode 19 and at least one second pixel electrode 20. Data line segments 17 include a first data line segment 21 coupled to the first pixel electrode 19 and a second data line segment 22 coupled to the second pixel electrode 20.

[0059] In this configuration, the pixel electrode 4 has a first side and a second side on both sides in the first direction x, the first touch line segment 16 is located on the first side of the first pixel electrode 19, the first data line segment 21 is located on the second side of the first pixel electrode 19 coupled thereto, and the second data line segment 22 is located on the first side of the second pixel electrode 20 coupled thereto.

[0060] It should be noted that, see Figures 10-12 When the pixel area 15 includes multiple pixel electrodes 4, any one of its pixel electrodes 4 can be set as the first pixel electrode 19.

[0061] This configuration places the first touch segment 16 between adjacent first pixel electrodes 19 and second pixel electrodes 20 in the pixel area 15. When the first touch segment 16 is located on the first side of the first pixel electrode 19, by adjusting the first data segment 21, which is electrically connected to the first pixel electrode 19, to the second side of the first pixel electrode 19, the first data segment 21 can avoid the first sub-via 10, thus preventing the first touch segment 16 and the first touch segment 16 from simultaneously occupying the space between the first pixel electrode 19 and the second pixel electrode 20. This provides sufficient space to accommodate the first sub-via 10 and helps optimize the layout design of the first sub-via 10.

[0062] Furthermore, see again Figures 10-12 The control transistor 3 electrically connected to the first pixel electrode 19 and the control transistor 3 electrically connected to the second pixel electrode 20 are symmetrically arranged, so that the source of the control transistor 3 coupled to the first pixel electrode 19 is close to the first data line segment 21 connected to it, thereby reducing the connection distance between the control transistor 3 and the first data line segment 21 and reducing the attenuation of data voltage during transmission.

[0063] In one feasible implementation, the data line Data where the first data line segment 21 is located and the data line Data where the second data line segment 22 is located transmit data voltage in a time-division manner.

[0064] When the first data line segment 21 is adjusted to the second side of the first pixel electrode 19, it will be adjacent to another second data line segment 22, making these two data lines 21 and 22 very close together. By controlling the time-division transmission of data voltage on the data lines containing the first data line segment 21 and the second data line segment 22, mutual interference of data signals on adjacent data lines 21 and 22 can be avoided, thus improving the stability of the data voltage during transmission.

[0065] In this embodiment of the invention, the data line Data can be directly connected to the driver chip. By controlling the driver chip to provide data voltage in a time-division manner, data voltage can be transmitted on the data line Data containing the first data line segment 21 and the second data line segment 22 in a time-division manner. Alternatively, the data line Data can also be electrically connected to a gating circuit. By controlling the gating switch connected to the first data line segment 21 and the second data line segment 22 to be turned on in a time-division manner, data voltage can be transmitted on the data line Data containing the first data line segment 21 and the second data line segment 22 in a time-division manner.

[0066] In one feasible implementation, see again Figure 12 The first data line segment 21 is located between the first pixel area 18 and the adjacent pixel area 15. That is, the outermost pixel electrode 4 in the first pixel area 18 is the first pixel electrode 19. At this time, a first data line segment 21 and a second data line segment 22 will be provided between the first pixel area 18 and the adjacent pixel area 15.

[0067] Since the spacing between two adjacent pixel areas 15 in the first direction x is usually greater than the spacing between two adjacent pixel electrodes 4 in the same pixel area 15 in the first direction x, placing the first data line segment 21 between the first pixel area 18 and its adjacent pixel area 15 can increase the distance between the two adjacent first data line segments 21 and the second data line segment 22 to a certain extent, thereby reducing the mutual interference of the data voltage transmitted on the two first data line segments 21 and the second data line segment 22.

[0068] In one feasible implementation, such as Figure 13 and Figure 14 As shown, Figure 13 This is another top view of the display panel provided in an embodiment of the present invention. Figure 14 This is a simplified structural diagram of a display panel provided in an embodiment of the present invention. The display panel includes a plurality of pixel regions 15, and each pixel region 15 includes a plurality of pixel electrodes 4 arranged along a first direction x. Specifically, in a direction perpendicular to the plane of the display panel, at least one pixel region 15 is spaced between two adjacent first sub-vias 10 in the first direction x, and at least one pixel region 15 is spaced between two adjacent first sub-vias 10 in the second direction y, where the second direction y intersects the first direction x.

[0069] The above configuration only adjusts the position of some of the second vias 8. The second via 8 also includes a second sub-via 23. In the direction perpendicular to the plane of the display panel, the second sub-via 23 is located on one side of the first via 7 and overlaps with the first blocking part 9 (not shown in the figure). When the second via 8 includes both the first sub-via 10 and the second sub-via 23, by adopting the above configuration, the first sub-via 10 and the second sub-via 23 can be arranged crosswise in the first direction x and the second direction y, avoiding the formation of bright lines that can be recognized by the human eye caused by multiple consecutive second sub-vias 23.

[0070] Furthermore, it should be noted that in the embodiments of the present invention, see... Figure 13 and Figure 14 The touch signal line 6 and the data line Data can extend in the same direction. That is, the first sub-via 10 and the second sub-via 23, which are electrically connected to the same touch signal line 6, are arranged along the second direction y. In this case, the data line Data and the touch signal line 6 will not cross, and the wiring is relatively simple. Alternatively, in another setting, such as... Figure 15 As shown, Figure 15 This is a simplified schematic diagram of another display panel structure provided in an embodiment of the present invention. In the touch signal line 6, the segment electrically connected to the first sub-via 10 and the segment electrically connected to the second sub-via 23 are not sequentially connected in the second direction y. In this case, the data line Data and the touch signal line 6 intersect. When the data line Data and the touch signal line 6 are arranged on the same layer, such as... Figure 16 As shown, Figure 16 In another top view of the display panel provided in this embodiment of the invention, a bridge design can be implemented at the intersection of the data line (Data) and the touch signal line (6). For example, see again... Figure 16 The touch signal line 6 includes a first main line segment 24 and a first bridge line segment 25 connected in sequence and arranged in different layers. A portion of the line includes a second main line segment 26 and a second bridge line segment 27 connected in sequence and arranged in different layers. In a direction perpendicular to the plane of the display panel, the first bridge line segment 25 overlaps with the second main line segment 26, and / or the second bridge line segment 27 overlaps with the first main line segment 24. The first bridge line segment 25 and the second bridge line segment 27 can be arranged in the same layer as the gate line to avoid adding an additional film layer.

[0071] Furthermore, in embodiments of the present invention, such as Figure 17 As shown, Figure 17 In another top view of the display panel provided in this embodiment of the invention, the common electrode 5 may further include a first cutout 26. In a direction perpendicular to the plane of the display panel, the first cutout 26 overlaps with the touch signal line 6 to reduce the overlap area between the touch signal line 6 and the common electrode 5, thereby reducing the mutual interference between the signals transmitted on the two electrodes.

[0072] Furthermore, in embodiments of the present invention, see... Figure 4 The array substrate 1 further includes a first substrate 27, a gate insulating layer 28, an interlayer dielectric layer 29, a planarization layer 30, and a first insulating layer 31. The gate insulating layer 27 is located between the active layer and the gate of the control transistor 3. The interlayer dielectric layer 28 is located between the gate and the source and drain of the control transistor 3, that is, between the gate line and the data line and the touch signal line 6. The planarization layer 29 is located between the data line and the common electrode 5. The first insulating layer 30 is located between the common electrode 5 and the pixel electrode 4. The color filter substrate 2 further includes a second substrate 32.

[0073] Based on the same inventive concept, embodiments of the present invention also provide a display device, such as... Figure 18 As shown, Figure 18 This is a schematic diagram of a display device provided in an embodiment of the present invention. The display device includes the aforementioned display panel 100. The specific structure of the display panel 100 has been described in detail in the above embodiments and will not be repeated here. Figure 18 The display device shown is for illustrative purposes only. The display device can be any electronic device with display function, such as a mobile phone, tablet computer, laptop computer, e-reader or television.

[0074] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0075] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that, include: An array substrate includes a control transistor, a pixel electrode, a common electrode, and a touch signal line, wherein the pixel electrode is electrically connected to the control transistor through a first via, and the common electrode is electrically connected to the touch signal line through a second via. The color filter substrate disposed opposite to the array substrate includes a first blocking portion extending along a first direction, wherein the first blocking portion overlaps with the control transistor and the first via in a direction perpendicular to the plane of the display panel. The second via includes a first sub-via. In a direction perpendicular to the plane of the display panel, the first sub-via is located between two adjacent pixel electrodes in the first direction, and the first sub-via does not overlap with the first blocking portion. The touch signal line includes at least one first touch line segment, and the first touch line segment is electrically connected to the common electrode through the first sub-via. The display panel also includes a data line, which includes a data line segment and is electrically connected to the control transistor. The display panel includes a plurality of pixel regions, each pixel region including a plurality of pixel electrodes arranged along the first direction, each pixel region including a first pixel region, the pixel electrodes in the first pixel region including a first pixel electrode and at least one second pixel electrode, and the data line segment including a first data line segment coupled to the first pixel electrode and a second data line segment coupled to the second pixel electrode; Wherein, the pixel electrode has a first side and a second side on both sides in the first direction, the first touch line segment is located on the first side of the first pixel electrode, the first data line segment is located on the second side of the first pixel electrode coupled thereto, and the second data line segment is located on the first side of the second pixel electrode coupled thereto.

2. The display panel according to claim 1, characterized in that, The pixel electrode includes a first electrode portion and a second electrode portion connected together. The first electrode portion and the second electrode portion are arranged along a second direction, and the extending directions of the first electrode portion and the second electrode portion intersect. In a direction perpendicular to the plane of the display panel, the first sub-via is located on one side of the junction of the first electrode portion and the second electrode portion. The second direction intersects with the first direction.

3. The display panel according to claim 1, characterized in that, The color filter substrate further includes a second blocking portion and a third blocking portion, wherein the extension direction of the second blocking portion intersects with the first direction, the third blocking portion protrudes from the second blocking portion in the first direction, and the third blocking portion overlaps with the first sub-via in a direction perpendicular to the plane of the display panel.

4. The display panel according to claim 1, characterized in that, The control transistor electrically connected to the first pixel electrode and the control transistor electrically connected to the second pixel electrode are arranged symmetrically.

5. The display panel according to claim 1, characterized in that, The data line containing the first data segment and the data line containing the second data segment transmit data voltage in a time-division manner.

6. The display panel according to claim 1, characterized in that, The first data line segment is located between the first pixel area and the adjacent pixel area.

7. The display panel according to claim 1, characterized in that, In a direction perpendicular to the plane of the display panel, at least one pixel area is spaced between two adjacent first sub-vias in the first direction, and at least one pixel area is spaced between two adjacent first sub-vias in the second direction, the second direction intersecting the first direction.

8. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 7.

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