A method and system for implementing a block cipher algorithm of a new FLM structure
By combining the advantages of Feistel and Lai-Massey block ciphers with a novel FLM structure, a new symmetric FLM structure is designed. This solves the problems of inconsistent encryption and decryption and high hardware resource consumption in resource-constrained environments, achieving encryption and decryption consistency and high diffusivity while reducing hardware resource consumption.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HENGYANG NORMAL UNIV
- Filing Date
- 2023-06-12
- Publication Date
- 2026-05-29
Smart Images

Figure CN116743353B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of information security encryption technology, specifically relating to the implementation and system of a novel FLM-structured block cipher algorithm. Background Technology
[0002] With the rapid development of information technologies such as communication and computers, traditional industrial systems combined with the Internet have evolved into integrated systems encompassing cyber-physical systems, sensing, control, networking, and computing. The Internet of Things (IoT) has been applied to various fields. However, the widespread availability of IoT devices and the constant communication demands pose potential threats to data and privacy security in today's networks, necessitating more effective security measures to ensure network and data security. Block ciphers, as an important branch of symmetric cryptography, have become a crucial means of ensuring information confidentiality and integrity due to their fast encryption speed, ease of standardization, and suitability for hardware and software implementation. They are widely used in computer communication and information system security. IoT sensing and communication devices often operate in resource-constrained environments, allowing only a small portion of resources to be dedicated to data security. Therefore, achieving a balance between performance and security in block cipher algorithms under resource constraints is a problem worthy of in-depth research. This involves both the design and implementation of block cipher structures and the consideration of potential security issues related to cryptographic components.
[0003] In recent years, a large number of high-performance block ciphers have emerged. These algorithms mostly employ three typical structures: SPN, Feistel, and Lai-Massey. The SPN structure, represented by the Advanced Encryption Standard (AES), boasts rapid confusion diffusion and typically has a short number of rounds, resulting in high throughput. However, it suffers from inconsistencies in encryption and decryption. In contrast, the Feistel structure offers consistent encryption and decryption. However, this very characteristic leads to poor diffusion in algorithms like the Data Encryption Standard (DES) and the NSA-designed Simon algorithm, resulting in only half the data being processed per round. Consequently, these algorithms require a high number of iterations, leading to exponentially increasing resource consumption. The Lai-Massey structure, exemplified by the IDEA algorithm, exhibits rapid confusion diffusion and fast software implementation. However, its round functions are complex, consuming significant area in round-based hardware implementations. Furthermore, the inconsistency between encryption and decryption in this structure necessitates additional resources for decryption. Summary of the Invention
[0004] To address the aforementioned problems in the prior art, this invention provides a novel FLM (Flatform-Likely Mode) block cipher algorithm implementation method and system. The technical solution of this invention proposes a novel FLM structure. Due to the symmetry of this structure, the method, based on this novel FLM structure, achieves decryption by adding two P2 permutations that do not consume hardware resources to the encryption operation. This enables decryption to highly reuse the encryption structure, not only making the algorithm highly consistent in encryption and decryption and reducing hardware resource consumption, but also, through the use of cyclic shift transformations and XOR operations to interconnect the branches, achieving the effect of changing the data of all branches in one round, greatly improving the diffusion of the algorithm and enhancing its security. Furthermore, the method of this invention also proposes a novel S-box, which achieves good cryptographic properties without occupying a large amount of resource area, further ensuring the security of the algorithm.
[0005] Therefore, the present invention provides a novel block cipher algorithm implementation method with an FLM structure, comprising the following steps:
[0006] Set the initial key Key and determine the maximum number of rounds Nr;
[0007] Obtain plaintext or ciphertext, and divide the plaintext or ciphertext into four branches;
[0008] Based on the initial key Key, a round key expansion operation is performed to obtain the subkey for each round of encryption or decryption operation;
[0009] Based on the novel FLM structure, the plaintext or ciphertext is encrypted or decrypted using the subkey through Nr rounds of encryption or decryption operations to obtain the ciphertext or plaintext.
[0010] If it is an encryption operation, the plaintext is subjected to an Nr round of novel FLM structure encryption operation, which includes cyclic shift transformation, round constant XOR, round key addition transformation, F function and P1 permutation;
[0011] If it is a decryption operation, the ciphertext is subjected to Nr rounds of new FLM structure decryption operation, and P2 permutation is performed before the first round of decryption operation and after the Nr round of decryption operation. In the decryption operation, the subkeys and round constants of the first to Nr rounds of new FLM structure decryption operation correspond one-to-one with the subkeys and round constants of the Nr to 1 rounds of new FLM structure encryption operation. The P2 permutation is designed based on the branch permutation rules in the P1 permutation process.
[0012] The decryption operation provided by this invention sequentially employs P2 permutation, a novel FLM structure decryption operation, and another P2 permutation. In other words, the decryption operation adds two P2 permutations to the encryption operation. The P1 box is designed to ensure that the data in the second and third branches of the novel FLM structure do not interfere with the data in the first and fourth branches. The P2 box is designed based on the symmetry of the novel FLM structure to achieve a high degree of reusability in the encryption structure during decryption. This invention combines the advantages of Feistel and Lai-Massey structures to design a symmetrical novel FLM structure. The operations performed on the data in the second and third branches are identical in both order, while the operations performed on the data in the first and fourth branches are identical but in reverse order. Therefore, the P2 box can be designed based on the permutation rules of the branches in the P1 box, thereby achieving a high degree of consistency between encryption and decryption.
[0013] Alternatively, the rules for P1 and P2 permutations are as follows:
[0014] P1 permutation: If the 64-bit intermediate data Z3||W2||W3||Z1 is permuted by P1, the resulting 64-bit data is arranged from the most significant bit to the least significant bit as W2||Z3||Z1||W3;
[0015] P2 permutation: If the 64-bit intermediate data is arranged from the most significant bit to the least significant bit as Z′3||W′2||W′3||Z′1, then P2 permutation will result in 64-bit data arranged from the most significant bit to the least significant bit as W′3||Z′1||Z′3||W′2.
[0016] Further optionally, the plaintext is 64 bits long, and the execution process of the encryption operation of the novel FLM structure is as follows:
[0017] B1: Divide the 64-bit plaintext into four parts from the most significant bit to the least significant bit: pl0, pl1, pr0, pr1, i.e., pl0 = p 63 ||p 62 …p 49 ||p 48 pl1 = p 47 ||p 46 …p 33 ||p 32 pr0 = p 31 ||p 30 …p 17 ||p 16 pr1 = p 15 ||p 14 …p1||p0; where || represents the string concatenation operator, p i This represents the data at position i in the plaintext;
[0018] B2: Circularly shift pl0 left by 7 bits to obtain Z0, then combine Z0 with pr1 and the wheel constant RC of the current wheel. i Performing an XOR operation yields Z1, i.e.
[0019] B3: Circularly shift Z1 left by 7 bits to obtain Z2, then combine Z2 with pl0 and the wheel constant RC of the current wheel. i Performing an XOR operation yields Z3, i.e.
[0020] B4: Perform an XOR operation between Z1 and pl0, and then multiply the result by the round key K. i Performing an XOR logical operation yields W0, i.e.
[0021] B5: Perform the F function operation on W0 to obtain W1, then perform an XOR logical operation on W1 with pl1 and pr0 respectively to obtain W2 and W3, that is:
[0022] B6: Arrange the 64-bit intermediate data from the most significant bit to the least significant bit as Z3||W2||W3||Z1, and then perform P1 permutation on Z3||W2||W3||Z1.
[0023] Further optionally, the F function operation includes S-box replacement and column obfuscation operations, wherein the process of performing the F function operation on W0 to obtain W1 in step B5 is as follows:
[0024] First, perform an S-box replacement operation on W0 to obtain Y0;
[0025] Then perform column obfuscation on Y0 to obtain W1.
[0026] Further, optionally, the column obfuscation operation is performed as follows:
[0027] The column confusion transformation matrix M in the Piccolo algorithm is selected as follows:
[0028]
[0029] Then in GF(2) 4 After performing the column confusion transformation matrix M and S-box replacement on the above, the data Y0 obtained is multiplied, where GF(2 4 Let be a finite field, indicating that the finite field contains only 2^n elements. 4 Each element.
[0030] Further optionally, the round key expansion operation includes cyclic shift, S-box replacement, and round constant XOR;
[0031] The execution process of the round key expansion operation in each round is as follows:
[0032] C1: Circularly shift the 80-bit key from the previous round's expanded key to the left by 61 bits, where the 80-bit key from the first round's expanded key operation is the initial key Key;
[0033] C2: Perform an S-box replacement operation on the highest 4 bits of the data obtained in step C1 to update the key;
[0034] C3: Perform an XOR operation on the 5 bits from the 16th to the 20th bit of the key obtained in step C2, from the least significant bit to the most significant bit, with the current round number;
[0035] C4: After step C3, a new 80-bit key is obtained as the input for the next round's round key expansion. The highest 16 bits of the data are taken as the subkey used in the current round.
[0036] Further, optionally, the S-box replacement corresponds to the following replacement rules:
[0037] x: {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F}
[0038] S[x]: {E, F, C, 8, 4, 3, 7, 2, D, 5, 9, 1, 0, B, 6, A}
[0039] Where x and S[x] are the data before and after the S-box replacement, respectively.
[0040] The present invention also provides a system based on the method, comprising:
[0041] The setup module is used to set the initial key Key and determine the maximum number of rounds Nr;
[0042] A plaintext or ciphertext processing module is used to acquire plaintext or ciphertext and divide the plaintext or ciphertext into four branches;
[0043] The round key expansion module is used to perform round key expansion operations based on the initial key Key to obtain the subkey for each round of encryption or decryption operations;
[0044] An encryption / decryption module is used to perform Nr rounds of encryption or decryption operations on the plaintext or the ciphertext based on a novel FLM structure and using the subkey to obtain ciphertext or plaintext.
[0045] If it is an encryption operation, each round of encryption operation is to perform a new FLM structure encryption operation on the plaintext. The new FLM structure encryption operation includes cyclic shift transformation, round constant XOR, round key addition transformation, F function and P1 permutation.
[0046] If it is an encryption operation, the plaintext is subjected to an Nr round of novel FLM structure encryption operation, which includes cyclic shift transformation, round constant XOR, round key addition transformation, F function and P1 permutation;
[0047] If it is a decryption operation, the ciphertext is subjected to Nr rounds of new FLM structure decryption operation, and P2 permutation is performed before the first round of decryption operation and after the Nr round of decryption operation. The subkeys and round constants of the first to Nr rounds of new FLM structure decryption operation are in one-to-one correspondence with the subkeys and round constants of the Nr to 1 rounds of new FLM structure encryption operation.
[0048] The present invention also provides an electronic terminal, comprising at least:
[0049] One or more processors;
[0050] And a memory that stores one or more computer programs;
[0051] The processor invokes the computer program to execute:
[0052] The steps of implementing a block cipher algorithm with a novel FLM structure.
[0053] The present invention also provides a computer-readable storage medium storing a computer program, which is invoked by a processor for execution.
[0054] The steps of implementing a block cipher algorithm with a novel FLM structure.
[0055] Beneficial effects
[0056] The novel FLM (Flatform-Based Multi-Mesh) block cipher algorithm provided by this invention combines the advantages of the Feistel and Lai-Massey structures. Due to the symmetry of the novel FLM structure, decryption can be achieved by adding two P2 permutations to the encryption operation without consuming hardware resources. This allows for highly reusable encryption structures during decryption, solving the inconsistency problem of encryption and decryption in the Lai-Massey structure and reducing the hardware resource consumption of the algorithm. Simultaneously, this invention uses cyclic shifts and XOR linear operations to interconnect the branches in the algorithm, enabling changes to all branches in a single round. This solves the problem of the traditional Feistel structure, which can only process half of the plaintext data at a time and has a slow diffusion speed, thus improving the algorithm's diffusion capability. Therefore, it satisfies the diffusion requirements, the encryption / decryption symmetry, and reduces hardware resource consumption.
[0057] In a further preferred embodiment of the present invention, a new S-box is provided, which has the characteristics of low resource area, achieves good cryptographic properties, and effectively ensures the security of the algorithm.
[0058] In summary, the proposed block cipher algorithm has the advantages of low resource consumption, high performance, and high security, and can provide protection for data security. Attached Figure Description
[0059] Figure 1 This is a flowchart of the block cipher algorithm encryption process described in this invention;
[0060] Figure 2 This is the round key expansion diagram described in this invention;
[0061] Figure 3 This is a flowchart of the P1 and P2 substitution processes described in this invention;
[0062] Figure 4 This is a flowchart of the F function in the encryption algorithm structure described in this invention.
[0063] Figure 5 This is a flowchart of the block cipher algorithm decryption described in this invention; Detailed Implementation
[0064] This invention provides a novel block cipher algorithm implementation method based on a novel FLM structure. This method combines the advantages of Feistel and Lai-Massey structures, proposing a novel FLM structure that overcomes both the inconsistency in encryption and decryption inherent in the Lai-Massey structure and the poor scalability and high resource consumption of the Feistel structure. For example... Figure 1 As shown, the encryption operations of the novel FLM structure include cyclic shift transformation of the data blocks, round constant XOR, round key addition transformation, F function, and P1 permutation operations; such as Figure 5 As shown, the decryption operation of the novel FLM structure includes sequentially performing P2 permutation, Nr rounds of novel FLM structure decryption operation, and P2 permutation. In the decryption operation, the subkeys and round constants of the first to Nr rounds of novel FLM structure decryption operation correspond one-to-one with the subkeys and round constants of the Nr to 1 rounds of novel FLM structure encryption operation; as shown... Figure 2 As shown, round key expansion includes sequentially performing cyclic shifting, S-box substitution, and round constant XOR operations on the key. Figure 4 As shown, the F function includes S-box substitution and column obfuscation transformation.
[0065] The present invention will be further described below with reference to embodiments.
[0066] Example 1:
[0067] This embodiment provides a novel FLM (Flatform-Oriented Murloc) block cipher algorithm implementation method. Taking a plaintext / ciphertext length of 64 bits, an initial key of 80 bits, and a round function iteration count of 16 as an example, where each round performs the novel FLM encryption operation and round key expansion operation, the specific execution process is as follows:
[0068] Step A1: Obtain 64 bits of plaintext from the most significant bit to the least significant bit as the data to be encrypted. Plaintext = p 63 ||p 63 …p1||p0, divide the 64-bit plaintext into four groups, determine the maximum number of rounds Nr as 16, and represent the current round number as i. The specific process of grouping is as follows:
[0069] Let these four groups be represented as pl0, pl1, pr0, and pr1 respectively, specifically as pl0 = p 63 ||p 62 …p 49 ||p 48 pl1 = p 47 ||p 46 …p 33 ||p 32 pr0 = p 31 ||p 30 …p 17 ||p 16 pr1 = p 15 ||p 14 …p1||p0.
[0070] Step A2: Set the initial 80-bit key Key = k 79 ||k 78 …k1||k0 performs round key expansion on the 80-bit key, including cyclic shift, S-box replacement, and round constant XOR. The specific operations are as follows:
[0071] Circular shift: Circularly shift the initial key Key to the left by 61 bits to obtain key1, key1 = k 18 ||k 17 ||k 16 …k 21 ||k 20 ||k 19 The formula is as follows:
[0072] key1[k 79 ||k 78 ||k 77 …k2||k1||k0]=Key[k 18 ||k 17 ||k 16 …k 21 ||k20 ||k 19 ]
[0073] S-box replacement: The highest 4 bits of key1 are replaced using an S-box to update the key1, as shown in the following formula:
[0074] key1[k 79 ||k 78 ||k 77 ||k 76 ]=S[k 79 ||k 78 ||k 77 ||k 76 ]
[0075] The S-box replacement operation is performed by looking up and replacing the following table:
[0076] Table 1 Algorithm S-box Elements
[0077]
[0078] Round constant XOR: XOR the 16th to 20th bits (5 bits in total) of key1 from the least significant bit to the most significant bit with the round constant RC of the current round. i To update the key key1 using an XOR operation, the formula is as follows:
[0079]
[0080] Take the highest 16 bits of key1 after the round key expansion is performed as the subkey K1 required for the current round key addition operation. The 80-bit key1 is reserved as the key for the next round key expansion.
[0081] K1 = key1[k 79 ||k 78 ||k 77 …k 67 ||k 66 ||k 65 ]
[0082] Finally, repeat Step A2 for 16 rounds to obtain all the subkeys required for the encryption process. All the obtained subkeys are stored and used for round key addition and transformation in each round of encryption and decryption operations.
[0083] Step A3: Circularly shift pl0 left by 7 bits to obtain Z0. Z0, pr1, and the wheel constant RC of the current wheel are then compared. i Performing an XOR operation yields Z1, i.e.: Circularly shift Z1 left by 7 bits to obtain Z2. Z2, along with pl0 and the wheel constant RC of the current wheel, are then used. i Performing an XOR operation yields Z3, i.e.:
[0084] Step A4: Perform an XOR operation between Z1 and pl0, and then multiply the result by the round key K. i Performing an XOR logical operation yields W0, i.e.:
[0085] Step A5: Perform the F function operation on W0 to obtain W1. The F function includes S-box replacement and column obfuscation operations in sequence. The specific process is as follows:
[0086] S-box replacement: According to Table 1, the S-box replacement operation is performed on the result of the round key addition operation by looking up the table. This is done by:
[0087] Column confusion transformation: The column confusion transformation matrix M in the Piccolo algorithm is used, in GF(2 4 The multiplication operation is performed on the data (16 bits) obtained after the column confusion transformation matrix M and S-box substitution, where GF(2 4 Let x be an irreducible polynomial. 4 +x+1. GF(2) n () is a finite field commonly used in block ciphers, representing a field with a total of only 2^n finite fields. n The column confusion transformation matrix M is represented as follows: (Number of elements)
[0088]
[0089] Step A6: Perform an XOR operation between the transformed result from Step A5 and Pl1 and Pr0 respectively to obtain W2 and W3, that is:
[0090] Step A7: Perform a P1 permutation operation on the 64-bit data Z3||W2||W3||Z1 arranged from the most significant bit to the least significant bit, that is, swap Z3 with W2 and W3 with Z1. The result can be represented as the intermediate state G. i Among them, G i =W2||Z3||Z1||W3.
[0091] Step A8: For the obtained intermediate state G i Continue repeating Step A1-A7 for a total of 16 rounds to obtain the Ciphertext G, which is output sequentially from the most significant bit to the least significant bit. 16 .
[0092] Thus, the 64-bit plaintext has been encrypted into ciphertext using the method described above. It should be understood that in other feasible embodiments, the round key expansion operation and some steps in the encryption / decryption operations can be executed synchronously or are not entirely limited to the execution order in the above example.
[0093] It should be noted that, in addition to the encryption process, the method described in this invention also includes a decryption process. Because the subkeys generated in the 16 rounds were stored during the encryption process, decryption only requires reversing the order of the 16 subkeys (K). 16 K 15 ...K2 and K1) can be reused, that is, the key in the decryption process of rounds 1 to Nr corresponds to the key obtained in the encryption process of round Nr to 1, while using the round constants in reverse order, and adding a P2 permutation before and after performing the operation of the new FLM structure. The decryption process includes the following steps:
[0094] Step B1: Obtain the 64-bit ciphertext from the most significant bit to the least significant bit as the data to be decrypted: Ciphertext = c 63 ||c 63 …c1||c0, divide the 64-bit ciphertext into four groups, determine the number of rounds Nr as 16, and represent the current round number as i. The specific process of grouping is as follows:
[0095] The Ciphertext data to be decrypted is grouped into four groups, denoted as cl0, cl1, cr0, and cr1 respectively, specifically represented as cl0 = c 63 ||c 62 …c 49 ||c 48 cl1 = c 47 ||c 46 …c 33 ||c 32 cr0 = c 31 ||c 30 …c 17 ||c 16 cr1 = c 15 ||c 14 …c1||c0.
[0096] Step B2: Perform a P2 permutation operation on the 64-bit data arranged from the most significant bit to the least significant bit as cl0||cl1||cr0||cr1, that is, swap cl0 with cr0 and cl1 with cr1, and the resulting data is arranged from the most significant bit to the least significant bit as cr0||cr1||cl0||cl1.
[0097] Step B3: Obtain the 16-bit encryption key K stored during encryption. 16 =k 15 ||k 14 ||k 13 …k2||k1||k0, participates in the round key addition transformation in this round.
[0098] Step B4: Circularly shift cr0 left by 7 bits to obtain Z′0. Z′0, cl1, and the cyclic constant RC are then compared. i Performing an XOR operation yields Z′1, i.e.: Circularly shift Z′1 left by 7 bits to obtain Z′2. Z′2 is then compared with cr0 and the wheel constant RC. i Performing an XOR operation yields Z′3, i.e.:
[0099] Step B5: Perform an XOR operation between Z′1 and cr0, and then multiply the result by the round key K. 17-i Performing an XOR logical operation yields W′0, that is:
[0100] Step B6: Perform the F function operation on W′0 to obtain W′1. The F function includes S-box replacement and column obfuscation operations in sequence; the specific process is as follows:
[0101] S-box replacement: The S-box replacement is performed on the result of the round key addition operation by looking up a table, where the S-box replacement table is given in Table 1.
[0102] Column confusion transformation: The column confusion transformation matrix M in the Piccolo algorithm is used, in GF(2 4 The multiplication operation is performed on the data (16 bits) obtained after the column confusion transformation matrix M and S-box substitution, where GF(2 4 Let x be an irreducible polynomial. 4 +x+1. GF(2) n () is a finite field commonly used in block ciphers, representing a field with a total of only 2^n finite fields. n Each element.
[0103] Step B7: Perform an XOR operation between the transformed result from Step B6 and cr1 and cl0 respectively to obtain W′2 and W′3, i.e.:
[0104] Step B8: Perform a P1 permutation operation on the 64-bit intermediate data arranged from the most significant bit to the least significant bit as Z′3||W′2||W′3||Z′1, that is, swap Z′3 with W′2 and W′3 with Z′1 to obtain the intermediate state G′. i Arrange the data from highest to lowest digit as W′2||Z′3||Z′1||W′3, and denote the data W′2||Z′3||Z′1||W′3 as cr0||cr1||cl0||cl1.
[0105] Step B9: Repeat steps B3-B7 for the obtained intermediate state cr0||cr1||cl0||cl1. This process is repeated for a total of 15 rounds, resulting in G′. 16The 64-bit data, arranged from most significant bit to least significant bit and denoted as pr0||pr1||pl0||pl1, undergoes a P2 permutation operation, where pl0 is swapped with pr0 and pl1 with pr1. The resulting data, arranged from most significant bit to least significant bit, is pl0||pl1||pr0||pr1 and output as plaintext. In this example, the algorithm is named ASC, with a block size of 64 bits, a key length of 80 bits, and 16 rounds of iteration. The algorithm employs a novel FLM structure, and the F function includes S-box substitution and column obfuscation operations. Round key expansion includes sequentially performing cyclic shift operations on the key, S-box substitution, and round constant XOR. Since the cyclic shift module, round constant XOR module, round key addition module, and P1 and P2 permutation modules have already been described in detail, they will not be repeated here. The following provides a detailed description of each module of the F function and the S-box substitution module in round key expansion.
[0106] like Figure 2 As shown, the round key expansion includes cyclic shift, S-box substitution, and round constant XOR.
[0107] S-box replacement: This is accomplished using logical operations or table lookup. The logical operations mainly include the following steps: where a, b, c, and d represent the 4 bits of the binary number from the high bit to the low bit from 0 to 15. Each bit is replaced according to the following replacement formula to obtain a′, b′, c′, and d′, which are then rearranged and combined. The logical formula is as follows, and the S-box elements are shown in Table 1.
[0108]
[0109]
[0110]
[0111]
[0112] like Figure 4 As shown, the F function includes S-box replacement and column obfuscation operations. The S-box replacement operation in the F function is the same as the S-box replacement operation in round key expansion.
[0113] Regarding column confusion transformation: The column confusion transformation matrix M from the Piccolo algorithm is used, in GF(2... 4 The multiplication operation is performed on the data (16 bits) obtained after the column confusion transformation matrix M and S-box substitution, where GF(2 4 Let x be an irreducible polynomial. 4 +x+1. GF(2) n () is a finite field commonly used in block ciphers, representing a field with a total of only 2^n finite fields. nEach element. 16-bit data is represented in units of four bits, from most significant bit to least significant bit, as x0, x1, x2, x3. The column obfuscation transformation update formula is as follows:
[0114] (x 0(4 ), x 1(4) x 2(4) x 3(4) ) T ←M·(x 0(4) x 1(4) x 2(4) x 3(4) ) T
[0115] In summary, the main idea of this invention is to construct a novel FLM structure with high encryption and decryption consistency and high diffusion. The P1 and P2 permutations require minimal logic control resources to achieve high encryption and decryption consistency, significantly reducing the area resources required for decryption. Simultaneously, linear transformations interconnect the data in each branch, allowing all branch data to be changed in a single round, thus improving the algorithm's diffusion. Specifically, the novel FLM structure transformation employs cyclic shifts, XOR operations, and P1 permutations to ensure mutual influence among the four branch grouped data. The P1 and P2 permutations in encryption and decryption require minimal logic control resources to achieve high encryption and decryption consistency. The decryption operation adds two P2 permutations to the encryption operation, and the subkeys and round constants used in the decryption operation are in the reverse order of those used in the encryption operation. Furthermore, the S-box designed in this invention possesses excellent cryptographic properties, ensuring the algorithm's obfuscation and security. Additionally, the XOR operation of the round constants in key expansion eliminates symmetry.
[0116] test:
[0117] The method provided in this invention was tested, and the cryptographic algorithm results are shown in hexadecimal in Table 2:
[0118] Table 2 Experimental test data
[0119]
[0120]
[0121] The cryptographic algorithm described in this invention is implemented in ASIC hardware using the SMIC 0.18 synthesis library. The algorithm occupies 1469 GE of resources. Table 3 compares the ASIC hardware implementations of some typical block cipher algorithms.
[0122] The hardware resource requirements of the ASIC block cipher are described as follows: 384 GE is required to store the 64-bit plaintext in a register; 192.24 GE is required for the XOR transformation module; 98.72 GE is required for the S-box replacement module; 104 GE is required for the column confusion transformation module; and 85.44 GE is required for the round key addition transformation module. The hardware implementation of the P1 and P2 permutation modules is achieved through wired operations, thus requiring no hardware resources. The specific resource requirements of each component in the key expansion module are described as follows: 480 GE is required to store the 80-bit key in a register; 74.04 GE is required for the S-box replacement module; and 13.5 GE is required for the round counter XOR module. In the algorithm implementation, the control logic unit and the counter together require 37 GE. The total hardware resources required by the algorithm are 1468.9 GE. Table 3 lists the ASIC implementations of various block cipher algorithms.
[0123] Table 3 ASIC Implementations of Various Block Cipher Algorithms
[0124]
[0125] The data comparison in Table 3 shows that ASC occupies relatively less space and resources compared to current block ciphers.
[0126] Example 2:
[0127] This embodiment provides a system for implementing a block cipher algorithm based on a novel FLM structure, which includes: a setup module, a plaintext or ciphertext processing module, a round key expansion module, and an encryption / decryption module.
[0128] The module includes a setting module for setting an initial key Key and determining the maximum number of rounds Nr; a plaintext or ciphertext processing module for obtaining plaintext or ciphertext and dividing it into four branches; a round key expansion module for performing round key expansion operations based on the initial key Key to obtain a subkey for each round of encryption or decryption operations; and an encryption / decryption module for performing Nr encryption or decryption operations on the plaintext or ciphertext using the subkeys based on a novel FLM structure to obtain ciphertext or plaintext.
[0129] Furthermore, the encryption / decryption module includes at least: a cyclic shift transformation unit, a round constant XOR unit, a round key addition transformation unit, an F function execution unit, and a P1 permutation unit.
[0130] In the case of encryption operations, the cyclic shift transformation unit, the round constant XOR unit, the round key addition transformation unit, the F function execution unit, and the P1 permutation unit perform cyclic shift transformation, round constant XOR, round key addition transformation, F function, and P1 permutation on the plaintext respectively.
[0131] For decryption operations, the encryption / decryption module further includes a P2 permutation unit, a cyclic shift transformation unit, a round constant XOR unit, a round key addition transformation unit, an F function execution unit, and a P1 permutation unit, which respectively perform P2 permutation, cyclic shift transformation, round constant XOR, round key addition transformation, F function, and P1 permutation on the ciphertext. The difference between the decryption operation and the encryption operation is that the decryption operation adds two P2 permutations to the encryption operation, and the subkey and round constant used in the decryption operation are in the reverse order compared to the encryption operation.
[0132] It should be understood that the implementation process of each module can be referred to the content described in the aforementioned method. The above division of functional modules is only a logical functional division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. At the same time, the above-mentioned integrated units can be implemented in the form of hardware or software functional units.
[0133] Example 3:
[0134] This embodiment provides an electronic terminal, comprising at least: one or more processors; and a memory storing one or more computer programs; wherein the processor calls the computer programs to execute: the steps of a method for implementing a block cipher algorithm with a novel FLM structure.
[0135] When applying encryption, the specific steps are as follows:
[0136] Step A1: Obtain 64 bits of plaintext from the most significant bit to the least significant bit as the data to be encrypted. Plaintext = p 63 ||p 63 …p1||p0, divide the 64-bit plaintext into four groups, determine the maximum number of rounds Nr as 16, and represent the current round number as i.
[0137] Step A2: Set the 80-bit initial key Key = k 79 ||k 78 …k1||k0, performs round key expansion operations on the 80-bit key Key, including cyclic shift, S-box replacement, and round constant XOR. Step A2 is repeated for 16 rounds to finally obtain all the subkeys required for the encryption process.
[0138] Step A3: Circularly shift pl0 left by 7 bits to obtain Z0. Z0, pt1, and the wheel constant RC of the current wheel are then compared. i Performing an XOR operation yields Z1, i.e.: Circularly shift Z1 left by 7 bits to obtain Z2. Z2, along with pl0 and the wheel constant RC of the current wheel, are then used. i Performing an XOR operation yields Z3, i.e.:
[0139] Step A4: Perform an XOR operation between Z1 and pl0, and then multiply the result by the round key K. i Performing an XOR logical operation yields W0, i.e.:
[0140] Step A5: Perform the F function operation on W0 to obtain W1.
[0141] Step A6: Perform an XOR operation between the transformed result from Step A5 and Pl1 and Pr0 respectively to obtain W2 and W3, that is:
[0142] Step A7: Perform a P1 permutation operation on the 64-bit data Z3||W2||W3||Z1 arranged from the most significant bit to the least significant bit, that is, swap Z3 with W2 and W3 with Z1. The result can be represented as the intermediate state G. i G i =W2||Z3||Z1||W3.
[0143] Step A8: For the obtained intermediate state G i Continue repeating steps A1-A7. This process is repeated 16 times, resulting in the Ciphertext G output sequentially from most significant bit to least significant bit. 16 .
[0144] When applied to decryption, the following steps are executed:
[0145] Step B1: Obtain the 64-bit ciphertext from the most significant bit to the least significant bit as the data to be decrypted: Ciphertext = c 63 ||c 63 …c1||c0, divide the 64-bit ciphertext into four groups, determine the number of rounds Nr as 16, and represent the current round number as i.
[0146] Step B2: Perform a P2 permutation operation on the 64-bit data arranged from the most significant bit to the least significant bit as cl0||cl1||cr0||cr1, that is, swap cl0 with cr0 and cl1 with cr1, and the resulting data is arranged from the most significant bit to the least significant bit as cr0||cr1||cl0||cl1.
[0147] Step B3: Obtain the 16-bit encryption key K stored during encryption. 16 =k 15 ||k 14 ||k 13 …k2||k1||k0, participates in the round key addition transformation in this round.
[0148] Step B4: Circularly shift cr0 left by 7 bits to obtain Z′0. Z′0, cl1, and the cyclic constant RC are then compared. i Performing an XOR operation yields Z′1, i.e.: Circularly shift Z′1 left by 7 bits to obtain Z′2. Z′2 is then compared with cr0 and the wheel constant RC. i Performing an XOR operation yields Z′3, i.e.:
[0149] Step B5: Perform an XOR operation between Z′1 and cr0, and then multiply the result by the round key K. 17-i Performing an XOR logical operation yields W′0, that is:
[0150] Step B6: Perform the F function operation on W′0 to obtain W′1.
[0151] Step B7: Perform an XOR operation between the transformed result from Step B6 and cr1 and cl0 respectively to obtain W′2 and W′3, i.e.:
[0152] Step B8: Perform a P1 permutation operation on the 64-bit intermediate data arranged from the most significant bit to the least significant bit as Z′3||W′2||W′3||Z′1, that is, swap Z′3 with W′2 and W′3 with Z′1 to obtain the intermediate state G′. i Arrange the data from highest to lowest digit as W′2||Z′3||Z′1||W′3, and denote the data W′2||Z′3||Z′1||W′3 as cr0||cr1||cl0||cl1.
[0153] Step B9: Repeat steps B3-B7 for the obtained intermediate state cr0||cr1||cl0||cl1. This process is repeated for a total of 15 rounds, resulting in G′. 16 The 64-bit data, arranged from most significant bit to least significant bit and denoted as pr0||pr1||pl0||pl1, undergoes a P2 permutation operation, where pl0 is swapped with pr0 and pl1 with pr1. The resulting data, arranged from most significant bit to least significant bit as pl0||pl1||pr0||pr1, is then output as plaintext (Plantertext). For the detailed implementation of each step, please refer to the description of the method above.
[0154] The memory may include high-speed RAM, and may also include a non-volatile defibrillator, such as at least one disk storage device.
[0155] If the memory and processor are implemented independently, they can be interconnected via a bus to communicate with each other. This bus can be an industry-standard architecture bus, an external device interconnect bus, or an extended industry-standard architecture bus, etc. The bus can be categorized as an address bus, data bus, control bus, etc.
[0156] Optionally, in a specific implementation, if the memory and processor are integrated on a single chip, the memory and processor can communicate with each other through an internal interface.
[0157] It should be understood that, in the embodiments of the present invention, the processor may be a Central Processing Unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor. The memory may include read-only memory and random access memory, and provides instructions and data to the processor. A portion of the memory may also include non-volatile random access memory. For example, the memory may also store device type information.
[0158] Example 4:
[0159] This embodiment provides a computer-readable storage medium storing a computer program that is invoked by a processor to execute the steps of a method for implementing a block cipher algorithm with a novel FLM structure.
[0160] When applying encryption, the specific steps are as follows:
[0161] Step A1: Obtain 64 bits of plaintext from the most significant bit to the least significant bit as the data to be encrypted. Plaintext = p 63 ||p 63 …p1||p0, divide the 64-bit plaintext into four groups, determine the maximum number of rounds Nr as 16, and represent the current round number as i.
[0162] Step A2: Set the initial 80-bit key Key = k 79 ||k 78…k1||k0, performs round key expansion operations on the 80-bit key Key, including cyclic shift, S-box replacement, and round constant XOR. Step A2 is repeated for 16 rounds to finally obtain all the subkeys required for the encryption process.
[0163] Step A3: Circularly shift pl0 left by 7 bits to obtain Z0. Z0, pr1, and the wheel constant RC of the current wheel are then compared. i Performing an XOR operation yields Z1, i.e.: Circularly shift Z1 left by 7 bits to obtain Z2. Z2, along with pl0 and the wheel constant RC of the current wheel, are then used. i Performing an XOR operation yields Z3, i.e.:
[0164] Step A4: Perform an XOR operation between Z1 and pl0, and then multiply the result by the round key K. i Performing an XOR logical operation yields W0, i.e.:
[0165] Step A5: Perform the F function operation on W0 to obtain W1.
[0166] Step A6: Perform an XOR operation between the transformed result from Step A5 and Pl1 and Pr0 respectively to obtain W2 and W3, that is:
[0167] Step A7: Perform a P1 permutation operation on the 64-bit data Z3||W2||W3||Z1 arranged from the most significant bit to the least significant bit, that is, swap Z3 with W2 and W3 with Z1. The result can be represented as the intermediate state G. i G i =W2||Z3||Z1||W3.
[0168] Step A8: For the obtained intermediate state G i Continue repeating steps A1-A7. This process is repeated 16 times, resulting in the Ciphertext G output sequentially from most significant bit to least significant bit. 16 .
[0169] When applied to decryption, the following steps are executed:
[0170] Step B1: Obtain the 64-bit ciphertext from the most significant bit to the least significant bit as the data to be decrypted: Ciphertext = c 63 ||c 63 …c1||c0, divide the 64-bit ciphertext into four groups, determine the number of rounds Nr as 16, and represent the current round number as i.
[0171] Step B2: Perform a P2 permutation operation on the 64-bit data arranged from the most significant bit to the least significant bit as cl0||cl1||cr0||cr1, that is, swap cl0 with cr0 and cl1 with cr1, and the resulting data is arranged from the most significant bit to the least significant bit as cr0||cr1||cl0||cl1.
[0172] Step B3: Obtain the 16-bit encryption key K stored during encryption. 16 =k 15 ||k 14 ||k 13 …k2||k1||k0, participates in the round key addition transformation in this round.
[0173] Step B4: Circularly shift cr0 left by 7 bits to obtain Z′0. Z′0, cl1, and the cyclic constant RC are then compared. i Performing an XOR operation yields Z′1, i.e.: Circularly shift Z′1 left by 7 bits to obtain Z′2. Z′2 is then compared with cr0 and the wheel constant RC. i Performing an XOR operation yields Z′3, i.e.:
[0174] Step B5: Perform an XOR operation between Z′1 and cr0, and then multiply the result by the round key K. 17-i Performing an XOR logical operation yields W′0, that is:
[0175] Step B6: Perform the F function operation on W′0 to obtain W′1.
[0176] Step B7: Perform an XOR operation between the transformed result from Step B6 and cr1 and cl0 respectively to obtain W′2 and W′3, i.e.:
[0177] Step B8: Perform a P1 permutation operation on the 64-bit intermediate data arranged from the most significant bit to the least significant bit as Z′3||W′2||W′3||Z′1, that is, swap Z′3 with W′2 and W′3 with Z′1 to obtain the intermediate state G′. i Arrange the data from highest to lowest digit as W′2||Z′3||Z′1||W′3, and denote the data W′2||Z′3||Z′1||W′3 as cr0||cr1||cl0||cl1.
[0178] Step B9: Repeat steps B3-B7 for the obtained intermediate state cr0||cr1||cl0||cl1. This process is repeated for a total of 15 rounds, resulting in G′. 16The 64-bit data, arranged from most significant bit to least significant bit and denoted as pr0||pr1||pl0||pl1, undergoes a P2 permutation operation, where pl0 is swapped with pr0 and pl1 with pr1. The resulting data, arranged from most significant bit to least significant bit as pl0||pl1||pr0||pr1, is then output as plaintext (Plantertext). For the detailed implementation of each step, please refer to the description of the method above.
[0179] The readable storage medium is a computer-readable storage medium, which can be an internal storage unit of the controller described in any of the foregoing embodiments, such as the controller's hard drive or memory. The readable storage medium can also be an external storage device of the controller, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the controller. Further, the readable storage medium can include both the controller's internal storage unit and external storage devices. The readable storage medium is used to store the computer program and other programs and data required by the controller. The readable storage medium can also be used to temporarily store data that has been output or will be output.
[0180] Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0181] It should be emphasized that the examples described in this invention are illustrative rather than limiting. Therefore, this invention is not limited to the examples described in the specific embodiments. Any other embodiments derived by those skilled in the art based on the technical solutions of this invention, without departing from the spirit and scope of this invention, whether modifications or substitutions, are also within the protection scope of this invention.
Claims
1. A novel block cipher algorithm implementation method based on the FLM structure, characterized in that: Includes the following steps: Set the initial key (Key) and determine the maximum number of rounds. ; Obtain plaintext or ciphertext, and divide the plaintext or ciphertext into four branches; Based on the initial key Key, a round key expansion operation is performed to obtain the subkey for each round of encryption or decryption operation; Based on a novel FLM structure, and utilizing the subkey to perform operations on the plaintext or the ciphertext. Encryption or decryption operations are performed to obtain ciphertext or plaintext. If it is an encrypted operation, it is performed on the plaintext. The novel FLM structure encryption operation includes cyclic shift transformation, round constant XOR, round key addition transformation, F-function, and so on. Displacement; If it is a decryption operation, then perform the operation on the ciphertext. The new FLM structure decryption operation is performed in round 1, and before the first round of decryption operation and the second round of decryption operation... All operations are executed after the round decryption operation. Permutation, the first to the second permutation in the decryption operation The subkey and round constant of the new FLM structure decryption operation are related to the first round. The subkeys and round constants in the first round of the novel FLM structure encryption operation are in one-to-one correspondence, wherein, the Substitution is based on Design of branch replacement rules during the replacement process.
2. The method according to claim 1, characterized in that: Replacement and The rules for substitution are as follows: Replacement If 64-bit intermediate data conduct The result is arranged from the most significant digit to the least significant digit. 64-bit data; Permutation: If the 64-bit intermediate data is arranged from the most significant bit to the least significant bit as follows: conduct Permutation yields the following arrangement from most significant digit to least significant digit: 64-bit data.
3. The method according to claim 1, characterized in that: The plaintext is 64 bits long, and the execution process of the encryption operation of the novel FLM structure is as follows: B1: Divide the 64-bit plaintext into four parts from the most significant bit to the least significant bit. , , , , , , , ; where || represents the string concatenation operator, This represents the data at position i in the plaintext; B2: Will Circular left shift by 7 bits to obtain Then and and the wheel constant of the current wheel Performing an XOR operation yields , ; B3: Will Circular left shift by 7 bits to obtain Then and and the wheel constant of the current wheel Performing an XOR operation yields , ; B4: Will and Perform an XOR operation, and then multiply the result by the subkey. Perform an XOR logical operation to obtain , ; B5: Will Performing the F function operation yields Then respectively with and Perform an XOR logical operation to obtain and , , ; B6: Arrange the 64-bit intermediate data from most significant bit to least significant bit. And then implement Displacement.
4. The method according to claim 3, characterized in that: The F function operation includes S-box replacement and column obfuscation operations, wherein, in step B5, the following will be performed: Performing the F function operation yields The process is as follows: First of all Perform S-box replacement operation to obtain ; Again Perform column obfuscation operation to obtain .
5. The method according to claim 4, characterized in that: The execution process of the column obfuscation operation is as follows: The column confusion transformation matrix M in the Piccolo algorithm is selected as follows: ; Then in GF(2) 4 The data obtained after performing the column confusion transformation matrix M and S-box replacement on the above. Perform multiplication, where GF(2 4 Let be a finite field, indicating that the finite field contains only 2^n elements. 4 Each element.
6. The method according to claim 1, characterized in that: The round key expansion operation includes cyclic shift, S-box replacement, and round constant XOR; The execution process of the round key expansion operation in each round is as follows: C1: Circularly shift the 80-bit key from the previous round's expanded key to the left by 61 bits, where the 80-bit key from the first round's expanded key operation is the initial key Key; C2: Perform an S-box replacement operation on the highest 4 bits of the data obtained in step C1 to update the key; C3: Perform an XOR operation on the 5 bits from the 16th to the 20th bit of the key obtained in step C2, from the least significant bit to the most significant bit, with the current round number; C4: After step C3, a new 80-bit key is obtained as the input for the next round key expansion operation, and the highest 16 bits of the data are taken as the subkey used in the current round.
7. The method according to claim 4 or 6, characterized in that: The replacement rules for the S-box are as follows: x:{0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F}, S[x]:{E,F,C,8,4,3,7,2,D,5,9,1,0,B,6,A}; Where x and S[x] are the data before and after the S-box replacement, respectively.
8. A system based on the method of any one of claims 1-7, characterized in that: include: The setup module is used to set the initial key (Key) and determine the maximum number of rounds. ; A plaintext or ciphertext processing module is used to acquire plaintext or ciphertext and divide the plaintext or ciphertext into four branches; The round key expansion module is used to perform round key expansion operations based on the initial key Key to obtain the subkey for each round of encryption or decryption operations; An encryption / decryption module is used to perform encryption / decryption on the plaintext or the ciphertext based on a novel FLM structure and utilizing the subkey. Encryption or decryption operations are performed to obtain ciphertext or plaintext. In the case of encryption operations, each round of encryption involves performing a novel FLM (Fluorescent Least Mesh) encryption operation on the plaintext. This novel FLM encryption operation includes cyclic shift transformation, round constant XOR, round key addition transformation, and the F-function. Displacement; If it is an encrypted operation, it is performed on the plaintext. The novel FLM structure encryption operation includes cyclic shift transformation, round constant XOR, round key addition transformation, F-function, and so on. Displacement; If it is a decryption operation, then perform the operation on the ciphertext. The new FLM structure decryption operation is performed in round 1, and before the first round of decryption operation and the second round of decryption operation... All operations are executed after the round decryption operation. Permutation, the first to the second permutation in the decryption operation The subkey and round constant of the new FLM structure decryption operation are related to the first round. The subkeys and round constants of the first round of the novel FLM structure encryption operation are in one-to-one correspondence.
9. An electronic terminal, characterized in that: At least include: One or more processors; And a memory that stores one or more computer programs; The processor invokes the computer program to execute: The steps of the method according to any one of claims 1-7.
10. A computer-readable storage medium, characterized in that: The computer program is stored and is invoked by the processor for execution. The steps of the method according to any one of claims 1-7.