A display panel and display device

Abstract

This invention discloses a display panel and a display device. The display panel includes an irregularly shaped display area and a peripheral area surrounding the irregularly shaped display area. The peripheral area includes a scanning driving circuit. The scanning driving circuit includes multiple cascaded scanning driving units. The scanning driving circuit is divided into at least two regions, each region including multiple scanning driving units. The ratio of the length to the width in a first direction of the scanning driving units belonging to different regions is different, and the second direction is orthogonal to the first direction. Each scanning driving unit includes a transistor and a capacitor. The transistors and capacitors contained in the scanning driving units within the same region are arranged in the same way, while the transistors and capacitors contained in the scanning driving units in different regions are arranged in different ways. This invention uses a partitioned design for the scanning driving circuit, which can meet the design requirements of narrow-bezel display panels.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Gate Driver on Array (GOA) technology integrates the gate switching circuit of Thin Film Transistor (TFT) onto the array substrate of the display panel to achieve scanning drive of the display panel. This eliminates the wiring space of the bonding area and fan-out area of ​​the integrated circuit (IC), which is beneficial for narrowing the bezel of display products. However, in irregularly shaped display products, the fan-out area of ​​the data driving circuit will occupy part of the side bezel of the product, resulting in the compression of the space of the scanning driving circuit. To meet the design requirements of narrow bezels, the scanning driving circuit needs to be adapted. Summary of the Invention

[0003] This invention provides a display panel and display device for realizing a narrow bezel design in display products.

[0004] The present invention provides a display panel, comprising: an irregularly shaped display area and a peripheral area surrounding the irregularly shaped display area;

[0005] The peripheral area includes a scan driving circuit; the scan driving circuit includes multiple cascaded scan driving units;

[0006] The scanning drive circuit is divided into at least two regions, and each region includes a plurality of scanning drive units; the ratio of the length of the scanning drive units belonging to different regions to the width in the first direction is different, and the second direction is orthogonal to the first direction;

[0007] Each of the scan driving units includes a transistor and a capacitor. The transistors and capacitors contained in each scan driving unit within the same region are arranged in the same way, while the transistors and capacitors contained in each scan driving unit in different regions are arranged in different ways.

[0008] In some embodiments of the present invention, the irregular display area is circular in shape; the peripheral area further includes fan-out area traces, which are located between the scanning drive circuit and the irregular display area;

[0009] The scanning driving circuit includes a first region, a second region, and a third region arranged sequentially adjacent to each other; the first region is adjacent to the irregular display area, a portion of the fan-out area traces are provided between the second region and the irregular display area, and another portion of the fan-out area traces are provided between the third region and the irregular display area.

[0010] In some embodiments of the present invention, the ratio of the length of the scanning driving unit in the first direction to the width in the second direction of the first region is a first ratio.

[0011] The ratio of the length of the scanning driving unit in the second region in the first direction to its width in the second direction is a second ratio.

[0012] The ratio of the length of the scanning driving unit in the third region in the first direction to its width in the second direction is a third ratio.

[0013] The third ratio is greater than the first ratio, and the first ratio is greater than the second ratio.

[0014] In some embodiments of the present invention, the scan driving unit includes an output transistor and a capacitor; the capacitor is disposed adjacent to the output transistor and is connected to the gate and the first electrode of the output transistor; the arrangement of the output transistor and the capacitor of each scan driving unit in different regions is different.

[0015] In some embodiments of the present invention, in each scan driving unit of the first region, the output transistor and the capacitor are arranged side by side in the first direction;

[0016] Within each scan driving unit in the second region, a portion of the capacitor is located on one side of the output transistor in the first direction, and another portion of the capacitor is located on one side of the output transistor in the second direction.

[0017] In each scan driving unit of the third region, the output transistor and the capacitor are arranged side by side in the second direction.

[0018] In some embodiments of the present invention, the scanning driving unit further includes a charging transistor and a discharging transistor;

[0019] In each scan driving unit of the first region, the charging transistor and the discharging transistor are staggered in both the first direction and the second direction;

[0020] Within each scan driving unit in the second region, the charging transistor and the discharging transistor are arranged side by side in the second direction;

[0021] Within each scan drive unit of the third region, the charging transistor and the discharging transistor are arranged side by side in the first direction.

[0022] In some embodiments of the present invention, the peripheral area further includes a common potential signal circuit; the common potential signal circuit is disposed around the irregular display area and located between the scanning drive circuit and the fan-out area trace.

[0023] In some embodiments of the present invention, the peripheral area further includes an encapsulation layer, the encapsulation layer being located on the side of the scanning driving circuit away from the irregular display area, and the distance between the cutting edge of the peripheral area and the side of the encapsulation layer away from the scanning driving circuit is less than 10 μm.

[0024] In some embodiments of the present invention, the scanning drive circuit includes a plurality of stacked metal layers, and the patterns of the different metal layers are connected by a single via.

[0025] Another aspect of the present invention provides a display device comprising any of the above-described display panels.

[0026] The beneficial effects of this invention are as follows:

[0027] This invention provides a display panel and a display device. The display panel includes an irregularly shaped display area and a peripheral area surrounding the irregularly shaped display area. The peripheral area includes a scanning driving circuit. The scanning driving circuit includes multiple cascaded scanning driving units. The scanning driving circuit is divided into at least two regions, each region including multiple scanning driving units. The ratio of the length to the width in a first direction of the scanning driving units belonging to different regions is different, and the second direction is orthogonal to the first direction. Each scanning driving unit includes a transistor and a capacitor. The transistors and capacitors in the scanning driving units within the same region are arranged in the same way, while the transistors and capacitors in the scanning driving units in different regions are arranged in different ways. This invention uses a partitioned design for the scanning driving circuit, which can meet the design requirements of narrow-bezel display panels. Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0030] Figure 2 A circuit diagram of a scanning drive unit provided in an embodiment of the present invention;

[0031] Figure 3 This is one of the structural schematic diagrams of the scanning driving unit provided in an embodiment of the present invention;

[0032] Figure 4 This is a second schematic diagram of the structure of the scanning drive unit provided in an embodiment of the present invention;

[0033] Figure 5 This is the third schematic diagram of the structure of the scanning driving unit provided in the embodiment of the present invention;

[0034] Figure 6 This is the fourth schematic diagram of the structure of the scanning driving unit provided in the embodiment of the present invention;

[0035] Figure 7 This is a partial enlarged view of the display panel provided in an embodiment of the present invention;

[0036] Figure 8 This is a schematic diagram of a via in a display panel in related technologies;

[0037] Figure 9 This is a schematic diagram of a via in a display panel provided in an embodiment of the present invention;

[0038] Figure 10 for Figure 9 Cross-sectional view in the C-C' direction. Detailed Implementation

[0039] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, the present invention will be further described below in conjunction with the accompanying drawings and embodiments. However, the exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make the present invention more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the figures denote the same or similar structures, and therefore repeated descriptions of them will be omitted. Terms describing position and direction in the present invention are illustrative based on the accompanying drawings, but changes can be made as needed, and all such changes are included within the scope of protection of the present invention. The accompanying drawings of the present invention are for illustrative purposes only and do not represent actual proportions.

[0040] Liquid Crystal Displays (LCDs) are driven using a progressive scan method. Traditional LCD devices require external control components to send control signals. The LCD device incorporates scan drive circuits and data drive circuits to drive each display pixel on the panel. This necessitates reserving space around the LCD bezel for the fan-out traces of the drive circuits and for bonding the control components. GOA (Gate-of-Availability) technology integrates the TFT gate switching circuitry onto the array substrate of the display panel to achieve scan drive. This eliminates the need for bonding areas and fan-out wiring in the scan drive circuitry, allowing for narrower bezels. However, in irregularly shaped displays, the fan-out area of ​​the data drive circuitry occupies part of the side bezel, further compressing the space available for the scan drive circuitry. To meet the design requirements of narrow bezels, the scan drive circuitry needs to be adapted for this purpose.

[0041] In view of this, embodiments of the present invention provide a display panel that can achieve a narrow bezel design.

[0042] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention.

[0043] like Figure 1 As shown, the display panel includes an irregularly shaped display area AA and a peripheral area AA' surrounding the irregularly shaped display area AA. The area between the edge of the irregularly shaped display area AA and the edge of the peripheral area AA' is the border area of ​​the display panel. When the width of the border area is less than 1mm, it can be considered to meet the requirements of narrow-bezel products.

[0044] In this embodiment of the invention, the display panel uses GOA technology to integrate the scanning drive circuit 100 into the peripheral area AA' of the display panel. The scanning drive circuit 100 includes multiple cascaded scanning drive units, which are used to provide row scanning signals for the pixels in the irregular display area AA. This can save the wiring space of the bonding area and fan-out area of ​​the scanning drive circuit 100 and narrow the bezel of the display product.

[0045] Since the peripheral area AA' also requires additional wiring, the width of the space available for the scanning drive circuit 100 between the edge of the peripheral area AA' and the edge of the display area varies in different areas. Therefore, to adapt the scanning drive circuit 100 to the narrow bezel requirements of the display panel, in this embodiment of the invention, the scanning drive circuit 100 can be divided into at least two areas, and the scanning drive units in different areas are designed separately. Each area of ​​the scanning drive circuit 100 includes multiple scanning drive units. The ratio of the length of the scanning drive units in the first direction X to the width in the second direction Y is different in different areas, wherein the second direction Y is orthogonal to the first direction X. Each scanning drive unit includes a transistor and a capacitor. The transistors and capacitors contained in the scanning drive units in the same area are arranged in the same way, while the transistors and capacitors contained in the scanning drive units in different areas are arranged in different ways.

[0046] This invention describes the partitioning design principle of the scanning drive circuit 100 in an irregularly shaped display panel with the irregularly shaped display area AA being circular. In specific implementation, the partitioning design concept described below can also be used to adapt the scanning drive circuit 100 to R-corner display panels or other irregularly shaped display panels that require narrow bezels.

[0047] like Figure 1 As shown, for a display panel with a circular display area, the peripheral area AA' of the display panel also includes a fan-out area trace 200. The fan-out area trace 200 is located between the scan drive circuit 100 and the irregular display area AA, and is usually set in the lower 1 / 4 area of ​​the circular display panel. It can be used to take the data drive circuit in the display panel to the bonding area to connect to the external control element.

[0048] The peripheral area AA' of the display panel also includes a common potential signal circuit 300. The common potential signal circuit 300 is arranged around the irregularly shaped display area AA and is located between the scan drive circuit 100 and the fan-out area trace 200. Its shape is adapted to the shape of the side of the scan drive circuit 100 near the display area.

[0049] The space between the edge of the peripheral area AA' and the common potential signal circuit 300 can be used to set up the scanning drive circuit 100. In this embodiment of the invention, the scanning drive circuit 100 of the circular display panel may include a first area Q1, a second area Q2 and a third area Q3 arranged in sequence. In order to meet the narrow bezel design requirements, the space available for setting up the scanning drive circuit 100 in the three areas is different in size, so the ratio of the length of the scanning drive unit in the first direction X and the width in the second direction Y in each area is different.

[0050] Specifically, the first region Q1 is adjacent to the irregular display area AA. The space of the scan driving circuit 100 in this region is relatively ample. The width y1 of each scan driving unit in the second direction Y can be set to be the same as the width of the pixel in the display area in the second direction Y.

[0051] A fan-out area trace 200 is provided between the second region Q2 and the irregular display area AA. The space of the scan drive circuit 100 in this region is narrower than that in the first region Q1. Therefore, the length x2 of each scan drive unit in the second region Q2 in the first direction X is shorter than the length x1 of the scan drive unit in the first region Q1 in the first direction X. Since each scan drive unit occupies the same space, the width y2 of each scan drive unit in the second region Q2 in the second direction Y is set to be shorter than the width y1 of the scan drive unit in the first region Q1 in the second direction Y.

[0052] Another fan-out area trace 200 is provided between the third region Q3 and the irregular display area AA. The space for the scan drive circuit 100 in this region is wider than that in the second region Q2. Therefore, the length x3 of each scan drive unit in the third region Q3 in the first direction X is longer than the length x2 of the scan drive unit in the second region Q2 in the first direction X. Correspondingly, the width y3 of each scan drive unit in the third region Q3 in the second direction Y is set to be shorter than the width y2 of the scan drive unit in the second direction Y in the second region Q2. Furthermore, the last stage of the scan drive unit in the third region Q3 can be flush with the last stage of the pixels in the display area to avoid affecting the design of other parts of the display panel.

[0053] In this embodiment of the invention, the ratio of the length x1 of the scanning driving unit in the first region Q1 in the first direction X to the width y1 in the second direction Y is a first ratio; the ratio of the length x2 of the scanning driving unit in the second region Q2 in the first direction X to the width y2 in the second direction Y is a second ratio; the ratio of the length x3 of the scanning driving unit in the third region Q3 in the first direction X to the width y3 in the second direction Y is a third ratio; the third ratio x3 / y3 is greater than the first ratio x1 / y1, and the first ratio x1 / y1 is greater than the second ratio x2 / y2, so that the length and width of the scanning driving circuit 100 in each region can be adapted to the available space in each region, realizing a narrow bezel design.

[0054] Figure 2 The circuit diagram of the scanning driving unit provided in the embodiment of the present invention.

[0055] This embodiment of the invention is illustrated using an 8T1C pixel circuit as an example for each scanning driving unit. Figure 2As shown, in the scan drive unit, the input signal terminal (Input) is connected to the gate of the first transistor M1, the output signal terminal (Output) is connected to the first terminal of the third transistor M3, the reset signal terminal (Reset) is connected to the gate of the second transistor M2, the first clock signal terminal (CLK) is connected to the second terminal of the third transistor M3, the second clock signal terminal (CLK_B) is connected to the gate of the sixth transistor M6, and the low-level signal terminal (VGL) is connected to the first terminals of the second transistor M2, the seventh transistor M7, the fifth transistor M5, the eighth transistor M8, and the fourth transistor M4, respectively. A capacitor C is connected between the gate and the first terminal of the third transistor M3. The first clock signal terminal (CLK) and the second clock signal terminal (CLK_B) are used to output voltage signals with opposite phases according to the timing. The specific timing drive method can be adjusted according to the actual application and is not limited here. The first and second terminals of each transistor can be determined as source or drain according to the actual application and are not limited here.

[0056] In such Figure 2 In the 8T1C circuit shown, the first transistor M1 can be used to precharge the PU point when the Input is pulled high, and the PU point is the pull-up node of the output signal; the second transistor M2 can be used to discharge the PU point; the third transistor M3 can be used to charge and discharge the Output and for PU bootstrapping (hereinafter referred to as the output transistor M3); the fourth transistor M4 can be used to reduce noise on the Output; the fifth transistor M5 can be used to discharge the PD point (hereinafter referred to as the discharge transistor M5); the sixth transistor M6 can be used to charge the PD point (hereinafter referred to as the charging transistor M6), and the PD point is the pull-down point of the output signal; the seventh transistor M7 can be used to release excess noise signals on the PU point; the eighth transistor M8 can be used to release excess noise signals on the Output; and the capacitor C can be used for PU bootstrapping and to reduce noise at the PU point.

[0057] Figure 3 This is one of the structural schematic diagrams of the scanning driving unit provided in an embodiment of the present invention; Figure 4 This is a second schematic diagram of the structure of the scanning drive unit provided in an embodiment of the present invention; Figure 5 This is the third schematic diagram of the scanning drive unit provided in an embodiment of the present invention.

[0058] like Figure 3 , Figure 4 and Figure 5 As shown, in the scan driving unit 110, the capacitor C is arranged adjacent to the output transistor M3, and the capacitor C is connected to the gate and the first electrode of the output transistor M3. The arrangement of the output transistor M3 and the capacitor C in each scan driving unit 110 in different regions is different.

[0059] like Figure 3 As shown, the space of the scan drive circuit 100 in the first region Q1 is relatively ample. Therefore, in each scan drive unit 110 of the first region Q1, the output transistor M3 and the capacitor C can be arranged side by side in the first direction X, and the charging transistor M6 and the discharging transistor M5 can be staggered in both the first direction X and the second direction Y.

[0060] like Figure 4 As shown, the space of the scan drive circuit 100 in the second region Q2 is narrower than that in the first region Q1. Therefore, in each scan drive unit 110 of the second region Q2, part of the capacitor C can be located on one side of the output transistor M3 in the first direction X, and another part of the capacitor C can be located on one side of the output transistor M3 in the second direction Y. The charging transistor M6 and the discharging transistor M5 can be arranged side by side in the second direction Y.

[0061] In addition, compared to Figure 3 Within each scan driving unit 110 of the second region Q2, the relative positions of the first transistor M1, the second transistor M2, the fourth transistor M4, the seventh transistor M7, and the eighth transistor M8 can remain unchanged. The two vias adjacent to the seventh transistor M7 can be adjusted from being arranged along the first direction X to being arranged along the second direction Y. The via between the capacitor C and the first transistor M1 can be adjusted to be between the fourth transistor M4 and the capacitor C. This allows the scan driving unit 110 in the second region Q2 to have a larger width in the second direction Y and a smaller length in the first direction X, thus meeting the design requirements of a narrow bezel display panel.

[0062] like Figure 5 As shown, the space of the scan drive circuit 100 in the third region Q3 can be wider than that in the second region Q2. In each scan drive unit 110 of the third region Q3, the output transistor M3 and the capacitor C can be arranged side by side in the second direction Y, and the charging transistor M6 and the discharging transistor M5 can be arranged side by side in the first direction X.

[0063] In addition, compared to Figure 4Within each scan driving unit 110 in the third region Q3, the charging transistor M6, discharging transistor M5, seventh transistor M7, eighth transistor M8, and fourth transistor M4 can be arranged sequentially along the first direction X and located on one side of the output transistor M3 and capacitor C. The first transistor M1 and second transistor M2 can be arranged along the first direction X and located on the other side of the output transistor M3 and capacitor C. The two vias adjacent to the seventh transistor M7 are adjusted to be arranged along the first direction X. The two vias between capacitor C and the first transistor M1 are adjusted from being arranged along the second direction Y to being arranged along the first direction X. Thus, the scan driving unit 110 in the third region Q3 can have a smaller width in the second direction Y and a larger length in the first direction X, meeting the design requirements of a narrow bezel display panel.

[0064] This embodiment of the invention only illustrates the case of adjusting the shape of capacitor C in the scan driving unit 110. It is understood that, based on the inventive concept of this invention, the shape of at least one transistor or capacitor in the scan driving unit can also be adjusted according to actual needs, and the relative positions between transistors and between transistors and capacitors can also be adjusted. This embodiment of the invention does not limit the scope of the invention. Furthermore, this inventive concept can also be applied to scan driving units employing other pixel circuit structures, such as 11T1C circuits, 17T1C circuits, etc., so that the arrangement of transistors and capacitors adapts to the length and width of the scan driving unit in each region. This embodiment of the invention does not limit the scope of the invention.

[0065] Figure 6 The fourth schematic diagram of the scanning drive unit provided in the embodiment of the present invention.

[0066] Figure 6 As shown Figure 3 The pattern of each film layer in the 8T1C scanning drive unit shown includes a first conductive layer 111, a channel layer 112, a second conductive layer 113, an insulating layer 114, and a third conductive layer 115 sequentially disposed on the substrate. The first conductive layer 111 includes signal traces, the gate of each transistor, and one electrode of a capacitor. The second conductive layer 112 includes signal traces, the source and drain of each transistor, and the other electrode of a capacitor. The channels of each transistor are disposed in the channel layer 112 between the first conductive layer 111 and the second conductive layer 113. The insulating layer 114 includes multiple vias, each via exposing a portion of the pattern of the first conductive layer 111 and the second conductive layer 113. The third conductive layer 115 is made of indium tin oxide (ITO) and is used to form an electrical connection between the first conductive layer 111 and the second conductive layer 113 exposed in the vias.

[0067] like Figure 4 and Figure 5The scanning drive unit shown also has the above five film layers, which will not be described in detail here. Figure 6 As can be seen, each transistor and capacitor in the scanning drive unit is located in multiple film layers. Therefore, it can be understood that when the arrangement and shape of each transistor and capacitor change, the pattern of each film layer also changes accordingly, while the relative positions of the patterns that make up the same transistor and the same capacitor in each film layer remain unchanged.

[0068] Figure 7 This is a partial enlarged view of the display panel provided in an embodiment of the present invention.

[0069] Figure 7 A magnified view of area D in the display panel is shown, as follows: Figure 7 As shown, the peripheral area AA' also includes an encapsulation layer 400. The encapsulation layer 400 is located on the side of the scanning drive circuit 100 away from the irregular display area AA. The encapsulation layer 400 can be made of sealant (Seal glue) or the like to prevent water and oxygen from entering the display panel and causing adverse effects on the performance of the drive circuit.

[0070] In the first direction X, a packaging layer 400, a scanning drive circuit 100, and a common potential signal circuit 300 are sequentially arranged in the peripheral area AA'. The common potential signal circuit 300 is spaced from the edge of the display area to avoid short circuits. When cutting the substrate of the display panel, a certain gap can be set between the cutting line and the packaging layer 400 to avoid cracks in the substrate during the cutting process that could adversely affect the drive circuit. Typically, this gap can be set to 200 μm. In this embodiment of the invention, the gap between the edge of the peripheral area AA' and the side of the packaging layer 400 away from the scanning drive circuit 100 can be less than 10 μm, which saves space between the cutting line and the packaging layer 400 and helps to further narrow the bezel. Preferably, the edge of the peripheral area AA' and the side of the packaging layer 400 away from the scanning drive circuit 100 can be aligned, which can further narrow the bezel.

[0071] In some embodiments, the line width of the common potential signal circuit 300 can be appropriately narrowed. The line width of the common potential signal circuit 300 can be reduced from the conventional 50μm or more to about 20μm, thereby further narrowing the bezel of the display panel while ensuring the uniformity of the common potential signal on the display panel.

[0072] Figure 8 This is a schematic diagram of a via in a display panel in related technologies; Figure 9 This is a schematic diagram of a via in a display panel provided in an embodiment of the present invention; Figure 10 for Figure 9 Cross-sectional view in the C-C' direction.

[0073] like Figure 8 As shown, the scan driving circuit 100 includes multiple stacked metal layers. In related technologies, two vias H are provided between the patterns of different metal layers in the scan driving circuit to connect them. This can prevent the scan driving circuit 100 from having excessive current through the vias H during operation, thus avoiding display problems. Furthermore, the vias H need to be completely wrapped by metal to ensure connection quality, and the metal wrapping the vias H occupies a lot of space.

[0074] like Figure 9 and Figure 10 As shown, in the scanning driving circuit 100 provided in this embodiment of the invention, patterns located on different metal layers are connected by a single via H. This reduces the space occupied by the via H and the metal surrounding it while ensuring normal circuit connection. Compared to a dual-via design, its width is reduced by half, which helps save space and further narrow the bezel of the display panel. In some embodiments, the scanning driving circuit 100 can also be connected to other signal lines using a single via, which also helps to narrow the bezel of the display panel. The more single-via connections in the driving circuit, the greater the degree of bezel narrowing of the display panel.

[0075] Based on the same inventive concept, embodiments of the present invention also provide a display device, which includes any of the above-mentioned display panels. The narrow bezel display device can provide users with a better viewing experience.

[0076] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0077] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A display panel, characterized in that, include: The irregularly shaped display area and the surrounding area of ​​the irregularly shaped display area; The peripheral area includes a scan driving circuit; the scan driving circuit includes multiple cascaded scan driving units; The scanning drive circuit is divided into at least two regions, and each region includes a plurality of scanning drive units; the ratio of the length of the scanning drive units belonging to different regions to the width in the first direction is different, and the second direction is orthogonal to the first direction; Each of the scan driving units includes a transistor and a capacitor. The arrangement of transistors and capacitors in each scan driving unit within the same region is the same, while the arrangement of transistors and capacitors in each scan driving unit in different regions is different. The irregular display area is circular in shape; the peripheral area also includes fan-out area traces, which are located between the scanning drive circuit and the irregular display area; The scanning driving circuit includes a first region, a second region, and a third region arranged sequentially and adjacently; the first region is adjacent to the irregular display area, a portion of the fan-out area traces are provided between the second region and the irregular display area, and another portion of the fan-out area traces are provided between the third region and the irregular display area; The ratio of the length of the scanning driving unit in the first region in the first direction to its width in the second direction is a first ratio value; The ratio of the length of the scanning driving unit in the second region in the first direction to its width in the second direction is a second ratio. The ratio of the length of the scanning driving unit in the third region in the first direction to its width in the second direction is a third ratio. The third ratio is greater than the first ratio, and the first ratio is greater than the second ratio; The scan driving unit includes an output transistor and a capacitor; the capacitor is disposed adjacent to the output transistor and is connected to the gate and the first electrode of the output transistor; the arrangement of the output transistor and the capacitor of each scan driving unit in different regions is different. Within each scan driving unit of the first region, the output transistor and the capacitor are arranged side by side in the first direction; Within each scan driving unit in the second region, a portion of the capacitor is located on one side of the output transistor in the first direction, and another portion of the capacitor is located on one side of the output transistor in the second direction. In each scan driving unit of the third region, the output transistor and the capacitor are arranged side by side in the second direction.

2. The display panel as described in claim 1, characterized in that, The scanning drive unit also includes a charging transistor and a discharging transistor; In each scan driving unit of the first region, the charging transistor and the discharging transistor are staggered in both the first direction and the second direction; Within each scan driving unit in the second region, the charging transistor and the discharging transistor are arranged side by side in the second direction; Within each scan drive unit of the third region, the charging transistor and the discharging transistor are arranged side by side in the first direction.

3. The display panel as described in claim 1, characterized in that, The surrounding area also includes a common potential signal circuit; the common potential signal circuit is arranged around the irregular display area and is located between the scanning drive circuit and the fan-out area trace.

4. The display panel as described in claim 1, characterized in that, The peripheral area also includes an encapsulation layer, which is located on the side of the scanning driving circuit away from the irregular display area, and the distance between the cutting edge of the peripheral area and the side of the encapsulation layer away from the scanning driving circuit is less than 10 μm.

5. The display panel as described in claim 1, characterized in that, The scanning drive circuit includes multiple stacked metal layers, with patterns of different metal layers connected by a single via.

6. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 5.

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