Display panel and display device

Abstract

Embodiments of the present application provide a display panel and a display device. The display panel comprises at least two sub-display panels. The sub-display panel comprises a plurality of pixel units and a plurality of driving circuits. The sub-display panel comprises a display area, and the display area comprises a first region and a second region. The plurality of driving circuits comprises a first driving circuit and a second driving circuit, and the plurality of pixel units comprises a first pixel unit and a second pixel unit. The first pixel unit is located in the first region, and the second pixel unit is located in the second region. The first pixel unit comprises a first light emitting component, and the second pixel unit comprises a second light emitting component. The first driving circuit is electrically connected with the first light emitting component, and the second driving circuit is electrically connected with the second light emitting component. When the data voltage received by the first driving circuit is the same as the data voltage received by the second driving circuit, the current flowing through the first light emitting component when the first light emitting component emits light is greater than the current flowing through the second light emitting component when the second light emitting component emits light.

Description

[Technical Field]

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. [Background Technology]

[0002] A video wall is composed of multiple sub-screens spliced ​​together. Video walls not only meet the needs of large-size applications but also the specific requirements of certain venues. For example, an exhibition hall might need a wave-shaped video wall to showcase the history of local culture.

[0003] However, after existing video wall assembly, the seams are easily visible during display. To improve display quality and minimize the visibility of these seams, current solutions involve improving the data voltage of pixels near the seams by modifying the control chip (IC) algorithm of each screen, thereby increasing the brightness of those pixels. This solution requires targeted adjustments based on the brightness of each screen edge, placing high demands on the IC and increasing product costs. [Summary of the Invention]

[0004] In view of this, embodiments of this application provide a display panel and a display device to solve the technical problem that the splicing seams of existing splicing screens are easily noticeable during the display process.

[0005] In a first aspect, embodiments of this application provide a display panel, including at least two sub-display panels. Each sub-display panel includes multiple pixel units and multiple driving circuits. Each sub-display panel includes a display area, which includes a first area and a second area. In adjacent sub-display panels along a first direction, the first area of ​​the sub-display panel is located between the second area of ​​the sub-display panel and the first area of ​​the adjacent sub-display panel. The multiple driving circuits include a first driving circuit and a second driving circuit, and the multiple pixel units include a first pixel unit and a second pixel unit. The first pixel unit is located within the first area, and the second pixel unit is located within the second area. The first pixel unit includes a first light-emitting element, and the second pixel unit includes a second light-emitting element. The first driving circuit is electrically connected to the first light-emitting element, and the second driving circuit is electrically connected to the second light-emitting element. When the data voltage received by the first driving circuit and the data voltage received by the second driving circuit are the same, the current flowing through the first light-emitting element when it emits light is greater than the current flowing through the second light-emitting element when it emits light.

[0006] In one embodiment of the first aspect, the current flowing through the first light-emitting element when it emits light is I1: I1 = I0 × 1.3 nWhere I0 is the standard current value, and n is a compensation coefficient that is positively correlated with the first distance L1 and negatively correlated with m. Among the pixel units included in the adjacent sub-display panels along the first direction, the minimum distance between the pixel units located in the adjacent sub-display panels along the first direction is the first distance L1. The number of pixel units arranged along the first direction in the first region is m.

[0007] In one embodiment of the first aspect, L1 < k*D1, k = n - μ, And the width of the pixel unit along the first direction is the first width D1.

[0008] In one embodiment of the first aspect, the first driving circuit includes a first driving transistor, and the second driving circuit includes a second driving transistor. The aspect ratio of the first driving transistor is greater than that of the second driving transistor.

[0009] In one embodiment of the first aspect, the first driving circuit includes a first driving transistor, and the second driving circuit includes a second driving transistor. When 0.66 ≤ μ ≤ 1.33, the aspect ratio of the first driving transistor is greater than the aspect ratio of the second driving transistor. In the pixel units of adjacent sub-display panels along the first direction, the minimum distance between pixel units located in adjacent sub-display panels along the first direction is a first distance L1. The number of pixel units arranged along the first direction in the first region is m. The width of the pixel unit along the first direction is a first width D1.

[0010] In one embodiment of the first aspect, the length of the first driving transistor is less than the length of the second driving transistor. And / or, the width of the first driving transistor is greater than the width of the second driving transistor.

[0011] In one embodiment of the first aspect, the first driving circuit includes a first storage capacitor, and the second driving circuit includes a second storage capacitor, wherein the capacitance of the first storage capacitor is greater than the capacitance of the second storage capacitor.

[0012] In one embodiment of the first aspect, the first driving circuit includes a first storage capacitor, and the second driving circuit includes a second storage capacitor, wherein when μ < 0.66, the capacitance of the first storage capacitor is greater than the capacitance of the second storage capacitor. In the pixel units of adjacent sub-display panels along the first direction, the minimum distance between pixel units located in adjacent sub-display panels along the first direction is a first distance L1. The number of pixel units arranged along the first direction in the first region is m. The width of the pixel unit along the first direction is a first width D1.

[0013] In one embodiment of the first aspect, the plate area of ​​the first storage capacitor is larger than the plate area of ​​the second storage capacitor.

[0014] In one embodiment of the first aspect, the first region includes a first sub-region and a second sub-region, a plurality of first driving circuits include a first sub-driving circuit and a second sub-driving circuit, and a plurality of first light-emitting elements include a first sub-light-emitting element and a second sub-light-emitting element. The first sub-driving circuit is electrically connected to the first sub-light-emitting element, and the second sub-driving circuit is electrically connected to the second sub-light-emitting element. The first sub-light-emitting element is located within the first sub-region, and the second sub-light-emitting element is located within the second sub-region. When the data voltage received by the first sub-driving circuit and the data voltage received by the second sub-driving circuit are the same, the current flowing through the first sub-light-emitting element when it emits light is greater than the current flowing through the second sub-light-emitting element when it emits light. Within the same first region, the minimum distance between the first sub-region and the second region is d1, the minimum distance between the second sub-region and the second region is d2, and |d1-d2|>0.

[0015] In one embodiment of the first aspect, the first sub-driving circuit includes a first sub-driving transistor, and the second sub-driving circuit includes a second sub-driving transistor. The aspect ratio of the first sub-driving transistor is greater than that of the second sub-driving transistor.

[0016] In one embodiment of the first aspect, the first sub-driving circuit includes a first sub-storage capacitor, and the second sub-driving circuit includes a second sub-storage capacitor. The capacitance of the first sub-storage capacitor is greater than the capacitance of the second sub-storage capacitor.

[0017] Secondly, this application provides a display device, which includes the display panel of the first aspect.

[0018] In this embodiment, when the data voltage received by the first driving circuit and the data voltage received by the second driving circuit are the same, the current flowing through the first light-emitting element when it emits light is greater than the current flowing through the second light-emitting element when it emits light. By differentiating the circuit structures of the first and second driving circuits, the current of the first light-emitting element is greater than that of the second light-emitting element when the same data voltage is applied, meaning the brightness of the first light-emitting element is greater than that of the second light-emitting element. The first light-emitting element is located in a first region, and the second light-emitting element is located in a second region. Since the first region is closer to the seam, the greater brightness of the first light-emitting element under the same data voltage effectively weakens the presence of the seam. This application avoids weakening the seam by designing an IC algorithm. Therefore, the technical solution provided by this embodiment can effectively reduce the complexity and difficulty of the IC algorithm and save R&D costs. [Attached Image Description]

[0019] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 A schematic diagram of a display panel provided in an embodiment of this application;

[0021] Figure 2 A schematic diagram of a display panel provided in an embodiment of this application;

[0022] Figure 3 A schematic diagram of a sub-display panel provided in an embodiment of this application;

[0023] Figure 4 An equivalent circuit diagram of a driving circuit provided in an embodiment of this application;

[0024] Figure 5 A schematic diagram showing the aspect ratio of a first driving circuit and a second driving circuit provided in an embodiment of this application;

[0025] Figure 6 A schematic diagram showing the aspect ratio of a first driving circuit and a second driving circuit provided in an embodiment of this application;

[0026] Figure 7 A schematic diagram showing the aspect ratio of a first driving circuit and a second driving circuit provided in an embodiment of this application;

[0027] Figure 8 For this application Figure 2 A partial sectional view along the MM' direction;

[0028] Figure 9 A schematic diagram of a sub-display panel provided in an embodiment of this application;

[0029] Figure 10 This is a schematic diagram of a display device provided in an embodiment of this application.

[0030] Label Explanation

[0031] 100, Display panel; 110, Sub-display panel; AA, Display area; A1, First area; A1a, First sub-area; A1b, Second sub-area; A2, Second area; 111, Pixel unit; 111a, First pixel unit; 111b, Second pixel unit; 112, Driving circuit; 112a, First driving circuit; 112b, Second driving circuit; 200, Display device.

Detailed Implementation Methods

[0032] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0033] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0034] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0035] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0036] In the description of this specification, it should be understood that the terms "substantially", "approximately", "about", "about", "generally", "largely" used in the claims and embodiments of this application refer to values ​​that can be generally agreed upon within a reasonable range of process operations or tolerances, rather than a precise value.

[0037] It should be understood that although terms such as first, second, third, etc., may be used to describe regions in the embodiments of this application, these regions should not be limited to these terms. These terms are only used to distinguish regions from each other. For example, without departing from the scope of the embodiments of this application, a first region may also be referred to as a second region, and similarly, a second region may also be referred to as a first region.

[0038] Through meticulous and in-depth research, the applicant in this case has provided a solution to the problems existing in the prior art.

[0039] The inventors discovered that the reason why the seams of a video wall are visible during display is that there are no light-emitting components at the seams. When the video wall is in display mode, a black gap appears at the seam. This black gap contrasts sharply with the light-emitting components at the gap, making the seams easily visible during display.

[0040] Figure 1 A schematic diagram of a display panel provided in an embodiment of this application; Figure 2A schematic diagram of a display panel provided in an embodiment of this application; Figure 3 This is a schematic diagram of a sub-display panel provided in an embodiment of this application.

[0041] Please see Figures 1 to 3 This application provides a display panel 100, including at least two sub-display panels 110. Please refer to [link / reference]. Figure 1 and Figure 2 In this embodiment, at least two sub-display panels 110 can be spliced ​​together to form a display panel. It should be noted that the number of sub-display panels 110 included in the display panel 100 can be adjusted according to the application requirements of the actual application scenario. For example, Figure 1 The central display panel includes two sub-display panels. Figure 2 The central display panel includes four sub-display panels. Figure 1 and Figure 2 The number of sub-display panels 110 included in the display panel 100 shown is merely illustrative and not a specific limitation.

[0042] The sub-display panel 110 includes multiple pixel units 111 and multiple driving circuits 112. The pixel unit 111 is the smallest unit for emitting light in the sub-display panel 110. Each pixel unit 111 may include a light-emitting element, which may specifically be at least one of an organic light-emitting diode (OLED), a micro-LED, or a miniature light-emitting diode (Mini-LED). The driving circuits are electrically connected to the light-emitting element and are used to provide the light-emitting element with the luminous current required for emitting light.

[0043] The sub-display panel 110 includes a display area AA, which includes a first area A1 and a second area A2. In the adjacent sub-display panels 110 along a first direction, the first area A1 of the sub-display panel 110 is located between the second area A2 of the sub-display panel 110 and the first area A1 of the adjacent sub-display panel 110. That is, the first area A1 and the second area A2 of the sub-display panel 110 are arranged along the first direction, and the first area A1 is closer to the sub-display panel 110 adjacent to it in the first direction than the second area A2.

[0044] The plurality of pixel units 111 include a first pixel unit 111a and a second pixel unit 111b. The first pixel unit 111a is located in a first region A1, and the second pixel unit 111b is located in a second region A2. That is, some pixel units 111 are located in the first region A1 and are named the first pixel unit 111a, and some pixel units 111 are located in the second region A2 and are named the second pixel unit 111b. If the first pixel unit 111a includes a first light-emitting element and the second pixel unit 111b includes a second light-emitting element, then the first light-emitting element is located in the first region A1, and the second light-emitting element is located in the second region A2.

[0045] The plurality of driving circuits 112 includes a first driving circuit 112a and a second driving circuit 112b. The first driving circuit 112a is electrically connected to the first light-emitting element, and the second driving circuit 112b is electrically connected to the second light-emitting element. That is, the first driving circuit 112a provides light-emitting current to the first light-emitting element in the first region A1, and the second driving circuit 112b provides light-emitting current to the second light-emitting element in the second region A2.

[0046] In this embodiment, when the data voltage received by the first driving circuit 112a is the same as the data voltage received by the second driving circuit 112b, the current flowing through the first light-emitting element when it emits light is greater than the current flowing through the second light-emitting element when it emits light. The current flowing through the first light-emitting element is the luminous current provided by the first driving circuit 112a to the first light-emitting element, and the current flowing through the second light-emitting element is the luminous current provided by the second driving circuit 112b to the second light-emitting element.

[0047] In this embodiment, when the data voltage received by the first driving circuit 112a is the same as the data voltage received by the second driving circuit 112b, the current flowing through the first light-emitting element when it emits light is greater than the current flowing through the second light-emitting element when it emits light. That is, when the data voltage received by the first driving circuit 112a is the same as the data voltage received by the second driving circuit 112b, the brightness of the first light-emitting element is greater than the brightness of the second light-emitting element. The first light-emitting element is located in the first region A1, and the second light-emitting element is located in the second region A2. Since the first region A1 is closer to the seam, the brightness of the first light-emitting element is greater than the brightness of the second light-emitting element under the same data voltage, allowing the increased brightness of the first light-emitting element compared to the second light-emitting element to cover the black gap at the seam, thereby effectively weakening the presence of the seam. This application avoids weakening the seam by designing an IC algorithm. Therefore, the technical solution provided by this embodiment can effectively reduce the complexity and difficulty of the IC algorithm and save research and development costs.

[0048] It should be noted that the first driving circuit 112a and the first light-emitting element can have a one-to-one electrical connection, meaning one first driving circuit 112a is electrically connected to one first light-emitting element. Alternatively, the first driving circuit 112a and the first light-emitting element can have a one-to-many electrical connection, for example, one first driving circuit 112a is electrically connected to multiple first light-emitting elements. Similarly, the second driving circuit 112b and the second light-emitting element can have a one-to-one electrical connection, meaning one second driving circuit 112b is electrically connected to one second light-emitting element. Alternatively, the second driving circuit 112b and the second light-emitting element can have a one-to-many electrical connection, for example, one second driving circuit is electrically connected to multiple second light-emitting elements.

[0049] Please see Figures 1 to 3 In one embodiment of this application, among the pixel units 111 respectively included in adjacent sub-display panels 110 along the first direction, the minimum distance between pixel units 111 located in adjacent sub-display panels 110 along the first direction is a first distance L1. The width of pixel unit 111 along the first direction is a first width D1. The width D1 of pixel unit 111 along the first direction refers to the distance between the two edges of the same pixel unit 111 along the first direction. It can be understood that when pixel unit 111 is rectangular, the width D1 along the first direction refers to the side length parallel to the first direction. When pixel unit 111 is circular, the width D1 along the first direction refers to the diameter. When pixel unit 111 is elliptical, the width D1 along the first direction refers to the axis length parallel to the first direction. The number of pixel units 111 arranged along the first direction in the first region A1 is m. The number of pixel units 111 arranged along the first direction in the first region A1 is m, which can ensure that there is enough light to effectively cover the nearby splicing seam, and also ensure that the first pixel unit 111a in the first region A1 and the second pixel unit 111b in the second region A2 will not form new light and dark marks due to the difference in brightness.

[0050] In this embodiment of the application, the first direction refers to the arrangement direction of the sub-display panels. For example... Figure 1 As shown, the first direction can be Figure 1 The X direction in the equation.

[0051] Please see Figure 2 At least two sub-display panels can be arranged along a second direction, with the first and second directions intersecting. The second area and the first area can also be arranged along the second direction. For example... Figure 2The X and Y directions are defined, with one being the first direction and the other the second direction. When the second region and the first region are arranged along the second direction, the number of pixel units 111 arranged along the second direction in the first region A1 is m'. This can be understood as the minimum distance between pixel units 111 located in adjacent sub-display panels 110 along the second direction being L1', and the width of the pixel unit 111 along the second direction being D1'. Embodiments applicable to m, L1, and D1 in this application also apply to m', L1', and D1'.

[0052] Please see Figure 3 The arrangement of the first region A1 and the second region A2 of the sub-display panel 110 can also be such that the first region A1 surrounds the second region A2. This type of sub-display panel is suitable for application scenarios where the display panel 100 includes at least three sub-display panels 110 in the X or Y direction. This can effectively reduce the presence of all splicing seams between the sub-display panel 110 and adjacent sub-display panels 110.

[0053] In one embodiment of this application, the current flowing through the first light-emitting element when it emits light is I1: I1 = I0 × 1.3 n Where I0 is the standard current value, and n is a compensation coefficient that is positively correlated with the first distance L1 and negatively correlated with m. In one implementation of this embodiment, I0 can be the current value corresponding to G32 (i.e., grayscale 32).

[0054] In one embodiment of this application, n is positively correlated with the first distance L1 in a stepwise manner, and / or n is negatively correlated with m in a stepwise manner, which is a compensation coefficient.

[0055] The stepwise positive correlation means that when the change in the first distance L1 is within a certain range, the value of n remains unchanged; when the change in the first distance L1 is greater than or equal to this certain range, the value of n changes accordingly. For example, when L1 = a1, n = b1; when L1 = a2, n = b1; when L1 = a3, n = b2; when L1 = a4, n = b2; when L1 = a5, n = b3; when L1 = a6, n = b3, where the values ​​of a1 to a6 gradually increase and the values ​​of b1 to b3 gradually increase.

[0056] The stepwise negative correlation refers to the following: when the change in the first distance m is within a certain range, the value of n remains unchanged; when the change in the first distance m is greater than or equal to this certain range, the value of n changes accordingly. For example, when m = c1, n = f1; when m = c2, n = f1; when m = c3, n = f2; when m = c4, n = f2; when m = c5, n = f3; when m = c6, n = f3, where the values ​​of c1 to c6 gradually increase and the values ​​of f1 to f3 gradually increase.

[0057] When the first light-emitting element emits light, the current flowing through it is I1. This ensures that the light intensity emitted by the first light-emitting element under this current can effectively cover the nearby splicing seam, and also ensures that there will be no new bright or dark marks between the first pixel unit 111a in the first region A1 and the second pixel unit 111b in the second region A2 due to the difference in brightness caused by the difference in current.

[0058] In one technical solution of this embodiment, L1 < k*D1, k = n - μ.

[0059] In one technical solution of this application embodiment, L1 < k*D1, k = n - μ,

[0060] When the first distance is less than k times the second distance, the current compensation method described in the above embodiment is effective in compensating for the visual brightness difference caused by the lack of light emission at the splicing seam. When the first distance is greater than or equal to k times the second distance, this current compensation method will no longer be used.

[0061] In one embodiment of this application, the circuit structures of the first driving circuit 112a and the second driving circuit 112b are not the same. This difference in circuit structure includes the fact that the device parameters of the circuit components in the first driving circuit 112a are not entirely the same as those of the circuit components in the second driving circuit 112b. Device parameters include at least one of the following: resistance value, capacitance value, or the width-to-length ratio of a semiconductor switch.

[0062] Figure 4 An equivalent circuit diagram of a driving circuit provided in an embodiment of this application.

[0063] Please see Figure 4 The driving circuit 112 includes: a driving transistor Td, reset transistors T0 / T5, a power supply voltage transistor T1, a data voltage writing transistor T2, a threshold grabbing transistor T3, a light-emitting control transistor T4, and a storage capacitor C0. It should be noted that... Figure 4 In the illustrated driving circuit, the driving transistor Td, reset transistors T0 / T5, power supply voltage transistor T1, data voltage writing transistor T2, threshold grabbing transistor T3, and light-emitting control transistor T4 are all P-type transistors. In other optional embodiments, the driving transistor Td, reset transistors T0 / T5, power supply voltage transistor T1, data voltage writing transistor T2, threshold grabbing transistor T3, and light-emitting control transistor T4 can also all be N-type transistors, or a combination of P-type and N-type transistors.

[0064] In this configuration, the output of one reset transistor T0 is electrically connected to the control terminal of the driving transistor Td; the output of another reset transistor T5 is electrically connected to the anode of the miniature LED. The output of the power supply voltage transistor T1 is electrically connected to the input of the LED driving transistor Td, and its input V1 is electrically connected to one plate of the storage capacitor C0. The control terminal of the driving transistor Td is electrically connected to the other plate of the storage capacitor C0. The input V2 of the data voltage writing transistor T2 receives the data voltage, and its output is electrically connected to the input of the driving transistor Td. The input of the threshold grabbing transistor T3 is electrically connected to the output of the driving transistor Td, and its output is electrically connected to the control terminal of the driving transistor Td. The input of the LED control transistor T4 is electrically connected to the output of the driving transistor Td, and its output is electrically connected to the anode of the miniature LED 12.

[0065] Figure 4 The operation of the driving circuit 112 shown may include a reset stage, a data voltage writing stage, and a light emission stage.

[0066] During the reset phase, reset transistor T0 is turned on under the control of its control terminal S0, and its input terminal V0 receives a reset signal, which is then written to the control terminal of drive transistor Td. In this phase, if reset transistor T5 is turned on under the control of its control terminal S5 and its input terminal V5 receives a reset signal, the anode of miniature LED 12 is also written with a reset signal.

[0067] During the data voltage writing stage, the power supply voltage transistor T1 is turned off under the control of its control terminal S1 and the light emission control transistor T4 is turned off under the control of its control terminal S4. The data voltage writing transistor T2 is turned on under the control of its control terminal S2 and the threshold grabbing transistor T3 is turned on under the control of its control terminal S3.

[0068] Taking a P-type transistor as an example, the input terminal V2 of the data voltage writing transistor T2 receives the data voltage Vdata. Since the potential of the data voltage Vdata is higher than the potential of the reset signal stored in the storage capacitor C0, the driving transistor Td is turned on and the data voltage Vdata is written to the control terminal of the driving transistor Td. The driving transistor Td is turned off when the voltage at its control terminal reaches Vdata - |Vth|, and the storage capacitor C0 stores the potential Vdata - |Vth| that was electrically connected to the control terminal of the driving transistor Td at the end of the data voltage writing phase.

[0069] In another embodiment of this application, during the reset phase, the control terminal S5 of the reset transistor T5 receives a cutoff signal; during the data voltage writing phase, the control terminal S5 of the reset transistor T5 receives a conduction signal to control the reset transistor T5 to turn on and the input terminal V5 of the reset transistor T5 receives a reset signal, so that the anode reset of the micro light-emitting diode 12 is completed simultaneously during the data voltage writing phase.

[0070] During the light-emitting stage, the data voltage writing transistor T2 is turned off under the control of its control terminal S2, and the threshold grabbing transistor T3 is turned off under the control of its control terminal S3. The power supply voltage transistor T1 is turned on under the control of its control terminal S1, and the light-emitting control transistor T4 is turned on under the control of its control terminal S4 (which receives the emit signal, i.e., the light-emitting control signal). The input terminal V1 of the power supply voltage transistor T1 receives the power supply voltage VDD, which is then transmitted to the input terminal of the light-emitting driving transistor Td. Since the potential of the power supply voltage VDD is greater than the potential of the data voltage Vdata, the driving transistor Td generates a light-emitting driving current, which is transmitted to the miniature light-emitting diode 12 through the light-emitting control transistor T4.

[0071] At this point, the luminous current generated by the driving transistor Td is: Ids = K*(VDD - Vd - Vth)^2, where VDD is the power supply voltage received at the input terminal of the power supply voltage transistor T1, Vd is the write voltage received at the control terminal of the driving transistor Td at the end of the data voltage write phase, and Vth is the threshold voltage of the driving transistor Td. K is a structural parameter, and K is positively correlated with the width-to-length ratio W / L of the driving transistor Td. It should be noted that in an ideal state (where the write speed of the write voltage at the control terminal of the driving transistor Td is fast enough or the write time is long enough), Vd is equal to Vdata - Vth. However, because the write speed or write time of the write voltage at the control terminal of the driving transistor Td cannot reach the ideal state, Vd in reality cannot reach Vdata - Vth. Here, Vdata is the data voltage received at the input terminal of the data voltage writing transistor T2.

[0072] The connection relationships between the components in the first driving circuit 112a and the second driving circuit 112b are the same as those between the components in the driving circuit 112. This can be understood as the circuit diagrams of the first driving circuit 112a, the second driving circuit 112b, and the driving circuit 112 being identical.

[0073] It should be noted that, Figure 4 Only one circuit diagram of the driving circuit 112 is shown. The specific connection relationship of the driving circuit in this application can also be in other forms.

[0074] Please see Figure 4In one embodiment of this application, the driving transistor Td in the first driving circuit 112a is named the first driving transistor Td1, and the driving transistor Td in the second driving circuit 112b is named the second driving transistor Td2. That is, the first driving circuit 112a includes the first driving transistor Td1, and the second driving circuit 112b includes the second driving transistor Td2. The width-to-length ratio of the first driving transistor Td1 is greater than that of the second driving transistor Td2. The width-to-length ratio of the first driving transistor Td1 (or the second driving transistor Td2) refers to the ratio of the width W to the length L of the channel of the first driving transistor Td1 (or the second driving transistor Td2): W / L. The fact that the width-to-length ratio of the first driving transistor Td1 is greater than that of the second driving transistor Td ensures that, under the same data voltage, the luminous current generated by the first driving transistor Td1 is greater than that generated by the second driving transistor Td.

[0075] Please see Figure 5 In one implementation of this embodiment, the width of the first driving transistor Td1 is greater than the width of the second driving transistor Td2.

[0076] Please see Figure 6 In one implementation of this embodiment, the length of the first driving transistor Td1 is less than the length of the second driving transistor Td2.

[0077] Please see Figure 7 In one implementation of this embodiment, the length of the first driving transistor Td1 is less than the length of the second driving transistor Td2, and the width of the first driving transistor Td1 is greater than the width of the second driving transistor Td2.

[0078] In one implementation of this embodiment, when 0.66 ≤ μ ≤ 1.33, the width-to-length ratio of the first driving transistor is greater than that of the second driving transistor. In the pixel units of adjacent sub-display panels along the first direction, the minimum distance between pixel units located in adjacent sub-display panels along the first direction is a first distance L1; the number of pixel units arranged along the first direction in the first region is m; the width of the pixel unit along the first direction is a first width D1. When 0.66≤μ≤1.33, it is preferable to adjust the aspect ratio of the first driving transistor to be greater than that of the second driving transistor to achieve a more significant compensation effect on the luminous current of the first driving transistor.

[0079] Figure 5 A schematic diagram showing the aspect ratio of a first driving circuit and a second driving circuit provided in an embodiment of this application; Figure 6 A schematic diagram showing the aspect ratio of a first driving circuit and a second driving circuit provided in an embodiment of this application; Figure 7This is a schematic diagram showing the aspect ratio of a first driving circuit and a second driving circuit provided in an embodiment of this application.

[0080] Please see Figures 5 to 7 In one embodiment of this application, the length of the first driving transistor Td1 is less than the length of the second driving transistor Td2. And / or, the width of the first driving transistor Td1 is greater than the width of the second driving transistor Td2. This differentiated design of the width and length of the first driving transistor Td1 and the second driving transistor Td2 enables the width-to-length ratio of the first driving transistor Td1 to be greater than that of the second driving transistor Td2.

[0081] In one embodiment of this application, in order to make the light-emitting current compensation effect of the first driving transistor more obvious, when 0.66≤μ≤1.33, the length of the first driving transistor Td1 is less than the length of the second driving transistor Td2, and / or the width of the first driving transistor Td1 is greater than the width of the second driving transistor Td2.

[0082] In one embodiment of this application, the first driving circuit 112a includes a first power supply voltage transistor T11 and a first light-emitting control transistor T41; the second driving circuit 112b includes a second power supply voltage transistor T12 and a second light-emitting control transistor T42. The aspect ratio of the first power supply voltage transistor T11 is greater than that of the second power supply voltage transistor T12, and / or, the aspect ratio of the first light-emitting control transistor T41 is greater than that of the second light-emitting control transistor T42. In this embodiment, by making the aspect ratio of the first power supply voltage transistor T11 greater than that of the second power supply voltage transistor T12, and / or by making the aspect ratio of the first light-emitting control transistor T41 greater than that of the second light-emitting control transistor T42, the light-emitting current of the first light-emitting element can be finely adjusted so that the light-emitting current of the first light-emitting element achieves the target compensation effect. The target compensation effect can be reflected by the current I1.

[0083] In one implementation of this embodiment, when μ > 1.33, the aspect ratio of the first driving transistor Td1 is greater than that of the second driving transistor Td2. Furthermore, the aspect ratio of the first power supply voltage transistor T11 is greater than that of the second power supply voltage transistor T12, and / or, the aspect ratio of the first light-emitting control transistor T41 is greater than that of the second light-emitting control transistor T42. In this embodiment, when μ > 1.33, the light-emitting current of the first light-emitting element can be finely adjusted by making the aspect ratio of the first power supply voltage transistor T11 greater than that of the second power supply voltage transistor T12, and / or by making the aspect ratio of the first light-emitting control transistor T41 greater than that of the second light-emitting control transistor T42, so that the light-emitting current of the first light-emitting element reaches I1.

[0084] In one implementation of this embodiment, the width of the first power supply voltage transistor T11 is greater than the width of the second power supply voltage transistor T12, and / or the length of the first power supply voltage transistor T11 is less than the length of the second power supply voltage transistor T12.

[0085] In one implementation of this embodiment, the width of the first light-emitting control transistor T41 is greater than the width of the second light-emitting control transistor T42, and / or, the length of the first light-emitting control transistor T41 is less than the length of the second light-emitting control transistor T42. Please refer to [link / reference]. Figure 4 In one embodiment of this application, the storage capacitor C0 in the first driving circuit 112a is named the first storage capacitor C1, and the storage capacitor C0 in the second driving circuit 112b is named the second storage capacitor C2. That is, the first driving circuit 112a includes the first storage capacitor C1, and the second driving circuit 112b includes the second storage capacitor C2. The capacitance of the first storage capacitor C1 is greater than the capacitance of the second storage capacitor C2. This can be understood as the capacitance value of the first storage capacitor C1 being greater than the capacitance value of the second storage capacitor C2.

[0086] The capacitance of the first storage capacitor C1 is greater than that of the second storage capacitor C2, causing the charging speed of the first storage capacitor C1 to be slower than that of the second storage capacitor C2. Since the first storage capacitor C1 is electrically connected to the control terminal of the first driving transistor Td1 and the second storage capacitor C2 is electrically connected to the control terminal of the second driving transistor Td2, the speed at which data voltage is written to the control terminal of the first driving transistor Td1 in the first driving circuit 111a during the data voltage writing phase is slower than the speed at which data voltage is written to the control terminal of the second driving transistor Td2 in the second driving circuit 112b during the data voltage writing phase. The charging speed of the first storage capacitor C1 determines the writing speed of the writing voltage at the control terminal of the first driving transistor Td1. In other words, the larger the capacitance of the first storage capacitor C1 compared to the second storage capacitor C2, the slower its charging speed. The slower the charging speed of the first storage capacitor C1, the slower the writing speed of the writing voltage at the control terminal of the first driving transistor Td1, that is, the slower the voltage boosting speed at the control terminal of the first driving transistor Td1. This means that, within the same timeframe, the write speed of the control terminal write voltage of the first driving transistor Td1 is less than the write speed of the control terminal write voltage of the second driving transistor Td2; that is, the write voltage Vd of the control terminal write voltage of the first driving transistor Td1 is less than the write voltage Vd' of the control terminal write voltage of the second driving transistor Td2. According to the formula for the luminous current generated by the driving transistor Td, the smaller Vd is, the larger the luminous current. Therefore, when the data voltage received by the first driving circuit and the data voltage received by the second driving circuit are the same, the current flowing through the first luminous element when it emits light is greater than the current flowing through the second luminous element when it emits light.

[0087] In one implementation of this embodiment, the first driving circuit includes a first storage capacitor, and the second driving circuit includes a second storage capacitor. When μ < 0.66, the capacitance of the first storage capacitor is greater than the capacitance of the second storage capacitor. In the pixel units of adjacent sub-display panels along the first direction, the minimum distance between pixel units located in adjacent sub-display panels along the first direction is a first distance L1. The number of pixel units arranged along the first direction in the first region is m. The width of the pixel unit along the first direction is a first width D1. When μ < 0.66, it is preferable to make the capacitance of the first storage capacitor greater than that of the second storage capacitor to achieve a more significant compensation effect on the luminous current of the first light-emitting element.

[0088] Figure 8 For this application Figure 2 A partial sectional view along the MM' direction.

[0089] Please see Figure 8 In one embodiment of this application, the plate area of ​​the first storage capacitor C1 is larger than the plate area of ​​the second storage capacitor C2. Having a larger plate area for the first storage capacitor C1 than the second storage capacitor C2 facilitates achieving a larger storage capacity for the first storage capacitor C1 than for the second storage capacitor C2. Achieving this larger capacity for the first storage capacitor C1 is also relatively easy in terms of manufacturing process.

[0090] In one implementation of this embodiment, in order to make the compensation effect of the light-emitting current of the first light-emitting element more obvious, when μ < 0.66, the plate area of ​​the first storage capacitor C1 is larger than the plate area of ​​the second storage capacitor C2.

[0091] Figure 9 This is a schematic diagram of a sub-display panel provided in an embodiment of this application.

[0092] Please see Figure 3 and Figure 9 In one embodiment of this application, the first region A1 includes a first sub-region A1a and a second sub-region A1b. In the same first region A1, the minimum distance between the edge of the first sub-region A1a away from the second region A2 and the second region A2 is d1, and the minimum distance between the edge of the second sub-region A1b away from the second region A2 and the second region A2 is d2, where |d1-d2|>0.

[0093] This can be understood as d1 and d2 being unequal. This means that the first sub-region A1a and the second sub-region A1b differ in size. This difference makes it easier for the sub-display panels 110 to meet personalized needs when spliced ​​together, thereby increasing the applicability of the display panels. For example, as... Figure 3 When the sub-display panel 110 is rectangular, a relatively narrow area can be divided along its short side as the first sub-area A1a, and a wider area can be divided along its long side as the second sub-area A1b.

[0094] The plurality of first driving circuits 112a include a first sub-driving circuit and a second sub-driving circuit, and the plurality of first light-emitting elements include a first sub-light-emitting element and a second sub-light-emitting element. The first light-emitting element located in the first sub-region A1a is named the first sub-light-emitting element. The second light-emitting element located in the second sub-region A1b is named the second sub-light-emitting element. It can be understood that the first sub-driving circuit is electrically connected to the first sub-light-emitting element, and the second sub-driving circuit is electrically connected to the second sub-light-emitting element. The first sub-light-emitting element is located in the first sub-region A1a, and the second sub-light-emitting element is located in the second sub-region A1b. When the data voltage received by the first sub-driving circuit and the data voltage received by the second sub-driving circuit are the same, the current flowing through the first sub-light-emitting element when it emits light is greater than the current flowing through the second sub-light-emitting element when it emits light.

[0095] For example, along the arrangement direction of the second region A2 and the first sub-region A1a, the minimum width of the first sub-region A1a is d1. Along the arrangement direction of the second region A2 and the second sub-region A1b, the minimum width of the first sub-region A1a is d2. Wherein, d1 ≠ d2.

[0096] Please see Figure 3In one embodiment of this application, d1 < d2, and the arrangement direction of the second region A2 and the first sub-region A1a intersects the arrangement direction of the second region A2 and the second sub-region A1b. For example, the second region A2 and the first sub-region A1a are arranged along a third direction Y', and the second region A2 and the second sub-region A1b are arranged along a fourth direction X'. The third direction Y' and the fourth direction X' intersect. Furthermore, when the data voltage received by the first sub-driving circuit is the same as the data voltage received by the second sub-driving circuit, the current flowing through the first sub-light-emitting element when it emits light is greater than the current flowing through the second sub-light-emitting element when it emits light, that is, the brightness of the first sub-light-emitting element is greater than the brightness of the second sub-light-emitting element. Along the arrangement direction of the second region A2 and the first sub-region A1a, the number of pixel units 111 in the first sub-region A1a is m1. Along the arrangement direction of the second region A2 and the second sub-region A1b, the number of pixel units 111 in the second sub-region A1b is m2. d1 < d2 means m1 < m2, that is, the brightness of the light-emitting element in the narrower first sub-region A1a is increased to a greater extent than the brightness of the light-emitting element in the wider second sub-region A1b, in order to compensate for the difference in the number of pixel units caused by m1 < m2, which leads to the difference in overall brightness between the two sub-regions. In a preferred implementation, the third direction Y' is perpendicular to the fourth direction X'.

[0097] Please see Figure 9 In one embodiment of this application, d1 > d2, the second sub-region A1b is located between the first sub-region A1a and the second region A2, and when the data voltage received by the first sub-driving circuit is the same as the data voltage received by the second sub-driving circuit, the current flowing through the first sub-light-emitting element when it emits light is greater than the current flowing through the second sub-light-emitting element when it emits light, that is, the brightness of the first sub-light-emitting element is greater than the brightness of the second light-emitting element. Therefore, along the arrangement direction of the second region A2, the second sub-region A1b, and the first sub-region A1a, the brightness of the second light-emitting element, the second sub-light-emitting element, and the first sub-light-emitting element gradually changes. This design can effectively reduce the presence of the splicing seam on the one hand, and can also transition the brightness between the first sub-light-emitting element and the second light-emitting element on the other hand, further improving the display effect.

[0098] It should be noted that the circuit diagrams of the first sub-driving circuit and the second sub-driving circuit in the embodiments of this application can be referenced from the driving circuit.

[0099] In one embodiment of this application, the driving transistor in the first sub-driving circuit is named the first sub-driving transistor. The driving transistor in the second sub-driving circuit is named the second sub-driving transistor. The position of the first sub-driving transistor (or the second sub-driving transistor) in the first sub-driving circuit (or the second sub-driving circuit), and the connection relationship between the first sub-driving transistor (or the second sub-driving transistor) and the other devices can be referred to the driving transistor Td. Further details are omitted here. That is, the first sub-driving circuit includes the first sub-driving transistor, and the second sub-driving circuit includes the second sub-driving transistor. The aspect ratio of the first sub-driving transistor is greater than that of the second sub-driving transistor. Therefore, when the data voltage received by the first sub-driving transistor is the same as the data voltage received by the second sub-driving transistor, the current flowing through the first sub-light-emitting element when it emits light is greater than the current flowing through the second sub-light-emitting element when it emits light. This means that the coverage of the splicing seam by the light emitted by the first sub-light-emitting element is different from the coverage of the splicing seam by the light emitted by the second sub-light-emitting element. This differentiation makes it easier for the sub-display panels 110 to meet personalized needs when splicing and assembling with each other, thereby improving the applicability of the display panel.

[0100] In one implementation of this embodiment, the width of the first sub-driving transistor is greater than the width of the second sub-driving transistor. And / or, the length of the first sub-driving transistor is less than the length of the second sub-driving transistor.

[0101] In one embodiment of this application, the storage capacitor in the first sub-driving circuit is named the first sub-storage capacitor. The storage capacitor in the second sub-driving circuit is named the second sub-storage capacitor. The position of the first sub-storage capacitor (or the second sub-storage capacitor) in the first sub-driving circuit (or the second sub-driving circuit), and the connection relationship between the first sub-storage capacitor (or the second sub-storage capacitor) and other devices can be referred to the storage capacitor C0. Further details are omitted here. That is, the first sub-driving circuit includes the first sub-storage capacitor, and the second sub-driving circuit includes the second sub-storage capacitor. The capacitance of the first sub-storage capacitor is greater than that of the second sub-storage capacitor. Therefore, when the data voltage received by the first sub-driving transistor is the same as the data voltage received by the second sub-driving transistor, the current flowing through the first sub-light-emitting element when it emits light is greater than the current flowing through the second sub-light-emitting element when it emits light. This means that the coverage of the splicing seam by the light emitted by the first sub-light-emitting element is different from the coverage of the splicing seam by the light emitted by the second sub-light-emitting element. This differentiation makes it easier for the sub-display panels 110 to meet personalized needs when splicing and assembling with each other, thereby improving the applicability of the display panel.

[0102] In one implementation of this embodiment, the plate area of ​​the first sub-storage capacitor is larger than that of the second sub-storage capacitor. Achieving a larger capacitance for the first sub-storage capacitor by having a larger plate area than the second sub-storage capacitor is relatively easy in terms of manufacturing process.

[0103] Figure 10 This is a schematic diagram of a display device provided in an embodiment of this application.

[0104] Please see Figure 10 This application provides a display device 200, which includes... Figures 1 to 3 The display panel 100 is shown. The display device 200 can be a large display screen, exhibition screen, irregularly shaped splicing screen, etc. In the display device 200 provided in this application embodiment, when the data voltage received by the first driving circuit 112a is the same as the data voltage received by the second driving circuit 112b, the current flowing through the first light-emitting element when it emits light is greater than the current flowing through the second light-emitting element when it emits light. The emitting current of the first light-emitting element is greater than that of the second light-emitting element, that is, the brightness of the first light-emitting element is greater than that of the second light-emitting element. The first light-emitting element is located in the first region A1, and the second light-emitting element is located in the second region A2. Since the first region A1 is closer to the splicing seam, the brightness of the first light-emitting element is greater than that of the second light-emitting element under the same data voltage, so that the increased brightness of the first light-emitting element compared to the second light-emitting element can cover the black gap at the splicing seam, thereby effectively weakening the presence of the splicing seam. This application avoids weakening the splicing seam by designing IC algorithms. Therefore, the technical solution provided in this application embodiment can effectively reduce the complexity and difficulty of IC algorithms and save research and development costs.

[0105] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A display panel, characterized in that, include: At least two sub-display panels, each sub-display panel comprising multiple pixel units and multiple driving circuits; The sub-display panel includes a display area, which includes a first area and a second area; In the adjacent sub-display panels along the first direction, the first region of the sub-display panel is located between the second region of the sub-display panel and the first region of the adjacent sub-display panel; The plurality of driving circuits includes a first driving circuit and a second driving circuit, and the plurality of pixel units includes a first pixel unit and a second pixel unit, wherein the first pixel unit is located in the first region and the second pixel unit is located in the second region; The first pixel unit includes a first light-emitting element and the second pixel unit includes a second light-emitting element; the first driving circuit is electrically connected to the first light-emitting element and the second driving circuit is electrically connected to the second light-emitting element; Wherein, when the data voltage received by the first driving circuit is the same as the data voltage received by the second driving circuit, the current flowing through the first light-emitting element when the first light-emitting element emits light is greater than the current flowing through the second light-emitting element when the second light-emitting element emits light. The first driving circuit includes a first storage capacitor, and the second driving circuit includes a second storage capacitor. When μ < 0.66, the capacitance of the first storage capacitor is greater than the capacitance of the second storage capacitor. in, In the pixel units of the adjacent sub-display panels along the first direction, the minimum distance between the pixel units located in the adjacent sub-display panels along the first direction is a first distance L1; the number of pixel units arranged along the first direction in the first region is m; the width of the pixel unit along the first direction is a first width D1.

2. The display panel according to claim 1, characterized in that, When the first light-emitting element emits light, the current flowing through the first light-emitting element is : ,in, This is the standard value of the current. The compensation coefficient is positively correlated with the first distance L1 and negatively correlated with m; Among the pixel units included in the adjacent sub-display panels along the first direction, the minimum distance between the pixel units located in the adjacent sub-display panels along the first direction is a first distance L1; the number of pixel units arranged along the first direction in the first region is m.

3. The display panel according to claim 2, characterized in that, , , Furthermore, the width of the pixel unit along the first direction is the first width D1.

4. The display panel according to claim 1, characterized in that, The first driving circuit includes a first driving transistor, and the second driving circuit includes a second driving transistor; when At that time, the width-to-length ratio of the first driving transistor is greater than that of the second driving transistor; in, In the pixel units of the adjacent sub-display panels along the first direction, the minimum distance between the pixel units located in the adjacent sub-display panels along the first direction is a first distance L1; the number of pixel units arranged along the first direction in the first region is m; the width of the pixel unit along the first direction is a first width D1.

5. The display panel according to claim 4, characterized in that, The length of the first driving transistor is less than the length of the second driving transistor; and / or, the width of the first driving transistor is greater than the width of the second driving transistor.

6. The display panel according to claim 1, characterized in that, The plate area of ​​the first storage capacitor is larger than that of the second storage capacitor.

7. The display panel according to claim 1, characterized in that, The first region includes a first sub-region and a second sub-region; the plurality of first driving circuits include a first sub-driving circuit and a second sub-driving circuit; the plurality of first light-emitting elements include a first sub-light-emitting element and a second sub-light-emitting element; the first sub-driving circuit is electrically connected to the first sub-light-emitting element; the second sub-driving circuit is electrically connected to the second sub-light-emitting element; the first sub-light-emitting element is located within the first sub-region; and the second light-emitting element is located within the second sub-region. When the data voltage received by the first sub-driving circuit is the same as the data voltage received by the second sub-driving circuit, the current flowing through the first sub-light-emitting element when the first sub-light-emitting element emits light is greater than the current flowing through the second sub-light-emitting element when the second sub-light-emitting element emits light. In the same first region, the minimum distance between the edge of the first sub-region away from the second region and the second region is d1, and the minimum distance between the edge of the second sub-region away from the second region and the second region is d2, where |d1-d2|>0.

8. The display panel according to claim 7, characterized in that, The first sub-driving circuit includes a first sub-driving transistor, and the second sub-driving circuit includes a second sub-driving transistor; The width-to-length ratio of the first sub-driving transistor is greater than that of the second sub-driving transistor.

9. The display panel according to claim 7, characterized in that, The first sub-driving circuit includes a first sub-storage capacitor, and the second sub-driving circuit includes a second sub-storage capacitor; The capacitance of the first sub-storage capacitor is greater than the capacitance of the second sub-storage capacitor.

10. A display device, characterized in that, The display device includes the display panel as described in any one of claims 1-9.

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