Display substrate and display device
By setting a grid-like isolation trench structure and an equipotential electrode layer in the silicon-based OLED display panel, the problems of lateral leakage and crosstalk between adjacent sub-pixels are solved, improving the display effect and device lifespan.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2022-03-16
- Publication Date
- 2026-05-19
AI Technical Summary
The high pixel density of silicon-based OLED display panels results in small spacing between adjacent sub-pixels, leading to lateral leakage and crosstalk issues that affect display performance.
A grid-like isolation groove structure is set between adjacent sub-pixels to isolate the charge generation layer, and the electric field strength is weakened and leakage is avoided by setting an equipotential third electrode layer and an electrode insulation layer.
It effectively alleviates crosstalk and leakage problems between adjacent sub-pixels, improves the brightness and lifespan of display devices, and reduces power consumption.
Smart Images
Figure CN117204136B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to, but is not limited to, the field of display technology, specifically to a display substrate and a display device. Background Technology
[0002] As a near-eye micro-display technology, silicon-based organic light-emitting diode (OLED) technology is increasingly widely used in industries such as industry, culture and tourism, medical care, and drones. Augmented reality (AR) glasses, virtual reality (VR) helmets, infrared detectors, and 3D medical devices have strong demand for silicon-based OLED display panels, indicating that silicon-based OLED display technology has broad development prospects.
[0003] Due to the high pixel density (PPI) of silicon-based OLED display panels, the sub-pixels and their spacing are extremely small. Therefore, white light devices are typically fabricated by vapor-depositing luminescent materials across the entire surface, combined with RGB (red, green, and blue) color filters to achieve full-color display. Furthermore, to improve the performance, brightness, and lifespan of silicon-based OLED microdisplays, stacked OLED devices with two or more luminescent layers (tandem OLED devices) are employed. This involves using a charge generation layer (CGL) to connect two luminescent units in series, achieving a superimposed light emission effect. This successfully improves important optoelectronic properties such as current efficiency, output brightness, and operating lifespan. However, the CGL has a high carrier mobility and high conductivity. When the anode potentials of adjacent sub-pixels differ, lateral leakage current occurs along the CGL, causing crosstalk between adjacent sub-pixels. Summary of the Invention
[0004] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.
[0005] This disclosure provides a display substrate, including a driving structure layer and a light-emitting structure layer sequentially stacked on a substrate. The light-emitting structure layer includes a first electrode layer, a pixel defining layer, a light-emitting functional layer, a second electrode layer, a third electrode layer, and an electrode insulating layer.
[0006] The first electrode layer includes a plurality of first electrodes disposed on the driving structure layer. The pixel defining layer is disposed on the side of the plurality of first electrodes away from the substrate and has a plurality of pixel openings. Each pixel opening exposes the surface of a corresponding first electrode away from the substrate. The pixel defining layer also has a grid-shaped isolation trench structure. The isolation trench structure includes a plurality of grid units, and each grid unit of the isolation trench structure surrounds one of the pixel openings.
[0007] The third electrode layer and the electrode insulating layer are sequentially stacked on the side of the pixel defining layer away from the substrate, exposing the pixel opening and the isolation trench structure, and the electrode insulating layer covers the edge portion of the third electrode layer near the pixel opening;
[0008] The light-emitting functional layer and the second electrode layer are sequentially stacked on the side away from the substrate of the plurality of first electrodes and the electrode insulating layer, and each first electrode, the light-emitting functional layer and the second electrode layer form a light-emitting device; the second electrode layer and the third electrode layer are set to be at the same potential;
[0009] The light-emitting functional layer includes at least two stacked light-emitting units and a charge-generating layer located between two adjacent light-emitting units. The charge-generating layer is configured to generate holes and electrons under the voltage action of the first electrode and the second electrode layer. The charge-generating layer is isolated by the isolation trench structure.
[0010] This disclosure also provides a display device, including the aforementioned display substrate.
[0011] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood. Attached Figure Description
[0012] The accompanying drawings are provided to further illustrate the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure. The shapes and sizes of the components in the drawings do not reflect actual proportions and are only intended to illustrate the content of this disclosure.
[0013] Figure 1a This is a partial structural schematic diagram of a display substrate for some exemplary embodiments;
[0014] Figure 1b A partial structural schematic diagram of a display substrate for some other exemplary embodiments;
[0015] Figure 2 A schematic diagram of the planar structure of the pixel defining layer of a display substrate, for some exemplary embodiments;
[0016] Figure 3 This is a schematic diagram of the structure after forming a driving structure layer and multiple first electrodes on a substrate in some exemplary embodiments;
[0017] Figure 4 This is a schematic diagram of the structure after the pixel definition layer is formed in some exemplary embodiments;
[0018] Figure 5 This is a schematic diagram of the structure after the third electrode layer is formed in some exemplary embodiments;
[0019] Figure 6 This is a schematic diagram of the structure after the isolation groove structure is formed in some exemplary embodiments;
[0020] Figure 7 This is a schematic diagram of the structure after the electrode insulating layer is formed in some exemplary embodiments;
[0021] Figure 8 This is a schematic diagram of the structure after the charge generation layer is formed in some exemplary embodiments. Detailed Implementation
[0022] Those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the embodiments of this disclosure without departing from the spirit and scope of the technical solutions of the embodiments of this disclosure, and all such modifications and substitutions should be covered within the scope of the claims of this disclosure.
[0023] Some silicon-based OLED display panels use grooves between adjacent sub-pixels to isolate the CGL (Cathode Layer) in order to solve problems such as crosstalk between adjacent sub-pixels caused by lateral leakage current generated by the cathode layer (CGL). While this method can alleviate the crosstalk problem between adjacent sub-pixels to some extent, the grooves cause the cathode layer to be recessed and form a sharp shape (cathode puncture site) at the corresponding groove locations. At the cathode puncture site, due to the sharp point effect of the electric field, the electric field intensity will increase sharply, eventually causing the sub-pixel edges to light up prematurely and affecting the control and realization of low grayscale of the sub-pixels.
[0024] This disclosure provides a display substrate, in some exemplary embodiments, such as... Figure 1a and Figure 2 As shown, Figure 1a This is a partial structural schematic diagram of a display substrate for some exemplary embodiments. Figure 2 This is a schematic diagram of the planar structure of the pixel defining layer of a display substrate according to some exemplary embodiments. The display substrate includes a driving structure layer 20 and a light-emitting structure layer 30 stacked sequentially on a substrate 10. The light-emitting structure layer 30 includes a first electrode layer, a pixel defining layer 32, a light-emitting functional layer 35, a second electrode layer 36, a third electrode layer 33, and an electrode insulating layer 34.
[0025] The first electrode layer includes a plurality of first electrodes 31 disposed on the driving structure layer 20. The pixel defining layer 32 is disposed on the side of the plurality of first electrodes 31 away from the substrate 10 and has a plurality of pixel openings 321. Each pixel opening 321 exposes the surface of a corresponding first electrode 31 away from the substrate 10. The pixel defining layer 32 also has a grid-shaped isolation trench structure 322, which includes a plurality of grid units 3221. Figure 2(As shown), each grid cell 3221 of the isolation groove structure 322 surrounds one of the pixel openings 321;
[0026] The third electrode layer 33 and the electrode insulating layer 34 are sequentially stacked on the side of the pixel defining layer 32 away from the substrate 10, exposing the pixel opening 321 and the isolation trench structure 322, and the electrode insulating layer 34 covers the edge portion of the third electrode layer 33 near the pixel opening 321.
[0027] The light-emitting functional layer 35 and the second electrode layer 36 are sequentially stacked on the side of the plurality of first electrodes 31 and the electrode insulating layer 34 away from the substrate 10, and each first electrode 31, the light-emitting functional layer 35 and the second electrode layer 36 form a light-emitting device; the second electrode layer 36 and the third electrode layer 33 are set to be at the same potential.
[0028] The light-emitting functional layer 35 includes at least two stacked light-emitting units and a charge-generating layer 353 located between two adjacent light-emitting units. The charge-generating layer 353 is configured to generate holes and electrons under the voltage action of the first electrode 31 and the second electrode layer 36. The charge-generating layer 353 is isolated by the isolation trench structure 322.
[0029] In this embodiment of the display substrate, the pixel defining layer 32 has an isolation trench structure 322 between adjacent sub-pixel regions (i.e., pixel opening 321 regions) to isolate the charge generation layer 353. This alleviates crosstalk problems between adjacent sub-pixels caused by lateral leakage from the charge generation layer 353. Furthermore, a third electrode layer 33 and an electrode insulating layer 34 are sequentially stacked on the side of the pixel defining layer 32 away from the substrate 10. The third electrode layer 33 and the second electrode layer 36 are set at the same potential. This reduces the electric field strength at the puncture site of the second electrode layer 36 by the third electrode layer 33, thereby improving the puncture phenomenon of the second electrode layer 36 at the location corresponding to the isolation trench structure 322. Since the third electrode layer 33 and the second electrode layer 36 have the same potential, the problem of light emission between adjacent sub-pixels due to voltage differences between the third electrode layer 33 and the second electrode layer 36 can be avoided. In addition, the electrode insulating layer 34 is configured to cover the edge portion of the third electrode layer 33 near the pixel opening 321. In this way, the first electrode 31 and the third electrode layer 33 can be separated by the electrode insulating layer 34, avoiding leakage problems caused by the first electrode 31 and the third electrode layer 33 being connected through the light-emitting functional layer 35, thereby avoiding an increase in the power consumption of the light-emitting device.
[0030] In some exemplary embodiments, such as Figure 1aAs shown, the third electrode layer 33 has a first opening 331 that exposes the pixel opening 321. The orthographic projection of the first opening 331 on the substrate 10 includes the orthographic projection of the pixel opening 321 on the substrate 10. Thus, the circumferential sidewall of the first opening 331 of the third electrode layer 33 is located on the surface of the pixel defining layer 32 away from the substrate 10, avoiding contact with the first electrode 31 and thus preventing leakage. Furthermore, this allows the electrode insulating layer 34 to completely cover the circumferential sidewall of the first opening 331 of the third electrode layer 33.
[0031] The phrase "the orthographic projection of A includes the orthographic projection of B" in this article means that the orthographic projection of B falls within the orthographic projection range of A, or the orthographic projection of A covers the orthographic projection of B.
[0032] In this document, the circumferential sidewall of the pixel opening 321 can be a slope, and the end of the pixel opening 321 away from the substrate 10 has a larger opening than the end closer to the substrate 10. The orthographic projection of the pixel opening 321 on the substrate 10 can refer to the orthographic projection of the end of the pixel opening 321 away from the substrate 10 on the substrate 10.
[0033] Exemplarily, the shape of the pixel opening 321 can be rectangular, hexagonal, pentagonal, rhomboid, etc., and the shape of the pixel opening 321 can be adapted to the shape of the first electrode 31. Multiple pixel openings 321 can have the same or different shapes. This embodiment of the present disclosure does not limit the shape and arrangement of the pixel openings 321. Each grid unit 3221 of the isolation groove structure 322 is a closed ring structure, and the shape of the grid unit 3221 can be adapted to the shape of the pixel opening 321 it surrounds. Figure 2 In the example, the pixel opening 321 is rectangular, and each grid cell 3221 of the isolation groove structure 322 is rectangular.
[0034] In some exemplary embodiments, such as Figure 1a As shown, the electrode insulating layer 34 covers the circumferential sidewall of the pixel opening 321. This helps to ensure that the electrode insulating layer 34 completely covers the circumferential sidewall of the first opening 331 of the third electrode layer 33, thereby isolating the first electrode 31 from the third electrode layer 33.
[0035] In some exemplary embodiments, the electrode insulating layer 34 may be made of an inorganic insulating material, such as silicon nitride (SiN). x ), silicon dioxide (SiO) x ), silicon oxynitride (SiO) x N yThe material of the third electrode layer 33 can be any one or more of the following: titanium, aluminum, silver, and copper.
[0036] In some exemplary embodiments, such as Figure 1a As shown, the third electrode layer 33 has a second opening 332 that exposes the isolation trench structure 322. The orthographic projection of the isolation trench structure 322 on the substrate 10 may include the orthographic projection of the second opening 332 on the substrate 10. In this way, the circumferential sidewall of the second opening 332 of the third electrode layer 33 may protrude from or be flush with the opening of the isolation trench structure 322, which is beneficial for the isolation trench structure 322 to effectively isolate the charge generating layer 353.
[0037] In one example of this embodiment, such as Figure 1a As shown, the electrode insulating layer 34 has a third opening 341 that exposes the isolation trench structure 322. The orthographic projection of the third opening 341 on the substrate 10 may include the orthographic projection of the second opening 332 on the substrate 10. The orthographic projections of the electrode insulating layer 34 and the isolation trench structure 322 on the substrate 10 may overlap. In this example, the circumferential sidewall of the third opening 341 may have a slight inward reduction compared to the circumferential sidewall of the second opening 332 to avoid the risk of breakage due to the electrode insulating layer 34 protruding.
[0038] In other exemplary embodiments, such as Figure 1b As shown, Figure 1b The diagram shows a partial structure of a display substrate for some other exemplary embodiments. The orthographic projection of the electrode insulating layer 34 onto the substrate 10 may include the orthographic projection of the third electrode layer 33 onto the substrate 10.
[0039] In one example of this embodiment, such as Figure 1b As shown, the third electrode layer 33 has a second opening 332 exposing the isolation trench structure 322, and the electrode insulating layer 34 has a third opening 341 exposing the isolation trench structure 322. The orthographic projection of the second opening 332 on the substrate 10 may include the orthographic projection of the third opening 341 on the substrate 10. In this example, the electrode insulating layer 34 can completely cover the circumferential sidewall of the second opening 332 of the third electrode layer 33.
[0040] In one example of this embodiment, such as Figure 1bAs shown, the orthographic projection of the isolation trench structure 322 onto the substrate 10 may include the orthographic projection of the third opening 341 onto the substrate 10. In this example, the circumferential sidewall of the third opening 341 may protrude from or be flush with the opening of the isolation trench structure 322.
[0041] In some exemplary embodiments, such as Figure 1a As shown, the sidewall of the first electrode 31 in the thickness direction is sloped, and the angle α between the sidewall of the first electrode 31 in the thickness direction and the surface of the first electrode 31 facing the substrate 10 can be 60 degrees to 80 degrees. In this way, the slope of the sidewall of the first electrode 31 in the thickness direction is relatively gentle, which can alleviate the sharp shape of the second electrode layer 36 at the position corresponding to the edge of the first electrode 31, and alleviate the puncture phenomenon of the second electrode layer 36 at this position.
[0042] In some exemplary embodiments, such as Figure 1a As shown, the circumferential side of the isolation trench structure 322 can be recessed inward compared to the opening of the trench structure 322. This makes it easier for the isolation trench structure 322 to isolate the charge generation layer 353 during vapor deposition.
[0043] In one example of this embodiment, such as Figure 1a As shown, the bottom surface of the isolation trench structure 322 can be an arc-shaped concave surface recessed towards the substrate 10. The circumferential side surface of the isolation trench structure 322 can be an arc surface and smoothly connected to the bottom surface. In this way, the morphology of the subsequently formed second electrode layer 36 is relatively flat at the position corresponding to the isolation trench structure 322, and it is not easy to form a sharp morphology, thus alleviating the puncture phenomenon of the second electrode layer 36 at this position.
[0044] In some exemplary embodiments, such as Figure 1a As shown, the isolation trench structure 322 can penetrate the pixel defining layer 32 and is partially located in the driving structure layer 20. Exemplarily, the driving structure layer 20 may include a pixel driving circuit disposed on the substrate 10 and a planarization layer away from the substrate 10, with the first electrode 31 disposed on the planarization layer and connected to the pixel driving circuit through a via disposed in the planarization layer. The isolation trench structure 322 can penetrate the pixel defining layer 32 and is partially located in the planarization layer. In other embodiments, when the pixel defining layer 32 is thick, the isolation trench structure 322 may not penetrate the pixel defining layer 32.
[0045] In some exemplary embodiments, the display substrate includes a display area and a non-display area located around the display area. The third electrode layer is located in the display area and can extend to the non-display area. It can be connected to the traces in the driving structure layer of the non-display area through a via provided in the driving structure layer of the non-display area, so that the potential of the third electrode layer is the same as that of the second electrode layer.
[0046] In some exemplary embodiments, such as Figure 1a As shown, the display substrate can be a silicon-based OLED display substrate, and the driving structure layer 20 includes multiple pixel driving circuits disposed on the silicon substrate 10. The pixel driving circuits can be fabricated using CMOS (Complementary Metal-Oxide-Semiconductor) integrated circuit technology. The pixel driving circuits can include multiple transistors (T) 201 and storage capacitors (C). The pixel driving circuits can be 3T1C, 5T1C, or 7T1C circuit structures, etc., and this disclosure does not limit them.
[0047] In some exemplary embodiments, such as Figure 1a As shown, the display substrate can be a silicon-based OLED display substrate. The light-emitting functional layer 35 may include a first light-emitting unit 351, a charge-generating layer 353, and a second light-emitting unit 352 sequentially stacked along a direction away from the substrate 10; the first light-emitting unit 351 includes a first light-emitting layer capable of emitting red light and a second light-emitting layer capable of emitting green light stacked together, and the second light-emitting unit 352 includes a third light-emitting layer capable of emitting blue light. Thus, under the voltage action of the first electrode 31 and the second electrode layer 36, the superposition of the light emitted by the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer enables the light-emitting device to emit white light.
[0048] For example, the light-emitting device may include a first electrode (anode), a first hole injection layer, a first hole transport layer, a first light-emitting layer, a second light-emitting layer, a first electron transport layer, a charge generation layer, a second hole injection layer, a second hole transport layer, a third hole transport layer, a third light-emitting layer, a hole blocking layer, a second electron transport layer, an electron injection layer, and a second electrode (cathode) layer, which are stacked sequentially along the direction away from the substrate.
[0049] In some exemplary embodiments, such as Figure 1aAs shown, the display substrate may further include an encapsulation structure layer 40 disposed on the side of the second electrode layer 36 away from the substrate 10. The encapsulation structure layer 40 may include multiple stacked inorganic material layers (such as silicon oxide, silicon nitride, silicon oxynitride, etc.) to block external water and oxygen, protecting the light-emitting device. The display substrate may further include a color filter layer disposed on the side of the encapsulation structure layer away from the substrate. The color filter layer may include multiple filter units that can transmit light of a set color, such as a red filter unit that transmits red light, a green filter unit that transmits green light, and a blue filter unit that transmits blue light. White light emitted by each light-emitting device can illuminate one filter unit and emit light of the corresponding color.
[0050] The following is an exemplary description of the fabrication process of the display substrate according to embodiments of this disclosure. The "patterning process" mentioned in this disclosure includes photoresist coating, mask exposure, development, etching, and photoresist stripping. Deposition can be performed using any one or more of sputtering, evaporation, and chemical vapor deposition; coating can be performed using any one or more of spraying and spin coating; etching can be performed using any one or more of dry etching and wet etching. A "thin film" refers to a thin film made by depositing or coating a material onto a substrate. If the "thin film" does not require a patterning process during the entire fabrication process, it can also be called a "layer." If the "thin film" requires a patterning process during the entire fabrication process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern." The phrase "A and B are arranged in the same layer" in this disclosure means that A and B are formed simultaneously through the same patterning process. The phrase "the orthographic projection of A includes the orthographic projection of B" in this disclosure means that the orthographic projection of B falls within the orthographic projection range of A, or the orthographic projection of A covers the orthographic projection of B.
[0051] by Figure 1a Taking the structure of an example display substrate as an example, the fabrication process of the display substrate according to embodiments of this disclosure will be described. Figure 1a Taking a silicon-based OLED display substrate as an example, the fabrication process may include the following steps:
[0052] (1) A driving structure layer 20 is formed on the substrate 10. Exemplarily, the substrate 10 can be a silicon-based substrate 10, such as a single-crystal silicon substrate 10. A pixel driving circuit and some signal lines (including data signal lines, scan signal lines, power lines, etc.) are fabricated on the silicon-based substrate 10 using CMOS integrated circuit technology. The pixel driving circuit may include multiple transistors (T) 201 and storage capacitors (C). The pixel driving circuit may be a 3T1C, 5T1C, or 7T1C circuit structure, etc., and this disclosure does not limit this.
[0053] (2) A plurality of first electrodes 31 are formed on the driving structure layer 20. Exemplarily, forming a plurality of first electrodes 31 may include: depositing a thin film of first electrodes 31 on the driving structure layer 20, and patterning the thin film of first electrodes 31 using a patterning process to form a first electrode layer, the first electrode layer including a plurality of first electrodes 31. The first electrodes 31 are connected to the pixel driving circuit in the driving structure layer 20 through vias provided in the driving structure layer 20. Figure 3 As shown.
[0054] (3) Forming a pixel defining layer 32. Exemplarily, forming the pixel defining layer 32 may include: forming a pixel defining film on the substrate 10 where the aforementioned pattern is formed, and patterning the pixel defining film using a patterning process to form the pixel defining layer 32. The pixel defining layer 32 has a plurality of pixel openings 321, each pixel opening 321 exposing the surface of a corresponding first electrode 31 away from the substrate 10. For example... Figure 4 As shown.
[0055] (4) Forming a third electrode layer 33. Exemplarily, forming the third electrode layer 33 may include: depositing a third electrode thin film on the substrate 10 on which the aforementioned pattern is formed, and patterning the third electrode thin film using a patterning process to form the third electrode layer 33. The third electrode layer 33 has a first opening 331 and a second opening 332 exposing the pixel opening 321, wherein the orthographic projection of the first opening 331 onto the substrate 10 includes the orthographic projection of the pixel opening 321 onto the substrate 10. Figure 5 As shown.
[0056] (5) Forming an isolation trench structure 322. Exemplarily, forming the isolation trench structure 322 may include: coating a substrate 10 on which the aforementioned pattern is formed, then removing the photoresist at the location of the second opening 332 through exposure and development, etching the portion of the pixel defining layer 32 exposed by the second opening 332 to form the isolation trench structure 322 on the pixel defining layer 32, and then removing the photoresist. Exemplarily, the isolation trench structure 322 may penetrate the pixel defining layer 32 and be partially located within the driving structure layer 20. Figure 6 As shown.
[0057] (6) Forming an electrode insulating layer 34. Exemplarily, forming the electrode insulating layer 34 may include: forming an electrode insulating film on the substrate 10 where the aforementioned pattern is formed, and patterning the electrode insulating film using a patterning process to form the electrode insulating layer 34. The electrode insulating layer 34 completely covers the third electrode layer 33 and exposes the pixel opening 321 and the isolation trench structure 322 (the third opening 341 of the electrode insulating layer 34 exposes the isolation trench structure 322). Figure 7 As shown.
[0058] (7) Forming a light-emitting functional layer 35. Exemplarily, forming the light-emitting functional layer 35 may include: sequentially depositing various film layers of the light-emitting functional layer 35 onto the substrate 10 on which the aforementioned pattern is formed, wherein the light-emitting functional layer 35 may include a first light-emitting unit 351, the charge-generating layer 353, and a second light-emitting unit 352 sequentially stacked along a direction away from the substrate 10; the first light-emitting unit 351 includes a stacked first light-emitting layer capable of emitting red light and a second light-emitting layer capable of emitting green light, and the second light-emitting unit 352 includes a third light-emitting layer capable of emitting blue light. During the evaporation process, the charge-generating layer 353 will naturally break at the isolation trench structure 322. Figure 8 As shown.
[0059] (8) Forming the second electrode layer 36. Exemplarily, the second electrode layer 36 can be formed on the substrate 10 on which the aforementioned pattern is formed using a vapor deposition process. Figure 1a As shown.
[0060] Subsequently, on the side of the second electrode layer 36 away from the substrate 10, the encapsulation structure layer 40 and the color filter layer are formed sequentially.
[0061] In some other exemplary embodiments, Figure 1b In the fabrication process of the example display substrate, after forming the pattern of the third electrode layer 33, the pattern of the electrode insulating layer 34 can be formed, and then the isolation trench structure 322 can be formed on the pixel defining layer 32. For details, please refer to [reference needed]. Figure 1a Example of display substrate fabrication process.
[0062] This disclosure also provides a display device, including the display substrate described in any of the preceding embodiments. The display device can be a near-eye display device, such as AR / VR glasses, head-mounted displays, virtual reality all-in-one machines, etc.
[0063] In the accompanying drawings, the size of constituent elements, the thickness of layers, or areas are sometimes exaggerated for clarity. Therefore, embodiments of this disclosure are not necessarily limited to these dimensions, and the shape and size of each component in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate some examples, and embodiments of this disclosure are not limited to the shapes or values shown in the drawings.
[0064] In this specification, a transistor is a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. In this specification, the channel region refers to the region through which current primarily flows.
[0065] In this specification, to distinguish the two terminals of a transistor other than the control terminal, one terminal is directly described as the first terminal and the other as the second terminal. The first terminal can be the drain electrode and the second terminal can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or where the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" are sometimes interchanged. Therefore, in this specification, the "source electrode" and "drain electrode" can be interchanged.
[0066] In this description, "parallel" refers to the state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore includes the state where the angle is greater than -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore includes the state where the angle is greater than 85° and less than 95°.
[0067] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of each constituent element being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.
[0068] In this description, unless otherwise expressly specified and limited, the terms "connection," "fixed connection," "installation," and "assembly" should be interpreted broadly, for example, as a fixed connection, a detachable connection, or an integral connection; the terms "installation," "connection," and "fixed connection" can refer to a direct connection, an indirect connection through an intermediate medium, or a connection within two components. Those skilled in the art will understand the meaning of the above terms in the embodiments of this disclosure as appropriate.
Claims
1. A display substrate, comprising a driving structure layer and a light-emitting structure layer sequentially stacked on a substrate, wherein the light-emitting structure layer comprises a first electrode layer, a pixel defining layer, a light-emitting functional layer, a second electrode layer, a third electrode layer, and an electrode insulating layer; The first electrode layer includes a plurality of first electrodes disposed on the driving structure layer. The pixel defining layer is disposed on the side of the plurality of first electrodes away from the substrate and has a plurality of pixel openings. Each pixel opening exposes the surface of a corresponding first electrode away from the substrate. The pixel defining layer is further provided with a grid-shaped isolation groove structure, the isolation groove structure including multiple grid units, each grid unit of the isolation groove structure surrounding one of the pixel openings; The third electrode layer and the electrode insulating layer are sequentially stacked on the side of the pixel defining layer away from the substrate, exposing the pixel opening and the isolation trench structure, and the electrode insulating layer covers the edge portion of the third electrode layer near the pixel opening; The light-emitting functional layer and the second electrode layer are sequentially stacked on the side away from the substrate of the plurality of first electrodes and the electrode insulating layer, and each first electrode, the light-emitting functional layer and the second electrode layer form a light-emitting device; the second electrode layer and the third electrode layer are set to be at the same potential; The light-emitting functional layer includes at least two stacked light-emitting units and a charge-generating layer located between two adjacent light-emitting units. The charge-generating layer is configured to generate holes and electrons under the voltage action of the first electrode and the second electrode layer. The charge-generating layer is isolated by the isolation trench structure.
2. The display substrate as claimed in claim 1, wherein, The third electrode layer has a first opening that exposes the pixel opening, and the orthographic projection of the first opening onto the substrate includes the orthographic projection of the pixel opening onto the substrate.
3. The display substrate as described in claim 2, wherein, The electrode insulating layer covers the circumferential sidewalls of the pixel opening.
4. The display substrate as claimed in claim 1, wherein, The third electrode layer has a second opening that exposes the isolation trench structure, and the orthographic projection of the isolation trench structure on the substrate includes the orthographic projection of the second opening on the substrate.
5. The display substrate as claimed in claim 4, wherein, The electrode insulating layer has a third opening that exposes the isolation trench structure, and the orthographic projection of the third opening on the substrate includes the orthographic projection of the second opening on the substrate; The orthographic projection of the electrode insulating layer on the substrate overlaps with the orthographic projection of the isolation trench structure on the substrate.
6. The display substrate as claimed in claim 1, wherein, The third electrode layer has a second opening that exposes the isolation trench structure, and the electrode insulating layer has a third opening that exposes the isolation trench structure. The orthographic projection of the third opening onto the substrate includes the orthographic projection of the second opening onto the substrate.
7. The display substrate as claimed in claim 6, wherein, The orthographic projection of the isolation trench structure onto the substrate includes the orthographic projection of the third opening onto the substrate.
8. The display substrate as claimed in claim 1, wherein, The sidewall of the first electrode in the thickness direction is sloping, and the angle between the sidewall of the first electrode in the thickness direction and the surface of the first electrode facing the substrate is 60 degrees to 80 degrees.
9. The display substrate as claimed in claim 1, wherein, The circumferential side of the isolation groove structure is recessed relative to the groove opening of the isolation groove structure.
10. The display substrate as claimed in claim 9, wherein, The bottom surface of the isolation trench structure is an arc-shaped concave surface that is recessed towards the substrate.
11. The display substrate as claimed in claim 10, wherein, The circumferential side of the isolation groove structure is curved and smoothly connected to the bottom surface.
12. The display substrate as claimed in claim 1, wherein, The isolation groove structure extends through the pixel delimiting layer and is partially located in the driving structure layer.
13. The display substrate as claimed in claim 1, wherein, The electrode insulating layer is made of one or more of silicon nitride, silicon oxide, and silicon oxynitride.
14. The display substrate as claimed in claim 1, wherein, The light-emitting functional layer includes a first light-emitting unit, a charge-generating layer, and a second light-emitting unit stacked sequentially along the direction away from the substrate; the first light-emitting unit includes a first light-emitting layer capable of emitting red light and a second light-emitting layer capable of emitting green light, and the second light-emitting unit includes a third light-emitting layer capable of emitting blue light.
15. A display device comprising the display substrate according to any one of claims 1 to 14.