A method for realizing fine frequency measurement of wideband electronic reconnaissance signals based on FPGA
By using FPGA-based parallel processing architecture and frequency classification technology, the problem of insufficient accuracy and real-time performance of traditional FFT frequency measurement methods in broadband electronic reconnaissance signals is solved, realizing a more accurate and parallel frequency measurement method.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAN INSTITUE OF SPACE RADIO TECH
- Filing Date
- 2023-09-19
- Publication Date
- 2026-06-23
Smart Images
Figure CN117434346B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of electronic reconnaissance and electronic countermeasures, and particularly relates to a method for precise frequency measurement of broadband electronic reconnaissance signals based on FPGA in the field of electronic reconnaissance. Background Technology
[0002] In the fields of electronic reconnaissance and electronic countermeasures, enemy radar transmitters emit complex and diverse radar signals to our side to achieve objectives such as intelligence gathering, signal jamming, and communication interception of our military equipment. Our receivers need to conduct electronic reconnaissance to implement anti-jamming and anti-interception military measures, thereby gaining the initiative in electronic reconnaissance. Among these, precise signal frequency measurement is a crucial part of electronic reconnaissance technology. This method can accurately calculate the radar band and the frequency of the transmitted signal, laying an important foundation for identifying enemy radar radiation sources.
[0003] Traditional electronic reconnaissance signal frequency measurement methods rely on the Faster-Temperature (FFT) method. This involves performing an FFT on the pulse data, searching the power spectrum, and using the peak position of the power spectrum as the signal frequency output. While simple to operate, this method has low accuracy, especially for broadband electronic reconnaissance signals. Since the power spectrum is widely distributed, using only the peak position to calculate the signal frequency results in significant errors. With increasingly complex electronic reconnaissance environments, higher accuracy requirements, and gradually increasing signal bandwidth, higher demands are placed on precise frequency measurement of electronic reconnaissance signals. Therefore, a more accurate, parallel, and real-time-efficient precise frequency measurement method is urgently needed. Summary of the Invention
[0004] The technical problem solved by this invention is to propose a broadband electronic reconnaissance signal fine frequency measurement method based on FPGA, which has higher frequency measurement accuracy, stronger parallel capability, and better real-time performance, addressing the problems of low accuracy and poor real-time performance of traditional FFT frequency measurement methods.
[0005] The objective of this invention is achieved through the following technical steps: a method for precise frequency measurement of broadband electronic reconnaissance signals based on FPGA, comprising:
[0006] The number K of parallel processing channels based on FPGA is determined according to the real-time requirements of precise frequency measurement; the pulse signal to be precisely measured is input and buffered in the RAM of each parallel processing channel; each parallel processing channel of FPGA performs the following operations in parallel:
[0007] A coarse frequency measurement was completed at multiple points, and K center frequency values were calculated.
[0008] Based on the coarse frequency measurement results, bandpass filtering and digital downconversion are performed, and low-pass filtering is performed on the baseband signal.
[0009] Acquire the signal phase and calculate the intra-pulse phase difference value;
[0010] Remove outlier phase difference values and calculate the mean phase difference value twice;
[0011] Statistical analysis of the signal center frequency allows for precise calculation of the signal frequency.
[0012] Preferably, the number of parallel processing units T represents the time required to complete all pulse fine frequency measurements, clk represents the FPGA processing clock frequency, and N represents the number of points contained in each pulse of fine frequency measurement.
[0013] Preferably, the input pulse signal to be precisely measured is buffered in the RAM of each parallel processing channel, including:
[0014] The receiver antenna receives signals within the current frequency band, processes them to obtain intermediate frequency broadband pulse signals, and then stores the intermediate frequency broadband pulse signals in chronological order in the DDR outside the FPGA after AD acquisition and synchronization processing.
[0015] Set the pulse extraction rate, and based on the pulse start time, pulse width and number of pulses extracted, read the pulse signal that needs to be precisely measured from DDR and buffer it into K RAMs, with each RAM buffering one pulse.
[0016] Preferably, the pulse extraction rate is 1:m, where m ranges from 2 to 50.
[0017] Preferably, the bandpass filtering based on the coarse frequency measurement results includes:
[0018] Based on the frequency domain accuracy and the response characteristics of the bandpass filter, the effective frequency band is used as the conduction center frequency of the filter. The coefficients of the M groups of bandpass filters are determined, and after being processed by fixed-pointing, they are stored in the COE file.
[0019] K filter cores are generated in the FPGA. The FIR Compiler is set to dynamic configuration mode. There are M groups of filter coefficients, each of order L. The frequency coarse measurement result f is used. cal Using the index, select the bandpass filter coefficients required for the K signals, and output them dynamically in parallel by the K filter cores;
[0020] The L-point bandpass filter is performed in parallel on the signal to be precisely measured.
[0021] Preferably, the step of acquiring the signal phase and calculating the intra-pulse phase difference value includes:
[0022] The phase value of each point in each pulse is calculated based on the complex data after low-pass filtering, and the phase value output by the FPGA is quantized to the range of [-1, 1].
[0023] Calculate the difference values of N phase points within a pulse, denoted as Phase. diff(i)(i = 1, 2, ..., N-1), cache them in FIFO;
[0024] Calculate the mean of the intrapulse phase difference, denoted as Mean. diff Calculate the standard deviation of the phase difference, denoted as Std. diff Both are latched into registers.
[0025] Preferably, the outlier phase difference value is defined as the phase difference value that exceeds 3 times the standard deviation.
[0026] Preferably, the statistical signal center frequency, and the accurate calculation of the signal frequency, include:
[0027] Based on the average value of the phase difference calculated twice for each channel, the center frequency of each pulse is calculated. The center frequencies of each pulse are classified and processed, and the class with the most pulses is taken as the center frequency of the radar. The average value of the class is then calculated as the accurate radio frequency output.
[0028] Preferably, points with a frequency difference of less than 2MHz are grouped together as the same category.
[0029] A broadband electronic reconnaissance signal precision frequency measurement system based on FPGA includes an AD acquisition and time synchronization processing module, a DDR storage module, and an FPGA.
[0030] The FPGA is configured with K parallel processing channels based on the real-time requirements of precise frequency measurement. Each parallel processing channel includes RAM, a bandpass filter, a DDC, a low-pass filter, a CORDIC core, a FIFO, a rejection and classification module, a multi-point joint frequency coarse measurement module, and an output module.
[0031] The AD acquisition and time synchronization processing module performs AD acquisition and synchronization processing on the intermediate frequency broadband pulse signal obtained by the receiver antenna, and stores it in the DDR memory module outside the FPGA in time order.
[0032] Read the pulse signal that needs to be precisely measured from DDR and buffer it into K RAMs, with each RAM buffering one pulse;
[0033] The multi-point joint frequency coarse measurement module completes the frequency coarse measurement and calculates the center frequency value of each channel; the band-pass filter performs band-pass filtering based on the frequency coarse measurement results and performs digital down-conversion by DDC; the low-pass filter performs low-pass filtering on the baseband signal.
[0034] The CORDIC core acquires the signal phase and calculates the intra-pulse phase difference value;
[0035] The outlier phase difference value is removed by the classification module, and the mean phase difference value is calculated a second time.
[0036] The output module counts the center frequency of the signal and accurately calculates the signal frequency.
[0037] The advantages of this invention compared to the prior art are:
[0038] (1) This invention designs a highly parallel precision frequency measurement processing structure based on FPGA. Traditional precision frequency measurement methods cannot simultaneously achieve both frequency measurement accuracy and real-time performance. Usually, in order to improve accuracy, real-time performance requirements are sacrificed. This invention designs a highly parallel precision frequency measurement processing structure based on the FPGA processing platform and utilizing its pipeline characteristics. Under this structure, each pulse is calculated in a pipeline manner, and multiple pulses are processed in parallel, converting serial calculation into parallel calculation, thus solving the conflict between high accuracy and high real-time performance.
[0039] (2) The design scheme of "multi-point joint coarse frequency measurement + fine frequency measurement" is adopted. This invention abandons the strategy of finding only the power peak in the FFT frequency measurement method. Instead, it achieves coarse frequency measurement by finding the frequency band with the most concentrated power spectrum distribution, and uses the result of coarse frequency measurement as an index value to complete fine frequency measurement. This reduces a lot of redundant calculations and ensures the accuracy of calculation.
[0040] (3) This invention incorporates frequency classification processing. This invention removes outliers from the phase difference values, performs weighted correction, and then performs frequency classification, which can further optimize the frequency interval and improve the accuracy of fine frequency measurement.
[0041] This invention can be used in the fields of electronic reconnaissance, electronic countermeasures, and radar signal processing. It provides a method for accurately measuring the frequency of broadband electronic reconnaissance signals, which has the characteristics of higher frequency measurement accuracy, stronger parallel capability, and better real-time performance. Attached Figure Description
[0042] Figure 1 This is a flowchart of the method of the present invention;
[0043] Figure 2 This is a detailed design block diagram of an embodiment of the present invention; Detailed Implementation
[0044] This invention proposes a method for precise frequency measurement of broadband electronic reconnaissance signals based on FPGA. Based on the requirements for precise frequency measurement of large-bandwidth electronic reconnaissance signals, and utilizing the pipelined processing characteristics of FPGA, a parallel and precise method for measuring the frequency of broadband electronic reconnaissance signals is designed, which improves the frequency measurement accuracy and enhances the real-time performance of the method.
[0045] like Figure 1 As shown, the method steps of the present invention are as follows:
[0046] (1) Determine the number of parallel processing units for the FPGA-based electronic reconnaissance signal precision frequency measurement method according to the real-time requirements of precision frequency measurement;
[0047] Each precision frequency measurement pulse contains N = f s ×P w There are points, where f s P represents the high-speed AD sampling rate. w Let the pulse width be denoted as . According to this invention, the delay after each pulse completes fine frequency measurement is 6N. The required time for completing fine frequency measurement of all pulses is T. The FPGA processing clock frequency is clk. Therefore, the number of parallel processing units in the FPGA-based electronic reconnaissance signal fine frequency measurement method is as follows: In general, K is a power of 2, but in this invention, K equals 8.
[0048] (2) Input the pulse signal to be precisely measured and buffer it in a multi-channel RAM;
[0049] The first step is to set the local oscillator center frequency of the receiver antenna to f. c,center The receiving channel is opened to acquire signals within the current frequency band. After channel mixing, filtering and other processing, an intermediate frequency broadband pulse signal is obtained. After AD acquisition and synchronization processing, the signal is stored in the DDR3 external to the FPGA in chronological order.
[0050] The second step is to set the pulse decimation rate. Although electronic reconnaissance signals have diverse pulse forms and a large number of pulses, their intra-pulse characteristics are very stable. In order to reduce the redundancy of fine frequency measurement calculations, decimating a certain number of pulses for fine frequency measurement can both ensure calculation accuracy and improve real-time performance. The pulse decimation rate is set to 1:m; the value of m ranges from 2 to 50.
[0051] The third step is to read the pulse signal that needs to be precisely measured from DDR3 and cache it into K RAMs based on the extracted pulse start time, pulse width and pulse number, with each RAM caching one pulse.
[0052] (3) Complete the multi-point joint frequency rough measurement and calculate the center frequency of the signal;
[0053] The first step involves K parallel channels windowing the pulses from the precise frequency measurement using a Hamming window of length L. Then, an L-point short-time Fourier transform is performed, and the positive spectrum is taken as the effective frequency band. The number of effective frequency bands is then determined. Frequency domain precision
[0054] The second step is to calculate the signal power, set a detection threshold, which is the channel noise level multiplied by the current local oscillator signal-to-noise ratio, and compare the power value with the threshold value. If the power value at a point is greater than the detection threshold, it is considered that there is a signal at the current point; otherwise, there is no signal. Record the frequency value of the location where there is a signal.
[0055] The third step involves a multi-point joint coarse frequency measurement to calculate the signal's center frequency. After detection, the broadband pulse signal has a wide frequency distribution with multiple frequency values. The frequency band with the most concentrated distribution is identified and clustered in the frequency domain to calculate the center frequency, denoted as f. cal K different center frequency values are obtained by K-channel parallel pulse calculation.
[0056] (4) Perform bandpass filtering based on the coarse frequency measurement results;
[0057] The first step is to determine the M groups of bandpass filter coefficients based on the frequency domain accuracy and the response characteristics of the bandpass filter, using the effective frequency band as the conduction center frequency of the filter, and then store them in the COE file after fixed-point processing.
[0058] The second step involves generating K filter cores in the FPGA, setting the FIR Compiler to dynamic configuration mode, and creating M groups of filter coefficients, each of order L. The frequency coarse measurement result f is then used. cal Using the index, select the bandpass filter coefficients required for the K signals, and output them dynamically in parallel by the K filter cores;
[0059] The third step is to perform L-point bandpass filtering on the signal to be precisely measured in parallel.
[0060] (5) Perform digital downconversion in parallel through multiple channels and perform low-pass filtering on the baseband signal;
[0061] Because broadband electronic reconnaissance signals have a wide bandwidth, especially when the signal is located at the edges of the effective frequency band, bandpass filtering alone cannot accurately determine the frequency range. Therefore, digital down-conversion is performed on the bandpass-filtered data to shift the signal to baseband before low-pass filtering. This effectively filters out out-of-band signals and improves the accuracy of frequency measurement. The K-channel bandpass-filtered signals are then orthogonally demodulated to obtain K-channel real and K-channel imaginary parts. Subsequently, L-point low-pass filtering is applied to both K channels of data simultaneously; no decimation is performed on the data at this stage.
[0062] (6) Obtain the signal phase and calculate the intra-pulse phase difference value in parallel;
[0063] The first step is to input the K-channel complex data after low-pass filtering into K CORDIC cores to calculate the phase value of each point in each pulse in parallel. The phase value output by the FPGA is quantized to the range of [-1, 1].
[0064] The second step is to calculate the difference between N phase points within the pulse, denoted as Phase. diff(i) (i = 1, 2, ..., N-1), cache them in K FIFOs for subsequent processing;
[0065] The third step is to calculate the mean of the intra-pulse phase difference, denoted as Mean. diffCalculate the standard deviation of the phase difference, denoted as Std. diff Both are latched into registers.
[0066] (7) Remove the out-of-point phase difference values and calculate the mean phase difference value twice;
[0067] Phase difference scores exceeding 3 standard deviations were discarded as outliers. (To be continued) diff With Std diff After the calculation is complete, K FIFOs read data simultaneously. If Phase diff(i) >Mean diff +3×Std diff Or Phase diff(i) <Mean diff -3×Std diff If a point is invalid, it is discarded. The valid phase difference values are summed, and the number of valid values is counted. The mean of the phase difference is calculated twice and denoted as phi. mean K-way parallel processing yields K different difference means.
[0068] (8) Statistical analysis of the signal center frequency and accurate calculation of the signal frequency;
[0069] The first step is to calculate the center frequency of the K pulses. The phase has been normalized in step five.
[0070] The second step is to process K f's. c,radar The values are classified. With a classification accuracy of 2MHz, points with a frequency difference of less than 2MHz are grouped into the same category. The category with the most points is taken as the center frequency of the radar, and its average value is calculated as the accurate radio frequency output.
[0071] like Figure 2 As shown, the present invention provides a broadband electronic reconnaissance signal precision frequency measurement system based on FPGA, characterized in that it includes an AD acquisition and time synchronization processing module, a DDR storage module, and an FPGA;
[0072] The FPGA is configured with K parallel processing channels based on the real-time requirements of precise frequency measurement. Each parallel processing channel includes RAM, a bandpass filter, a DDC, a low-pass filter, a CORDIC core, a FIFO, a rejection and classification module, a multi-point joint frequency coarse measurement module, and an output module.
[0073] The AD acquisition and time synchronization processing module performs AD acquisition and synchronization processing on the intermediate frequency broadband pulse signal obtained by the receiver antenna, and stores it in the DDR memory module outside the FPGA in time order.
[0074] Read the pulse signal that needs to be precisely measured from DDR and buffer it into K RAMs, with each RAM buffering one pulse;
[0075] The multi-point joint frequency coarse measurement module completes the frequency coarse measurement and calculates the center frequency value of each channel; the band-pass filter performs band-pass filtering based on the frequency coarse measurement results and performs digital down-conversion by DDC; the low-pass filter performs low-pass filtering on the baseband signal.
[0076] The CORDIC core acquires the signal phase and calculates the intra-pulse phase difference value;
[0077] The outlier phase difference value is removed by the classification module, and the mean phase difference value is calculated a second time.
[0078] The output module counts the center frequency of the signal and accurately calculates the signal frequency.
[0079] Example
[0080] The following description, in conjunction with the accompanying drawings and a specific embodiment, further illustrates the working process of the present invention and the expected effects.
[0081] The broadband electronic reconnaissance signal is assumed to be a linear frequency modulated (LFM) signal with a frequency of 8.7 GHz, a pulse repetition rate of 5 kHz, a bandwidth of 50 MHz, and a pulse width of 10 μs. A Xilinx Viterx-7 chip is used, with an FPGA processing clock rate of 150 MHz and a signal acquisition time of 200 ms. Figure 2 This is a detailed block diagram of the FPGA design in the embodiment.
[0082] The method steps of this invention are as follows:
[0083] (1) According to the engineering requirements, the fine frequency measurement processing time is 8ms, each pulse contains 24,000 points, and the AD sampling rate is 2.4Gsps. The number of parallel processing units in this method is calculated to be 8.
[0084] (2) Set the local oscillator center frequency f of the receiver antenna. c,center The signal strength is 9.0 GHz, the channel bandwidth is 1 GHz, and the signal is collected in the frequency band of 8.5 GHz to 9.5 GHz. The signal is stored in the DDR3 outside the FPGA in time order. The pulse decimation rate is set to 1:10, so 100 pulses are extracted. The pulse signals are read from the DDR3 and buffered into 8 RAMs in sequence.
[0085] (3) Window the pulses to be precisely measured, with a Hamming window length of 128 points; then perform a 128-point STFT, with 64 effective frequency bands, calculate the signal power and detection threshold for each point, find the frequency band with the most concentrated distribution, calculate the center frequency, and denot it as f. cal .
[0086] (4) Generate 64 sets of bandpass filter coefficients, each with 128 orders. After fixed-point processing, store them in a COE file and use the coarse frequency measurement result f. cal Using the index, the bandpass filter coefficients required for the 8 parallel pulses are selected, bandpass filtering is completed, then digital downconversion is performed, and finally 128-point low-pass filtering is applied to the baseband data.
[0087] (5) Calculate the phase value and differential value of each point in the pulse and cache them in 8 FIFOs. Latch the differential mean and standard deviation of each pulse. Then, output the data from the 8 FIFOs at the same time, remove the phase differential values that exceed 3 times the standard deviation, and calculate the phase differential mean a second time.
[0088] (6) Calculate the center frequency of 100 pulses. With a classification interval of 2MHz, these 100 frequency values are divided into 7 categories. The 4th category has the most values, 81. Calculate the average of these 81 center frequency values to obtain the current radar's accurate frequency of 8725.3MHz. The theoretical frequency of the signal is 8725MHz. The error of this method is less than 0.5MHz. In terms of real-time performance, the processing framework of this invention is a linear pipeline structure. There is no accumulation time. All the time consumed is the processing delay, which can meet the processing time requirements.
[0089] This invention illustrates the effectiveness of the method using a typical broadband electronic reconnaissance signal precision frequency measurement example, effectively overcoming the shortcomings of traditional processing methods. This invention can be applied to various common or special scenarios for implementing precision frequency measurement of electronic reconnaissance signals.
[0090] The contents not described in detail in this specification are common knowledge to those skilled in the art.
Claims
1. A method for precise frequency measurement of broadband electronic reconnaissance signals based on FPGA, characterized in that... include: The number of parallel processing channels based on FPGA is determined according to the real-time requirements of precise frequency measurement. The input pulse signal to be precisely measured is buffered in the RAM of each parallel processing channel; each parallel processing channel of the FPGA performs the following operations in parallel: Multiple points jointly completed the coarse frequency measurement and calculated the result. One center frequency value; Based on the coarse frequency measurement results, bandpass filtering and digital downconversion are performed, and low-pass filtering is performed on the baseband signal. Acquire the signal phase and calculate the intra-pulse phase difference value; Remove outlier phase difference values and calculate the mean phase difference value twice; Statistical analysis of signal center frequency; accurate calculation of signal frequency. The bandpass filtering based on the coarse frequency measurement results includes: Based on frequency domain accuracy and the response characteristics of the bandpass filter, the effective frequency band is used as the conduction center frequency of the filter to determine... The group of bandpass filter coefficients are processed by fixed-point conversion and then stored in the COE file; Generate in FPGA There are M filter cores, with the FIR Compiler set to dynamic configuration mode. Each group has M sets of filter coefficients. Order, based on coarse frequency measurement results Select as index The required bandpass filter coefficients for the signal are determined by... Parallel dynamic output of multiple filter cores; The signals to be precisely measured are completed in parallel. Spot bandpass filtering; The acquisition of signal phase and calculation of intra-pulse phase difference value include: The phase value of each point within each pulse is calculated based on the complex data after low-pass filtering, and the phase value output by the FPGA is quantized to... between; Calculate intrapulse The difference value of each phase point is denoted as... , Cache it in FIFO; Calculate the mean of the intrapulse phase difference, denoted as . Calculate the standard deviation of the phase difference, denoted as . Both are latched into registers; The center frequency of the statistical signal, and the precise calculation of the signal frequency, include: Based on the average value of the phase difference calculated twice for each channel, the center frequency of each pulse is calculated. The center frequencies of each pulse are classified and processed, and the class with the most pulses is taken as the center frequency of the radar. The average value of the class is then calculated as the accurate radio frequency output.
2. The method according to claim 1, characterized in that, The number of parallel processing channels , The time required to complete all pulse fine frequency measurements, To handle clock frequency for FPGA, The number of points contained in each pulse of the precision frequency measurement.
3. The method according to claim 1, characterized in that, The input pulse signal to be precisely measured is buffered in the RAM of each parallel processing channel, including: The receiver antenna receives signals within the current frequency band, processes them to obtain intermediate frequency broadband pulse signals, and then stores the intermediate frequency broadband pulse signals in chronological order in the DDR outside the FPGA after AD acquisition and synchronization processing. Set the pulse extraction rate, and based on the extracted pulse start time, pulse width, and number of pulses, read the pulse signal requiring precise frequency measurement from DDR and buffer it. In each RAM, one pulse is cached.
4. The method according to claim 3, characterized in that, Pulse decimation rate , The value range is 2 to 50.
5. The method according to claim 1, characterized in that, The outlier phase difference is defined as a phase difference value that exceeds 3 times the standard deviation and is therefore excluded.
6. The method according to claim 1, characterized in that, Points with a frequency difference of less than 2MHz are grouped together as the same category.
7. A broadband electronic reconnaissance signal fine frequency measurement implementation system based on FPGA, implemented according to the FPGA-based broadband electronic reconnaissance signal fine frequency measurement implementation method according to claim 1, characterized in that... Includes an AD acquisition and time synchronization processing module, a DDR storage module, and an FPGA; The FPGA is determined based on the real-time requirements of precise frequency measurement. Each parallel processing channel includes RAM, a bandpass filter, a DDC, a low-pass filter, a CORDIC core, a FIFO, a rejection and classification module, a multi-point joint frequency coarse measurement module, and an output module. The AD acquisition and time synchronization processing module performs AD acquisition and synchronization processing on the intermediate frequency broadband pulse signal obtained by the receiver antenna, and stores it in the DDR memory module outside the FPGA in time order. Read the pulse signal that requires precise frequency measurement from DDR and cache it. In each RAM, one pulse is cached; The multi-point joint frequency coarse measurement module completes the frequency coarse measurement and calculates the center frequency value of each channel; the bandpass filter performs bandpass filtering based on the frequency coarse measurement results and performs digital down-conversion by DDC; the low-pass filter performs low-pass filtering on the baseband signal. The CORDIC core acquires the signal phase and calculates the intra-pulse phase difference value; The outlier phase difference value is removed by the classification module, and the mean phase difference value is calculated a second time. The output module counts the center frequency of the signal and accurately calculates the signal frequency.