Display panel and manufacturing method of display panel
By introducing an auxiliary electrode and a through-hole design for the pixel definition layer in the OLED display panel, the problem of current voltage drop caused by the thin cathode is solved, resulting in a more uniform brightness distribution and improved display effect.
Patent Information
- Application Number
- CN202211734890.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-30
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2042-12-30
AI Technical Summary
Top-emitting large-size OLED display panels have a relatively thin metal cathode, resulting in a large sheet resistance and a significant current voltage drop, which causes uneven brightness and affects the display effect.
By introducing a through-hole design for the auxiliary electrode and pixel definition layer in the display panel, the cathode is connected to the side end face of the auxiliary electrode through the through-hole, reducing the cathode resistance and avoiding current voltage drop.
This design reduces cathode resistance, prevents uneven brightness, and improves the display panel's performance.
Smart Images

Figure CN117479672B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of displays, specifically to a display panel and a method for manufacturing the display panel. Background Technology
[0002] Organic light-emitting display (OLED) panels are widely used in people's lives, such as display screens for mobile phones and computers.
[0003] However, in order to increase the transmittance of top-emission large-size OLED display panels, the metal cathode is thinner, resulting in a larger sheet resistance and a severe current drop (IR-drop), which leads to obvious uneven brightness of the display panel and seriously affects the display effect. Summary of the Invention
[0004] This application provides a display panel and a method for manufacturing the display panel, which can solve the problem that the thin cathode results in a large sheet resistance and a serious current voltage drop (IR-drop), leading to obvious uneven brightness in the display panel and seriously affecting the display effect of the display panel.
[0005] This application provides a display panel, including:
[0006] Base;
[0007] The anode and auxiliary electrode are disposed in the same layer on the substrate;
[0008] A pixel definition layer is disposed on the anode and the auxiliary electrode, the pixel definition layer including a through hole and an opening, the opening exposing the anode;
[0009] A light-emitting common layer is disposed on the anode and the pixel definition layer;
[0010] The cathode is disposed on the light-emitting common layer;
[0011] Wherein, the through hole exposes at least a portion of the side end face of the auxiliary electrode, the light-emitting common layer is disconnected at the through hole, and the cathode is connected to the side end face of the auxiliary electrode at the through hole.
[0012] Optionally, in some embodiments of this application, the side end face of the auxiliary electrode and the side wall of the through hole are located in the same plane.
[0013] Optionally, in some embodiments of this application, the thickness of the auxiliary electrode is greater than the thickness of the anode.
[0014] Optionally, in some embodiments of this application, both the anode and the auxiliary electrode include a first sub-metal layer;
[0015] The auxiliary electrode further includes a second sub-metal layer stacked on the first sub-metal layer, while the second sub-metal layer is not disposed on the first sub-metal layer of the anode.
[0016] Optionally, in some embodiments of this application, the material of the first sub-metal layer is ITO, and the material of the second sub-metal layer is IZO.
[0017] Optionally, in some embodiments of this application, an array functional composite layer is further included, disposed between the anode and the substrate, the array functional composite layer including auxiliary traces, and the auxiliary electrode is connected to the auxiliary traces.
[0018] Accordingly, this application also provides a method for manufacturing a display panel, comprising the following steps:
[0019] S100 provides a substrate;
[0020] S200, an anode metal layer is formed on the substrate, and the anode metal layer is patterned by a halftone photomask to form an anode and an auxiliary electrode;
[0021] S300, a pixel definition layer is formed on the anode and the auxiliary electrode. When forming the pixel definition layer, a through hole and an opening are formed simultaneously. The opening exposes the anode, and the through hole exposes at least a portion of the side end face of the auxiliary electrode.
[0022] S400, a light-emitting common layer is formed on the pixel definition layer, and the light-emitting common layer is broken at the via portion;
[0023] S500, a cathode is formed on the light-emitting common layer, and the cathode is connected to the side end face of the auxiliary electrode at the through hole.
[0024] Optionally, in some embodiments of this application, the phrase "forming an anode metal layer on the substrate, the anode metal layer being patterned by a halftone photomask to form an anode and an auxiliary electrode" includes:
[0025] S210, forming the entire surface of the anode metal layer on the substrate, the anode metal layer comprising at least a first sub-metal layer and a second sub-metal layer stacked sequentially;
[0026] S220, a photoresist layer is formed on the anode metal layer;
[0027] S230, the photoresist layer is exposed through the halftone photomask, wherein the thickness of the photoresist layer at the auxiliary electrode is greater than the thickness of the photoresist layer at the anode, and the thickness of the photoresist layer at the location between the auxiliary electrode and the anode is zero;
[0028] S240, etching away the anode metal layer corresponding to the location between the auxiliary electrode and the anode;
[0029] S250, Heat the anode metal layer and remove the photoresist layer at the anode location;
[0030] S260, continue etching to remove the second sub-metal layer at the anode location, while retaining the first sub-metal layer to form the anode;
[0031] S270, remove the photoresist layer at the auxiliary electrode location, while the auxiliary electrode retains the stacked first sub-metal layer and second sub-metal layer.
[0032] Optionally, in some embodiments of this application, the material of the first sub-metal layer is ITO, and the material of the second sub-metal layer is IZO.
[0033] Optionally, in some embodiments of this application, when "forming a via and an opening simultaneously when forming the pixel definition layer", the side end face of the auxiliary electrode and the sidewall of the via are located on the same plane.
[0034] This application provides a display panel and a method for manufacturing the display panel. The display panel includes: a substrate; an anode and an auxiliary electrode disposed on the substrate in the same layer; a pixel definition layer disposed on the anode and the auxiliary electrode, the pixel definition layer including a through-hole and an opening, the opening exposing the anode; a light-emitting common layer disposed on the anode and the pixel definition layer; and a cathode disposed on the light-emitting common layer. The through-hole exposes at least a portion of the side face of the auxiliary electrode, the light-emitting common layer is interrupted at the through-hole, and the cathode is connected to the side face of the auxiliary electrode at the through-hole. This application exposes at least a portion of the side face of the auxiliary electrode through the through-hole of the pixel definition layer, the light-emitting common layer is interrupted at the through-hole, and the cathode is connected to the side face of the auxiliary electrode at the through-hole, thereby connecting the cathode to the auxiliary electrode. This reduces the cathode resistance, avoids IR drop, prevents significant brightness unevenness in the display panel, and improves the display effect. Attached Figure Description
[0035] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0036] Figure 1 This is a partial cross-sectional schematic diagram of a display panel provided in Embodiment 1 of this application;
[0037] Figure 2 This is a schematic diagram of the process steps of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0038] Figure 3 for Figure 2 A flowchart illustrating each sub-step of step S200;
[0039] Figure 4 This is a schematic diagram of the first intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0040] Figure 5 This is a schematic diagram of the second intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0041] Figure 6 This is a schematic diagram of the third intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0042] Figure 7 This is a schematic diagram of the fourth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0043] Figure 8 This is a schematic diagram of the fifth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0044] Figure 9 This is a schematic diagram of the sixth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0045] Figure 10 This is a schematic diagram of the seventh intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0046] Figure 11 This is a schematic diagram of the eighth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0047] Figure 12 This is a schematic diagram of the ninth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0048] Figure 13 This is a schematic diagram of the tenth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0049] Figure 14 This is a schematic diagram of the eleventh intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application;
[0050] Figure 15 This is a schematic diagram of the twelfth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application. Detailed Implementation
[0051] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In addition, it should be understood that the specific embodiments described herein are only for illustration and explanation of this application and are not intended to limit this application. In this application, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.
[0052] This application provides a display panel, which includes: a substrate; an anode and an auxiliary electrode disposed on the substrate in the same layer; a pixel definition layer disposed on the anode and the auxiliary electrode, the pixel definition layer including a through hole and an opening, the opening exposing the anode; a light-emitting common layer disposed on the anode and the pixel definition layer; and a cathode disposed on the light-emitting common layer; wherein the through hole exposes at least a portion of the side end face of the auxiliary electrode, the light-emitting common layer is disconnected at the through hole, and the cathode is connected to the side end face of the auxiliary electrode at the through hole.
[0053] This application also provides a method for manufacturing the aforementioned display panel. Specific embodiments of this application will be described in detail below. It should be noted that the order of description of the following embodiments is not intended to limit the preferred order of the embodiments.
[0054] Example 1
[0055] Please see Figure 1 , Figure 1 This is a partial cross-sectional schematic diagram of a display panel provided in Embodiment 1 of this application.
[0056] This application provides a display panel 100, which includes a substrate 11, an anode 201 and an auxiliary electrode 202, a pixel definition layer 22, a light-emitting common layer 23, and a cathode 24. The anode 201 and the auxiliary electrode 202 are disposed on the substrate 11 in the same layer. The pixel definition layer 22 is disposed on the anode 201 and the auxiliary electrode 202, and includes a through hole 221 and an opening 222, with the opening 222 exposing the anode 201. The light-emitting common layer 23 is disposed on the anode 201 and the pixel definition layer 22. The cathode 24 is disposed on the light-emitting common layer 23. The through hole 221 exposes at least a portion of the side end face of the auxiliary electrode 202, the light-emitting common layer 23 is interrupted at the through hole 221, and the cathode 24 is connected to the side end face of the auxiliary electrode 202 at the through hole 221.
[0057] Specifically, the substrate 11 can be a glass substrate or a flexible substrate, which is not limited here.
[0058] Specifically, the display panel 100 includes a plurality of light-emitting devices disposed on a substrate 11. Each light-emitting device includes an anode 201, a light-emitting layer, and a cathode 24. The light-emitting layer includes a light-emitting material layer and a common light-emitting layer 23. Figure 1 The light-emitting material layer is not shown in the diagram. The light-emitting common layer 23 may include at least one of the following: an electron transport layer, an electron blocking layer, an electron injection layer, a hole transport layer, a hole injection layer, and a hole blocking layer.
[0059] Specifically, the light-emitting common layer 23 is deposited without a photomask and is disposed on the entire surface of the pixel definition layer 22 and the anode 201. The light-emitting common layer 23 blocks the connection between the cathode 24 and the auxiliary electrode 202. This application proposes a convenient connection implementation method to address this problem.
[0060] Specifically, the pixel definition layer 22 includes a through hole 221 and an opening 222. The opening 222 exposes the anode 201, and the opening 222 contains a light-emitting layer of a light-emitting device. The light-emitting layer is disposed between the anode 201 and the cathode 24.
[0061] Specifically, the via 221 exposes at least a portion of the side face of the auxiliary electrode 202. The pixel definition layer 22 has a relatively large thickness, generally greater than or equal to 1 micrometer and less than or equal to 2 micrometers. Therefore, the via 221 has a relatively large depth.
[0062] Specifically, the through hole 221 exposes at least a portion of the side end face of the auxiliary electrode 202, such as... Figure 1 As shown, the through hole 221 exposes the first side end face 2021 of the auxiliary electrode 202.
[0063] Specifically, the anode 201 and the auxiliary electrode 202 are disposed on the same layer on the substrate 11, that is, the anode 201 and the auxiliary electrode 202 are disposed on the same film layer on the substrate 11. This same film layer may or may not be a substrate. As will be described in subsequent embodiments, the anode 201 and the auxiliary electrode 202 are disposed on the array functional composite layer 102. More specifically, the anode 201 and the auxiliary electrode 202 are both disposed on the planarization layer 20.
[0064] Specifically, the light-emitting common layer 23 is broken at the via 221. Since the pixel definition layer 22 has a large thickness and the via 221 has a large depth, by controlling the evaporation direction of the light-emitting common layer 23, the light-emitting common layer 23 can be broken at the via 221. More specifically, the light-emitting common layer 23 can be broken at the side end face of the auxiliary electrode 202 exposed by the via 221, that is, the light-emitting common layer 23 can be broken at the first side end face 2021, thus exposing the first side end face 2021.
[0065] Specifically, the cathode 24 is connected to the side end face of the auxiliary electrode 202 at the through hole 221, which controls the forming direction of the cathode 24. The cathode 24 can be attached to the first side end face 2021, that is, the cathode 24 is connected to the first side end face 2021 of the auxiliary electrode 202.
[0066] In this embodiment, at least a portion of the side surface of the auxiliary electrode 202 is exposed through the through hole 221 of the pixel definition layer 22. The light-emitting common layer 23 is disconnected at the through hole 221. The cathode 24 is connected to the side surface of the auxiliary electrode 202 at the through hole 221. This connection of the cathode 24 to the auxiliary electrode 202 reduces the resistance of the cathode 24, avoids current voltage drop (IR-drop), prevents significant brightness unevenness in the display panel 100, and improves the display effect of the display panel 100.
[0067] In some embodiments, the side end face of the auxiliary electrode 202 and the side wall of the through hole 221 are located in the same plane.
[0068] Specifically, the side face of the auxiliary electrode 202 and the side wall of the through hole 221 are located on the same plane, that is, the side face of the first side face 2021 and the side wall of the through hole 221 where the first side face 2021 is located are on the same plane or surface, so that the through hole 221 maintains a large depth here. When the light-emitting common layer 23 is deposited, the side wall of the through hole 221 above the first side face 2021 blocks the light-emitting common layer 23 from covering the first side face 2021, thereby causing the light-emitting common layer 23 to break at the through hole 221, improving the yield of the light-emitting common layer 23 breaking at the through hole 221.
[0069] In some embodiments, the thickness of the auxiliary electrode 202 is greater than the thickness of the anode 201.
[0070] Specifically, in subsequent embodiments, it will be explained why the thickness of the auxiliary electrode 202 is greater than that of the anode 201, in order to form the anode 201 and the auxiliary electrode 202 using the same photomask or the same process.
[0071] Specifically, the thickness of the auxiliary electrode 202 is greater than the thickness of the anode 201, that is, the number of film layers of the auxiliary electrode 202 is greater than the number of film layers of the anode 201. The auxiliary electrode 202 and the anode 201 are arranged in the same layer and are formed by the same metal patterning. The film layer in the anode 201 blocks the etching of the anode 201 structure in order to facilitate the formation of the anode 201.
[0072] In some embodiments, both the anode 201 and the auxiliary electrode 202 include a first sub-metal layer 213; the auxiliary electrode 202 further includes a second sub-metal layer 214 stacked on the first sub-metal layer 213, and the anode 201 does not have a second sub-metal layer 214 on the first sub-metal layer 213.
[0073] Specifically, both the anode 201 and the auxiliary electrode 202 include a first sub-metal layer 213; the auxiliary electrode 202 also includes a second sub-metal layer 214 stacked on the first sub-metal layer 213. The anode 201 does not have a second sub-metal layer 214 on its first sub-metal layer 213. As will be described in the following embodiments, the anode 201 and the auxiliary electrode 202 can be formed by the same half-tone mask (grayscale mask), so that the thickness of the auxiliary electrode 202 is greater than the thickness of the anode 201.
[0074] Specifically, the film structure of the anode 201 includes a fourth sub-metal layer 211, a third sub-metal layer 212, and a first sub-metal layer 213 stacked sequentially, and the film structure of the auxiliary electrode 202 includes a fourth sub-metal layer 211, a third sub-metal layer 212, a first sub-metal layer 213, and a second sub-metal layer 214 stacked sequentially. The material of the fourth sub-metal layer 211 can be ITO (indium tin oxide), the material of the third sub-metal layer 212 can be Ag (silver) or Al (aluminum), the material of the first sub-metal layer 213 can be ITO (indium tin oxide), and the material of the second sub-metal layer 214 can be IZO (indium zinc oxide). That is, the anode 201 is an ITO / Ag / ITO stack, and the auxiliary electrode 202 is an ITO / Ag / ITO / IZO stack; or the anode 201 is an ITO / Al / ITO stack, and the auxiliary electrode 202 is an ITO / Al / ITO / IZO stack.
[0075] In some embodiments, the material of the first sub-metal layer 213 is ITO, and the material of the second sub-metal layer 214 is IZO.
[0076] In some embodiments, the display panel 100 further includes an array functional composite layer 102 disposed between the anode 201 and the substrate 11. The array functional composite layer 102 includes an auxiliary trace 181. The auxiliary electrode 202 is connected to the auxiliary trace 181, which can better reduce the resistance and current voltage drop of the cathode 24.
[0077] Specifically, the display panel 100 includes a substrate 11 and an array functional composite layer 102 disposed on the substrate 11. An anode 201 and an auxiliary electrode 202 are disposed on the array functional composite layer 102. The array functional composite layer 102 includes a thin film transistor 101. The thin film transistor 101 includes a semiconductor layer 14, a gate insulating layer 15, a gate 16, a source 182, and a drain 183.
[0078] Specifically, Figure 1 The schematic diagram shows the film layer structure of the display panel 100, including: a substrate 11, a light-shielding layer 12 disposed on the substrate 11, a buffer layer 13 disposed on the light-shielding layer 12, a semiconductor layer 14 disposed on the buffer layer 13, a gate insulating layer 15 disposed on the semiconductor layer 14, a gate 16 disposed on the gate insulating layer 15, an interlayer insulating layer 17 disposed on the gate 16, a source / drain metal layer 18 disposed on the interlayer insulating layer 17, a first insulating layer 19 disposed on the source / drain metal layer 18, a planarization layer 20 disposed on the first insulating layer 19, an anode metal layer 21 disposed on the planarization layer 20, a pixel definition layer 22 disposed on the anode metal layer 21, a light-emitting material layer (not shown) disposed on the anode 21 and within the opening 222, a light-emitting common layer 23 disposed on the pixel definition layer 22, and a cathode 24 disposed on the light-emitting common layer 23. The source / drain metal layer 18 includes or is patterned to form an auxiliary trace 181, a source electrode 182, and a drain electrode 183 on the same layer, and the anode metal layer 21 includes or is patterned to form an anode 201 and an auxiliary electrode 202 on the same layer. The film structure of the display panel 100 is not limited to this; for example, the display panel 100 may also include an encapsulation layer disposed on the cathode 24.
[0079] Example 2
[0080] Please see Figures 2 to 15 , Figure 2 This is a schematic diagram of the process steps of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 3 for Figure 2 A flowchart illustrating each sub-step of step S200;
[0081] Figure 4 This is a schematic diagram of the first intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 5 This is a schematic diagram of the second intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 6This is a schematic diagram of the third intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 7 This is a schematic diagram of the fourth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 8 This is a schematic diagram of the fifth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 9 This is a schematic diagram of the sixth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 10 This is a schematic diagram of the seventh intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 11 This is a schematic diagram of the eighth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 12 This is a schematic diagram of the ninth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 13 This is a schematic diagram of the tenth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 14 This is a schematic diagram of the eleventh intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application; Figure 15 This is a schematic diagram of the twelfth intermediate process of a method for manufacturing a display panel according to Embodiment 2 of this application.
[0082] This embodiment provides a method for manufacturing a display panel. The display panel 100 in any of the above embodiments can be manufactured using the method for manufacturing a display panel in this embodiment.
[0083] like Figure 2 As shown, the manufacturing method of a display panel provided in this embodiment includes the following steps: S100, S200, S300, S400, S500. The step numbers are not intended to limit the order of the process steps.
[0084] S100 provides a substrate.
[0085] Specifically, such as Figure 4 As shown, a substrate 11 is provided, on which multiple thin-film transistors 101 can be formed, without limitation.
[0086] S200, an anode metal layer is formed on a substrate, and the anode metal layer is patterned by a halftone photomask to form an anode and an auxiliary electrode.
[0087] Specifically, such as Figure 5 As shown, a first insulating layer 19 is formed on the thin-film transistor 101; as Figure 6 As shown, a planarization layer 20 is formed on the first insulating layer 19; at the same time, the planarization layer 20 and the first insulating layer 19 are etched to form a first via 2001 and a second via 2002.
[0088] Specifically, such as Figures 7 to 12 As shown, an anode metal layer 21 is formed on the substrate 11. The anode metal layer 21 is patterned using a halftone photomask to form an anode 201 and an auxiliary electrode 202. More specifically, the anode metal layer 21 is formed on the planarization layer 20. The anode metal layer 21 is patterned using a halftone photomask to form an anode 201 and an auxiliary electrode 202. The anode 201 is connected to the drain 183 of the thin-film transistor 101 through a first via 2001, and the auxiliary electrode 202 is connected to the auxiliary trace 181 through a second via 2002.
[0089] S300, a pixel definition layer is formed on the anode and the auxiliary electrode. When forming the pixel definition layer, a via and an opening are formed simultaneously. The opening exposes the anode, and the via exposes at least a portion of the side end face of the auxiliary electrode.
[0090] Specifically, such as Figure 13 As shown, a pixel definition layer 22 is formed on the anode 201 and the auxiliary electrode 202. When forming the pixel definition layer 22, a through hole 221 and an opening 222 are formed simultaneously. The opening 222 exposes the anode 201, and the through hole 221 exposes at least a portion of the side end face of the auxiliary electrode 202.
[0091] Specifically, the through hole 221 exposes at least a portion of the side end face 2021 of the auxiliary electrode 202, that is, exposes the first side end face 2021.
[0092] S400, a light-emitting common layer is formed on the pixel definition layer, and the light-emitting common layer is broken at the via location.
[0093] Specifically, such as Figure 14 As shown, a light-emitting common layer 23 is formed on the pixel definition layer 22, and the light-emitting common layer 23 is broken at the via 221.
[0094] Specifically, such as Figure 14 As shown, the entire surface of the light-emitting common layer 23 is vapor-deposited, and the vapor deposition direction of the light-emitting common layer 23 is controlled, for example... Figure 14 In the first direction X, a light-emitting common layer 23 is deposited. The sidewall of the through hole 221 on the first side end face 2021 blocks the light-emitting common layer 23, causing the light-emitting common layer 23 to break at the through hole 221 and exposing at least part of the side end face of the auxiliary electrode 202, that is, exposing the first side end face 2021.
[0095] S500, a cathode is formed on the light-emitting common layer, and the cathode is connected to the side end face of the auxiliary electrode at the through-hole.
[0096] Specifically, such as Figure 15 As shown, a cathode 24 is formed on the light-emitting common layer 23, and the cathode 24 is connected to the side end face of the auxiliary electrode 202 at the through hole 221.
[0097] Specifically, such as Figure 15 As shown, the direction of vapor deposition or sputtering formed on the cathode 24 is controlled, for example... Figure 15 In the second direction Y, the cathode 24 is formed facing the first side end face 2021, so that the cathode 24 is connected to the side end face of the auxiliary electrode 202 at the through hole 221, that is, the cathode 24 is connected to the first side end face 2021.
[0098] Example 3
[0099] The manufacturing method of the display panel in this embodiment is the same as or similar to that in any of the embodiments in Embodiment 2, except that the detailed process of step S200 is further described.
[0100] like Figure 3 As shown, in "step S200, forming an anode metal layer on a substrate, the anode metal layer is patterned by a halftone photomask to form an anode and an auxiliary electrode", the steps include: S210, S220, S230, S240, S250, S260 and S270.
[0101] S210, an anode metal layer is formed on the entire surface of the substrate, the anode metal layer including at least a first sub-metal layer and a second sub-metal layer stacked sequentially.
[0102] Specifically, such as Figure 7 As shown, an anode metal layer 21 is formed on the entire surface of the substrate 11. The anode metal layer 21 includes at least a first sub-metal layer 213 and a second sub-metal layer 214 that are stacked sequentially.
[0103] Specifically, such as Figure 7 As shown, an anode metal layer 21 is formed on a substrate 11 or a planar layer.
[0104] S220 forms a photoresist layer on the anode metal layer.
[0105] Specifically, such as Figure 8 As shown, a photoresist layer 30 is formed on the anode metal layer 21, and at this time the photoresist layer 30 is still set on the entire surface.
[0106] S230, the photoresist layer is exposed using a halftone photomask, wherein the thickness of the photoresist layer at the auxiliary electrode is greater than the thickness of the photoresist layer at the anode, and the thickness of the photoresist layer at the location between the auxiliary electrode and the anode is zero.
[0107] Specifically, such as Figure 8 As shown, the photoresist layer 30 is exposed by a halftone photomask, wherein the thickness of the photoresist layer 30 at the auxiliary electrode 202 is greater than the thickness of the photoresist layer 30 at the anode 201, and the thickness of the photoresist layer 30 at the location between the auxiliary electrode 202 and the anode 201 is zero.
[0108] Specifically, such as Figure 8 As shown, the photoresist layer 30 at the auxiliary electrode 202 is the first sub-photoresist region 301, the photoresist layer 30 at the anode 201 is the second sub-photoresist region 302, and the photoresist layer 30 at the region between the auxiliary electrode 202 and the anode 201 is the third sub-photoresist region 303. The thickness of the first sub-photoresist region 301 is greater than the thickness of the second sub-photoresist region 302, and the thickness of the third sub-photoresist region 303 is zero.
[0109] S240, etching away the corresponding anode metal layer at the location between the auxiliary electrode and the anode.
[0110] Specifically, such as Figure 9 As shown, the anode metal layer 21 corresponding to the part between the auxiliary electrode 202 and the anode 201 is etched away, so that the auxiliary electrode 202 is insulated from the anode 201.
[0111] S250, heats the anode metal layer and removes the photoresist layer at the anode location.
[0112] Specifically, such as Figure 10 As shown, the anode metal layer 21 is heated and the photoresist layer at the anode 201 is removed.
[0113] Specifically, such as Figure 10 As shown, heating the anode metal layer 21 or the display panel 100 causes the first sub-metal layer 213 to crystallize, i.e., ITO crystallization.
[0114] Specifically, the heating conditions for the anode metal layer 21 or the display panel 100 can be 250 degrees Celsius for 1 hour to crystallize the ITO.
[0115] S260, continue etching to remove the second sub-metal layer at the anode location, while retaining the first sub-metal layer to form the anode.
[0116] Specifically, such as Figure 11 As shown, etching continues, removing the second sub-metal layer 214 at the anode 201 location, while retaining the first sub-metal layer 213 to form the anode 201.
[0117] Specifically, since the first sub-metal layer 213 crystallizes in step S250, the second sub-metal layer 214 (IZO) can be etched away when oxalic acid is used for etching, but the first sub-metal layer 213 (ITO) cannot be etched away, thus forming the anode 201.
[0118] S270, remove the photoresist layer at the auxiliary electrode location, and retain the stacked first sub-metal layer and second sub-metal layer at the auxiliary electrode.
[0119] Specifically, such as Figure 12As shown, the photoresist layer 30 at the auxiliary electrode 202 is removed, and the auxiliary electrode 202 retains the stacked first sub-metal layer 213 and second sub-metal layer 214.
[0120] It should be noted that, as described in Example 1, the layer structure of the anode metal layer 21 can be an ITO / Ag / ITO / IZO stack or an ITO / Al / ITO / IZO stack.
[0121] In some embodiments, the material of the first sub-metal layer 213 is ITO, and the material of the second sub-metal layer 214 is IZO.
[0122] In some embodiments, when "a via and an opening are formed simultaneously when forming a pixel definition layer", the side end face of the auxiliary electrode and the sidewall of the via are located in the same plane.
[0123] Specifically, when “forming a through hole 221 and an opening 222 simultaneously while forming a pixel definition layer 22”, the side end face of the auxiliary electrode 202 and the side wall of the through hole 221 are located on the same plane.
[0124] It should be noted that for the anode metal layer 21, through hole 221, cathode 24 overlapping arrangement and other film layers and structures not fully described in Embodiments 2 and 3, please refer to Embodiment 1. Similarly, for the anode metal layer 21, through hole 221, cathode 24 overlapping arrangement and other film layers, processes and structures not fully described in Embodiment 1, please refer to the descriptions in Embodiments 2 and 3.
[0125] The above provides a detailed description of the display panel and its manufacturing method provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A display panel, characterized in that, include: Base; The anode and auxiliary electrode are disposed in the same layer on the substrate; A pixel definition layer is disposed on the anode and the auxiliary electrode, the pixel definition layer including a through hole and an opening, the opening exposing the anode; A light-emitting common layer is disposed on the anode and the pixel definition layer; The cathode is disposed on the light-emitting common layer; Wherein, the through hole exposes at least a portion of the side end face of the auxiliary electrode, the light-emitting common layer is disconnected at the through hole, the cathode is connected to the side end face of the auxiliary electrode at the through hole, and the side end face of the auxiliary electrode and the side wall of the through hole are located in the same plane; Both the anode and the auxiliary electrode include a first sub-metal layer, and the auxiliary electrode further includes a second sub-metal layer stacked on the first sub-metal layer.
2. The display panel as described in claim 1, characterized in that, The thickness of the auxiliary electrode is greater than the thickness of the anode.
3. The display panel as described in claim 1, characterized in that, The material of the first sub-metal layer is ITO, and the material of the second sub-metal layer is IZO.
4. The display panel as described in claim 1, characterized in that, It also includes an array of functional composite layers disposed between the anode and the substrate, the array of functional composite layers including auxiliary traces, and the auxiliary electrode connected to the auxiliary traces.
5. A method for manufacturing a display panel, characterized in that, Includes the following steps: S100 provides a substrate; S200, an anode metal layer is formed on the substrate, and the anode metal layer is patterned by a halftone photomask to form an anode and an auxiliary electrode, wherein the anode and the auxiliary electrode both include a first sub-metal layer, and the auxiliary electrode further includes a second sub-metal layer stacked on the first sub-metal layer; S300, a pixel definition layer is formed on the anode and the auxiliary electrode. When forming the pixel definition layer, a through hole and an opening are formed simultaneously. The opening exposes the anode, and the through hole exposes at least a portion of the side end face of the auxiliary electrode. The side end face of the auxiliary electrode and the side wall of the through hole are located in the same plane. S400, a light-emitting common layer is formed on the pixel definition layer, and the light-emitting common layer is broken at the via portion; S500, a cathode is formed on the light-emitting common layer, and the cathode is connected to the side end face of the auxiliary electrode at the through hole.
6. The method for manufacturing a display panel as described in claim 5, characterized in that, Step S200 includes: S210, forming the entire surface of the anode metal layer on the substrate, the anode metal layer comprising at least a first sub-metal layer and a second sub-metal layer stacked sequentially; S220, a photoresist layer is formed on the anode metal layer; S230, the photoresist layer is exposed through the halftone photomask, wherein the thickness of the photoresist layer at the auxiliary electrode is greater than the thickness of the photoresist layer at the anode, and the thickness of the photoresist layer at the location between the auxiliary electrode and the anode is zero; S240, etching away the anode metal layer corresponding to the location between the auxiliary electrode and the anode; S250, Heat the anode metal layer and remove the photoresist layer at the anode location; S260, continue etching to remove the second sub-metal layer at the anode location, while retaining the first sub-metal layer to form the anode; S270, remove the photoresist layer at the auxiliary electrode location, while the auxiliary electrode retains the stacked first sub-metal layer and second sub-metal layer.
7. The method for manufacturing a display panel as described in claim 6, characterized in that, The material of the first sub-metal layer is ITO, and the material of the second sub-metal layer is IZO.
Citation Information
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