A high-speed high-stability locking circuit

Abstract

The application discloses a high-speed high-stability locking circuit, comprising an integral branch module, a proportional differential branch module, a gain adjusting module and a low-speed integral module, the integral branch module and the proportional differential branch module are connected with one end of the parallel connection being connected with a to-be-processed signal input end and the other end being connected with an input end of the gain adjusting module, an output end of the gain adjusting module is connected with a high-speed output end and an input end of the low-speed integral module respectively, and an output end of the low-speed integral module is connected with a low-speed output end. The application outputs two feedback signals, one is used for high-speed feedback control, and the other is used for low-speed large-amplitude feedback; the high-speed and low-speed double-channel outputs form a complementary relationship, not only the feedback compensation of the fast deviation is performed, but also the feedback compensation of the deviation formed by the slow drift is performed, so that the long-time precise control locking of the system is ensured, and the circuit can simultaneously consider the high feedback speed and the high locking stability.

Description

Technical Field

[0001] This invention relates to the field of laser frequency control, specifically to a high-speed, high-stability locking circuit suitable for laser frequency locking and laser linewidth narrowing, primarily used in scientific fields such as optics, quantum computing, and precise atomic and molecular spectral measurement. Background Technology

[0002] Feedback control circuits are widely used not only in industrial control applications but also in scientific and technological research. Unlike most industrial control systems, which are often rudimentary and involve high power and large size, the scientific and technological field has a more urgent need for feedback control circuits with high stability, low noise, high bandwidth, and high gain. These feedback circuits are mainly used for feedback locking control of laser frequencies. Currently, fields such as optical clocks and quantum precision measurement rely heavily on feedback control circuits.

[0003] The main drawbacks of existing commercially available laser frequency feedback control circuits are as follows:

[0004] 1. Due to limitations in circuit components, feedback circuits cannot simultaneously achieve high feedback speed and high control stability.

[0005] 2. The feedback control output has only a single channel output, making it difficult to balance high-speed feedback and large-amplitude feedback.

[0006] 3. It does not have a built-in scanning signal generation module, and an external signal source is required to achieve frequency locking. Summary of the Invention

[0007] The purpose of this invention is to address the aforementioned problems in the prior art by proposing a high-speed, high-stability locking circuit.

[0008] The above-mentioned objectives of the present invention are achieved by the following technical means:

[0009] A high-speed, high-stability locking circuit includes an integral branch module, a proportional differential branch module, a gain adjustment module, and a low-speed integral module. The integral branch module and the proportional differential branch module are connected in parallel, with one end connected to the input terminal of the signal to be processed and the other end connected to the input terminal of the gain adjustment module. The output terminal of the gain adjustment module is connected to the high-speed output terminal and the input terminal of the low-speed integral module, respectively. The output terminal of the low-speed integral module is connected to the low-speed output terminal.

[0010] As described above, the integral branch module includes an integral proportional module and an integral module. The input terminal of the integral proportional module is connected to the input terminal of the signal to be processed, the output terminal of the integral proportional module is connected to the input terminal of the integral module, and the output terminal of the integral module is connected to the input terminal of the gain adjustment module.

[0011] As described above, the integral proportional module includes a first operational amplifier, a first resistor, and a first capacitor. The non-inverting input terminal of the first operational amplifier is connected to the input terminal of the signal to be processed. The inverting input terminal of the first operational amplifier is connected to one end of the first resistor and one end of the first capacitor, respectively. The other end of the first resistor is grounded, and the other end of the first capacitor is connected to the output terminal of the first operational amplifier. The output terminal of the first operational amplifier is also connected to the input terminal of the integral module.

[0012] As described above, the integration module includes a second operational amplifier, a second resistor, and a second capacitor. The non-inverting input terminal of the second operational amplifier is grounded, and the inverting input terminal of the second operational amplifier is connected to one end of the second resistor and one end of the second capacitor, respectively. The other end of the second resistor is connected to the output terminal of the first operational amplifier, and the other end of the second capacitor is connected to the output terminal of the second operational amplifier. The output terminal of the second operational amplifier is also connected to the input terminal of the gain adjustment module.

[0013] As described above, the proportional differential branch module includes a proportional differential module and a high-pass module. The input terminal of the proportional differential module is connected to the input terminal of the signal to be processed, the output terminal of the proportional differential module is connected to the input terminal of the high-pass module, and the output terminal of the high-pass module is connected to the input terminal of the gain adjustment module.

[0014] As described above, the proportional differential module includes a third operational amplifier, a third capacitor, a third resistor, a fourth resistor, and a fifth resistor. The non-inverting input terminal of the third operational amplifier is grounded. The inverting input terminal of the third operational amplifier is connected to one end of the third capacitor, one end of the third resistor, and one end of the fifth resistor, respectively. The other end of the third capacitor is connected to one end of the fourth resistor. The other ends of the third resistor and the other ends of the fourth resistor are connected to the input terminal of the signal to be processed. The other end of the fifth resistor is connected to the output terminal of the third operational amplifier. The output terminal of the third operational amplifier is also connected to the input terminal of the high-pass module.

[0015] As described above, the high-pass module includes a fourth capacitor and a sixth resistor. The fourth capacitor and the sixth resistor are connected in series, with one end connected to the output of the third operational amplifier and the other end connected to the input of the gain adjustment module.

[0016] A high-speed, high-stability locking circuit further includes a first polarity adjustable adder module, a second polarity adjustable adder module, and a bias adjustment module. The output terminal of the gain adjustment module is connected to the first input terminal of the first polarity adjustable adder module, the second input terminal of the first polarity adjustable adder module is connected to the output terminal of the bias adjustment module through a first switching switch, and the output terminal of the first polarity adjustable adder module is connected to a high-speed modulation terminal. The output terminal of the low-speed integration module is connected to the first input terminal of the second polarity adjustable adder module, the second input terminal of the second polarity adjustable adder module is connected to the output terminal of the bias adjustment module through a first switching switch, and the output terminal of the second polarity adjustable adder module is connected to a low-speed modulation terminal.

[0017] A high-speed, high-stability locking circuit further includes a scanning signal generation module. The third input terminal of the first polarity adjustable adder module is connected to the output terminal of the scanning signal generation module through a second switching switch. The third input terminal of the second polarity adjustable adder module is connected to the output terminal of the scanning signal generation module through a second switching switch.

[0018] As described above, both the first and second polarity-adjustable adder modules include an adder circuit module and a polarity adjustment module connected in sequence. The polarity adjustment module includes a seventh resistor, a feedback resistor, and a fourth operational amplifier. The non-inverting input terminal of the fourth operational amplifier is grounded, and the inverting input terminal of the fourth operational amplifier is connected to one end of the seventh resistor and one end of the feedback resistor, respectively. The output terminal of the fourth operational amplifier is connected to the other end of the feedback resistor. The other end of the seventh resistor serves as the input terminal of the polarity adjustment module and is connected to the output terminal of the adder circuit module. The output terminal of the fourth operational amplifier serves as the output terminal of the polarity adjustment module. A third switching switch is also provided after the polarity adjustment module. The third switching switch is a single-pole double-throw switch. The two fixed pins of the third switching switch are connected to the output terminal of the fourth operational amplifier and the output terminal of the adder circuit module, respectively. The switching pin of the third switching switch serves as the output terminal.

[0019] Compared with the prior art, the present invention has the following advantages:

[0020] 1. Compared with digital feedback control circuits, the present invention can achieve higher feedback bandwidth (faster response speed) and lower noise introduction.

[0021] 2. Compared to existing analog feedback control circuits, it has more significant advantages in laser control, especially in precision laser control, mainly in the following aspects:

[0022] The integral branch module and the proportional differential branch module of the present invention are implemented with different operational amplifiers, so that the circuit can simultaneously achieve high feedback speed and high lock-in stability.

[0023] This invention outputs two feedback signals: one for high-speed feedback control and the other for low-speed, large-amplitude feedback. The high-speed and low-speed dual-channel outputs form a complementary relationship rather than an independent one. In terms of control, it not only provides feedback compensation for rapid deviations but also for deviations caused by slow drifts. Slow drift control can ensure that the rapid output value is near 0, thereby ensuring precise control and locking of the system over a long period of time.

[0024] This invention incorporates a bias adjustment module (output bias control) and a scanning signal generation module (triangular wave scanning) to reduce the difficulty of the frequency locking process. The dual-output bias adjustment and scanning control can be selected via switches to superimpose onto a specific channel, providing greater flexibility. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the structure of Embodiment 1 of the present invention;

[0026] Figure 2 This is a schematic diagram of the integral branching module of the present invention;

[0027] Figure 3 This is a schematic diagram of the proportional differential branch module of the present invention;

[0028] Figure 4 This is a schematic diagram of the structure of Embodiment 2 of the present invention, which includes an addition module with adjustable polarity.

[0029] Figure 5 This is a schematic diagram of the structure of Embodiment 2 of the present invention, which includes an adjustable polarity addition module and a scanning signal generation module.

[0030] Figure 6 This is a schematic diagram of the structure of Embodiment 3 of the present invention;

[0031] Figure 7 This is a schematic diagram of the internal circuit structure of the integral proportional module of the present invention;

[0032] Figure 8 This is a schematic diagram of the internal circuit structure of the integration module;

[0033] Figure 9 This is a schematic diagram of the internal circuit structure of the proportional differential module of the present invention;

[0034] Figure 10 This is a schematic diagram of the internal circuit structure of the Qualcomm module of the present invention;

[0035] Figure 11 This is a schematic diagram of the internal circuit structure of the polarity adjustment module of the present invention;

[0036] Figure 12 This is a schematic diagram of the single-pole double-throw switch of the present invention;

[0037] Figure labels and corresponding component names:

[0038] 1—Integral branch module; 2—Proportional differential branch module; 3—Gain adjustment module; 4—Low-speed integration module; 5—First polarity adjustable adder module; 6—Second polarity adjustable adder module; 7—Bias adjustment module; 8—First switching switch; 9—Scan signal generation module; 10—Second switching switch; 11—Integral proportional module; 12—Integral module; 21—Proportional differential module; 22—High-pass module; 111—First operational amplifier; 112—First capacitor; 113—First resistor ; 121—Second operational amplifier; 122—Second capacitor; 123—Second resistor; 211—Third operational amplifier; 212—Third capacitor; 213—Third resistor; 214—Fourth resistor; 215—Fifth resistor; 221—Fourth capacitor; 222—Sixth resistor; 223—Seventh resistor; 224—Feedback resistor; 225—Third toggle switch; 226—Fourth operational amplifier; 225a—Fixed pin; 225b—Fixed pin; 225c—Toggle pin. Detailed Implementation

[0039] To facilitate understanding and implementation of the present invention by those skilled in the art, the present invention will be further described in detail below with reference to embodiments. It should be understood that the embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0040] Example 1:

[0041] A high-speed, high-stability lock-in circuit includes an integral branch module 1, a proportional differential branch module 2, a gain adjustment module 3, and a low-speed integral module 4. Integral branch module 1 and proportional differential branch module 2 are connected in parallel, with one end connected to the input of the signal to be processed and the other end connected to the input of the gain adjustment module 3. The output of the gain adjustment module 3 is connected to both the high-speed output and the input of the low-speed integral module 4. The output of the low-speed integral module 4 is connected to the low-speed output. The output of the gain adjustment module 3 outputs a high-speed signal to the high-speed output, and the output of the low-speed integral module 4 outputs a low-speed signal to the low-speed output.

[0042] The integral branch module 1 includes an integral proportional module 11 and an integral module 12. The input terminal of the integral proportional module 11 is connected to the input terminal of the signal to be processed, the output terminal of the integral proportional module 11 is connected to the input terminal of the integral module 12, and the output terminal of the integral module 12 is connected to the input terminal of the gain adjustment module 3.

[0043] The positions of the proportional integral module 11 and the integral module 12 can be interchanged.

[0044] The proportional integration module 11 includes a first operational amplifier 111, a first resistor 113, and a first capacitor 112. The non-inverting input terminal of the first operational amplifier 111 is connected to the input terminal of the signal to be processed. The inverting input terminal of the first operational amplifier 111 is connected to one end of the first resistor 113 and one end of the first capacitor 112, respectively. The other end of the first resistor 113 is grounded, and the other end of the first capacitor 112 is connected to the output terminal of the first operational amplifier 111, forming a proportional integration circuit. The output terminal of the first operational amplifier 111 is also connected to the input terminal of the integration module 12.

[0045] The integration module 12 includes a second operational amplifier 121, a second resistor 123, and a second capacitor 122. The non-inverting input terminal of the second operational amplifier 121 is grounded, and the inverting input terminal of the second operational amplifier 121 is connected to one end of the second resistor 123 and one end of the second capacitor 122, respectively. The other end of the second resistor 123 is connected to the output terminal of the first operational amplifier 121, and the other end of the second capacitor 122 is connected to the output terminal of the second operational amplifier 121, forming an inverting integration circuit. The output terminal of the second operational amplifier 121 is also connected to the input terminal of the gain adjustment module 3.

[0046] The proportional differential branch module 2 includes a proportional differential module 21 and a high-pass module 22. The input terminal of the proportional differential module 21 is connected to the input terminal of the signal to be processed, the output terminal of the proportional differential module 21 is connected to the input terminal of the high-pass module 22, and the output terminal of the high-pass module 22 is connected to the input terminal of the gain adjustment module 3.

[0047] The proportional differential module 21 and the high-pass module 22 can be interchanged.

[0048] The proportional differential module 21 includes a third operational amplifier 211, a third capacitor 212, a third resistor 213, a fourth resistor 214, and a fifth resistor 215. The non-inverting input terminal of the third operational amplifier 211 is grounded. The inverting input terminal of the third operational amplifier 211 is connected to one end of the third capacitor 212, one end of the third resistor 213, and one end of the fifth resistor 215, respectively. The other end of the third capacitor 212 is connected to one end of the fourth resistor 214. The other ends of the third resistor 213 and the fourth resistor 214 are connected to the input terminal of the signal to be processed. The other end of the fifth resistor 215 is connected to the output terminal of the third operational amplifier 211, forming an inverting proportional differential circuit. The output terminal of the third operational amplifier 211 is also connected to the input terminal of the high-pass module 22.

[0049] The high-pass module 22 includes a fourth capacitor 221 and a sixth resistor 222. The fourth capacitor 221 and the sixth resistor 222 are connected in series. One end of them is connected to the output terminal of the third operational amplifier 211, and the other end is connected to the input terminal of the gain adjustment module 3. The positions of the capacitor and resistor can be interchanged.

[0050] The proportional integral module 11 can also be implemented using an inverted proportional integral circuit, while the proportional differential branch module 2 is inverted, such as changing the internal circuit of the proportional differential module 21 to a positive proportional differential circuit.

[0051] The input terminal of the signal to be processed receives the input signal of the error to be locked (such as the frequency locking error signal generated by the mixer in laser frequency locking; the output voltage signal of the phase detector in laser phase locking). The input signal of the error to be locked is divided into two paths. One path is input to the input terminal of the integration branch module 1. The integration branch module 1 performs double integration operation on the input signal of the error to be locked, which greatly improves the low-frequency gain, so as to effectively suppress laser frequency jitter and drift. The integration branch module 1 is implemented using a low-temperature drift and high-stability operational amplifier (such as the operational amplifier of model OP27) to reduce the locking deviation caused by the operational amplifier bias.

[0052] Another input of the error input signal to be locked is fed to the input of the proportional differential branch module 2. The proportional differential branch module 2 uses a high-speed operational amplifier (such as the LTC6228) to perform proportional differential operations on the error input signal to be locked, thereby effectively suppressing high-frequency noise from the laser frequency. The high-pass circuit 202 filters out the low-frequency and DC components of the high-speed operational amplifier output, eliminating the influence of the high-speed operational amplifier's voltage bias on the locking feedback. The output signals of the integral branch module 1 and the proportional differential branch module 2 are input to the gain adjustment module 3. The gain adjustment module 3 adds the output signals of the integral branch module 1 and the proportional differential branch module 2 and then amplifies and adjusts them. The gain adjustment module 3 can adjust the amplification factor. After being adjusted by gain adjustment module 3, the signal is split into two paths. One path outputs a high-speed output signal, which is used to control the high-speed frequency modulation of the laser. This high-speed output signal can be output to the laser current feedback control interface, or the frequency feedback control interface of other devices that can adjust the laser frequency (such as an acousto-optic modulator), to achieve laser frequency locking. The feedback speed of this channel is generally above 100 kHz. The other path then passes through a low-speed integration module 4 to output a low-speed output signal. The low-speed integration module 4 uses a general-purpose RC integration circuit (the circuit structure can be compared with...). Figure 8 (The structure is the same as in the previous one). By adjusting the RC parameters, the frequency range to be filtered out can be selected, retaining the low-frequency (e.g., 1kHz to 0Hz) to DC frequency signals. At the same time, the low-frequency to DC frequency range signals are integrated. The low-speed output signal output by the low-speed integration module 4 can be connected to the laser's temperature control interface or PZT (piezoelectric ceramic) feedback control interface to achieve wide-range frequency modulation. It can also achieve laser frequency drift compensation to support long-term continuous locking of the laser frequency. The feedback bandwidth of the low-speed output signal varies from 1Hz to 1kHz depending on the feedback receiving system.

[0053] Example 2:

[0054] To improve the usability and ease of use of the feedback control circuit, a first polarity adjustable adder module 5, a second polarity adjustable adder module 6, and a bias adjustment module 7 were added to the circuit of Example 1, as follows: Figures 4-6 As shown, the output of gain adjustment module 3 is connected to the first input of first polarity adjustable adder module 5. The second input of first polarity adjustable adder module 5 is connected to the output of bias adjustment module 7 via first switching switch 8. The output of first polarity adjustable adder module 5 is connected to an external high-speed modulation terminal. First polarity adjustable adder module 5 is used to add high-speed output signal and input bias signal to output high-speed modulation signal to high-speed modulation terminal. The output of low-speed integration module 4 is connected to the first input of second polarity adjustable adder module 6. Second input of second polarity adjustable adder module 6 is connected to the output of bias adjustment module 7 via first switching switch 8. Output of second polarity adjustable adder module 6 is connected to low-speed modulation terminal. Second polarity adjustable adder module 6 is used to add low-speed output signal and input bias signal to output low-speed modulation signal to low-speed modulation terminal. High-speed modulation signal is used to control high-speed frequency modulation of laser, and low-speed modulation signal is used to control wide-range frequency modulation of laser.

[0055] The first polarity adjustable adder module 5 and the second polarity adjustable adder module 6 both include an adder circuit module and a polarity adjustment module connected in sequence. The adder circuit module adds the signals input to each input terminal of the first polarity adjustable adder module 5 or the second polarity adjustable adder module 6 and then inputs the sum to the polarity adjustment module. The polarity adjustment module is implemented by a general-purpose inverting proportional operational amplifier circuit.

[0056] The polarity adjustment module includes a seventh resistor 223, a feedback resistor 224, a fourth operational amplifier 226, and a third switching switch 225. The non-inverting input terminal of the fourth operational amplifier 226 is grounded, and the inverting input terminal of the fourth operational amplifier 226 is connected to one end of the seventh resistor 223 and one end of the feedback resistor 224. The output terminal of the fourth operational amplifier 226 is connected to the other end of the feedback resistor 224. The other end of the seventh resistor 223 serves as the input terminal of the polarity adjustment module and is connected to the adder circuit module. The output terminal of the fourth operational amplifier 226 serves as the output terminal of the polarity adjustment module. The third switch 225 is a single-pole double-throw switch. Its two fixed pins (fixed pin 225a and fixed pin 225b) are connected to the output of the fourth operational amplifier 226 and the output of the adder circuit module, respectively. The switching pin 225c of the third switch 225 serves as the output of the polarity adjustment module (i.e., the output of the first polarity-adjustable adder module 5 or the second polarity-adjustable adder module 6). The fixed pin 225a of the third switch 225 is connected to the output of the fourth operational amplifier 226. When the polarity adjustment module is needed, connecting the switching pin 225c of the third switch 225 to the fixed pin 225a inverts the signal input to the polarity adjustment module. The fixed pin 225b of the third switch 225 is directly connected to the input of the polarity adjustment module (i.e., to the output of the adder circuit module). When the polarity adjustment module is not needed, connecting the switching pin 225c to the fixed pin 225b shorts the polarity adjustment module.

[0057] The first switching switch 8 can be a single-pole double-throw switch (such as...). Figure 12 This module is used to selectively input the bias signal output from the bias adjustment module 7 to either the first polarity adjustable adder module 5 or the second polarity adjustable adder module 6. Because the electrically tunable sensitivity (frequency shift value corresponding to each unit of feedback voltage) of the high-speed and low-speed feedback interfaces of the laser differs greatly, if the laser's frequency drift range is consistently within a small range, then the laser frequency can be shifted by superimposing the bias onto the high-speed output. The purpose of shifting the laser frequency is to ensure that the laser's frequency drift is near the value of the desired locked frequency. If the deviation is too far and outside the feedback capture bandwidth of the feedback circuit, the feedback control circuit cannot achieve normal locking. If the laser's frequency drift range is consistently within a large range, a large-range compensation needs to be achieved by superimposing the bias onto the low-speed output. When the bias signal is not needed, the bias adjustment module 7 can be powered off.

[0058] In feedback control, the system feedback must be negative feedback to achieve locking. If the system has positive feedback, the system polarity needs to be adjusted. The change in system polarity can be achieved by adjusting the polarity of the input and output signals of the circuit. Both the first polarity adjustable adder module 5 and the second polarity adjustable adder module 6 can adjust the polarity of the high-speed modulation signal and the low-speed modulation signal according to the polarity of the input signal (i.e., the error input signal to be locked) through their internal polarity adjustment modules. When the polarity of the error input signal to be locked is positive, the high-speed modulation signal and the low-speed modulation signal are adjusted to negative polarity; conversely, they are adjusted to positive polarity.

[0059] The change in system polarity can also be achieved by changing the polarity of the controlled laser.

[0060] Example 3:

[0061] Based on the circuit of Embodiment 2, a scanning signal generation module 9 (which can generate a scanning triangular wave) is added. The third input terminal of the first polarity adjustable adder module 5 is connected to the output terminal of the scanning signal generation module 9 through the second switching switch 10; the third input terminal of the second polarity adjustable adder module 6 is connected to the output terminal of the scanning signal generation module 9 through the second switching switch 10.

[0062] The scanning signal generation module 9 superimposes the scanning signal onto the third input terminal of the first polarity adjustable adder module 5 or the third input terminal of the second polarity adjustable adder module 6 via the second switching switch 10. This is used to periodically scan the laser frequency before laser locking and to find the frequency locking error signal. The second switching switch 10 can be a double-throw three-position switch. After the laser frequency is locked, the second switching switch 10 can be switched to the off state to reduce the influence of modulation on optical frequency locking.

[0063] After the laser frequency is locked, the scanning output of the scanning signal generation module 9 can be turned off to replace the disconnection function of the second switching switch 10.

[0064] The first switching switch 8 and the second switching switch 10 can also be replaced by jumpers. The bias adjustment circuit 7 and the scanning signal generation module 9 can be connected to the third input terminal of the first polarity adjustable adder module 5 or the third input terminal of the second polarity adjustable adder module 6 via jumpers.

[0065] Example 4:

[0066] The device parameters of the high-speed, high-stability locking circuit described in Example 3 are as follows:

[0067] In the integral proportional module 11, the resistance of the first resistor 113 is 2K ohms, the resistance of the first capacitor 112 is 4.7nF, and the first operational amplifier 111 is an OP27.

[0068] In the integration module 12, the resistance of the second resistor 123 is 2K ohms, the resistance of the second capacitor 122 is 4.7nF, and the second operational amplifier 121 is an OP27.

[0069] The structure of low-speed integration module 4 and Figure 8 The structure is consistent. In the low-speed integration module 4, the resistance of the resistor corresponding to the second resistor 123 is 2K ohms, and the capacitance corresponding to the second capacitor 122 is 10uF.

[0070] In the proportional differential module 21, the resistance of the third resistor 213 and the fifth resistor 215 are both 2K ohms, the resistance of the fourth resistor 214 is 500 ohms, and the third capacitor 212 is 2nF.

[0071] In Qualcomm module 22, the fourth capacitor 221 has a value of 0.1uF, and the sixth resistor 222 has a resistance of 2K ohms.

[0072] The gain adjustment module 3 has an adjustable amplification factor, ranging from 0.1 to 10 times.

[0073] The output bias adjustment range of the first polarity adjustable adder module 5 and the second polarity adjustable adder module 6 is the operational amplifier power supply, typically between ±5V.

[0074] It should be noted that the specific embodiments described in this invention are merely illustrative of the spirit of the invention. Those skilled in the art to which this invention pertains can make various modifications or additions to the described specific embodiments or use similar methods to substitute them, without departing from the spirit of the invention or exceeding the scope defined by the appended claims.

Claims

1. A high-speed, high-stability locking circuit, comprising an integral branch module (1), characterized in that, It also includes a proportional differential branch module (2), a gain adjustment module (3), and a low-speed integration module (4). The integration branch module (1) and the proportional differential branch module (2) are connected in parallel. One end is connected to the input end of the signal to be processed, and the other end is connected to the input end of the gain adjustment module (3). The output end of the gain adjustment module (3) is connected to the high-speed output end and the input end of the low-speed integration module (4) respectively. The output end of the low-speed integration module (4) is connected to the low-speed output end. It also includes a first polarity adjustable adder module (5), a second polarity adjustable adder module (6), and a bias adjustment module (7). The output of the gain adjustment module (3) is connected to the first input of the first polarity adjustable adder module (5). The second input of the first polarity adjustable adder module (5) is connected to the output of the bias adjustment module (7) through a first switching switch (8). The output of the first polarity adjustable adder module (5) is connected to the high-speed modulation end. The output of the low-speed integration module (4) is connected to the first input of the second polarity adjustable adder module (6). The second input of the second polarity adjustable adder module (6) is connected to the output of the bias adjustment module (7) through a first switching switch (8). The output of the second polarity adjustable adder module (6) is connected to the low-speed modulation end.

2. The high-speed, high-stability locking circuit according to claim 1, characterized in that, The integral branch module (1) includes an integral proportional module (11) and an integral module (12). The input terminal of the integral proportional module (11) is connected to the input terminal of the signal to be processed, the output terminal of the integral proportional module (11) is connected to the input terminal of the integral module (12), and the output terminal of the integral module (12) is connected to the input terminal of the gain adjustment module (3).

3. The high-speed, high-stability locking circuit according to claim 2, characterized in that, The integral proportional module (11) includes a first operational amplifier (111), a first resistor (113), and a first capacitor (112). The non-inverting input terminal of the first operational amplifier (111) is connected to the input terminal of the signal to be processed. The inverting input terminal of the first operational amplifier (111) is connected to one end of the first resistor (113) and one end of the first capacitor (112), respectively. The other end of the first resistor (113) is grounded. The other end of the first capacitor (112) is connected to the output terminal of the first operational amplifier (111). The output terminal of the first operational amplifier (111) is also connected to the input terminal of the integral module (12).

4. The high-speed, high-stability locking circuit according to claim 3, characterized in that, The integration module (12) includes a second operational amplifier (121), a second resistor (123), and a second capacitor (122). The non-inverting input terminal of the second operational amplifier (121) is grounded, and the inverting input terminal of the second operational amplifier (121) is connected to one end of the second resistor (123) and one end of the second capacitor (122), respectively. The other end of the second resistor (123) is connected to the output terminal of the first operational amplifier (111), and the other end of the second capacitor (122) is connected to the output terminal of the second operational amplifier (121). The output terminal of the second operational amplifier (121) is also connected to the input terminal of the gain adjustment module (3).

5. The high-speed, high-stability locking circuit according to claim 4, characterized in that, The proportional differential branch module (2) includes a proportional differential module (21) and a high-pass module (22). The input terminal of the proportional differential module (21) is connected to the input terminal of the signal to be processed, the output terminal of the proportional differential module (21) is connected to the input terminal of the high-pass module (22), and the output terminal of the high-pass module (22) is connected to the input terminal of the gain adjustment module (3).

6. The high-speed, high-stability locking circuit according to claim 5, characterized in that, The proportional differential module (21) includes a third operational amplifier (211), a third capacitor (212), a third resistor (213), a fourth resistor (214), and a fifth resistor (215). The non-inverting input terminal of the third operational amplifier (211) is grounded. The inverting input terminal of the third operational amplifier (211) is connected to one end of the third capacitor (212), one end of the third resistor (213), and one end of the fifth resistor (215), respectively. The other end of the third capacitor (212) is connected to one end of the fourth resistor (214). The other ends of the third resistor (213) and the other ends of the fourth resistor (214) are connected to the input terminal of the signal to be processed. The other end of the fifth resistor (215) is connected to the output terminal of the third operational amplifier (211). The output terminal of the third operational amplifier (211) is also connected to the input terminal of the high-pass module (22).

7. The high-speed, high-stability locking circuit according to claim 6, characterized in that, The high-pass module (22) includes a fourth capacitor (221) and a sixth resistor (222). The fourth capacitor (221) and the sixth resistor (222) are connected in series. One end of the series connection is connected to the output of the third operational amplifier (211), and the other end is connected to the input of the gain adjustment module (3).

8. The high-speed, high-stability locking circuit according to claim 7, characterized in that, It also includes a scan signal generation module (9), the third input terminal of the first polarity adjustable adder module (5) is connected to the output terminal of the scan signal generation module (9) through the second switching switch (10); the third input terminal of the second polarity adjustable adder module (6) is connected to the output terminal of the scan signal generation module (9) through the second switching switch (10).

9. The high-speed, high-stability locking circuit according to claim 8, characterized in that, Both the first polarity adjustable adder module (5) and the second polarity adjustable adder module (6) include an adder circuit module and a polarity adjustment module connected in sequence. The polarity adjustment module includes a seventh resistor (223), a feedback resistor (224), and a fourth operational amplifier (226). The non-inverting input terminal of the fourth operational amplifier (226) is grounded, and the inverting input terminal of the fourth operational amplifier (226) is connected to one end of the seventh resistor (223) and one end of the feedback resistor (224), respectively. The output terminal of the fourth operational amplifier (226) is connected to the other end of the feedback resistor (224). The other end of the seven resistor (223) is connected to the output of the addition circuit module as the input of the polarity adjustment module. The output of the fourth operational amplifier (226) is the output of the polarity adjustment module. A third switch (225) is also provided after the polarity adjustment module. The third switch (225) is a single-pole double-throw switch. The two fixed pins (225a, 225b) of the third switch (225) are connected to the output of the fourth operational amplifier (226) and the output of the addition circuit module, respectively. The switching pin (225c) of the third switch (225) is the output.

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