Vsg high-low voltage ride-through control method, control terminal and storage medium

By setting a preset value for the current loop during grid faults, the problem of exacerbated grid faults caused by VSG inverter disconnection was solved, thereby improving the stability and security of the grid.

CN117578561BActive Publication Date: 2025-12-30XIAMEN KEHUA DIGITAL ENERGY TECH CO LTD
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Patent Information

Application Number
CN202311438573.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-11-01
Publication Date
2025-12-30
Estimated Expiration
2043-11-01

AI Technical Summary

Technical Problem

In existing technologies, VSG inverters need to disconnect from the grid during grid voltage faults, which exacerbates grid faults and affects grid stability.

Method used

By acquiring the grid connection point voltage and detecting normal and abnormal conditions, the target reference current is obtained using the VSG loop and voltage loop. In the event of a grid fault, the reference current of the current loop is set to a preset value to avoid rapid current changes and achieve fault ride-through without disconnecting from the grid.

Benefits of technology

It improves the inverter's fault ride-through capability, enhances the stability and security of the power grid, and ensures that the current passes smoothly through the fault area.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a VSG high-low voltage ride-through control method, a control terminal and a storage medium. The method is applied to a grid-connected inverter and comprises the following steps: obtaining the voltage of a grid-connected point; when it is detected that the voltage of the grid-connected point is normal, obtaining a target reference current based on a VSG loop and a voltage loop, inputting the target reference current as a reference current into a current loop to obtain a target control quantity; when it is detected that the voltage of the grid-connected point is abnormal, suspending the VSG loop and the voltage loop, setting the reference current of the current loop as a preset value to input the current loop to obtain the target control quantity; and controlling the grid-connected inverter based on the target control quantity. When the voltage of the grid-connected point is abnormal, the reference current of the current loop is set as the preset value, so that when the grid voltage fails, the current does not rapidly rise or fall, and the grid-connected inverter can smoothly ride through the low voltage or high voltage without being disconnected from the grid, thereby effectively improving the fault ride-through capability of the grid-connected inverter and improving the safety and stability of the system.
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Description

Technical Field

[0001] This invention relates to the field of power grid technology, and in particular to a VSG high and low voltage ride-through control method, control terminal and storage medium. Background Technology

[0002] Due to factors such as energy and environment, distributed new energy systems have been widely used, but this has also brought about problems such as reduced grid damping and inertia. The grid exhibits characteristics of low inertia and weak damping, resulting in poor grid immunity. Based on this, virtual synchronous generator (VSG) technology has been widely used in the power system field. Through VSG control, the inverter output can simulate the damping and inertia of a synchronous generator, making up for the low inertia problem of the system and enabling the grid to better cope with external interference.

[0003] In the existing technology, since VSG exhibits voltage source characteristics, when the grid voltage fails, the potential difference between the inverter's output voltage and the grid voltage will cause a sharp rise in current. In order to avoid equipment damage, the inverter needs to be disconnected from the grid. However, disconnecting from the grid will further aggravate the grid fault and affect the stability of the grid. Summary of the Invention

[0004] This invention provides a VSG high and low voltage ride-through control method, control terminal, and storage medium to solve the problem in the prior art where the inverter needs to disconnect from the grid during grid faults, which exacerbates grid faults.

[0005] In a first aspect, embodiments of the present invention provide a VSG high and low voltage ride-through control method, applied to a grid-connected inverter; the method includes:

[0006] Obtain the voltage at the grid connection point;

[0007] When the voltage at the grid connection point is detected to be normal, the target reference current is obtained based on the VSG loop and the voltage loop, and the target reference current is used as the reference current input current loop to obtain the target control quantity.

[0008] When an abnormal voltage is detected at the grid connection point, the VSG loop and voltage loop are suspended, and the reference current of the current loop is set to a preset value and input into the current loop to obtain the target control quantity.

[0009] The grid-connected inverter is controlled based on the target control quantity.

[0010] In a second aspect, embodiments of the present invention provide a control terminal, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the VSG high and low voltage ride-through control method provided in the first aspect or any possible implementation of the first aspect.

[0011] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the VSG high / low voltage ride-through control method provided in the first aspect or any possible implementation thereof.

[0012] This invention provides a VSG high and low voltage ride-through control method, a control terminal, and a storage medium. The method is applied to a grid-connected inverter and includes: acquiring the voltage at the grid connection point; when the grid connection point voltage is detected to be normal, obtaining a target reference current based on the VSG loop and the voltage loop, and inputting the target reference current as a reference current into the current loop to obtain a target control quantity; when the grid connection point voltage is detected to be abnormal, suspending the VSG loop and the voltage loop, and setting the reference current of the current loop to a preset value and inputting it into the current loop to obtain the target control quantity; and controlling the grid-connected inverter based on the target control quantity. This invention sets the reference current of the current loop to a preset value when the grid voltage is abnormal, so that the current does not rise or fall rapidly during grid voltage faults, allowing for smooth fault ride-through (low or high ride-through) without disconnecting from the grid, effectively improving the fault ride-through capability of the grid-connected inverter and enhancing the system's safety and stability. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a flowchart illustrating the implementation of a VSG high and low voltage ride-through control method provided in an embodiment of the present invention.

[0015] Figure 2 This is a control loop diagram of an inverter when the power grid is normal, provided by an embodiment of the present invention;

[0016] Figure 3 This is a control loop diagram of an inverter during a power grid fault, provided by an embodiment of the present invention;

[0017] Figure 4This is another control loop diagram of an inverter during a power grid fault, provided by an embodiment of the present invention;

[0018] Figure 5 This is a schematic diagram of the structure of a VSG high and low voltage ride-through control device provided in an embodiment of the present invention;

[0019] Figure 6 This is a schematic diagram of the control terminal provided in an embodiment of the present invention. Detailed Implementation

[0020] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.

[0021] To make the objectives, technical solutions, and advantages of the present invention clearer, specific embodiments will be described below in conjunction with the accompanying drawings.

[0022] With the increasing penetration rate of distributed renewable energy, more and more inverters are being connected to the grid, leading to a significant reduction in the total damping and inertia provided by traditional generators in the grid. This results in a faster frequency change rate and a decreased anti-interference capability when the grid is exposed to disturbances. To address these issues, the concept of virtual synchronous generator (VSG) technology has been proposed. This control technology can mimic the operating mechanism of a synchronous generator, enabling grid-connected inverters to possess grid support, inertia response, damping characteristics, and grid inertia performance. It can provide frequency and voltage support for the system, thereby improving grid stability.

[0023] Because of the external characteristics of a voltage source exhibited by a VSG, it cannot provide controllable reactive power to the grid, thus lacking high and low voltage ride-through capability and prone to overcurrent or undercurrent. Furthermore, the VSG control has an integral inertia component, resulting in slower voltage regulation and an inability to respond promptly to grid faults. For example, when the grid voltage drops rapidly, the inverter output voltage cannot adjust in time, and the potential difference between the inverter output voltage and the grid voltage generates current across the grid impedance. Since the grid impedance is typically very small, even a small potential difference can result in a large output current, causing overcurrent. Therefore, to avoid overcurrent and for protection devices, grid disconnection is frequently performed, but inverter disconnection exacerbates grid faults.

[0024] Based on the above issues, see Figure 1The diagram illustrates the implementation flowchart of the VSG high and low voltage ride-through control method provided in this embodiment of the invention, applied to a grid-connected inverter; the method is described in detail below:

[0025] VSG high and low voltage ride-through control methods include:

[0026] S101: Obtain the voltage Uoabc at the grid connection point;

[0027] Distributed new energy sources (distributed photovoltaic power generation, distributed solar thermal power generation, distributed wind power generation, etc.) are connected to the grid at the grid connection point through an inverter, and the voltage Uoabc at the grid connection point is the grid voltage.

[0028] In this embodiment of the invention, the voltage Uoabc at the grid connection point is obtained. If the voltage Uoabc at the grid connection point is within a preset range, it can be determined that the voltage Uoabc at the grid connection point is normal; if the voltage Uoabc at the grid connection point is not within the preset range, it indicates that the grid voltage is too high or too low, and a fault has occurred.

[0029] S102: When the voltage Uoabc at the grid connection point is detected to be normal, the target reference current is obtained based on the VSG loop and the voltage loop, and the target reference current is used as the reference current input current loop to obtain the target control quantity.

[0030] refer to Figure 2 When the power grid is normal, the inverter is controlled normally using the VSG control method. The VSG loop and voltage loop are the outer loops, simulating the generator set participating in frequency and voltage regulation. The target reference current is used to regulate the current in the input current loop.

[0031] S103: When an abnormal voltage Uoabc is detected at the grid connection point, the VSG loop and voltage loop are suspended, and the reference current of the current loop is set to a preset value and input into the current loop to obtain the target control quantity;

[0032] When a grid fault occurs (abnormal voltage Uoabc at the grid connection point), the potential difference between the inverter's output voltage and the grid voltage causes a rapid change in the target reference current. Based on this, the reference... Figure 3 In this embodiment of the invention, when an abnormal voltage Uoabc is detected at the grid connection point, the input of the current loop is set to a preset value, which serves as a reference current. Through the regulation of the current loop, the output current of the inverter will not change rapidly.

[0033] S104: Control the grid-connected inverter based on the target control quantity.

[0034] The target control quantity generates an SPWM wave, which is used to control the on / off state of each switching transistor in the grid-connected inverter to achieve control of the grid-connected inverter.

[0035] In this embodiment of the invention, when a grid fault occurs, the input of the current loop is set to a preset value, and the VSG loop and voltage loop at the front end are suspended and do not participate in regulation. This effectively avoids the change in the reference current of the current loop caused by grid voltage changes, thereby avoiding the overcurrent or undercurrent problem of the inverter output current. By limiting the input setpoint of the current loop (i.e., setting it to a preset value), the voltage source control is converted to the current source control, so that the inverter can smoothly pass through the voltage fault area without disconnecting from the grid, improving the fault ride-through capability of the inverter and improving the stability of the grid.

[0036] In one possible implementation, the above method may further include:

[0037] S105: When an abnormal voltage Uoabc is detected at the grid connection point, the first theoretical integral of the VSG loop and the second theoretical integral of the voltage loop are calculated in real time according to the preset value. When the integral of the VSG loop is equal to the first theoretical integral and the integral of the voltage loop is equal to the second theoretical integral, the target reference current is equal to the preset value.

[0038] S106: When the voltage Uoabc at the grid connection point is detected to return to normal, the integral of the VSG loop is set to the first theoretical integral, the integral of the voltage loop is set to the second theoretical integral, and the VSG loop and voltage loop are connected, with the target reference current used as the reference current input current loop.

[0039] Those skilled in the art will understand that loops are typically implemented using PI controllers. The "I" in a PI controller stands for integral control, and the output is proportional to the integral of the input error signal. For an automatic control system, if a steady-state error exists after reaching steady state, an "integral quantity" must be introduced into the controller to eliminate it. The integral quantity depends on the integral of the error over time; as time increases, the integral quantity increases. Thus, even if the error is small, the integral quantity will increase with time, driving the controller output to increase and further reduce the steady-state error until it equals zero. The integral quantity in a PI controller is adjustable; when the integral quantity in the PI controller changes, the output will also change accordingly.

[0040] Based on this, during a power grid fault, a preset value is set for the current loop input to avoid rapid current changes. When the fault disappears, a smooth transition to VSG control should also be achieved. In this embodiment of the invention, when the current loop input is set to a preset value, the integral values ​​of the VSG loop and voltage loop are calculated backward from the preset value. By adjusting the integral values ​​of the VSG loop and voltage loop, their outputs are changed so that when the integral values ​​of the VSG loop and voltage loop are set to the first theoretical integral value and the second theoretical integral value, the output target reference current is equal to the preset value. Therefore, when the fault is recovered and the system switches back to VSG control mode, the current loop input will not change abruptly, allowing for a smooth and stable switch to VSG control mode and a smooth fault transition.

[0041] Since it is uncertain when the fault will be restored, the first and second theoretical integrals are calculated in real time so that the outputs of the VSG loop and voltage loop can theoretically track the preset values ​​in real time, ensuring a smooth transition when the fault is restored.

[0042] In this embodiment of the invention, only the integral values ​​of the VSG loop and the voltage loop are adjusted, without adjusting other control parameters in the loop (e.g., K). p and K i Adjustments are made without affecting the loop's control performance. The VSG's performance remains consistent before and after the fault, further ensuring the smoothness of fault ride-through.

[0043] It should be noted that the first and second theoretical integrals are obtained through theoretical calculations, and the VSG loop and voltage loop are not actually in operation. When the voltage Uoabc at the grid connection point is detected to return to normal, the first and second theoretical integrals obtained through theoretical calculations are assigned to the PI controllers of the VSG loop and the voltage loop, respectively, so that the target reference current output by the actual loop is equal to the preset value, thus achieving smooth switching.

[0044] In one possible implementation, refer to Figure 3 S102 may include:

[0045] S1021: Input the active power Pfdb and reactive power Qfdb of the grid connection point into the VSG loop to obtain the reference voltage amplitude Em and the reference voltage phase angle θm. Obtain the target reference voltage based on the reference voltage amplitude Em and the reference voltage phase angle θm.

[0046] S1022: Obtain the voltage Uoabc at the grid connection point and the phase angle θ at the grid connection point, and obtain the feedback voltage based on the voltage Uoabc at the grid connection point and the phase angle θ at the grid connection point;

[0047] S1023: Input the difference between the target reference voltage and the feedback voltage into the PI controller of the voltage loop to obtain the target reference current.

[0048] refer to Figure 3 The VSG loop performs power control and outputs a target reference voltage as a reference value input to the voltage loop to participate in voltage regulation; the voltage loop performs voltage control and outputs a target reference current as a reference value input to the current loop, thereby realizing VSG control of the inverter.

[0049] For details, please refer to Figure 3 The active power Pfdb and reactive power Qfdb of the grid connection point can be directly calculated based on the voltage Uoabc and the current ioabc of the grid connection point.

[0050] In one possible implementation, refer to Figure 3 S105 may include:

[0051] S1051: Real-time acquisition of the active power Pfdb and reactive power Qfdb of the grid connection point, and determination of the first theoretical integral based on the active power Pfdb and reactive power Qfdb of the grid connection point, so that the reference voltage amplitude Em is synchronized with the amplitude of the voltage Uoabc of the grid connection point, and the reference voltage phase angle θm is synchronized with the phase angle θ of the grid connection point.

[0052] S1052: Obtain the target reference voltage based on the reference voltage amplitude Em and the reference voltage phase angle θm;

[0053] S1053: Determine the second theoretical integral quantity in real time based on the target reference voltage and the feedback voltage, so that the target reference current is equal to the preset value.

[0054] The integral of the loop can be directly calculated from the input and output. For the VSG loop, the input (active power Pfdb and reactive power Qfdb at the grid connection point) is known. In this embodiment, the reference voltage amplitude Em is synchronized with the grid voltage amplitude, the reference voltage phase angle θm is synchronized with the grid voltage phase angle, and the output is fixed, thus the first theoretical integral of the VSG loop can be calculated. Furthermore, the input of the voltage loop is known (the target reference voltage can be directly determined based on the reference voltage amplitude Em and the reference voltage phase angle θm, and the feedback voltage can also be directly determined based on the voltage Uoabc at the grid connection point and the phase angle), and the output is known, so the second theoretical integral of the voltage loop can also be directly calculated.

[0055] In one possible implementation, refer to Figure 3 The target reference voltage may include: active reference voltage Udref and reactive reference voltage Uqref; the feedback voltage may include: active feedback voltage Ud and reactive feedback voltage Uq; the target reference current may include: active reference current idref and reactive reference current iqref; the PI controller of the voltage loop may include: active PI controller PI1 and reactive PI controller PI2.

[0056] S1021 may include:

[0057] 1. Perform dq transformation on the reference voltage amplitude Em and the reference voltage phase angle θm to obtain the active reference voltage Udref and the reactive reference voltage Uqref;

[0058] S1022 may include:

[0059] 2. Perform dq transformation on the voltage Uoabc at the grid connection point and the phase angle θ at the grid connection point to obtain the active power feedback voltage Ud and the reactive power feedback voltage Uq;

[0060] S1023 may include:

[0061] 3. Input the difference between the active reference voltage Udref and the active feedback voltage Ud into the active PI controller PI1 to obtain the active reference current idref;

[0062] 4. Input the difference between the reactive reference voltage Uqref and the reactive feedback voltage Uq into the reactive PI controller PI2 to obtain the reactive reference current iqref.

[0063] Figure 3 The specific structure of the VSG loop and voltage loop is shown. For example, the voltage loop is divided into two paths (active and reactive). The voltage Uoabc and phase angle θ of the current grid connection point obtained from actual sampling are transformed by dq to obtain the active feedback voltage Ud and reactive feedback voltage Uq. Similarly, the reference voltage amplitude Em and reference voltage phase angle θm are transformed by dq to obtain the active reference voltage Udref and reactive reference voltage Uqref. Then, reactive reference current iqref and active reference current idref are generated based on the error value for current regulation.

[0064] Since the reference voltage amplitude Em is synchronized with the voltage Uoabc at the grid connection point, and the reference voltage phase angle θm is synchronized with the phase angle θ at the grid connection point, the active feedback voltage Ud obtained by dq transformation is equal to the active reference voltage Udref, and the reactive feedback voltage Uq is equal to the reactive reference voltage Uqref. That is, the inputs of both the active PI controller PI1 and the reactive PI controller PI2 are 0.

[0065] In one possible implementation, refer to Figure 3 The preset values ​​may include: a first preset value w1 and a second preset value w2; S1053 may include:

[0066] 1. Calculate the integral of the active PI controller PI1 such that when the difference between the active reference voltage Udref and the active feedback voltage Ud is 0, the active reference current idref is equal to the first preset value w1.

[0067] 2. Calculate the integral of the reactive PI controller PI2 so that when the difference between the reactive reference voltage Uqref and the reactive feedback voltage Uq is 0, the reactive reference current iqref is equal to the second preset value w2.

[0068] Based on the above analysis, the second theoretical integral of the voltage loop includes two components: the integral of the active PI controller PI1 and the integral of the reactive PI controller PI2. Since the input is 0, the "P" proportional control in the PI controller does not work, and the output is completely determined by its integral. The two integrals can be directly calculated from the output (first preset value w1 and second preset value w2). The calculation process is simple and easy to implement.

[0069] In one possible implementation, the above method may further include:

[0070] S107: When an abnormal voltage Uoabc is detected at the grid connection point, record the active reference current and the reactive reference current at the time of the abnormality.

[0071] Prior to S106, the above method may also include:

[0072] S108: When the voltage Uoabc at the grid connection point is detected to return to normal, the preset value is gradually adjusted so that the active reference current is equal to the active reference current at the abnormal moment, and the reactive reference current is equal to the reactive reference current at the abnormal moment.

[0073] When the voltage Uoabc at the grid connection point is detected to have returned to normal, if the system immediately switches back to the normal VSG control mode, the initial target reference current at the switchback moment will be a preset value, which may differ from the target reference current during normal operation, potentially causing fluctuations during the recovery process. Therefore, in this embodiment, the preset value is gradually adjusted to approach the active power reference current idref and reactive power reference current iqref at the time of the abnormal event. The integral values ​​of the synchronous VSG loop and voltage loop are calculated based on the preset value. When the preset value is equal to or close to the active power reference current idref and reactive power reference current iqref at the time of the abnormal event (without causing grid fluctuations), the system switches back to the normal VSG control mode. This avoids large fluctuations during VSG control mode recovery and effectively improves the stability of fault ride-through.

[0074] It should be noted that once the system gradually returns to its pre-fault state, the active reference current idref and reactive reference current iqref will no longer be limited and will be directly output by the VSG loop and voltage loop.

[0075] The gradual adjustment of the active reference current idref and reactive reference current iqref is also achieved by adjusting the integral of the loop, and the output is controlled by inversely calculating the integral of the loop. For example, the active reference current idref and reactive reference current iqref can be adjusted according to preset compensation.

[0076] In one possible implementation, refer to Figure 4 The output of the active PI controller PI1 is equipped with an active power limiter (Id,max), and the output of the reactive power PI controller PI2 is equipped with a reactive power limiter (Iq,max); S108 may include:

[0077] S1081: Gradually increase the maximum limit value of the active power limiter and the maximum limit value of the reactive power limiter, so that the active power reference current idref is equal to the active power reference current idref at the abnormal moment, and so that the reactive power reference current iqref is equal to the reactive power reference current iqref at the abnormal moment.

[0078] In this embodiment of the invention, limiters are provided at the output terminals of both the active PI controller PI1 and the reactive PI controller PI2.

[0079] Specifically, setting the reference current of the current loop to a preset value can be achieved by adjusting the limiting values ​​of the two limiters.

[0080] For example, during low voltage breakdown, the grid voltage drops, the feedback voltage of the active PI controller PI1 and the reactive PI controller PI2 decreases, the output of the voltage loop rises rapidly, and the current value also increases. The maximum limit value of the active limiter and the reactive limiter is adjusted. This maximum limit value corresponds to the preset value, thereby limiting the output of the active PI controller to the first preset value w1 and the output of the reactive PI controller PI2 to the second preset value w2.

[0081] During high-voltage operation, the grid voltage increases, leading to a rise in the feedback voltage of both the active power PI controller PI1 and the reactive power PI controller PI2. This, in turn, causes a continuous increase in the output of the voltage loop and a corresponding increase in current. Adjusting the maximum limiting values ​​of the active power limiter and the reactive power limiter, which correspond to preset values, limits the output of the active power PI controller to the first preset value w1 and the output of the reactive power PI controller PI2 to the second preset value w2.

[0082] For example, during low-voltage recovery, the maximum limit values ​​of the active power limiter and the reactive power limiter can be gradually adjusted to restore the active power reference current idref and the reactive power reference current iqref to their pre-fault state, and then switch back to VSG control mode.

[0083] It should be noted that once the active reference current idref and the reactive reference current iqref return to their pre-fault states, the maximum limiting values ​​of both the active and reactive limiters can be restored to their pre-fault states, and the system can be switched to normal VSG control mode.

[0084] It should be noted that the first preset value w1 and the second preset value w2 for high penetration are different from those for low penetration. The first preset value w1 and the second preset value w2 can be set according to actual application requirements, and there are no restrictions here.

[0085] Once the system gradually returns to its pre-fault state, the active reference current idref and reactive reference current iqref are no longer restricted, and the limiting values ​​of the active and reactive limiters are released, restoring the limiting values ​​before the fault.

[0086] In one possible implementation, the method prior to S103 may further include:

[0087] S109: Determine the fault type based on the voltage Uoabc at the grid connection point, and determine the first preset value w1 and the second preset value w2 based on the fault type.

[0088] Since both the active PI controller PI1 and the reactive PI controller PI2 are equipped with limiters, suspending the VSG loop and voltage loop in S103 does not disconnect them from the current loop, but rather sets the preset value through the limiters. The output of the VSG loop and voltage loop is limited and has no effect on the back end.

[0089] Specific loop reference for current loop Figure 2 , Figure 3 or Figure 4 This is a conventional technical method in this field and will not be elaborated further here.

[0090] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0091] The following are device embodiments of the present invention. For details not described in detail, please refer to the corresponding method embodiments described above.

[0092] Figure 5 A schematic diagram of the VSG high and low voltage ride-through control device provided in an embodiment of the present invention is shown. For ease of explanation, only the parts related to the embodiment of the present invention are shown, and are described in detail below:

[0093] like Figure 5 As shown, the VSG high and low voltage ride-through control device includes:

[0094] Parameter acquisition module 21 is used to acquire the voltage Uoabc at the grid connection point;

[0095] VSG control module 22 is used to obtain the target reference current based on the VSG loop and voltage loop when the voltage Uoabc at the grid connection point is detected to be normal, and to use the target reference current as the reference current input current loop to obtain the target control quantity.

[0096] The first fault control module 23 is used to suspend the VSG loop and voltage loop when an abnormal voltage Uoabc is detected at the grid connection point, and set the reference current of the current loop to a preset value and input it into the current loop to obtain the target control quantity.

[0097] The switching transistor control module 24 is used to control the grid-connected inverter based on the target control quantity.

[0098] In one possible implementation, the above-described apparatus may further include:

[0099] The second fault control module is used to calculate the first theoretical integral of the VSG loop and the second theoretical integral of the voltage loop in real time according to the preset value when the voltage Uoabc of the grid connection point is detected to be abnormal. When the integral of the VSG loop is equal to the first theoretical integral and the integral of the voltage loop is equal to the second theoretical integral, the target reference current is equal to the preset value.

[0100] The third fault control module is used to set the integral of the VSG loop to the first theoretical integral and the integral of the voltage loop to the second theoretical integral when the voltage Uoabc at the grid connection point is detected to return to normal. It also controls the VSG loop and the voltage loop to be connected and uses the target reference current as the reference current input current loop.

[0101] In one possible implementation, the VSG control module 22 may include:

[0102] The reference voltage determination unit is used to input the active power Pfdb and reactive power Qfdb of the grid connection point into the VSG loop to obtain the reference voltage amplitude Em and the reference voltage phase angle θm, and to obtain the target reference voltage based on the reference voltage amplitude Em and the reference voltage phase angle θm.

[0103] The feedback voltage determination unit is used to obtain the voltage Uoabc at the grid connection point and the phase angle θ at the grid connection point, and to obtain the feedback voltage based on the voltage Uoabc at the grid connection point and the phase angle θ at the grid connection point.

[0104] The first PI control unit is used to input the difference between the target reference voltage and the feedback voltage into the PI controller of the voltage loop to obtain the target reference current.

[0105] In one possible implementation, the second fault control module may include:

[0106] The first integral calculation unit is used to acquire the active power Pfdb and reactive power Qfdb of the grid connection point in real time, and determine the first theoretical integral based on the active power Pfdb and reactive power Qfdb of the grid connection point, so that the reference voltage amplitude Em is synchronized with the amplitude of the voltage Uoabc of the grid connection point, and the reference voltage phase angle θm is synchronized with the phase angle θ of the grid connection point.

[0107] The parameter transfer unit is used to obtain the target reference voltage based on the reference voltage amplitude Em and the reference voltage phase angle θm.

[0108] The second integral calculation unit is used to determine the second theoretical integral in real time based on the target reference voltage and the feedback voltage, so that the target reference current is equal to the preset value.

[0109] In one possible implementation, the target reference voltage may include: an active reference voltage Udref and a reactive reference voltage Uqref; the feedback voltage may include: an active feedback voltage Ud and a reactive feedback voltage Uq; the target reference current may include: an active reference current idref and a reactive reference current iqref; and the PI controller of the voltage loop may include: an active PI controller PI1 and a reactive PI controller PI2.

[0110] The reference voltage determination unit may include:

[0111] The first dq transformation subunit is used to perform dq transformation on the reference voltage amplitude Em and the reference voltage phase angle θm to obtain the active reference voltage Udref and the reactive reference voltage Uqref;

[0112] The feedback voltage determination unit may include:

[0113] The second dq transformation subunit is used to perform dq transformation on the voltage Uoabc at the grid connection point and the phase angle θ at the grid connection point to obtain the active feedback voltage Ud and the reactive feedback voltage Uq.

[0114] The first PI control unit may include:

[0115] The active reference current idref output subunit is used to input the difference between the active reference voltage Udref and the active feedback voltage Ud into the active PI controller PI1 to obtain the active reference current idref;

[0116] The reactive reference current iqref output subunit is used to input the difference between the reactive reference voltage Uqref and the reactive feedback voltage Uq into the reactive PI controller PI2 to obtain the reactive reference current iqref.

[0117] In one possible implementation, the preset values ​​may include: a first preset value w1 and a second preset value w2; the second integral calculation unit may include:

[0118] The first integral output subunit is used to calculate the integral of the active PI controller PI1, so that when the difference between the active reference voltage Udref and the active feedback voltage Ud is 0, the active reference current idref is equal to the first preset value w1.

[0119] The second integral output subunit is used to calculate the integral of the reactive PI controller PI2, so that when the difference between the reactive reference voltage Uqref and the reactive feedback voltage Uq is 0, the reactive reference current iqref is equal to the second preset value.

[0120] In one possible implementation, the above-described apparatus may further include:

[0121] The fault recording module is used to record the active reference current idref and the reactive reference current iqref at the time of the abnormality when an abnormality is detected in the voltage Uoabc at the grid connection point.

[0122] The transition module is used to gradually adjust the preset values ​​when the voltage Uoabc at the grid connection point is detected to return to normal, so that the active reference current idref is equal to the active reference current idref at the abnormal moment, and the reactive reference current iqref is equal to the reactive reference current iqref at the abnormal moment.

[0123] In one possible implementation, the output terminal of the active PI controller PI1 is equipped with an active power limiter, and the output terminal of the reactive power PI controller PI2 is equipped with a reactive power limiter; the transition module may include:

[0124] The limiting adjustment unit is used to gradually increase the maximum limiting value of the active power limiter and the maximum limiting value of the reactive power limiter, so that the active power reference current idref is equal to the active power reference current idref at the abnormal moment, and the reactive power reference current iqref is equal to the reactive power reference current iqref at the abnormal moment.

[0125] Figure 6 This is a schematic diagram of the control terminal 3 provided in an embodiment of the present invention. Figure 6 As shown, the control terminal 3 in this embodiment includes a processor 30 and a memory 31. The memory 31 is used to store a computer program 32, and the processor 30 is used to call and run the computer program 32 stored in the memory 31 to execute the steps in the various VSG high and low voltage ride-through control method embodiments described above, for example... Figure 1The steps S101 to S104 are shown. Alternatively, the processor 30 is used to call and run the computer program 32 stored in the memory 31 to implement the functions of each module / unit in the above-described device embodiments, for example... Figure 5 The functions of modules 21 to 24 are shown.

[0126] For example, computer program 32 can be divided into one or more modules / units, one or more of which are stored in memory 31 and executed by processor 30 to complete the present invention. One or more modules / units can be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of computer program 32 in control terminal 3. For example, computer program 32 can be divided into... Figure 5 Modules / units 21 to 24 are shown.

[0127] The control terminal 3 can be a desktop computer, laptop, handheld computer, or cloud server, etc. The control terminal 3 may include, but is not limited to, a processor 30 and a memory 31. Those skilled in the art will understand that... Figure 6 This is merely an example of control terminal 3 and does not constitute a limitation on control terminal 3. It may include more or fewer components than shown, or combine certain components, or different components. For example, the terminal may also include input / output devices, network access devices, buses, etc.

[0128] The processor 30 may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0129] The memory 31 can be an internal storage unit of the control terminal 3, such as a hard disk or RAM of the control terminal 3. The memory 31 can also be an external storage device of the control terminal 3, such as a plug-in hard disk, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the control terminal 3. Furthermore, the memory 31 can include both internal and external storage units of the control terminal 3. The memory 31 is used to store computer programs and other programs and data required by the terminal. The memory 31 can also be used to temporarily store data that has been output or will be output.

[0130] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0131] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0132] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0133] In the embodiments provided by this invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0134] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0135] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0136] If an integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc.

[0137] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A VSG high-low voltage ride through control method, characterized in that, The application is applied to a grid-connected inverter; The method comprises: acquiring the voltage of a grid-connected point; when detecting that the voltage of the grid-connected point is normal, obtaining a target reference current based on a VSG loop and a voltage loop, inputting the target reference current as a reference current into a current loop to obtain a target control quantity; the target reference current comprises an active reference current and a reactive reference current; when detecting that the voltage of the grid-connected point is abnormal, suspending the VSG loop and the voltage loop, setting the reference current of the current loop as a preset value to input the current loop to obtain the target control quantity; controlling the grid-connected inverter based on the target control quantity; when detecting that the voltage of the grid-connected point is abnormal, calculating a first theoretical integral quantity of the VSG loop and a second theoretical integral quantity of the voltage loop in real time according to the preset value, so that when the integral quantity of the VSG loop is equal to the first theoretical integral quantity and the integral quantity of the voltage loop is equal to the second theoretical integral quantity, the target reference current is equal to the preset value; when detecting that the voltage of the grid-connected point returns to normal, gradually adjusting the preset value, so that the active reference current is equal to the active reference current at the abnormal time, and the reactive reference current is equal to the reactive reference current at the abnormal time; wherein the active reference current and the reactive reference current at the abnormal time are recorded when detecting that the voltage of the grid-connected point is abnormal; when detecting that the voltage of the grid-connected point returns to normal, setting the integral quantity of the VSG loop as the first theoretical integral quantity, setting the integral quantity of the voltage loop as the second theoretical integral quantity, and controlling the VSG loop and the voltage loop to be connected, and inputting the target reference current as the reference current into the current loop.

2. The VSG high-low voltage ride through control method of claim 1, wherein, The target reference current obtained based on the VSG loop and the voltage loop comprises: inputting the active power of the grid-connected point and the reactive power of the grid-connected point into the VSG loop to obtain a reference voltage amplitude and a reference voltage phase angle, and obtaining a target reference voltage according to the reference voltage amplitude and the reference voltage phase angle; acquiring the voltage of the grid-connected point and the phase angle of the grid-connected point, and obtaining a feedback voltage according to the voltage of the grid-connected point and the phase angle of the grid-connected point; inputting the difference between the target reference voltage and the feedback voltage into a PI controller of a voltage loop to obtain the target reference current.

3. The VSG high-low voltage ride through control method of claim 2, wherein, The first theoretical integral quantity of the VSG loop and the second theoretical integral quantity of the voltage loop calculated in real time according to the preset value comprise: acquiring the active power of the grid-connected point and the reactive power of the grid-connected point in real time, and determining the first theoretical integral quantity based on the active power of the grid-connected point and the reactive power of the grid-connected point, so that the reference voltage amplitude is synchronized with the amplitude of the voltage of the grid-connected point, and the reference voltage phase angle is synchronized with the phase angle of the grid-connected point; obtaining the target reference voltage according to the reference voltage amplitude and the reference voltage phase angle; determining the second theoretical integral quantity in real time according to the target reference voltage and the feedback voltage, so that the target reference current is equal to the preset value.

4. The VSG high-low voltage ride-through control method of claim 3, wherein, The target reference voltage comprises: an active reference voltage and a reactive reference voltage; the feedback voltage comprises: an active feedback voltage and a reactive feedback voltage; the PI controller of the voltage loop comprises: an active PI controller and a reactive PI controller; The target reference voltage is obtained according to the reference voltage amplitude and the reference voltage phase angle, comprising: The reference voltage amplitude and the reference voltage phase angle are subjected to dq transformation to obtain the active reference voltage and the reactive reference voltage; The feedback voltage is obtained according to the voltage of the grid-connected point and the phase angle of the grid-connected point, comprising: The voltage of the grid-connected point and the phase angle of the grid-connected point are subjected to dq transformation to obtain the active feedback voltage and the reactive feedback voltage; The difference between the target reference voltage and the feedback voltage is input into the PI controller of the voltage loop to obtain the target reference current, comprising: The difference between the active reference voltage and the active feedback voltage is input into the active PI controller to obtain the active reference current; The difference between the reactive reference voltage and the reactive feedback voltage is input into the reactive PI controller to obtain the reactive reference current.

5. The VSG high-low voltage ride-through control method of claim 4, wherein, The preset value comprises: a first preset value and a second preset value; the second theoretical integral amount is determined according to the target reference voltage and the feedback voltage in real time, so that the target reference current is equal to the preset value, comprising: The integral amount of the active PI controller is calculated, so that when the difference between the active reference voltage and the active feedback voltage is 0, the active reference current is equal to the first preset value; The integral amount of the reactive PI controller is calculated, so that when the difference between the reactive reference voltage and the reactive feedback voltage is 0, the reactive reference current is equal to the second preset value.

6. The VSG high-low voltage ride-through control method of claim 4 or 5, wherein, The output end of the active PI controller is provided with an active limiter, and the output end of the reactive PI controller is provided with a reactive limiter; the preset value is gradually adjusted, so that the active reference current is equal to the active reference current at the abnormal moment, and the reactive reference current is equal to the reactive reference current at the abnormal moment, comprising: The maximum limiting value of the active limiter and the maximum limiting value of the reactive limiter are gradually increased, so that the active reference current is equal to the active reference current at the abnormal moment, and the reactive reference current is equal to the reactive reference current at the abnormal moment.

7. A control terminal, characterized by comprising: The computer program is executed by the processor to implement the steps of the VSG high-low voltage ride-through control method according to any one of claims 1 to 6.

8. A computer-readable storage medium storing a computer program, the computer-readable storage medium comprising: The computer program is executed by the processor to implement the steps of the VSG high-low voltage ride-through control method according to any one of claims 1 to 6.

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