Hybrid write cursor for block stripe writes

Abstract

Embodiments described herein relate to mixed write cursors for chunk stripe writes. In some embodiments, a memory system can include one or more components configured to construct a chunk stripe associated with a write cursor, where the chunk stripe is associated with memory chunks of a respective memory die from a set of memory dies. The one or more components can be configured to program first data to a first one or more memory chunks of the chunk stripe following a first logical write direction associated with a logical order of the set of memory dies. The one or more components can be configured to program second data to a second one or more memory chunks of the chunk stripe following a second logical write direction associated with the logical order of the set of memory dies.

Description

Technical Field

[0001] This disclosure generally relates to memory devices, memory device operations, and, for example, to a hybrid write cursor for block writing. Background Technology

[0002] Memory devices are widely used to store information in various electronic devices. A memory device contains memory cells. A memory cell is an electronic circuit that can be programmed into two or more data states. For example, a memory cell can be programmed into a data state representing a single binary value, typically represented by a binary "1" or binary "0". As another example, a memory cell can be programmed into a data state representing fractional values ​​(e.g., 0.5, 1.5, etc.). To store information, an electronic device can write to or program a collection of memory cells. To access the stored information, the electronic device can read from or sense the stored states from the collection of memory cells.

[0003] Various types of memory devices exist, including Random Access Memory (RAM), Read-Only Memory (ROM), Dynamic RAM (DRAM), Static RAM (SRAM), Synchronous Dynamic RAM (SDRAM), Ferroelectric RAM (FeRAM), Magnetic RAM (MRAM), Resistive RAM (RRAM), Holographic RAM (HRAM), and flash memory (e.g., NAND and NOR memory). Memory devices can be volatile or non-volatile. Non-volatile memory (e.g., flash memory) can store data for a long time even without an external power supply. Volatile memory devices (e.g., DRAM) may lose stored data over time unless refreshed by power.

[0004] Even when no power is supplied, non-volatile memory devices, such as NAND flash memory devices, can be electrically programmed, erased, and stored using circuitry. Non-volatile memory devices can be used in various types of electronic devices, such as computers, mobile phones, or automotive computing systems, and other examples. Non-volatile memory devices may include memory cell arrays, page buffers, and column decoders. Additionally, non-volatile memory devices may include control logic units (e.g., controllers), row decoders, or address buffers, and other examples. Memory cell arrays may comprise strings of memory cells extending in the column direction and connected to bit lines.

[0005] A memory cell, which may be referred to as a "cell" or "data cell" of a non-volatile memory device, may include a current path formed between a source and a drain on a semiconductor substrate. The memory cell may further include a floating gate and a control gate formed between insulating layers on the semiconductor substrate. Programming operations (sometimes called write operations) of the memory cell are generally achieved by grounding the semiconductor substrate of the source and drain regions and the body region of the memory cell; and by applying a high positive voltage, referred to as the "programming voltage," "programming power supply voltage," or "VPP," to the control gate to induce Wohl-Nootheim tunneling (called "FN tunneling") between the floating gate and the semiconductor substrate. When FN tunneling occurs, electrons in the body region accumulate on the floating gate through the VPP electric field applied to the control gate, increasing the threshold voltage of the memory cell.

[0006] By applying a high negative voltage, which may be called the "erasure voltage" or "Vera," to the control gate and applying a configured voltage to the body region to generate FN tunneling, the erasure operation of memory cells can be performed simultaneously in cells (called "blocks") within a segment of the shared body region. In this case, electrons accumulated on the floating gate are discharged to the source region, thus the memory cells have an erase threshold voltage distribution.

[0007] Each memory cell string may have multiple floating-gate type memory cells connected in series with each other. Access lines (sometimes called "word lines") extend in the row direction, and the control gate of each memory cell is connected to the corresponding access line. The non-volatile memory device may include multiple page buffers connected between the bit lines and the column decoder. The column decoder is connected between the page buffers and the data lines. Summary of the Invention

[0008] This disclosure relates to a memory system comprising: a set of memory dies; and one or more components configured to: construct a block strip associated with a write cursor, wherein the block strip is associated with a memory block from a corresponding memory die of the set of memory dies, and wherein the write cursor is associated with programming first data associated with a host write operation and programming second data associated with a garbage collection operation; programming the first data into a first or more memory blocks of the block strip following a first logical write direction associated with a logical order of the set of memory dies; and programming the second data into a second or more memory blocks of the block strip following a second logical write direction associated with the logical order of the set of memory dies.

[0009] Another aspect of this disclosure relates to a method comprising: selecting one or more blocks associated with a set of memory dies of the memory device to form a block strip for writing data associated with a host write operation and a garbage collection operation, wherein the host write operation is associated with first data obtained from a host, and wherein the garbage collection operation is associated with folded data from different block strips; programming the first data associated with the host write operation into the block strip by the memory device; and programming the second data associated with the garbage collection operation into the block strip by the memory device, wherein both the first data and the second data are programmed into the block strip during the write operation.

[0010] Another aspect of this disclosure relates to a system comprising: means for programming first data to a block strip associated with a set of memory dies as part of a write operation, wherein the first data is associated with a host write operation, and wherein the first data is written to a block contained in the block strip in a first direction following the order of the set of memory dies; and means for programming second data to the block strip as part of the write operation, wherein the second data is associated with a fold write operation, and wherein the second data is written to the block contained in the block strip in a second direction following the order of the set of memory dies. Attached Figure Description

[0011] Figure 1 This is a diagram illustrating an example system that can perform write operations using a hybrid write cursor for block writing.

[0012] Figure 2 It is a diagram of instance components contained in a memory device.

[0013] Figure 3 It is a diagram illustrating an instance memory architecture that can be used by a memory device.

[0014] Figure 4 It is a diagram illustrating an example of waste collection operations.

[0015] Figure 5 This is a diagram illustrating instances of performing host write operations and garbage collection write operations.

[0016] Figure 6 This is a diagram illustrating an instance of the process associated with a hybrid write cursor used for block writing.

[0017] Figure 7 This is a diagram illustrating an instance of the process associated with a hybrid write cursor used for block writing.

[0018] Figure 8This is a diagram illustrating the instance block bar associated with the mixed write cursor.

[0019] Figure 9 This is a diagram illustrating the instance block bar associated with the mixed write cursor.

[0020] Figure 10 This is a flowchart of the instance methods associated with the hybrid write cursor used for block writing. Detailed Implementation

[0021] In some cases, memory devices can perform different types of random write operations. For example, a memory device can write data obtained from a host device (e.g., referred to herein as "host write" or "host write data") as part of a host write operation. As another example, a memory device can write data associated with a garbage collection operation. In some instances, a memory device can use a technique called "garbage collection" to produce free memory blocks. Garbage collection may involve reclaiming (e.g., erasing and making it available for writing) memory blocks with the most invalid pages. As another example, garbage collection may involve reclaiming memory blocks with more than a threshold number of invalid pages. If there are enough free blocks available for write operations, garbage collection may not occur. For example, invalid pages may be data pages that have been updated to different pages. In other words, garbage collection is an operation that manages memory utilization in flash memory. When the free physical space in flash memory becomes low, garbage collection allows the memory device to restore available space to allow new host data to be written. Garbage collection operations may involve writing (e.g., rewriting) data from valid pages from a first block (e.g., the victim block or the source block) to a second block (e.g., the destination block) (e.g., which may be referred to as “folding” data from the first block to the second block).

[0022] Typically, memory devices can perform host write operations and garbage collection write operations separately. The consideration of performing host write operations and garbage collection write operations separately may include the expected retention time (e.g., which may also be referred to as "temperature") of the corresponding data associated with the different write operations. For example, data may be classified as "hot" data or "cold" data (and / or "warm" data in some instances). Hot data may contain short-term data that is likely to be overwritten (or rewritten) within a relatively short period of time (e.g., less than a predefined low threshold), while cold data may contain static data that is unlikely to be overwritten within a relatively long period of time (e.g., greater than a predefined high threshold). In some cases, host write data may be associated with hot data, while garbage collection write operations may be associated with cold data to improve the efficiency of garbage collection operations. For example, if host write operations and garbage collection write operations are not separated, this can cause garbage collection operations to fold or rewrite hot data that may have been overwritten (or invalidated) within a short period of time, thereby reducing the efficiency of garbage collection operations.

[0023] For example, a memory device may use two separate write cursors for host write operations and garbage collection write operations. As used herein, a "write cursor" may refer to a pointer to an open block (or block strip) where a data stream is being programmed into a physical location of a data stream type. For example, a write cursor can be used to abstract the data layout and write order of write operations. As used herein, a "block strip" may refer to a set of blocks organized together for various read, write, erase, and / or garbage collection purposes. For example, a block strip may contain one or more blocks associated with different memory cells (e.g., different memory dies) of the memory device. In some instances, a block strip may be associated with or defined by a write cursor (e.g., for write operations). The memory device may construct a first block strip for host write operations (e.g., associated with a first write cursor). The memory device may construct a second block strip for garbage collection write operations (e.g., associated with a second write cursor) (e.g., as in combination). Figure 5 (More detailed description and depiction).

[0024] During random write workloads, mixed write data associated with different operations (e.g., host write to garbage collection write) may arrive at the memory device (e.g., at the NAND interface of the memory device). Due to this mixed write data, the memory device may need to switch between writing to a first strip (e.g., programming host data) and writing to a second strip (e.g., programming garbage collection data). This strip switching during a write operation can degrade the performance of the memory device. For example, strip switching can introduce one or more limitations to the write operation. For instance, certain processes and / or operations may not be performed when the memory device switches between strips used for write operations. As an example, the memory device may not perform dynamic word line start voltage operations (e.g., reducing page programming time (tProg) associated with a write operation). Therefore, the performance of the memory device may be degraded because the memory device may not realize the benefits of certain processes and / or operations that might not be performed when the memory device switches between strips used for write operations.

[0025] As another example, a memory device may reserve one or more block strips for each write cursor used by the memory device. Therefore, using multiple write cursors for write operations can consume additional memory resources associated with the block strips reserved for the respective write cursors. For example, it may be necessary to reserve one or more block strips for each write cursor because blocks can only be written to after they have been erased. If a block to be programmed with the write data is not erased, the memory device may need to wait to perform the write operation until the block is erased. This can introduce latency associated with the write operation. Therefore, the memory device may erase the blocks that have reserved block strips to reduce the latency of the write operation. Additionally, some erase operations that improve Quality of Service (QoS) or erase operation performance (e.g., slice erase operations, where blocks from different memory dies are erased one after another) can increase the overhead and / or time associated with the erase operation, thus requiring additional block strips to be reserved for each write cursor. Furthermore, to reduce the likelihood of the memory device experiencing errors associated with programming block strips and having no reserved block strips available for writing, more than one block strip may be reserved for each write cursor. In other words, using multiple block strips and / or multiple write cursors for random write operations may result in an increase in the number of block strips reserved for random write operations.

[0026] Reserving extra blocks can reduce over-provisioning of memory devices (e.g., providing additional capacity specifically for data to be erased from flash memory without interrupting system performance). Over-provisioning can help improve memory device performance and extend the expected lifespan of the physical memory cells of the memory device. Therefore, reducing over-provisioning by increasing the number of blocks reserved for write operations can decrease the performance and / or lifespan of the memory device.

[0027] Some embodiments described herein implement a hybrid write cursor for block writes. For example, a memory device may construct a single block (e.g., associated with a single write cursor) for both host write operations and garbage collection write operations. The memory device may program first data (e.g., associated with host write data) into one or more memory blocks of the block, following a first logical write direction (e.g., a first write direction) associated with a logical order of a set of memory dies associated with the block. The memory device may program second data (e.g., garbage collection data) into one or more memory blocks of the block, following a second logical write direction (e.g., a second write direction) associated with a logical order of the set of memory dies. In other words, the memory device may use a single write cursor for both host write operations and garbage collection operations. Alternatively, the memory device may use different write directions for both host write operations and garbage collection write operations when writing to a single block.

[0028] Therefore, the performance of the memory device and / or write operations can be improved. For example, because a single write cursor and / or block strip is used for both host write operations and garbage collection write operations, the number of reserved block strips used for write operations can be reduced. This can increase over-provisioning of the memory device, thus improving its performance. Additionally, because only a single write cursor is used, the likelihood of errors associated with write operations can be reduced (e.g., using more write cursors increases the likelihood of errors, as the more write cursors used, the higher the probability of an error occurring through at least one of the write cursors).

[0029] Furthermore, because only a single write cursor and / or block strip is used for both host write operations and garbage collection write operations, the memory device can be enabled to perform certain techniques and / or operations that are unavailable when performing block strip switching. For example, the memory device can be enabled to perform dynamic word line start voltage operation, thereby reducing the page programming time (tProg) associated with write operations because only a single block strip is used. As another example, using different write directions associated with host write operations and garbage collection write operations increases the likelihood of writing host write data and garbage collection data to different blocks contained in the block strip (e.g., thereby separating hot and cold data into different blocks and improving the efficiency of garbage collection operations).

[0030] Figure 1This is a diagram illustrating an example system 100 capable of performing write operations using a hybrid write cursor for block writing. System 100 may include one or more means, devices, and / or components for performing the operations described herein. For example, system 100 may include a host device 110 and a memory device 120. Memory device 120 may include a controller 130 and a memory 140. Host device 110 may communicate with memory device 120 (e.g., controller 130 of memory device 120) via host interface 150. Controller 130 and memory 140 may communicate via memory interface 160.

[0031] System 100 can be any electronic device configured to store data in memory. For example, system 100 can be a computer, mobile phone, wired or wireless communication device, network device, server, device in a data center, device in a cloud computing environment, vehicle (e.g., car or airplane), and / or Internet of Things (IoT) device. Host device 110 may include one or more processors configured to execute instructions and store data in memory 140. For example, host device 110 may include a central processing unit (CPU), graphics processing unit (GPU), field-programmable gate array (FPGA), application-specific integrated circuit (ASIC), and / or another type of processing component.

[0032] Memory device 120 can be any electronic device configured to store data in memory. In some embodiments, memory device 120 can be an electronic device configured to persistently store data in non-volatile memory. For example, memory device 120 can be a hard disk drive, solid-state drive (SSD), flash memory device (e.g., NAND flash memory device or NOR flash memory device), universal serial bus (USB) thumb drive, memory card (e.g., Secure Digital (SD) card), secondary storage device, non-volatile memory fast (NVMe) device, and / or embedded multimedia card (eMMC) device. In this case, memory 140 may include non-volatile memory configured to retain stored data after power is lost from memory device 120. For example, memory 140 may include NAND memory or NOR memory. In some embodiments, memory 140 may include volatile memory that requires power to maintain stored data and loses the stored data upon power failure of memory device 120. The memory device may be, for example, one or more latches and / or random access memory (RAM), such as dynamic RAM (DRAM) and / or static RAM (SRAM). For instance, the volatile memory may cache data read from or written to non-volatile memory, and / or cache instructions to be executed by controller 130.

[0033] Controller 130 may be any device configured to communicate with a host device (e.g., via host interface 150) and memory 140 (e.g., via memory interface 160). Alternatively or additionally, controller 130 may be configured to control the operation of memory device 120 and / or memory 140. For example, controller 130 may include a memory controller, system controller, ASIC, FPGA, processor, microcontroller, and / or one or more processing components. In some embodiments, controller 130 may be a high-level controller that can communicate directly with host device 110 and instruct one or more low-level controllers regarding memory operations to be performed in conjunction with memory 140. In some embodiments, controller 130 may be a low-level controller that can receive instructions regarding memory operations from a high-level controller that interfaces directly with host device 110. As an example, the high-level controller may be an SSD controller, and the low-level controller may be a non-volatile memory controller (e.g., a NAND controller) or a volatile memory controller (e.g., a DRAM controller). In some implementations, the set of operations described herein as being performed by controller 130 may be performed by a single controller (e.g., the entire set of operations may be performed by a single high-level controller or a single low-level controller). Alternatively, the set of operations described herein as being performed by controller 130 may be performed by more than one controller (e.g., a first subset of the operations may be performed by a high-level controller and a second subset of the operations may be performed by a low-level controller).

[0034] The host interface 150 enables communication between the host device 110 and the memory device 120. The host interface 150 may include, for example, a Small Computer System Interface (SCSI), a Serial Attached SCSI (SAS), a Serial Advanced Technology Attachment (SATA) interface, a Peripheral Component Interconnect High Speed ​​(PCIe) interface, an NVMe interface, a USB interface, a Universal Flash Storage (UFS) interface, and / or an Embedded Multimedia Card (eMMC) interface.

[0035] Memory interface 160 enables communication between memory device 120 and memory 140. Memory interface 160 may include a non-volatile memory interface (e.g., for communicating with non-volatile memory), such as a NAND interface or a NOR interface. Alternatively, memory interface 160 may include a volatile memory interface (e.g., for communicating with volatile memory), such as a Double Data Rate (DDR) interface.

[0036] In some implementations, memory device 120 and / or controller 130 may be configured to construct and / or program block strips (e.g., associated with a write cursor) for both host write operations (e.g., associated with data received from host device 110) and garbage collection write operations. For example, memory device 120 and / or controller 130 may be configured to write first data associated with a host write operation to the block strip using a first write direction. Memory device 120 and / or controller 130 may be configured to write second data associated with a garbage collection write operation to the block strip using a second write direction.

[0037] As indicated above, Figure 1 Provided as an example. Other examples are available in the section about Figure 1 The instances described are different.

[0038] Figure 2 This is a diagram of an instance component contained in memory device 120. (As described above...) Figure 1 As described, memory device 120 may include controller 130 and memory 140. For example... Figure 2 As shown, memory 140 may include one or more non-volatile memory arrays 210, such as one or more NAND memory arrays and / or one or more NOR memory arrays. Alternatively, memory 140 may include one or more volatile memory arrays 220, such as one or more SRAM arrays and / or one or more DRAM arrays. Controller 130 may use non-volatile memory interface 230 to transmit signals to and receive signals from non-volatile memory array 210. Controller 130 may use volatile memory interface 240 to transmit signals to and receive signals from volatile memory array 220.

[0039] Controller 130 may control the operation of memory 140, for example, by executing one or more instructions. For instance, memory device 120 may store one or more instructions as firmware in memory 140, and controller 130 may execute these instructions. Alternatively, controller 130 may receive one or more instructions from host device 110 via host interface 150, and may execute these instructions. In some embodiments, a non-transitory computer-readable medium (e.g., volatile and / or non-volatile memory) may store a set of instructions (e.g., one or more instructions or codes) for controller 130 to execute. Controller 130 may execute the set of instructions to perform one or more operations or methods described herein. In some embodiments, execution of the set of instructions by controller 130 causes controller 130 and / or memory device 120 to perform one or more operations or methods described herein. In some embodiments, a hardwired circuit system may be used in place of or in conjunction with one or more instructions to perform one or more operations or methods described herein. Alternatively or additionally, one or more components of the controller 130 and / or memory device 120 may be configured to perform one or more operations or methods described herein. Instructions are sometimes referred to as “commands”.

[0040] For example, controller 130 may transmit signals to and / or receive signals from memory 140 based on one or more instructions to transfer data to or from all or part of memory 140 (e.g., write or program), transfer data to or from all or part of memory 140 (e.g., read), and / or erase all or part of memory 140 (e.g., one or more memory cells, pages, sub-blocks, blocks, or planes of memory 140). Alternatively or additionally, controller 130 may be configured to control access to memory 140 and / or provide a translation layer between host device 110 and memory 140 (e.g., for mapping logical addresses to physical addresses of the memory array). In some embodiments, controller 130 may translate host interface commands (e.g., commands received from host device 110) into memory interface commands (e.g., commands for performing operations on the memory array).

[0041] like Figure 2 As shown, controller 130 may include memory management component 250, write component 260, garbage collection component 270, and / or block strip building component 280. In some embodiments, one or more of these components are implemented as one or more instructions (e.g., firmware) executed by controller 130. Alternatively, one or more of these components may be implemented as an application-specific integrated circuit (ASIC) different from controller 130.

[0042] Memory management component 250 can be configured to manage the performance of memory device 120. For example, memory management component 250 can perform wear leveling, bad block management, block retirement, read interference management, garbage collection operations, and / or other memory management operations. In some embodiments, memory device 120 may store (e.g., in memory 140) one or more memory management tables. Memory management tables may store information that can be used or updated by memory management component 250, such as information about memory block age, memory block erase counts, and / or error information associated with memory partitions (e.g., memory cells, memory rows, memory blocks, etc.).

[0043] Write component 260 can be configured to manage write operations of memory device 120. For example, write component 260 can perform host write operations, garbage collection write operations, and / or other write operations as described herein. For example, write component 260 can be configured to have controller 130 provide commands (e.g., via non-volatile memory interface 230 and / or volatile memory interface 240) to program and / or write data to memory arrays (e.g., non-volatile memory array 210 and / or volatile memory array 220). As an example, write component 260 can be configured to write host data and garbage collection data to a single block, as described in more detail elsewhere herein.

[0044] Garbage collection component 270 may be configured to manage garbage collection operations of memory device 120. For example, garbage collection component 270 may be configured to identify blocks or block strips having valid page counts or valid translation unit (TU) counts that meet a threshold. Garbage collection component 270 may be configured to identify valid data from the identified blocks or block strips that will be written to or folded into new blocks or block strips (e.g., via write component 260 and / or memory management component 250). Garbage collection component 270 may be configured to perform one or more operations associated with garbage collection operations, as described in more detail elsewhere herein (e.g., in conjunction with...). Figure 4 ).

[0045] Block stripe construction component 280 can be configured to construct or form block stripes. For example, block stripe construction component 280 can be configured to identify one or more blocks from a set of memory dies (e.g., associated with a memory array of memory device 120) that will be included in a block stripe. Block stripe construction component 280 can be configured to store indications of the blocks included in the constructed block stripe. In some embodiments, block stripe construction component 280 can be configured to construct victimized block stripes for garbage collection operations, as described in more detail elsewhere herein.

[0046] Figure 2One or more devices or components shown may be configured to perform the operations described elsewhere herein, for example Figures 6 to 9 One or more operations and / or Figure 10 One or more process blocks of the method. For example, controller 130 and / or write component 260 may be configured to perform one or more operations and / or methods for memory device 120.

[0047] As an example, provide Figure 2 The number and arrangement of components shown. In reality, it is possible to have... Figure 2 The components shown are those that are additional, fewer, different, or arranged differently. Furthermore, Figure 2 The two or more components shown can be implemented within a single component, or Figure 2 The single component shown can be implemented as multiple distributed components. Alternatively, Figure 2 The component set shown (e.g., one or more components) can be executed as described by Figure 2 The other set of components shown performs one or more functions.

[0048] Figure 3 This is a diagram illustrating an example memory architecture 300 that can be used by memory device 120. Memory device 120 can use memory architecture 300 to store data. As shown, memory architecture 300 may include a die 310, which may include multiple planes 320. Planes 320 may include multiple blocks 330. Blocks 330 may include multiple pages 340. Although... Figure 3 A specific number of planes 320 for each die 310, a specific number of blocks 330 for each plane 320, and a specific number of pages 340 for each block 330 are shown, but these numbers may differ from those shown. In some embodiments, the memory architecture 300 is a NAND memory architecture.

[0049] Die 310 is a structure made of a semiconductor material such as silicon. Memory device 120 may be fabricated on die 310 (e.g., via semiconductor device fabrication processes). In some embodiments, die 310 is the smallest memory cell capable of independently executing commands. A memory chip or package may contain one or more dies 310. In some embodiments, controller 130 may be configured to manage operations performed by multiple dies 310. For example, controller 130 may be configured to manage operations for a memory system or memory subsystem comprising multiple dies 310.

[0050] Each die 310 of the chip includes one or more planes 320. A plane 320 is sometimes referred to as a memory plane. In some implementations, the same and simultaneous operations (sometimes with limitations) can be performed on multiple planes 320. Each plane 320 includes multiple blocks 330. A block 330 is sometimes referred to as a memory block. Each block 330 includes multiple pages 340. A page 340 is sometimes referred to as a memory page. A block 330 is the smallest erasable memory cell. In other words, it is not possible to erase individual pages 340 of a block 330 without erasing every other page 340 of the block 330. A page 340 is the smallest memory cell to which data can be written (i.e., the smallest memory cell that can be programmed with data). The terms "programmable" memory and "write-to" memory are used interchangeably. A page 340 may contain multiple memory cells accessible via the same access lines (sometimes called word lines).

[0051] In some implementations, read and write operations can be performed on a specific page 340 while an erase operation is performed on block 330 (e.g., all pages 340 in block 330). In some implementations, to prevent memory exhaustion, all pages 340 of block 330 can be programmed before erasing block 330, thus enabling new programming operations on pages 340 of block 330. After pages 340 are programmed with data (hereinafter referred to as "old data" or "expired data"), the data can be erased, but it cannot be overwritten with new data before being erased. An erase operation will erase all pages 340 in block 330, and erasing the entire block 330 whenever new data will replace old data would quickly exhaust the memory cells of block 330. Therefore, instead of performing an erase operation, new data can be stored in new pages (e.g., empty pages), as indicated by reference numeral 350, and old pages storing old data can be marked as invalid, as indicated by reference numeral 360 (e.g., as part of a garbage collection operation). The memory device 120 can then direct operations associated with the data to a new page and can track invalid pages to prevent programming operations from being performed on invalid pages before an erase operation. When page 340 of block 330 is full (e.g., all or some threshold number of pages are invalid or storing valid data), the memory device 120 can copy the valid data (e.g., to a new block or to the same block after erasure) and can erase block 330.

[0052] As indicated above, provided as an example Figure 3 Other examples can be found in relation to... Figure 3 The instances described are different.

[0053] Figure 4This is a diagram illustrating an example of a garbage collection operation. Garbage collection can be a function or operation of memory device 120 associated with the recycling of memory that is no longer in use. For example, memory device 120 (e.g., controller 130, memory management component 250, and / or garbage collection component 270) can perform one or more of the operations described herein to reclaim memory that was previously allocated by memory device 120 but is no longer mentioned or valid.

[0054] For example, such as Figure 4 As shown, a block (e.g., block A) may be associated with a page set (e.g., as described above in conjunction with...). Figure 4 As described. As shown in the figure, one or more pages of block A may be associated with valid data (e.g., shown as page 1, page 2, and page 3). Other pages of block A may not have data written to them and / or may be idle (e.g., in...). Figure 4 (Indicated as "idle"). In the first operation 410, the memory device may update the data stored in block A (e.g., rewrite the data), and / or may write new (or additional) data to block A. For example, the memory device 120 may rewrite data stored in pages 1, 2, and 3 to different pages of block A (e.g., in...). Figure 4 (These are shown as pages 1*, 2*, and 3*). The memory device 120 can mark pages that previously stored data now being rewritten as invalid. For example, as described above, an erase operation can be performed at the block level (e.g., without erasing individual pages), so when data is rewritten or updated, pages storing now-expired data can be marked invalid by the memory device 120. Additionally, the memory device 120 can receive additional data to be written (e.g., from the host device 110). The memory device 120 can write the additional data to other pages in block A (e.g., shown as pages 4, 5, and 6).

[0055] like Figure 4 As shown, after rewriting previously stored data and / or writing additional data to block A, all pages of block A are available for data storage (a stream, block A may be full). However, as described above, some pages of block A may store expired or invalid data. Therefore, memory device 120 may perform a garbage collection operation to reclaim memory allocated to expired or invalid data and preserve the valid data stored by block A. In some embodiments, a given block may be associated with a valid page count or valid TU count indicating the number of pages in the given block storing valid data. In some embodiments, memory device 120 may select a block (e.g., block A) to be associated with a garbage collection operation based on the block's valid page count or valid TU count meeting a threshold. As another example, memory device 120 may select a block (e.g., block A) to be associated with a garbage collection operation based on the block being associated with the most invalid page or the lowest valid page count or valid TU count in a set of blocks.

[0056] In the second operation 420, the memory device 120 can write valid data stored in block A to a different block (e.g., block B). For example, as Figure 4 As shown, data stored in pages 1*, 2*, 3*, 4, 5, and 6 of block A can be written to or folded into corresponding pages of block B (e.g., this can be referred to as a garbage collection write operation or a folding write operation). In such an instance, block A can be referred to as the victim block for a garbage collection operation. Memory device 120 can update the address (e.g., logical block address (LBA)) of the data written to block B (e.g., an updated physical location indicating the storage location).

[0057] In the third operation 430, the memory device 120 may perform an erase operation to erase the data stored in block A (e.g., after valid data has been written to or folded into block B). Therefore, block A can be erased, and all pages of block A become writable. This allows the memory device to reclaim memory previously used to store expired or invalid data and preserve the valid data stored by the memory device 120. This can improve the performance of the memory device 120 and / or increase its lifespan.

[0058] As indicated above, provided as an example Figure 4 Other examples can be found in relation to... Figure 4 The instances described are different.

[0059] Figure 5 This is a diagram illustrating examples of performing host write operations and garbage collection write operations. A memory system (e.g., comprising one or more memory devices 120) and / or memory devices 120 may be associated with a set of memory dies (e.g., a set of dies 310). (As in...) Figure 3 In more detail, each die can be associated with a set of blocks. For example... Figure 5 As shown, the memory device 120 and / or memory system may use a first block (e.g., block A) to perform a host write operation and may use a second block (e.g., block B) to perform a garbage collection write operation.

[0060] As described elsewhere herein, a block strip can refer to a group of blocks organized together for various read, write, erase, and / or garbage collection purposes, and other instances. For example, memory device 120 and / or memory system (e.g., block strip building assembly 280) can select one or more blocks from the respective dies of memory device 120 and / or memory system to be included in a given block strip. In some embodiments, a single block from each die can be selected to be included in the block strip. For example, each die can select blocks to be included in the block strip. Controller 130 can associate or map a write cursor to a block strip to point to a location or block strip associated with a given write operation. In other words, a block strip can be associated with a write cursor.

[0061] In some instances, a stripe can be a redundant array of individual NAND (RAIN) stripes or individual redundant arrays of disk redundant array (RAID) stripes. RAIN and RAID are used interchangeably herein. For example, a conventional memory system can utilize redundancy when data is stored at the memory components of a memory system. For example, a RAIN operation can be implemented to provide redundancy for data stored at the memory system. Redundancy can protect data from failures at the memory system by storing data in stripes (hereinafter also referred to as “RAIN stripes”) spanning multiple memory components (i.e., dies). A RAIN stripe can refer to a set of memory blocks or user data elements associated with a single parity data. For example, when data is received by the memory system, the data can be stored as blocks spanning multiple memory components (e.g., multiple dies). Parity data can also be generated for data stored across memory components. Parity data can be generated based on an XOR operation with the received data and can be used to reconstruct or recalculate user data in the event of a failure at the memory system. For example, if any data stored at a particular memory component fails, parity data can be combined with the remaining user data to reconstruct the data at the failed memory component. Therefore, data and corresponding parity data can be stored across multiple memory components or dies within the memory subsystem.

[0062] As described elsewhere herein, memory device 120 and / or memory system may use different block strips and / or write cursors to perform host write operations and garbage collection write operations. For example, memory device 120 and / or memory system may construct block strip A for host write operations (e.g., for writing data received from host device 110) and may construct block strip B for garbage collection write operations (e.g., for folding valid data stored by a victim block or victim block strip associated with a garbage collection operation).

[0063] Host write data can be written to block A via memory device 120 and / or memory system. For example, memory device 120 and / or memory system can be programmed to write host data following a “Z” pattern, wherein memory device 120 and / or memory system writes data to the first page (e.g., with a first page index) of the block associated with a first die (e.g., memory die 0), then writes data to the first page (e.g., with a first page index) of the block associated with a second die (e.g., memory die 1), then writes data to the first page (e.g., with a first page index) of the block associated with a third die (e.g., memory die 2), and so on. Once written to the first page (e.g., with a first page index) of the block associated with the last die (e.g., memory die 7) of block A, memory device 120 and / or memory system writes data to the second page (e.g., with a second page index) of the block associated with the first die (e.g., memory die 0). The memory device 120 and / or the memory system may continue to write data to block A following this pattern. Similarly, garbage collection write data (e.g., valid data from other blocks) may be written to block B. For example, the memory device 120 and / or the memory system may write garbage collection write data to block B following a "Z" pattern in a similar manner as described above.

[0064] In random write workloads, data can arrive at memory device 120 and / or the memory system unpredictably. For example, when memory device 120 and / or the memory system has host data to write, memory device 120 and / or the memory system may use block A to write the host data. When memory device 120 and / or the memory system has garbage-collected write data, memory device 120 and / or the memory system may use block B to write the garbage-collected write data. Therefore, during random write workloads, memory device 120 and / or the memory system may switch between writing to block A and writing to block B (e.g., referred to herein as "block switching"). As described elsewhere herein, this can degrade the performance of memory device 120 and / or the memory system because block switching can limit the operable operations and techniques, and / or increase the overhead of reserved blocks associated with write operations.

[0065] As indicated above, provided as an example Figure 5 Other examples can be found in relation to... Figure 5 The instances described are different.

[0066] Figure 6This is a diagram illustrating an example method 600 associated with a hybrid write cursor used for block strip writing. The functions and / or operations associated with example process 600 described herein may be performed by memory device 120, controller 130, memory management component 250, write component 260, garbage collection component 270, and / or block strip building component 280.

[0067] In the first operation 610, method 600 may include detecting that a block strip is needed for a write operation. The write operation may include host write operations and garbage collection write operations (e.g., folded write operations). For example, detecting that a block strip is needed may include the number of reserved blocks used for a mixed write cursor not meeting a threshold. In some instances, detecting that a block strip is needed may be based on detecting that all pages of a block strip currently being written to (e.g., data has been written to or programmed with data) have been used. As used herein, "mixed write cursor" may refer to a write cursor associated with a write operation (e.g., associated with both host write operations and garbage collection write operations). In other words, a write cursor associated with a block strip may be associated with programming data associated with a host write operation and programming data associated with a garbage collection operation. For example, a write cursor may abstract the logical address locations to be used for programming first data associated with a host write operation and programming second data associated with a garbage collection operation.

[0068] Process 600 may include constructing a block strip associated with a write cursor (e.g., a hybrid write cursor based on detecting that a block strip is needed for a write operation). For example, in a second operation 615, process 600 may include selecting one or more blocks associated with a set of memory dies of a memory device or memory system to form a block strip for writing data associated with host write operations and garbage collection operations. For example, the block strip may be associated with a memory block from a corresponding memory die of the set of memory dies.

[0069] In some implementations, block strips can be constructed dynamically. For example, instead of selecting pre-configured or identical blocks from each memory die (e.g., not selecting memory blocks with the same logical address from each memory die), process 600 may include dynamically selecting memory blocks based on detecting that a block strip is needed for at least one of a host write operation or a garbage collection operation. In some implementations, process 600 may include dynamically selecting blocks included in the block strip based on the initiation of a write operation.

[0070] In some implementations, blocks to be included in a block strip can be selected per memory die (e.g., instructions can be executed on each memory die, wherein the instructions are configured to cause the memory die to dynamically select blocks to be included in the block strip). In some implementations, blocks can be dynamically selected based on identifying free blocks (e.g., erased and / or not storing any data) from a set of blocks associated with a given memory die. For example, because a block strip can be associated with both host write data and garbage collection write data (e.g., as described in more detail elsewhere herein), blocks can be dynamically erased, as described in more detail elsewhere herein. For example, because victim block strips for garbage collection operations can be dynamically constructed as part of process 600, blocks included in block strips (e.g., to be written to) can also be dynamically constructed such that blocks that are not erased and / or contain valid data are not selected for inclusion in the block strip. In other words, because of the way victim blocks are selected for garbage collection operations, block strip construction may not be static (e.g., following a pre-configured or static pattern). When new block stripes are needed for write operations (e.g., to avoid selecting blocks with valid data), such as when using all pages of the last block strip, block strips may need to be constructed dynamically. This can improve the efficiency of write operations and / or reduce latency that might otherwise be introduced by selecting blocks with valid data to be included in the block strip.

[0071] In some implementations, process 600 may include storing indications of one or more blocks contained in a block strip (e.g., storing indications of blocks dynamically selected to be included in a block strip). For example, because the construction of block strips does not follow a pre-configured or static pattern, indications of blocks selected for each constructed block strip may be stored (e.g., to enable the identification of blocks included in the block strip).

[0072] In some cases, storing indications of blocks contained in a block strip can be associated with large memory overhead. For example, for a given block strip, an indication of each block contained in the block strip can be stored. Additionally, an indication of each block strip constructed as part of process 600 can be stored. Thus, in some embodiments, process 600 may include storing a single indication of blocks contained in a block strip associated with two or more memory dies logically coupled from a set of memory dies. In other words, two or more memory dies may be logically coupled for the purpose of storing indications of blocks contained in a block strip. For example, memory die 1 and memory die 2 may be coupled die (or virtual die) 1 for the purpose of storing indications of blocks contained in a block strip. As another example, memory die 2 and memory die 3 may be coupled die (or virtual die) 2. A single indication for the coupled die (or virtual die) can be stored. In other words, it can be assumed that each memory die associated with the coupled die (or virtual die) has the same block (or block index) selected for the block strip. For example, if the block 20 used for coupling die 1 is included in the indication in the block stripe, then it can be assumed that the block 20 from memory die 1 and the block 20 from memory die 2 are included in the block stripe. This saves memory associated with storing the indication of the blocks included in the block stripe.

[0073] In the third operation 620, process 600 may include determining the order of dies (e.g., memory dies) associated with the block strip. The order may be a logical order. For example, the order may be the order of logical identifiers or addresses associated with the dies. For example, the order may be from the lowest index value or address to the highest index value or address. For example, process 600 may include determining the logical order corresponding to a set of memory dies (e.g., such as...). Figure 8 The memory blocks are arranged in a sequential order (e.g., in a data structure) as depicted in the text. This allows the memory device 120 and / or the memory system to write to the blocks in a logical order of a set of memory dies, as described in more detail elsewhere herein.

[0074] In the fourth operation 625, process 600 may include determining a first starting point in a block strip for writing host write data and a second starting point in a block strip for writing garbage collection write data. The starting position may refer to a memory die. For example, for each corresponding write operation associated with a block strip, the starting position may be a first memory die to be written to. For example, process 600 may include selecting a memory die from a set of memory dies as the starting memory die for the first write operation (e.g., for a host write operation and / or a garbage collection write operation). The starting memory die may be referred to as a separate memory die. The first write operation may be associated with a first logical write direction, as explained in more detail below.

[0075] In some implementations, process 600 may include randomly selecting memory dies from a set of memory dies (e.g., using a randomization factor). For example, when constructing a block strip, individual dies may be randomly selected. In other words, a randomization factor (e.g., Randomized-QuickSort) may be used to select individual dies. This may result in each die associated with a block strip having an equal or similar chance of being selected as an individual die (e.g., as the starting position for a first write operation). As explained in more detail below, the selected (e.g., randomly selected) starting position can determine which blocks contain multiple types of data (e.g., some blocks in a block strip may be written with both host write data and garbage collection write data). By randomly selecting individual dies (e.g., as the starting position for a first write operation), blocks of a block strip containing different types of data can be distributed among the memory dies associated with the block strip. Because blocks containing multiple types of data (e.g., hot data and cold data) can reduce the efficiency of certain operations, such as garbage collection, distributing blocks containing different types of data across memory dies associated with block strips ensures that a single block does not contain a disproportionate number of blocks with different types of data (e.g., thereby ensuring that a given memory die does not have a disproportionate negative impact on the efficiency of certain operations).

[0076] In some embodiments, process 600 may include selecting a second starting position (e.g., a starting memory die) for a second write operation (e.g., for a host write operation and / or a garbage collection write operation) associated with the block strip. In some embodiments, the second starting position may be based on a first starting position (e.g., a randomly selected individual die). For example, the second starting position may be a memory die adjacent to an individual die in the order (e.g., logical order) of the memory dies. For example, the first write operation (e.g., a host write operation) and the second write operation (e.g., a garbage collection write operation) may be associated with different (e.g., opposite) write directions following the order (e.g., logical order) of the memory dies. The second starting position may be a memory die adjacent to an individual die in the write direction associated with the second write operation, such as in combination. Figure 8 To describe and depict in more detail.

[0077] In some embodiments, in the fifth operation 630, process 600 may include determining a first write direction following the memory die order for a first write operation (e.g., a host write operation) and a second write direction following the memory die order for a second write operation (e.g., a garbage collection write operation). For example, the memory die order (e.g., logical order) may be {0,1,2,3,4,5,6,7}, where the values ​​represent the index value or logical address of the respective memory die. In some embodiments, a single die (e.g., the starting position for the first write operation) may be memory die "3", and the starting position for the second write operation may be memory die "2". In this example, the first write direction may follow the order of blocks written to the block strips in memory dies {3,4,5,6,7,0,1,2,3,4,…}. The second write direction may follow the order of blocks written to the block strips in memory dies {2,1,0,7,6,5,4,3,2,1,…}. In other words, the first write direction and the second write direction are the opposite of the order (e.g., logical order) of the memory dies associated with the block strip.

[0078] In a sixth operation 635, process 600 may include programming first data to one or more memory blocks of a block strip following a first logical write direction associated with a logical order of a set of memory dies. For example, starting at a single die, host write data may be written to a block of the block strip in a first logical direction (e.g., a first write direction) following the logical order of a set of memory dies. In a seventh operation 640, process 600 may include programming second data to one or more memory blocks of a block strip following a second logical write direction associated with a logical order of a set of memory dies. For example, starting at a different memory die from a set of memory dies (e.g., different from a single die) and following a second logical write direction, garbage collection write data (e.g., valid data being folded from one or more victim blocks) may be programmed to the second one or more memory blocks. As described above, different memory dies may be adjacent to a single die in a logical order of a set of memory dies (e.g., relative to the second logical write direction).

[0079] In some embodiments, the sixth operation 635 and the seventh operation 640 (e.g., which may be collectively referred to as "write operations") may be associated with a dynamic word line start voltage. For example, a word line start voltage may refer to the starting voltage (e.g., selected from a series of increasing voltages) applied to a word line to program (e.g., perform a programming operation on) a memory cell associated with (e.g., coupled to) the word line. When performing a dynamic word line start voltage operation, one or more of a series of increasing voltages may be applied to determine the lowest voltage (e.g., the word line start voltage) at which the first page of the word line can be programmed with valid data. Other pages of the same word line can be programmed using the word line start voltage determined for the first page of the word line. This can reduce the programming time of a write operation. For example, the word line start voltage may be increased to more closely match the word line start voltage of the first page of the memory cell, and the remaining pages of the word line may be programmed using the same increased word line start voltage. Determining an appropriate word line start voltage for the first page of the word line may allow bypassing (e.g., skipping) lower word line start voltages in a series of increasing voltages. By using an increased word line start voltage determined for the first page, the appropriate word line start voltage for other pages associated with the same word line can be determined using a smaller increment from a series of increasing voltages. As described elsewhere in this document, if different block strips (and / or write cursors) will be used for both host write operations and garbage collection write operations, the dynamic word line start voltage operation may not be used for programming data. By using a single block strip (e.g., associated with a mixed write cursor), the dynamic word line start voltage operation can be applied, thereby reducing the programming time for write operations.

[0080] like Figure 6As shown, process 600 may include programming first data and programming second data according to a weighted ratio. In other words, process 600 may include programming the first data into a first number of pages (e.g., in sixth operation 635), and programming the second data into a second number of pages after programming the first data into the first number of pages. The ratio of the first number to the second number may be a weighted ratio. For example, process 600 may include writing to N pages for a host write operation (e.g., as described herein), then writing to M pages for a garbage collection write operation (e.g., as described herein), then writing to N pages for a host write operation, etc. (e.g., where N:M is a weighted ratio). In some embodiments, the weighted ratio of the first number to the second number is based on the number of pages contained in the respective blocks of one or more blocks. In some instances, the weighted ratio of the first number to the second number may be based on the effective page count of the victim block, as described elsewhere herein. In other words, the weighted ratio may be selected such that host write data and garbage collection write data form corresponding page blocks during the write operation. For example, if a page strip (e.g., and / or block) contains 32 pages, the weighting ratio can be approximately 1:2.4 (e.g., 1:2 and / or 1:3, since partial page writes may be impossible). This reduces the likelihood that a given block (or given page strip) contains mixed data (e.g., both host write data and garbage collection write data). Reducing the number of blocks and / or page strips containing mixed data improves the efficiency of the memory device 120 and / or the memory system (e.g., by reducing the likelihood that hot and cold data are stored together in the same block and / or page strip).

[0081] In some implementations, process 600 may include selecting or constructing victim block strips for garbage collection operations. For example, a block strip (e.g., constructed for a mixed write cursor, as described in more detail elsewhere herein) may not be used to obtain and / or collect valid data that will be used for garbage collection write operations. This may be because a block strip (e.g., constructed for a mixed write cursor, as described in more detail elsewhere herein) may have a higher effective translation cell count (e.g., due to writing hot data to the block strip), which would result in reduced efficiency for garbage collection operations. Instead, different block strips may be constructed as victim block strips for garbage collection operations. In some implementations, constructing a victim block strip may include selecting one or more victim blocks associated with a set of memory dies to form a victim block strip associated with a garbage collection operation. For example, each memory die may select blocks (e.g., victim blocks) to be included in the victim block strip.

[0082] In some implementations, one or more victim blocks are different from one or more blocks contained in block strips (e.g., the victim block strip and the block strip in which valid data associated with the waste collection operation is folded may be different blocks and / or different block strips). For example, process 600 may include folding second data from one or more victim blocks (e.g., in seventh operation 640) into one or more blocks as part of the waste collection operation. For example, seventh operation 640 may include collecting second data from a different block strip (e.g., the victim block strip) as part of the waste collection operation.

[0083] In some implementations, for a given memory die, the selection of victim blocks to be included in a victim block strip can include victim blocks selected from a set of memory blocks associated with the memory die based on the valid translation unit count or valid page count associated with the victim block. In other words, the selection of victim blocks to be included in a victim block strip can include blocks with the lowest valid translation unit count and / or lowest valid page count among the blocks associated with the memory die, selecting blocks to be included in a victim block strip for a memory die included in a set of memory dies. In this way, victim block strips can be dynamically constructed to include blocks with the lowest valid translation unit count and / or lowest valid page count, thereby improving the efficiency of garbage collection operations.

[0084] As indicated above, provided as an example Figure 6 Other examples can be found in relation to... Figure 6 The instances described are different.

[0085] Figure 7 This is a diagram illustrating an example process 700 associated with a hybrid write cursor used for block strip writing. The functions and / or operations described herein associated with example process 700 may be performed by memory device 120, controller 130, memory management component 250, write component 260, garbage collection component 270, and / or block strip building component 280. In some embodiments, process 700 may be performed as part of or in conjunction with process 600.

[0086] For example, in the first operation 705, process 700 may include writing host data to the block strip in a first direction following the order of the memory dies associated with the block strip (e.g., to combine...). Figure 6 And / or a similar manner as described in the sixth operation 635). In the second operation 710, process 700 may include writing garbage collection write data to the block strip in a second direction following the order of the memory dies associated with the block strip (e.g., to combine with...). Figure 6 and / or a similar manner as described in Operation 640 (seventh operation).

[0087] In the third operation 715, process 700 may include determining whether data has already been written to the next page to be written (e.g., for host write data and / or garbage collection write data). If the next page to be written is free (e.g., no), process 700 may include continuing to write host write data and garbage collection write data, as described in more detail elsewhere herein. If the next page to be written is occupied (e.g., already programmed with host write data or garbage collection write data) (e.g., yes), process 700 may include in the fourth operation 720 incrementing the index of the page being written in the block of the block strip (e.g., for the first operation 705 and / or the second operation 710).

[0088] For example, process 700 may include detecting that both first data and second data will be programmed into pages contained in a memory block of the block strip (e.g., following a first write direction and a second write direction for host write data and garbage collection write data, respectively). Process 700 may include incrementing the index of the page being written into the block of the block strip based on detecting that both first data and second data are programmed into pages (e.g., following a first write direction and a second write direction for host write data and garbage collection write data, respectively), to move the block "down" to the next available page.

[0089] In the fifth operation 725, process 700 may include identifying the next available block in the block strip using free pages with incrementing index values ​​(e.g., in a first or second direction). For example, a write operation may be associated with writing to the first page index of the block associated with the block strip (e.g., writing a page with the first page index of the first block, then writing a page with the first page index of the second block, then writing a page with the first page index of the third block, etc.). When a write direction results in the next block being occupied by data from other write operations (e.g., data written by the host or garbage collection), the index of the subsequently written page may be incremented (e.g., increased or decreased by a certain amount). For example, after the index is incremented, a write operation (e.g., a host write operation or a garbage collection write operation) may be associated with writing to a page with a second index. Figure 7 As shown, process 700 may include programming first data (e.g., with an incrementing page index) from the beginning of a memory block into a page in the next memory block following a first write direction. In some embodiments, process 700 may include programming second data (e.g., also with an incrementing page index) from the beginning of a memory block into a second page in the next memory block following a second write direction.

[0090] As indicated above, provided as an example Figure 7 Other examples can be found in relation to... Figure 7 The instances described are different.

[0091] Figure 8This is a diagram illustrating the instance block bar 800 associated with the mixed write cursor. For example, Figure 8 The blocks depicted herein (e.g., block A) can be constructed and / or programmed using one or more operations or procedures described elsewhere in this document.

[0092] like Figure 8 As shown, block strip A can be associated with both host write data and garbage collection write data (e.g., folded write data). For example, a single block to be included in block strip A can be selected from the corresponding memory dies (e.g., memory dies 0 to 7) (e.g., dynamically). The corresponding memory die can be associated with, for example... Figure 8 The order depicted (e.g., logical order) is associated (e.g., from memory die 0 to memory die 7). Figure 8 As shown, the starting position for writing host write data is selected as memory die 3. In other words, memory die 3 can be randomly selected as the starting position for writing host data (e.g., a single die). The starting position for writing garbage collection data can be memory die 2 because memory die 2 is adjacent to the single die (e.g., memory die 3) relative to the write direction associated with the garbage collection write operation (e.g., the folded write direction).

[0093] The first write direction can begin from a single die (e.g., memory die 3) (e.g., as...). Figure 8 Host write data can be written in the host write direction shown in the diagram. Data can be written starting from memory die 2 in the second write direction (e.g., as shown in the diagram). Figure 8 Garbage collection write data is written in the folded write direction shown in the diagram. For example, as... Figure 8 The numbers in the different pages depicted (e.g., HW 0, HW 1, FW 0, FW 1, etc.) can represent the order in which data is written for the corresponding operation. For example, host write data is written in the order of HW 0, HW 1, HW 2, HW 3, HW 4, etc. Similarly, garbage collection write data is written in the order of FW 0, FW 1, FW 2, FW 3, FW 4, etc.

[0094] As described elsewhere in this document, host write data and garbage collection write data can be written to block A in a weighted ratio. For example, the weighted ratio for host writes to garbage collection writes could be 1:2. For example, HW0 can be written to the first page of memory die 3. Subsequently, FW0 can be written to the first page of memory die 2, and FW1 can be written to the first page of memory die 1. Subsequently, HW1 can be written to the first page of memory die 4. Subsequently, FW2 can be written to the first page of memory die 0, and FW3 can be written to the first page of memory die 7. This pattern can continue to be used for write operations on block A associated with the mixed write cursor.

[0095] Using a weighted ratio to write or program data to block A increases the likelihood that a given block (or page) may contain only a single type of data (e.g., only host-written data or only garbage-collected data). For example, such as Figure 8 As shown, following the pattern described above can result in most blocks of block strip A being associated with a single type of data (e.g., host write data or garbage collection data and / or hot data or cold data). Therefore, the efficiency of memory operations can be improved because a given block or page strip may not contain different types of data (e.g., it may not contain both hot and cold data).

[0096] In some cases, such as Figure 8 As shown, a memory block may contain one or more first pages associated with first data (e.g., host write data) and one or more second pages associated with second data (e.g., garbage collection data). For example, in block strip A, the block associated with memory die 5 may be associated with both host write data and garbage collection data. However, by randomly selecting the starting position for host write operations (e.g., a single die), when data is written to multiple block strips (e.g., such as...), Figure 9 When (as depicted in the text), the location of blocks containing both host write data and garbage collection data can be distributed (e.g., evenly distributed) in the memory die.

[0097] In some cases, it may occupy the next page that will be written in the direction of the write (e.g., as in combination). Figure 7 (As described). For example, after writing FW 10, the folded write direction can indicate that garbage collection data is written to a page in the block associated with memory die 4. However, the page in the block associated with memory die 4 may already be programmed with HW 4 data. Therefore, the pages being written can be incremented so that the garbage collection write operation writes to the next page in the block contained in block strip A (e.g., as described). Figure 8(As depicted in the diagram, moving pages downwards). For example, instead of writing pages to the block associated with memory die 4, FW 11 can be written to an incrementing page index in memory die 2 (e.g., from a page in the block associated with memory die 4, following the folded write direction).

[0098] As indicated above, provided as an example Figure 8 Other examples can be found in relation to... Figure 8 The instances described are different.

[0099] Figure 9 This is a diagram illustrating instance block 900 associated with the mixed write cursor. For example, Figure 9 The blocks depicted herein can be constructed and / or programmed using one or more operations or procedures described elsewhere in this document. For example, Figure 9 The layout of the instance memory array after a hybrid write operation can be depicted, as described in this article.

[0100] For example, when writing to the first block (e.g., as...) Figure 9 The block strip 1 shown and / or as shown Figure 8 After all pages of the block associated with block strip A shown, another one or more blocks associated with a set of memory dies can be selected to form another block strip for writing data associated with host write operations and garbage collection operations for another write operation. In other words, another block strip (e.g., block strip 2) can be dynamically constructed for a mixed write cursor, as described in more detail elsewhere herein. For example, the starting position for block strip 2 (e.g., a single die) can be randomly selected. In other words, block strip 1 can be associated with a first memory die in a set of memory dies, which is the first starting point for a write operation. Block strip 2 can be associated with a second memory die in a set of memory dies, which is the second starting point for another write operation. For example, the first and second memory dies can be randomly selected from a set of memory dies (e.g., the first and second memory dies can be the same memory die or different memory dies, such as...). Figure 9 (As depicted in the text).

[0101] like Figure 9As shown, this can result in blocks containing mixed data being distributed across the memory die. For example, when data is written to different block stripes, blocks or page stripes containing mixed data (e.g., containing both host write data and garbage collection write data and / or containing both hot and cold data) can be distributed across the memory die. This can improve the efficiency of memory operations and / or resolve problems associated with writing hot and cold data together. For example, because hot data (e.g., host write data) and cold data (e.g., garbage collection data) can be written to different blocks and / or different page stripes of the corresponding block stripes (e.g., due to weighting ratios and / or randomly selected individual dies), blocks containing lower effective page counts (e.g., victim blocks) can be selected for garbage collection operations (e.g., because hot and cold data can generally not be written to the same block, even if hot and cold data are written to the same block strip). Furthermore, due to the randomly selected individual dies, the same memory die can continuously contain blocks with both hot and cold data, even when hot and cold data can be written to the same block of the block strip. This can improve the efficiency of waste collection operations.

[0102] As indicated above, provided as an example Figure 9 Other examples can be found in relation to... Figure 9 The instances described are different.

[0103] Figure 10 This is a flowchart of an instance method 1000 associated with a hybrid write cursor for block writing. In some embodiments, a memory device (e.g., memory device 120) is executable or configurable to perform this action. Figure 10 One or more process blocks. In some embodiments, another device or group of devices (e.g., host device 110) that is separate from or includes the memory device may perform or be configured to perform the process. Figure 10 One or more process frames. Alternatively, one or more components of the memory device (e.g., controller 130, memory 140, memory management component 250, write component 260, garbage collection component 270, and / or block building component 280) may be executable or configurable to perform this action. Figure 10 One or more process frames.

[0104] like Figure 10 As shown, method 1000 may include selecting one or more blocks associated with a set of memory dies of a memory device to form block strips for writing data associated with host write operations and garbage collection operations, wherein the host write operation is associated with first data obtained from a host, and wherein the garbage collection operation is associated with folded data from different block strips (box 1010). Figure 10As further shown, method 1000 may include programming first data associated with a host write operation into a block (box 1020). Figure 10 As further shown, method 1000 may include programming second data associated with a garbage collection operation into a block, wherein both the first data and the second data are programmed into the block during a write operation (box 1030).

[0105] although Figure 10 The example block shows method 1000, but in some implementations, method 1000 may include a different implementation. Figure 10 The blocks described herein may be additional blocks, fewer blocks, different blocks, or blocks arranged differently. Alternatively, two or more blocks of method 1000 may be executed in parallel. Method 1000 is an example of a method that can be executed by one or more means described herein. One or more means may be based on the operations described herein, for example, in combination Figures 6 to 9 The operations described herein may be performed or configured to be based on the operations described herein, for example, in combination with Figures 6 to 9 The described operation executes one or more other methods.

[0106] In some embodiments, the memory system includes a set of memory dies; and one or more components configured to: construct a block strip associated with a write cursor, wherein the block strip is associated with a memory block from a corresponding memory die of the set of memory dies, and wherein the write cursor is associated with programming first data associated with a host write operation and programming second data associated with a garbage collection operation; programming the first data into a first one or more memory blocks of the block strip following a first logical write direction associated with a logical order of the set of memory dies; and programming the second data into a second one or more memory blocks of the block strip following a second logical write direction associated with a logical order of the set of memory dies.

[0107] In some embodiments, the method includes selecting one or more blocks associated with a set of memory dies of the memory device to form a block strip for writing data associated with host write operations and garbage collection operations, wherein the host write operation is associated with first data obtained from a host, and wherein the garbage collection operation is associated with folded data from different block strips; programming the first data associated with the host write operation into the block strip by the memory device; and programming the second data associated with the garbage collection operation into the block strip by the memory device, wherein both the first data and the second data are programmed into the block strip during the write operation.

[0108] In some implementations, the system includes means for programming first data to a block strip associated with a set of memory dies as part of a write operation, wherein the first data is associated with a host write operation, and wherein the first data is written to a block contained in the block strip in a first direction following the order of the set of memory dies; and means for programming second data to the block strip as part of the write operation, wherein the second data is associated with a fold write operation, and wherein the second data is written to the block contained in the block strip in a second direction following the order of the set of memory dies.

[0109] The foregoing disclosure provides illustrations and descriptions, but is not intended to be exhaustive or to limit the implementation to the precise form disclosed. Modifications and variations may be made based on the foregoing disclosure, or from the practice of the implementations described herein.

[0110] As used in this article, “meeting the threshold” can refer to a value that is greater than the threshold, greater than or equal to the threshold, less than the threshold, less than or equal to the threshold, equal to the threshold, not equal to the threshold, etc., depending on the context.

[0111] While specific combinations of features are set forth in the claims and / or disclosed in this specification, these combinations are not intended to limit the disclosure of the embodiments described herein. Many of these features may be combined in ways not specifically set forth in the claims and / or not disclosed in this specification. For example, this disclosure includes each dependent claim in the claim set, combined with each other individual claim in the claim set and each combination of multiple claims in the claim set. As used herein, the phrase “at least one” in the list of entries refers to any combination of those entries containing a single member. As an example, “at least one of the following: a, b, or c” is intended to cover a, b, c, a+b, a+c, b+c, and a+b+c, and any combination with multiples of the same element (e.g., a+a, a+a+a, a+a+b, a+a+c, a+b+b, a+c+c, b+b, b+b+b, b+b+c, c+c, and c+c+c, or any other order of a, b, and c).

[0112] Unless explicitly stated otherwise, elements, actions, or instructions used herein should not be construed as critical or necessary. Furthermore, as used herein, the articles “a” and “an” are intended to include one or more items and are interchangeable with “one or more.” Additionally, as used herein, the article “described” is intended to include one or more items mentioned in conjunction with the article “described” and is interchangeable with “one or more.” Where only one item is specified, the phrases “only one,” “single,” or similar language are used. Moreover, as used herein, the terms “has / have / having,” etc., are intended to be open-ended terms, not limiting the elements they modify (e.g., an element “having” A may also have B). Furthermore, unless explicitly stated otherwise, the phrase “based on” is intended to mean “at least partially based on.” As used herein, the term “multiple” can be replaced with “a plurality of,” and vice versa. Moreover, as used herein, unless otherwise expressly stated, the term “or” is intended to be inclusive when used in series and is interchangeable with “and / or” (e.g., if used in conjunction with “any one” or “only one of…”).

Claims

1. A memory system comprising: A set of memory dies; and One or more components, configured to: Construct the block bar associated with the write cursor. The block stripe is associated with a memory block from a corresponding memory die of the set of memory dies, and The write cursor is associated with first data that is programmed and associated with host write operations and second data that is programmed and associated with garbage collection operations; The first data is programmed into one or more memory blocks of the block strip following a first logical write direction associated with the logical order of the set of memory dies; and The second data is programmed into one or more memory blocks of the block strip following a second logical write direction associated with the logical order of the set of memory dies.

2. The memory system of claim 1, wherein, for constructing the block strip, the one or more components are configured to: The memory blocks of the block strip are arranged in the order corresponding to the logical order of the set of memory dies; and Select a memory die from the set of memory dies as the starting memory die for the first logical write direction.

3. The memory system of claim 2, wherein, for selecting the memory die, the one or more components are configured to: The memory die is randomly selected from the set of memory dies using a randomization factor.

4. The memory system of claim 2, wherein, for programming the first data, the one or more components are configured to: The first data is programmed into the first one or more memory blocks, starting at the memory die and following the first logical write direction; and The one or more components used for programming the second data are configured to: The second data is programmed into the second one or more memory blocks, starting at different memory dies from the set of memory dies and following the second logical write direction.

5. The memory system of claim 4, wherein the different memory dies are adjacent to the memory die in the logical order of the set of memory dies.

6. The memory system of claim 1, wherein a memory block is contained in both the first one or more memory blocks and the second one or more memory blocks, and wherein the memory block contains a first one or more pages associated with the first data and a second one or more pages associated with the second data.

7. The memory system of claim 1, wherein the one or more components are configured to program the first data and the second data according to a weighted ratio.

8. The memory system of claim 1, wherein the one or more components are further configured to: It was detected that both the first data and the second data were programmed into pages contained in the memory block of the block strip; Following the first logical write direction, the first data is programmed from the memory block to the first page of the next memory block; and Following the second logical write direction, the second data is programmed from the memory block to the second page in the next memory block. The first page and the second page have a first index that increments from the second index value of the page.

9. The memory system of claim 1, wherein, for constructing the block strip, the one or more components are configured to: The memory blocks are constructed by dynamically selecting them based on the detection that the block strip is needed for at least one of the host write operation or the garbage collection operation.

10. A method comprising: The memory device selects one or more blocks associated with a set of memory dies of the memory device to form a block strip for writing data associated with host write operations and garbage collection operations. The host write operation is associated with the first data obtained from the host, and The waste collection operation is associated with folded data from different blocks; The memory device programs the first data associated with the host write operation into the block strip; and The memory device programs the second data associated with the garbage collection operation into the block. Both the first data and the second data are programmed into the block during the write operation.

11. The method of claim 10, wherein programming the first data comprises: In the write operation, the first data is programmed in a first direction of the logical order of the set of memory dies, and The second data in the programming includes: In the write operation, the second data is programmed in a second direction of the logical order of the set of memory dies.

12. The method of claim 10, wherein programming the first data comprises: In the write operation, the first data is programmed into a first number of pages, and The second data in the programming includes: In the write operation, the second data is programmed into a second number of pages after the first data is programmed into the first number of pages, and The ratio of the first quantity to the second quantity is based on the number of pages contained in the respective blocks of the one or more blocks.

13. The method of claim 10, further comprising: Select one or more victim blocks associated with the set of memory dies to form a victim block strip associated with the garbage collection operation. The one or more victim blocks are different from the one or more blocks contained in the block strip, and The second data in the programming includes: The second data is folded from the one or more victim blocks into the one or more blocks as part of the waste collection operation.

14. The method of claim 13, wherein selecting the one or more victim blocks comprises: Based on the number of valid translation units associated with the victim block, a victim block is selected from the set of memory blocks associated with the memory die for the set of memory dies.

15. The method of claim 10, further comprising: Indications for storing the one or more blocks contained in the block strip.

16. The method of claim 15, wherein storing the indication of the one or more blocks contained in the block strip comprises: A single indication of a block contained in the block stripe that is logically coupled to two or more memory dies from the set of memory dies.

17. The method of claim 10, wherein the write operation is associated with a dynamic word line start voltage.

18. The method of claim 10, further comprising: Select one or more blocks associated with the set of memory dies of the memory device to form another block strip for writing data associated with the host write operation and the garbage collection operation for another write operation. The block stripe is associated with a first memory die in a set of memory dies, the first memory die being the first starting point for the write operation. Another stripe is associated with a second memory die in the set of memory dies, which is a second starting point for another write operation.

19. The method of claim 18, wherein the first memory die and the second memory die are randomly selected from the set of memory dies.

20. A system comprising: A means for programming first data into a block strip associated with a set of memory dies as part of a write operation. The first data is associated with a host write operation, and The first data is written to a block contained in the block strip in a first direction following the order of the set of memory dies; and A means for programming second data into the block as part of the write operation. The second data is associated with the fold write operation, and The second data is written into the block contained in the block strip in a second direction following the order of the set of memory dies.

21. The system of claim 20, further comprising: A means for dynamically selecting the block contained in the block strip based on the initiation of the write operation.

22. The system of claim 20, wherein the first data is written from the starting memory die of the set of memory dies and following the first direction in the order of the set of memory dies to a page associated with a first index of the first one or more blocks of the block, and The second data is written from memory dies adjacent to the starting memory die in the order of the set of memory dies and following the second direction in the order of the set of memory dies to a page associated with the first index of the second one or more blocks of the block.

23. The system of claim 22, wherein the means for programming the first data comprises: A means for detecting that the second data has been written to the next page following the first direction indication in the order of the set of memory dies; and A means for programming the first data into a page associated with a second index in the next available block, as if following the first direction indication in the order of the set of memory dies.

24. The system of claim 20, further comprising: Means for selecting blocks from the set of memory dies to form different strips; and A means for collecting the second data from the different blocks as part of a waste collection operation.

25. The system of claim 24, wherein the means for selecting the blocks to form the different block strips comprises: A means for selecting, based on the block with the lowest effective page count among the blocks associated with the memory die, a block to be included in the different block stripes for a memory die contained in the set of memory dies.

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