A hardware implementation device of a single-multicast universal high throughput forwarding table
By implementing a high-throughput forwarding table applicable to both unicast and multicast through hash mapping and dual-port SRAM, the problems of low resource utilization efficiency and low throughput in existing technologies are solved, enabling efficient forwarding of unicast, multicast, and broadcast, and improving resource utilization and throughput.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIDIAN UNIV
- Filing Date
- 2024-03-04
- Publication Date
- 2026-07-07
AI Technical Summary
In existing technologies, separate design of forwarding circuits for single broadcast and multicast leads to low resource utilization efficiency, while state machine-based and inter-state machine pipelined methods result in excessively low throughput.
It employs a reverse butterfly extraction module, a judgment module, a hash mapping module, a learning module, an aging module, a forwarding table module, an arbitration access module, a FIFO module, a read-write protection module, and a write-back module. It implements a high-throughput forwarding table that is applicable to both unicast and multicast through hash mapping and dual-port SRAM. It supports a unified circuit design for unicast, multicast, and broadcast, and adopts a fully pipelined structure and a dynamic aging mechanism.
It improves resource utilization efficiency, allows data to be processed once per cycle, increases throughput, supports efficient forwarding of unicast, multicast and broadcast, and reduces storage resource redundancy.
Smart Images
Figure CN118118449B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of network switch technology, specifically relating to a hardware implementation device for a high-throughput forwarding table that is applicable to both unicast and multicast. Background Technology
[0002] Existing publicly available implementations of Layer 2 forwarding design separate unicast and multicast functions into different circuit paths. Reference 1 (Deng Zuo, Li Guorui, Zhan Yang. A forwarding method and device based on distributed flow tables [P]. Hubei Province: CN117221255A, 2023-12-12) proposes a distributed flow table implementation device for network switching, targeting point-to-point unicast communication between different chips from the source node to the destination node, and the forwarding flow table supports self-learning and self-aging functions. Reference 2 (Ma Peijun, Xu Yang, Yu Yue, et al. A pipelined implementation method and device for Layer 2 forwarding [P]. Shaanxi Province: CN116800701A, 2023-09-22) proposes a pipelined implementation method between state machines for unicast forwarding, which allows a maximum of one lookup every two cycles. Reference 3 (Zhang Zhibin. A message forwarding method and device [P]. Anhui Province: CN113824654B, 2023-12-29) provides a device for establishing multicast communication within a Virtual Local Area Network (VLAN). Furthermore, most currently disclosed Layer 2 forwarding architectures are implemented using state machine-based or pipelined approaches between state machines.
[0003] The existing technology has the following technical problems: (1) Since only one of the communication behaviors, single broadcast or multicast, is implemented for the same data packet, the separate implementation of the single broadcast circuit will result in low utilization efficiency of the forwarding circuit. (2) The state machine and pipelined implementation methods will result in low forwarding throughput. Summary of the Invention
[0004] To address the aforementioned problems in the prior art, this invention provides a hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast. The technical problem to be solved by this invention is achieved through the following technical solution:
[0005] This invention provides a hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast, comprising:
[0006] The reverse butterfly extraction module is used to receive PHV data streams and extract address information and enable information from the PHV data streams; the address information includes the destination MAC address, the source MAC address, and the source port number;
[0007] The judgment module is used to determine the forwarding type of the PHV data stream using the destination MAC address;
[0008] The hash mapping module is used to perform hash mapping on both the destination MAC address and the source MAC address to obtain the destination hash address and the source hash address;
[0009] The learning module is used to determine whether to enable the learning function based on the forwarding type and enabling information, so as to update the forwarding table using the source hash address;
[0010] The aging module is used to set the aging time and the lifespan of each entry in the forwarding table according to the enabling information. If the lifespan reaches the aging time, the entry is cleared.
[0011] The forwarding table module is used to forward data from one side of the dual-port SRAM using the destination hash address, and to interact with the CPU and access the forwarding table from the other side in a time-sharing manner to obtain table entry information corresponding to the forwarding type.
[0012] The arbitration access module is used to arbitrate the read and write operations of the learning module and the aging module on the forwarding table module;
[0013] The FIFO module is used to record the table entry addresses when the learning module and the aging module read the forwarding table, and to store read and write information that could not be accessed in time.
[0014] The read / write protection module is used to protect the hardware implementation device of the unicast / multicast general-purpose high-throughput forwarding table when the dual-port SRAM accesses the same address simultaneously, causing the hardware implementation device of the unicast / multicast general-purpose high-throughput forwarding table to be in an undefined state.
[0015] The write-back module is used to write the table entry information obtained by the forwarding table module back to the PHV data stream. This invention has at least one of the following beneficial effects:
[0016] (1) Implementing unicast and multicast paths using the same circuit improves resource utilization efficiency. For the input header vector, the destination MAC address, source MAC address, source port number, and self-learning and self-aging enable need to be extracted. If the high 24 bits of the destination MAC address are "0x01005E", multicast function is implemented. If self-aging is enabled, the entry can take effect within the configured lifetime. If the destination MAC address is all 1s, the information needs to be broadcast to all ports except the sending end. Otherwise, unicast function is implemented, and the entry can be dynamically updated based on self-learning and self-aging enable. Whether it is unicast, multicast, or broadcast, the destination port in the MAC table will be obtained and written back to the header vector to complete the output.
[0017] (2) The fully pipelined architecture allows data to be processed once per cycle, maximizing throughput. In practical applications, configuring channels, self-learning reads and writes, self-aging reads and writes, and lookups all require access to the forwarding table; therefore, determining the forwarding table access strategy is crucial. This invention uses one port dedicated to looking up forwarding port results, designed as read-only. Another port is used for self-learning and self-aging access during lookups, storing unaccessed read / write control signals in a FIFO. This port is used for control-level configuration at system initialization, hence it is designed to be both readable and writable. The arbitration access module handles access conflicts between learning and aging; this design can determine the access priority of the two based on external register configurations.
[0018] (3) Layer 2 forwarding can record the mapping relationship between unicast MAC addresses and output ports, and the mapping relationship between multicast MAC addresses and multicast group members using only one forwarding table. It also synchronizes the self-learning and self-aging update functions in the forwarding table in a timely manner, thereby improving the utilization of storage resources.
[0019] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of a hardware implementation device for a high-throughput forwarding table that is universal for both unicast and multicast provided by the present invention;
[0021] Figure 2 This is a schematic diagram illustrating the implementation process of the high-throughput forwarding table that is universal for both unicast and multicast provided by the present invention;
[0022] Figure 3 This is a schematic diagram of the exploration learning update judgment process provided by the present invention;
[0023] Figure 4 This is the dynamic aging process flow diagram provided by the present invention;
[0024] Figure 5 It is a design diagram for read / write conflict protection of the forwarding table;
[0025] Figure 6 This is a schematic diagram of the multicast table structure;
[0026] Figure 7 This is a schematic diagram of a high-throughput forwarding table that applies both unicast and multicast in a network switch device.
[0027] Figure 8 This is a screenshot of the forwarding verification results for sending 5000 data packets. Detailed Implementation
[0028] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.
[0029] refer to Figure 1 As shown, the present invention provides a hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast, comprising:
[0030] The reverse butterfly extraction module is used to receive PHV data streams and extract address information and enable information from the PHV data streams; the address information includes the destination MAC address, the source MAC address, and the source port number;
[0031] This module can use the Reverse Butterfly network to synchronously extract the source MAC address, source port number, and destination MAC address, as well as enable information, from the address information. The enable information includes learning enable and aging enable.
[0032] The judgment module is used to determine the forwarding type of the PHV data stream using the destination MAC address;
[0033] Specifically, the destination MAC address is used to determine whether the forwarding of data frames in the PHV data stream is unicast, multicast, or broadcast. If the high 24 bits of the destination MAC address are 0x01_005E, the data frame is a multicast frame. If the destination MAC address is 0xFFFF_FFFF_FFFF, the data frame is a broadcast frame. Otherwise, the data frame is a unicast frame.
[0034] The hash mapping module is used to perform hash mapping on both the destination MAC address and the source MAC address to obtain the destination hash address and the source hash address;
[0035] The hash mapping module performs hash mapping on both the destination MAC address and the source MAC address, and uses a two-function cuckoo hashing method to reduce the probability of hash collisions during the hash mapping process, obtaining the destination hash address and the source hash address. The hash mapping module can use a two-function cuckoo hashing method to reduce the probability of hash collisions, setting the threshold for the cuckoo's "kick" to 3. If a collision still occurs after exceeding the threshold, the collision signal is reported to the control plane.
[0036] For Layer 2 forwarding channels, hash collisions only require searching for entries at the two hash addresses each time, and comparing the MAC table information of the entries if they are valid. If the search is successful, the corresponding port number is used as the source operand for the PHV modification field and written back to obtain the final output. If the search fails, it means that no valid entries are configured at either address, so the message is forwarded to all other ports in the broadcast domain, and all 1s in the mask bit are written to the PHV output port field.
[0037] The hash mapping module synchronously performs hash mapping on the source MAC address and the destination MAC address to obtain the corresponding source key and destination key; the destination key is used as the read address of the forwarding table module; and the source key is used as the read address of the learning module.
[0038] The learning module is used to determine whether to enable the learning function based on the forwarding type and enabling information, so as to update the forwarding table using the source hash address;
[0039] The learning module is used to enable the learning function if the forwarding type is a unicast frame and the learning enable is high, so as to use the source key to query the forwarding table to obtain the corresponding table entry information. If the table entry information is invalid or needs to be updated, the table entry information is rewritten. If the forwarding type is a multicast or broadcast frame, the learning function is not enabled.
[0040] For the learning function, the reverse butterfly network needs to extract both the source MAC address and the source port number. Then, it performs a hash mapping with both the source and destination MAC addresses to obtain the source key. This source key serves as the address of the dual-port MAC table entry, from which table entry information is read. The most significant bit of the table entry is then read, and the data in the read entry is compared with the source MAC address. The comparison process is as follows: Figure 3 As shown.
[0041] If the highest bit is 0, it indicates that the current entry is invalid, and a new entry needs to be added to the table through self-learning. In this case, the address of the read RAM needs to be used as the write address, and the source port number and source MAC address are written together into the same entry to complete the learning binding. If the highest bit is 1 and the read data does not match the source MAC address, it means that a collision occurred during the mapping process. This paper adopts a double cuckoo hash strategy to reduce the probability of collisions. If the highest bit is 1 and the source MAC address in the read data matches the source MAC address extracted from the data packet, but the source port in the entry is different from the extracted port, the mapping relationship is re-bound, and the entry information is updated. If the highest bit is 1 and the binding relationship between the source MAC address and source port in the read data matches the source MAC address and source port number extracted from the data packet, it means that the current entry is valid and no hash collision has occurred.
[0042] The aging module is used to set the aging time and the lifespan of each entry in the forwarding table according to the enabling information. If the lifespan reaches the aging time, the entry is cleared.
[0043] This module is further used to enable the aging function if the aging enable is high, to set the aging time and define the lifetime of each entry in the forwarding table since its establishment; to poll the lifetime of each entry, and if the aging time is reached, to clear the entry information. A dedicated timer can be set up to monitor the time. By checking the entry information at the polling address, if the corresponding time parameter t = timer - 1 is obtained, then the entry information is cleared.
[0044] The forwarding table module is used to forward data from one side of the dual-port SRAM using the destination hash address, and to interact with the CPU and access the forwarding table from the other side in a time-sharing manner to obtain table entry information corresponding to the forwarding type.
[0045] The forwarding table module itself contains a forwarding table, which is initialized through the configuration interface of the host computer after the hardware implementation device of the high throughput forwarding table for both unicast and multicast is reset. During each access process, the learning module and aging module confirm whether to update the table entry information. The table entry information includes the table entry validity bit, MAC address, forwarding port / multicast member for unicast and broadcast, and real-time time of the table entry.
[0046] The forwarding table module is implemented using dual-port SRAM. One side is used for forwarding, meaning only the read function needs to be enabled, while the other side is used for CPU interaction, learning, and aging-up access. CPU interaction and learning / aging-up access to the forwarding table are time-sharedded. Since the forwarding port and multicast members are located in the same position, if the forwarding type is unicast or broadcast, the forwarding table module uses the destination key to obtain the unicast and broadcast forwarding ports from the forwarding table; if the forwarding type is multicast, it obtains the multicast members from the forwarding table.
[0047] The forwarding table can be created via CPU configuration or by updating table entries in a timely manner through self-learning and self-aging. The CPU initializes and configures table entries through one side of the forwarding table and can read table entry information in a timely manner.
[0048] This invention supports selecting different aging channels based on network complexity. When network load is low, directly deleting entries using the CPU reduces resource consumption. When network load is high, automatic hardware clearing is used. Dynamic aging uses a set of counters to measure time, starting from a reset and resetting to zero after the set lifetime. Each entry records its current time in the forwarding table from its creation. By continuously polling the time of each entry and the current time, it can determine whether an entry has used the set lifetime and promptly delete the entry information to avoid entry redundancy.
[0049] The arbitration access module is used to arbitrate the read and write operations of the learning module and the aging module on the forwarding table module;
[0050] Among them, the arbitration access module arbitrates the read and write operations of the SRAM via port B of the learning module and the aging module, that is, when the learning module and the aging module access the SRAM at the same time, there is a configurable priority strategy.
[0051] The FIFO module is used to record the table entry addresses when the learning module and the aging module read the forwarding table, and to store read and write information that could not be accessed in time.
[0052] The FIFO module is used to record the address information when the learning module and aging module read the forwarding table, so that the write operation can correctly update the table entries; it is also used to store read and write information that could not be accessed in time.
[0053] The read / write protection module is used to protect the hardware implementation device of the unicast / multicast general-purpose high-throughput forwarding table when the dual-port SRAM accesses the same address simultaneously, causing the hardware implementation device of the unicast / multicast general-purpose high-throughput forwarding table to be in an undefined state.
[0054] The write-back module is used to write the table entry information obtained by the forwarding table module back to the PHV data stream.
[0055] The write-back module is used to write the forwarding port and the corresponding field information of the forwarding port obtained by the forwarding table module from the forwarding table back to the data frame of the PHV data stream.
[0056] refer to Figure 2 The following describes the specific implementation process of the hardware implementation device for the high-throughput forwarding table that is universal for both unicast and multicast according to the present invention:
[0057] Step 1: The CPU initializes the forwarding table content and key registers through the configuration circuit. Main configurations include: Bit-to-Bit Switching Network, Forwarding Table RAM, Aging Mode Register, Arbitration Priority Register, and Entry Validity Time Register.
[0058] Step 2: The bit-precision reverse butterfly network extracts information from the PHV, including: destination MAC address, source MAC address, source port number, learning enable, and aging enable.
[0059] Step 3: Determine whether the data stream forwarding is unicast, multicast, or broadcast based on the destination MAC address. If the high 24 bits of the destination MAC address are 0x_01005E, the data frame is a multicast frame; if the destination MAC address is 0xFFFF_FFFF_FFFF, the data frame is a broadcast frame; otherwise, the data frame is a unicast frame. If unicast forwarding is determined and the learning enable is high, the learning module function is activated. If the aging enable is high, the forwarding table has an aging-out function.
[0060] Step 4a: The destination MAC address is compressed from 48-bit to 10-bit using a hash algorithm (e.g., CRC algorithm) to obtain the corresponding lookup key. The key in the forwarding table is used as the address to read the entry information at the corresponding position, and the destination port number (including the unicast port number and multicast members) is extracted from it.
[0061] Step 4b: While performing hash mapping on the destination MAC address, the source MAC address is hashed to obtain the source hash address. The source hash address is also used as the address to read RAM entries, and the read content is compared with the source hash address to determine whether to update the entry. The determination process is as follows: Figure 3 As shown.
[0062] Step 4c: This invention supports both static and dynamic aging methods. Static aging is accomplished by the CPU clearing the entry information at the corresponding address in real time. Dynamic aging determines whether to clear the entry content by polling and comparing the current entry's time parameter with the time recorded by the timer.
[0063] Step 5: After finding the destination port number in the forwarding table, write the corresponding field information back to PHV.
[0064] The following describes the implementation of unicast forwarding and multicast forwarding functions respectively:
[0065] Unicast forwarding is suitable for "one-to-one" device forwarding scenarios. If self-learning and self-aging functions are not enabled in the metadata, the unicast forwarding table uses the CPU to add, modify, and delete entries. In this case, one side of the forwarding table is used for forwarding, and the other side is used for CPU control. If only the learning function is enabled, the source MAC address to be learned needs to be hashed and mapped. The unicast table entry information is read based on the hash address. If an update is needed, new information is written to the same hash address. Therefore, one side of the unicast table is used for real-time forwarding access, and the other side is used for reading and writing access during learning. If the data pipeline enters this module, two FIFOs are added to cache the addresses to be read and the enable and write information to be written, respectively. The data in the two FIFOs controls the learning access order of the forwarding table according to arbitration logic. The FIFO depth setting is strongly correlated with the burst data packet capability. This design uses a FIFO with a depth of 256, which supports an input data burst capability of 512 without considering read-write conflicts.
[0066] If dynamic aging is enabled, the counter polls the time status field in the MAC table every 1ms, comparing it to the current counter time. If they are equal, it means the current entry has used its configured lifetime, and the entry is aged out. Therefore, the aging function also needs to read the entry information first, and clear the data at that address after the aging conditions are met. This article sets up two FIFOs with a depth of 256 to accommodate the injection of burst data when aging is enabled. Figure 4 The flowchart shown illustrates the dynamic aging process.
[0067] Both the learning and aging functions access the same side of the MAC address table, thus requiring time-sharing multiplexing of RAM resources. If learning and aging are enabled simultaneously during forwarding, the data pipeline enters the forwarding table module. The destination MAC address responsible for forwarding can look up the table through RAM port A every cycle, while the source MAC address responsible for learning checks if it matches the corresponding key value through port B. If the lookup fails, the newly learned table entry information is written through port B. Furthermore, the aging function also needs to read the time field from the table entry through port B and delete the entry when the aging conditions are met. This invention uses a configurable priority arbitration method. By default, learning has higher priority than aging, and writing has higher priority than reading. Therefore, when a conflict arises between reading and updating a table entry during learning, the update operation is performed first, and the unread address is stored in the learning FIFO. Similarly, when a conflict arises between reading and deleting table entries in the aging module, the deletion operation is performed first, and the unread address is stored in the aging FIFO. When learning and deleting modules encounter RAM access conflicts, this invention employs a priority strategy controllable by the host computer to poll for access to the B port of RAM.
[0068] This invention supports obtaining a lookup result once per cycle, greatly improving throughput. The creation of table entries can not only be configured in real time by the host computer, but also achieve self-learning and self-aging through hardware logic, and share the same forwarding table.
[0069] like Figure 5 As shown, a dual-port SRAM is used to implement the forwarding table storage function. Port A is used for forwarding access, and port B can be used for CPU configuration, allowing selective access to learning and aging control information. Since forwarding only requires reading table entries, while CPU access, learning, and deletion all require both reading and writing, port A is designed as read-only, and port B is readable and writable, making full use of storage and logic resources. Considering system stability, in scenarios where both ports read and write to the same address, this invention prioritizes reading over writing; that is, the old value is read, and the data to be written is stored in a small buffer and written in the next clock cycle. A dual-port RAM is used to implement the forwarding table, and protection logic is designed to prevent simultaneous reading and writing to the same address from causing indeterminate states.
[0070] Unlike unicast forwarding, which operates on a one-to-one basis, multicast forwarding enables one-to-many device forwarding. The destination MAC address in a multicast multicast session does not correspond one-to-one with the port number, therefore self-learning functionality is not required. The multicast table maps multicast MAC addresses to multicast groups, meaning each destination multicast address corresponds to several members within the multicast group. For example... Figure 6 The diagram shows the structure of the multicast table.
[0071] For multicast forwarding, the lower 24 bits of the destination MAC address are concatenated to form a 48-bit array, which is then fed into the hash mapping module to obtain the multicast table index. If the external aging function is enabled, it shares one side of the multicast table port with the CPU. The multicast table information is configured after reset and before the data stream arrives. If a mapping to the same address occurs during the configuration process, a "kick" method is used to resolve hash collisions. Since there is no learning function, the Cuckoo double hash method is more suitable.
[0072] The multicast member in the multicast table entry refers to the port number of the target device, represented by a read hot code. The write-back module reads the valid port as source data and writes it back to the multicast group field in the metadata, completing the PHV modification.
[0073] The following circuit simulation experiment verifies the implementation method of a high-throughput forwarding table that is applicable to both unicast and multicast in this embodiment.
[0074] This invention uses System Verilog to build an automated simulation platform for a network packet processing unit. Modelsim is used as the simulation tool to check for circuit errors. Design Compiler is used for circuit synthesis to verify the circuit's feasibility.
[0075] a) Simulation status
[0076] The invention was applied to a network switch device for verification, such as... Figure 7 As shown, the input data packets are sent to the forwarding table device of this invention after being identified by the parser and processed by the multi-level Match-Action unit. The forwarding table is configured with self-learning and self-aging functions, and the entry validity period is set to 30 seconds. It is stimulated by sending 2500 unicast frames, 2000 multicast frames, and 500 broadcast frames to collect the port's reception results. If the results meet expectations, a report is printed as follows. Figure 8 As shown. This result demonstrates that the circuit's design is also applicable to single-broadcast communication behavior.
[0077] b) Overall Results
[0078] Synthesis was performed using Design Compiler with a 28nm process library. The clock cycle was set to 0.85ns, and the input_delay and output_delay were each 60% of the clock cycle. Under these conditions, there were no violations in setup and hold times. The synthesis results show that the highest frequency reached was 1.18GHz.
[0079] In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, the disclosure, and the appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality of components.
[0080] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.
Claims
1. A hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast, characterized in that, include: The reverse butterfly extraction module is used to receive PHV data streams and extract address information and enable information from the PHV data streams; The address information includes the destination MAC address, the source MAC address, and the source port number; The judgment module is used to determine the forwarding type of the PHV data stream using the destination MAC address; The hash mapping module is used to perform hash mapping on both the destination MAC address and the source MAC address to obtain the destination hash address and the source hash address; The hash mapping module is further configured to perform hash mapping on both the destination MAC address and the source MAC address, and to use a two-function cuckoo hash method to reduce the probability of hash collisions during the hash mapping process, so as to obtain the destination hash address and the source hash address. The learning module is used to determine whether to enable the learning function based on the forwarding type and enabling information, so as to update the forwarding table using the source hash address; The aging module is used to set the aging time and the lifespan of each entry in the forwarding table according to the enabling information. If the lifespan reaches the aging time, the entry is cleared. The forwarding table module is used to forward data using one port of the dual-port SRAM, and to use the destination hash address to interact with the CPU from the other port in a time-division manner and access the forwarding table to obtain the table entry information corresponding to the forwarding type; if the forwarding type is unicast or broadcast, the forwarding table module uses the destination key to obtain the forwarding port for unicast and broadcast from the forwarding table. If the forwarding type is multicast, then the multicast member is obtained from the forwarding table; wherein the forwarding port and the multicast member are in the same location; The arbitration access module is used to arbitrate the read and write operations of the learning module and the aging module on the forwarding table module; The FIFO module is used to record the table entry addresses when the learning module and the aging module read the forwarding table, and to store read and write information that could not be accessed in time. The read / write protection module is used to protect the hardware implementation device of the unicast / multicast general-purpose high-throughput forwarding table when the dual-port SRAM accesses the same address simultaneously, causing the hardware implementation device of the unicast / multicast general-purpose high-throughput forwarding table to be in an undefined state. The write-back module is used to write the table entry information obtained by the forwarding table module back to the PHV data stream.
2. The hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast as described in claim 1, characterized in that, The judgment module is further used to use the destination MAC address to determine whether the forwarding of data frames in the PHV data stream is unicast, multicast, or broadcast; if the high 24 bits of the destination MAC address are 0x01_005E, it means that the data frame is a multicast frame. If the destination MAC address is 0xFFFF_FFFF_FFFF, then the data frame is a broadcast frame. Otherwise, the data frame is a unicast frame.
3. The hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast as described in claim 1, characterized in that, The hash mapping module is further used to synchronously perform hash mapping on the source MAC address and the destination MAC address to obtain the corresponding source key and destination key; and use the destination key as the read address of the forwarding table module; Use the source key as the read address of the learning module.
4. The hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast as described in claim 3, characterized in that, The enabling information includes learning enablement and aging enablement.
5. The hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast as described in claim 4, characterized in that, The learning module is further configured to enable the learning function if the forwarding type is a unicast frame and the learning enable is high, so as to use the source key to query the forwarding table to obtain the corresponding table entry information. If the table entry information in the corresponding table entry information is invalid or needs to be updated, the table entry information is rewritten. If the forwarding type is a multicast or broadcast frame, the learning function is not enabled.
6. The hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast as described in claim 4, characterized in that, The aging module is further configured to enable the aging function if the aging enable is high, to set the aging time and define the lifetime of each entry in the forwarding table since its establishment; to poll the lifetime of each entry, and to clear the entry information if the aging time is reached.
7. The hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast as described in claim 3, characterized in that, The forwarding table module itself contains a forwarding table. It is initialized through the configuration interface of the host computer after the hardware implementation device of the high throughput forwarding table for both unicast and multicast is reset. During each access process, the learning module and aging module confirm whether to update the table entry information. The table entry information includes the table entry validity bit, MAC address, forwarding port / multicast member for unicast and broadcast, and real-time time of the table entry.
8. The hardware implementation device for a high-throughput forwarding table applicable to both unicast and multicast according to claim 1, characterized in that, The write-back module is further configured to write the forwarding port obtained by the forwarding table module from the forwarding table and the corresponding field information of the forwarding port back to the data frame of the PHV data stream.