A frequency modulation method and related device
By detecting the CPU load and the number of free buffers of the electronic device and adjusting the CPU frequency parameters, the risk of frame dropping and high power consumption of electronic devices when using the camera function is solved, and the shooting effect and user experience are improved.
Patent Information
- Application Number
- CN202311429494.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-30
- Publication Date
- 2025-01-03
- Estimated Expiration
- 2043-10-30
AI Technical Summary
When using camera functions, existing electronic devices have poor shooting results due to CPU power consumption control, which has problems such as risk of frame loss and high power consumption.
By detecting the number of idle buffers and CPU load in the rotation buffer, adjusting the CPU frequency point parameters to reduce power consumption and reduce frame loss risk, the frequency modulation method is used to optimize the operating status of the camera application.
It effectively reduces the risk of frame dropping and power consumption during camera application operation, improves user experience, and ensures the best state of camera functions.
Smart Images

Figure CN118450239B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of terminal technology, and in particular to a frequency modulation method and related devices. Background Art
[0002] With the development of information technology, users have higher and higher requirements for the use of electronic devices. Among them, camera shooting is an important scene for users to use electronic devices. At present, when users use the camera function of electronic devices, the shooting effect of the camera function is not good due to the power consumption control of the central processing unit (CPU) of the electronic device. Summary of the invention
[0003] The present application provides a frequency modulation method and related devices, which can improve the accuracy of CPU frequency modulation and thus improve user experience.
[0004] In a first aspect, the present application provides a frequency modulation method, which is applied to an electronic device including a camera and a CPU, the method comprising: displaying a first shooting interface of a camera application in a first camera mode. When the CPU is under a first load, the number of free buffers in the detection carousel buffer is a first number. Based on the first load, a first CPU frequency parameter is determined from a first data table. The first data table includes a correspondence between a camera mode, a load, and an optimal CPU frequency parameter with the lowest power consumption without the risk of frame loss. Based on the first number, the first CPU frequency parameter is adjusted to a second CPU frequency parameter. The CPU of the electronic device is controlled to operate at the second CPU frequency parameter.
[0005] Through a frequency modulation method provided by the present application, an electronic device can detect the load of the electronic device, the number of free buffers, and the camera mode, and then determine the frequency point parameters of the CPU. In this way, the electronic device can reduce the risk of frame loss and power consumption during the operation of the camera application.
[0006] In a possible implementation, controlling the CPU of the electronic device to operate at the second CPU frequency parameter specifically includes: obtaining the current operating frequency parameter of the CPU. If the power consumption corresponding to the second CPU frequency parameter is higher than the power consumption corresponding to the operating frequency parameter, controlling the CPU of the electronic device to operate at the second CPU frequency parameter. In this way, the electronic device can reduce the risk of frame loss and power consumption during the operation of the camera application.
[0007] In a possible implementation, the method further includes: if the power consumption corresponding to the second CPU frequency parameter is not higher than the power consumption corresponding to the operating frequency parameter, controlling the CPU of the electronic device to operate at the operating frequency parameter. In this way, the problem of frame loss in the electronic device during the operation of the camera application can be reduced.
[0008] In a possible implementation, after displaying the first shooting interface of the camera application in the first camera mode, the method further includes: obtaining the total number of the rotating buffers. Detecting the average number of the rotating buffers used in the first time period under the first camera mode. Based on the total number of the rotating buffers and the average number of the rotating buffers used, determining the margin value of the idle buffer. Based on the first number, adjusting the first CPU frequency parameter to the second CPU frequency parameter specifically includes: based on the first number and the margin value of the idle buffer, adjusting the first CPU frequency parameter to the second CPU frequency parameter. In this way, the frequency parameters of the electronic device during the operation of the camera application can be adjusted.
[0009] In a possible implementation, the margin value of the idle buffer is greater than a first threshold value. Wherein, when the first number is greater than the first threshold value, the power consumption of the CPU when operating at the second CPU frequency parameter is less than the power consumption of the CPU when operating at the first CPU frequency parameter. When the first number is equal to the first threshold value, the second CPU frequency parameter is the same as the first CPU frequency parameter. When the first number is less than the first threshold value, the power consumption of the CPU when operating at the second CPU frequency parameter is greater than the power consumption of the CPU when operating at the first CPU frequency parameter. In this way, it is ensured that the electronic device will not lose frames when used in camera applications.
[0010] In a possible implementation, the method further includes: when the first shooting interface of the camera application in the first camera mode is initially displayed, the electronic device is in a second load, based on the second load, determining a third CPU frequency parameter from the first data table, and controlling the CPU to operate at the third CPU frequency parameter.
[0011] In a possible implementation, when displaying the first shooting interface of the camera application in the first camera mode, the method further includes: setting the scheduling priority of the key thread of the camera application to the highest priority, and when the priority of the key thread of the camera application is set to the highest priority, the camera application preferentially calls the computing resources of the CPU. In this way, it can be ensured that the camera can preferentially schedule the computing resources of the processor more easily than other processes when running.
[0012] In a possible implementation, the power consumption of the CPU when operating at the second CPU frequency parameter is less than the power consumption of the CPU when operating at the first CPU frequency parameter, specifically including: the large core frequency in the second CPU frequency parameter is lower than the large core frequency in the first CPU frequency parameter. And / or, the medium core frequency in the second CPU frequency parameter is lower than the medium core frequency in the first CPU frequency parameter. And / or, the small core frequency in the second CPU frequency parameter is lower than the small core frequency in the first CPU frequency parameter. In this way, lower power consumption can be achieved while ensuring no frame loss.
[0013] In a possible implementation, the power consumption of the CPU when operating at the second CPU frequency parameter is greater than the power consumption of the CPU when operating at the first CPU frequency parameter, specifically including: the large core frequency in the second CPU frequency parameter is higher than the large core frequency in the first CPU frequency parameter. And / or, the medium core frequency in the second CPU frequency parameter is higher than the medium core frequency in the first CPU frequency parameter. And / or, the small core frequency in the second CPU frequency parameter is higher than the small core frequency in the first CPU frequency parameter. In this way, the electronic device can reduce the risk of frame loss and power consumption during the operation of the camera application.
[0014] In a possible implementation, the method further includes: when the electronic device is under a third load, detecting that the number of free buffers in the rotating buffer is a second number. Based on the third load, determining a fourth CPU frequency parameter from the first data table. Based on the second number and the margin value of the free buffer, adjusting the fourth CPU frequency parameter to a fifth CPU frequency parameter. Controlling the CPU of the electronic device to operate at the fifth CPU frequency parameter. In this way, the frequency parameter of the CPU of the electronic device can be adjusted in real time to ensure that the electronic device operates in an optimal state under the camera application.
[0015] In a possible implementation, when the CPU obtains each picture frame captured by the camera, the CPU load and the number of free buffers in the rotating buffer are detected.
[0016] In a possible implementation, the operating system run by the CPU includes a camera HAL layer, a kernel scheduling layer, and a CPU parameter adjustment module: the camera HAL layer is used to detect that the number of free buffers is the first number, and determine the frequency adjustment strategy based on the first number, and send the frequency adjustment strategy to the kernel scheduling layer. The kernel scheduling layer is used to detect that the load of the CPU is the first load, and determine the first CPU frequency parameter from the first data table based on the first load. The kernel scheduling layer is also used to adjust the first CPU frequency parameter to the second CPU frequency parameter based on the frequency adjustment strategy, and send the second CPU frequency parameter to the CPU parameter adjustment module. The CPU parameter adjustment module is used to control the CPU to operate at the second CPU frequency parameter.
[0017] In a possible implementation, the kernel scheduling layer is also used to find the key thread of the camera application and set the priority of the key thread of the camera application to the highest priority. When the priority of the key thread of the camera application is set to the highest priority, the camera application preferentially calls the CPU's computing resources. In this way, it can be ensured that the camera can preferentially schedule the processor's computing resources compared to other processes when running.
[0018] In the second aspect, the present application provides a training method for frequency modulation parameters, which is applied to a training device including a CPU and a camera, and the method includes: randomly loading an application on the training device, and detecting a fourth load of the training device. The camera mode of the camera application on the training device is set to the second camera mode. The CPU is controlled to work with multiple CPU frequency parameters respectively, and the number of free buffers in the rotating buffer and the power consumption of the CPU are recorded when the CPU works at each CPU frequency parameter. According to the number of free buffers in the rotating buffer when the CPU works at each CPU frequency parameter, the frame loss risk of the CPU when each CPU frequency parameter works is determined. The corresponding relationship between the CPU frequency parameter, the frame loss risk and the power consumption when the training device is in the second camera mode and the third load is recorded in the second data table, and the second data table includes the corresponding relationship between the CPU frequency parameter, the frame loss risk and the power consumption when the training device is in different camera modes and different loads. From the second data table, the first data table is determined, and the first data table includes the optimal CPU frequency parameter with no frame loss risk and the lowest power consumption under each camera mode and load. In this way, high-quality frequency modulation parameter data for electronic equipment can be quickly obtained while saving manpower and material resources.
[0019] In a third aspect, the present application provides an electronic device comprising a camera, one or more processors and one or more memories; wherein the camera, the one or more memories are coupled to the one or more processors, the one or more memories are used to store computer program code, and the computer program code comprises computer instructions, and when the one or more processors execute the computer instructions, the method in any possible implementation of the above-mentioned first aspect is executed.
[0020] In a fourth aspect, the present application provides another electronic device, including a camera HAL layer, a kernel scheduling layer and a CPU parameter adjustment module, wherein the camera HAL layer, the kernel scheduling layer and the CPU parameter adjustment module are used to execute the method in any possible implementation of the first aspect above.
[0021] In a fifth aspect, the present application provides a chip system, comprising a processing circuit and an interface circuit, wherein the interface circuit is used to receive instructions and transmit them to the processing circuit, and the processing circuit is used to run the instructions to execute the method in any possible implementation of the first aspect above.
[0022] In a sixth aspect, the present application provides a computer-readable storage medium, comprising instructions, which, when executed on an electronic device, enables execution of a method in any possible implementation of the first aspect described above.
[0023] In a seventh aspect, the present application provides a training device, including a camera, one or more processors, and one or more memories. The camera, the one or more memories are coupled to the one or more processors, the one or more memories are used to store computer program codes, the computer program codes include computer instructions, and when the one or more processors execute the computer instructions, the training executes the method in any possible implementation of the second aspect.
[0024] In an eighth aspect, an embodiment of the present application provides a computer storage medium, including computer instructions, which, when executed on a training device, enables the training to execute a method in any possible implementation of the second aspect described above.
[0025] In a ninth aspect, an embodiment of the present application provides a computer program product. When the computer program product is run on a computer of an electronic device, the computer executes a method in any possible implementation of the first aspect.
[0026] In a tenth aspect, an embodiment of the present application provides a computer program product, which, when executed on a computer of a training device, enables the computer to execute a method in any possible implementation of the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application;
[0028] Figure 2 A schematic diagram of an interface for a camera usage scenario provided in an embodiment of the present application;
[0029] Figure 3 A relationship diagram between frequency and power consumption provided in an embodiment of the present application;
[0030] Figure 4 A schematic diagram of a software architecture provided for an embodiment of the present application;
[0031] Figure 5 A schematic diagram of a picture frame sending and displaying process provided in an embodiment of the present application;
[0032] Figure 6 A schematic diagram of a discrete training process provided in an embodiment of the present application;
[0033] Figure 7 A flow chart of a frequency modulation method provided in an embodiment of the present application;
[0034] Figure 8 A software flow diagram for initializing CPU frequency parameters provided in an embodiment of the present application;
[0035] Fig. 9 A software flow diagram for adjusting CPU frequency parameters provided in an embodiment of the present application. DETAILED DESCRIPTION
[0036] The technical solutions in the embodiments of the present application will be described clearly and in detail below in conjunction with the accompanying drawings. In the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in the text is only a description of the association relationship of associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.
[0037] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as suggesting or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features, and in the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.
[0038] The following introduces the hardware structure of an electronic device provided in an embodiment of the present application.
[0039] Figure 1 A schematic structural diagram of an electronic device 100 provided in an embodiment of the present application is shown.
[0040] It should be understood that Figure 1 The electronic device 100 shown is only an example, and the electronic device 100 may have more Figure 1 More or fewer components may be shown, two or more components may be combined, or there may be a different configuration of components. Figure 1 The various components shown in the EMBODIMENTS 2000 may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application specific integrated circuits.
[0041] The electronic device 100 may include: a processor 110, an external memory interface 120, an internal memory 121, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. Among them, the sensor module 180 may include a gyroscope sensor 180B, an acceleration sensor 180E, and a touch sensor 180K, etc.
[0042] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.
[0043] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.
[0044] The controller may be the nerve center and command center of the electronic device 100. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.
[0045] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.
[0046] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.
[0047] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.
[0048] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G, etc., applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.
[0049] The modem processor may include a modulator and a demodulator. Among them, the modulator is used to modulate the low-frequency baseband signal to be sent into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After the low-frequency baseband signal is processed by the baseband processor, it is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to a speaker 170A, a receiver 170B, etc.), or displays an image or video through a display screen 194. In some embodiments, the modem processor may be an independent device. In other embodiments, the modem processor may be independent of the processor 110 and be set in the same device as the mobile communication module 150 or other functional modules.
[0050] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the frequency of the electromagnetic wave signal and performs filtering, and sends the processed signal to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, modulate the frequency of it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.
[0051] In some embodiments, the antenna 1 of the electronic device 100 is coupled to the mobile communication module 150, and the antenna 2 is coupled to the wireless communication module 160, so that the electronic device 100 can communicate with the network and other devices through wireless communication technology. The wireless communication technology may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology. The GNSS may include a global positioning system (GPS), a global navigation satellite system (GLONASS), a Beidou navigation satellite system (BDS), a quasi-zenith satellite system (QZSS) and / or a satellite based augmentation system (SBAS).
[0052] The electronic device 100 implements the display function through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information.
[0053] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD). The display screen panel can also be made of an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), miniled, microled, micro-oled, a quantum dot light emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include 1 or N display screens 194, where N is a positive integer greater than 1.
[0054] The electronic device 100 can realize the shooting function through ISP, camera 193, video codec, GPU, display screen 194 and application processor.
[0055] The ISP is used to process the data fed back by the camera 193. For example, when taking a photo, the shutter is opened, and the light is transmitted to the camera photosensitive element through the lens. The light signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to the ISP for processing and converts it into an image visible to the naked eye. The ISP can also perform algorithm optimization on the noise and brightness of the image. The ISP can also optimize the exposure, color temperature and other parameters of the shooting scene. In some embodiments, the ISP can be set in the camera 193.
[0056] The camera 193 is used to capture still images or videos. The object generates an optical image through the lens and projects it onto the photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, and then passes the electrical signal to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV or other format. In some embodiments, the electronic device 100 may include 1 or N cameras 193, where N is a positive integer greater than 1.
[0057] The digital signal processor is used to process digital signals, and can process not only digital image signals but also other digital signals. For example, when the electronic device 100 is selecting a frequency point, the digital signal processor is used to perform Fourier transform on the frequency point energy.
[0058] Video codecs are used to compress or decompress digital videos. The electronic device 100 may support one or more video codecs. Thus, the electronic device 100 may play or record videos in a variety of coding formats, such as Moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, etc.
[0059] NPU is a neural network (NN) computing processor. By drawing on the structure of biological neural networks, such as the transmission mode between neurons in the human brain, it can quickly process input information and can also continuously self-learn. Through NPU, applications such as intelligent cognition of electronic device 100 can be realized, such as image recognition, face recognition, voice recognition, text understanding, etc.
[0060] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function, such as storing music, video and other files in the external memory card.
[0061] The internal memory 121 can be used to store computer executable program codes, which include instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.
[0062] The electronic device 100 can implement audio functions such as music playing and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.
[0063] The audio module 170 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signals. The audio module 170 can also be used to encode and decode audio signals. In some embodiments, the audio module 170 can be arranged in the processor 110, or some functional modules of the audio module 170 can be arranged in the processor 110.
[0064] The speaker 170A, also called a "speaker", is used to convert an audio electrical signal into a sound signal. The electronic device 100 can listen to music or listen to a hands-free call through the speaker 170A.
[0065] The receiver 170B, also called a "earpiece", is used to convert audio electrical signals into sound signals. When the electronic device 100 receives a call or voice message, the voice can be received by placing the receiver 170B close to the human ear.
[0066] Microphone 170C, also called "microphone" or "microphone", is used to convert sound signals into electrical signals. When making a call or sending a voice message, the user can speak by putting their mouth close to microphone 170C to input the sound signal into microphone 170C. The electronic device 100 can be provided with at least one microphone 170C. In other embodiments, the electronic device 100 can be provided with two microphones 170C, which can not only collect sound signals but also realize noise reduction function. In other embodiments, the electronic device 100 can also be provided with three, four or more microphones 170C to collect sound signals, reduce noise, identify the sound source, realize directional recording function, etc.
[0067] The earphone interface 170D is used to connect a wired earphone and can be a USB interface 130 or a 3.5 mm open mobile terminal platform (OMTP) standard interface or a cellular telecommunications industry association of the USA (CTIA) standard interface.
[0068] The gyro sensor 180B can be used to determine the motion posture of the electronic device 100. In some embodiments, the angular velocity of the electronic device 100 around three axes (i.e., x, y, and z axes) can be determined by the gyro sensor 180B. The gyro sensor 180B can be used for anti-shake shooting. For example, when the shutter is pressed, the gyro sensor 180B detects the angle of the electronic device 100 shaking, calculates the distance that the lens module needs to compensate based on the angle, and allows the lens to offset the shaking of the electronic device 100 through reverse movement to achieve anti-shake. The gyro sensor 180B can also be used for navigation and somatosensory game scenes.
[0069] The acceleration sensor 180E can detect the magnitude of the acceleration of the electronic device 100 in all directions (generally three axes). When the electronic device 100 is stationary, the magnitude and direction of gravity can be detected. It can also be used to identify the posture of the electronic device and is applied to applications such as horizontal and vertical screen switching and pedometers.
[0070] The touch sensor 180K is also called a "touch panel". The touch sensor 180K can be set on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, also called a "touch screen". The touch sensor 180K is used to detect touch operations acting on or near it. The touch sensor can pass the detected touch operation to the application processor to determine the type of touch event. Visual output related to the touch operation can be provided through the display screen 194. In other embodiments, the touch sensor 180K can also be set on the surface of the electronic device 100, which is different from the position of the display screen 194.
[0071] The buttons 190 include a power button, a volume button, etc. The motor 191 can generate a vibration prompt. The SIM card interface 195 is used to connect a SIM card.
[0072] In the embodiment of the present application, the device type of the electronic device 100 can be a smart phone, a tablet computer, a handheld computer, a desktop computer, a laptop computer, an ultra-mobile personal computer (UMPC), a netbook, a cellular phone, a personal digital assistant (PDA), as well as smart home devices such as smart large screens and smart speakers, wearable devices such as smart bracelets, smart watches, and smart glasses, extended reality (XR) devices such as augmented reality (AR), virtual reality (VR), and mixed reality (MR), vehicle-mounted devices or smart city devices, etc.
[0073] A camera usage scenario of the electronic device 100 involved in an embodiment of the present application is introduced below.
[0074] Figure 2 A camera usage scenario of the electronic device 100 provided in an embodiment of the present application is shown.
[0075] For example, Figure 2As shown, the electronic device 100 can display a camera shooting interface 220. The camera shooting interface 220 can include a function selection area 226, a camera preview frame 228, a mode selection area 224 and a quick function area 229.
[0076] The function selection area 226 may include one or more function controls, such as a smart function control 226A, an artificial intelligence function control 226B, a flash function control 226C, and a setting function control 226D.
[0077] The camera preview frame 228 may include a picture frame 227 and a magnification control 225, etc. The camera preview frame 228 may display a preview picture captured by the camera. The picture frame 227 may be a frame of the preview picture. The electronic device 100 may enlarge or reduce the preview picture based on the magnification control 225.
[0078] The mode selection area 224 may include one or more camera mode controls, such as a large aperture mode control 224A, a night scene mode control 224B, a portrait mode control 224C, a photo mode control 224D, a video mode control 224E, and a professional mode control 224F.
[0079] The quick function area 229 may include a gallery control 221, a shutter control 222, and a front and rear camera conversion control 223, etc. The electronic device 100 may enter the gallery based on the gallery control 221. The electronic device 100 may take photos, record videos, etc. based on the shutter control 222. The electronic device 100 may switch between the front camera and the rear camera based on the front and rear camera conversion control 223.
[0080] The following is a relationship diagram between the frequency and power consumption of the CPU on the electronic device 100 involved in the embodiment of the present application.
[0081] Figure 3 A relationship diagram between a frequency point and power consumption of a CPU on an electronic device 100 involved in an embodiment of the present application is shown.
[0082] For example, Figure 3 A relationship diagram between the CPU frequency and power consumption is shown. The relationship diagram between the CPU frequency and power consumption can be obtained by a calibration method. When the electronic device 100 is operating normally, its power consumption is usually determined by various key components. The key components may include a CPU, a graphics processing unit (GPU), and an image signal processing (ISP), etc. The relationship diagram between the frequency and power consumption of the above key components can be obtained by a calibration method.
[0083] like Figure 3 As shown, here we take the CPU (8-core design is divided into 4 small cores, 3 medium cores and 1 large core) as an example. From the relationship diagram of CPU frequency (unit: DMIPS) and power consumption (unit: W), it can be concluded that as the frequency increases, the power consumption of CPU1 and CPU2 will increase. Among them, the horizontal axis represents the frequency, and its unit is DMIPS (Dhrystone MIPS). The DMIPS (Dhrystone MIPS) can represent a unit of relative performance when the CPU runs a test program called Dhrystone (integer operation). Among them, MIPS (Million Instructions executed Per Second) means millions of instructions executed per second, which is used to measure the processing capacity of the system in the same second, that is, how many millions of instructions are executed per second. The vertical axis represents power consumption, and its unit is watt (W). For example, taking CPU2 as an example, the relevant point 310 indicates that when the frequency is 8000DMIPS, the power consumption of CPU2 is 0.21W. The relevant point 320 indicates that when the frequency is 14000DMIPS, the power consumption of CPU2 is 0.39W. For example, CPU1 may be 7450_CPUB, and CPU2 may be Rena_CPUB.
[0084] Among them, for non-CPU resources, such as GPU, image processing engine (IPE) and other processors, etc., the relationship diagram between frequency and power consumption can also be obtained through calibration methods. Among them, the detection device can first use the node quantification method of the measurement to measure the execution relationship diagram between the processor's clock frequency and processing frequency, as well as the relationship diagram between the processor's clock frequency and processor power consumption. Then, based on the execution relationship diagram between the processor's clock frequency and processing frequency and the relationship diagram between the processor's clock frequency and processor power consumption, the relationship diagram between the processor's frequency and power consumption is obtained.
[0085] The following is a schematic diagram of a software architecture of a camera on the electronic device 100 involved in an embodiment of the present application.
[0086] Figure 4 A schematic diagram of the software architecture of the camera on the electronic device 100 involved in the embodiment of the present application is shown.
[0087] like Figure 4 As shown, the electronic device 100 may include a camera application, a framework layer (framework, FWK), a hardware abstraction layer (hardware abstraction layer, HAL) and a kernel layer (Kernel).
[0088] The camera application may include a surface view of a camera preview box, a surface view of one or more function controls, and the like.
[0089] The framework layer can provide application programming interface (API) and programming framework for applications in the application layer (such as camera applications). The framework layer can include some predefined functions. The framework layer can include camera service, buffer queue (BufferQueue), camera buffer (BLASTBufferQueue) and layer provider (surfaceflinger), etc.
[0090] The hardware abstraction layer is an interface layer between the framework layer and the kernel layer, which can provide a virtual hardware platform for the operating system. The hardware abstraction layer may include the camera hardware abstraction layer (camera HAL), the hardware composer module (HWC), the display synchronization module (DispSync), and the video encoding module (video code), etc. Among them, the camera hardware abstraction layer may include the camera processing module (camera provide).
[0091] The kernel layer is the layer between hardware and software. The kernel layer can include various hardware drivers, etc. Among them, the kernel layer can include camera drivers, display drivers, kernel scheduling layers, and CPU parameter adjustment modules, etc. Among them, the camera driver can be used to drive the camera module ( Figure 4 One or more cameras' image sensors (image signal process, ISP) (not shown) Figure 4 ) to capture images and drive the image signal processor ( Figure 4 (not shown) the image is preprocessed.
[0092] The following is a detailed description of the processing flow in the embodiment of the present application in conjunction with the software architecture diagram of the camera on the electronic device 100:
[0093] 1. After the camera application detects the user's operation of opening the specified camera mode, the surface view of the camera preview box in the camera application can send a call request to the camera service of the framework layer, and the call request is used to obtain the picture frame.
[0094] 2. When the camera service receives a call request sent by the surface view of the camera preview frame, the camera service can send the call request to the camera hardware abstraction layer.
[0095] 3. When the camera hardware abstraction layer receives the call request of the camera service of the framework layer, the camera hardware abstraction layer can send the call to the camera driver of the kernel layer.
[0096] 4. After receiving the call request from the camera hardware abstraction layer, the camera driver can send execution instructions to the camera module ( Figure 4 Then, the camera module collects the image and passes it through the image signal processor ( Figure 4 The image signal processor provides the picture frame to the camera hardware abstraction layer through the camera driver. The image signal processor provides the picture frame to the camera processing module of the camera hardware abstraction layer through the camera driver.
[0097] 5. After receiving the picture frame reported by the camera driver, the camera hardware abstraction layer can report the picture frame to the camera service.
[0098] The camera processing module can receive the picture frame reported by the camera driver, report the picture frame to the camera service, and perform simple processing on the picture frame.
[0099] 6. After the camera service obtains the picture frame reported by the camera hardware abstraction layer, it can report the picture frame to the surface view of the camera preview frame. The surface view of the camera preview frame can display the picture frame (for example, the above Figure 2 The camera service may also perform simple processing on the picture frame.
[0100] 7. After obtaining the picture frame reported by the camera hardware abstraction layer, the camera service can first store the picture frame in a buffer and add the buffer containing the picture frame to the buffer queue.
[0101] 8. The camera buffer (BLASTBufferQueue) can retrieve the buffer containing the picture frame from the buffer queue.
[0102] 9. The layer provider can obtain the buffer of the picture frame from the camera buffer, and can obtain the picture frame from the buffer of the picture frame.
[0103] 10. The camera service can send configuration instructions to the camera processing module. The camera service can also send configuration instructions to the video encoding module. When the camera application detects that the camera is in a video shooting scene, the video encoding module can encode the preview screen stream reported by the camera processing module into a video file of a specified format and save the video file.
[0104] 11. After acquiring the picture frame, the layer provider can send a release instruction 1 to the camera buffer, and the release instruction 1 can be used to notify the camera buffer to release the buffer indicated by the release instruction 1 (including the address of the picture frame).
[0105] 12. After releasing the buffer indicated by the release instruction 1, the camera buffer area can send a release instruction 2 to the buffer queue. After receiving the release instruction 2, the buffer queue can release the buffer indicated by the release instruction 2 in the buffer queue.
[0106] 13. After releasing the buffer indicated by the release instruction 2, the buffer queue can send the address of the free buffer in the buffer queue to the camera service. In this way, the free position can be reserved for the next frame, avoiding the accumulation of too many frames and causing data redundancy.
[0107] 14. The layer provider can perform synthesis processing based on the picture frame, the surface view of the camera preview frame, and the surface view of one or more functional controls to obtain one or more layers, and send the one or more layers to the hardware synthesis module (HWC).
[0108] For example, the layer provider may form the picture frame into layer 1. The layer provider may form the surface view of the camera preview frame into layer 2. The layer provider may form the surface view of one or more functional controls into layer 3.
[0109] After receiving one or more layers provided by the layer provider, the hardware synthesis module may perform synthesis processing on the one or more layers to obtain a synthesized camera shooting interface.
[0110] For example, the layer provider may send the above-mentioned layer 1, layer 2, and layer 3 to the hardware synthesis module for synthesis processing to obtain a synthesized camera shooting interface.
[0111] In a possible implementation, the layer provider may form the surface views of the picture frame and the camera preview frame into one layer. The layer provider may form the surface views of one or more functional controls into another layer.
[0112] In a possible implementation, after receiving one or more layers provided by a layer provider, the hardware synthesis module may process the one or more layers together with the layer provider to obtain a synthesized camera shooting interface.
[0113] In one possible implementation, after receiving one or more layers provided by a layer provider, the hardware synthesis module can inform the layer provider how to synthesize the one or more layers, and the layer provider can perform synthesis processing on the one or more layers to obtain a synthesized camera shooting interface.
[0114] The synthetic camera shooting interface can refer to the above Figure 2 The camera shooting interface 220 shown in FIG. Figure 2 The surface view of the functional control can be as shown in the picture frame 227. Figure 2 The surface view of the function control can also be as shown in the function selection area 226 in FIG. Figure 2 The surface view of the functional control can also be as shown in the shortcut function area 229 in FIG. Figure 2 As shown in the mode selection area 224.
[0115] in, Figure 2 The camera preview box 228 shown in FIG. 2 can be a layer. Figure 2 The function selection area 226, mode selection area 224 and quick function area 229 shown in the figure can be another layer. It should be understood that this is just an example and does not limit the specific content of the layer.
[0116] 15. The hardware synthesis module can periodically send a hardware synchronization signal (hw vsync) to the display synchronization module. The display synchronization module can generate a synchronization signal (vsync) after receiving the hw vsync.
[0117] 16. The display synchronization module can send a synchronization signal (vsync) to the layer provider.
[0118] 17. The display synchronization module can send a synchronization signal (vsync) to the camera application.
[0119] The synchronization signal (vsync) can ensure that the layers are synthesized into a frame of the camera shooting interface, and when the camera shooting interface is sent for display, there will be no tearing of the camera shooting interface.
[0120] 18. The hardware synthesis module can send the synthesized camera shooting interface to the display driver of the kernel layer. After receiving the synthesized image, the display driver can send the synthesized camera shooting interface to the display ( Figure 4 (not shown) is displayed.
[0121] 19. When the camera is stably outputting frames, the camera hardware abstraction layer can calculate the idle buffer threshold. Each time the camera hardware abstraction layer outputs a frame, it can detect the number of idle buffers in the buffer queue. The camera hardware abstraction layer can determine the frequency modulation strategy by comparing the number of idle buffers with the size of the idle buffer threshold. The camera hardware abstraction layer can send the frequency modulation strategy to the kernel scheduling layer.
[0122] 20. The kernel scheduling layer may receive the frequency modulation strategy sent by the camera hardware abstraction layer. The kernel scheduling layer may determine the optimal CPU frequency parameter according to the frequency modulation strategy and the CPU frequency parameter of the electronic device 100 at this time, and send the optimal CPU frequency parameter to the CPU parameter adjustment module.
[0123] The following is a detailed description of the process of sending and displaying picture frames in the camera in the embodiment of the present application.
[0124] Figure 5 The figure shows the process of sending and displaying picture frames in the camera in the embodiment of the present application.
[0125] like Figure 5 As shown, when a buffer in the buffer queue (BufferQuene) is in an idle state, the camera driver can put the picture frame into the idle buffer of the buffer queue. The camera driver can send the address of the buffer in the buffer queue storing the picture frame to the camera processing module. The camera processing module can obtain the address of the buffer in the buffer queue storing the picture frame. Similarly, the camera processing module can send the address of the buffer in the buffer queue storing the picture frame to the camera service. The camera service can obtain the address of the buffer in the buffer queue storing the picture frame. Then, the camera service can send the address of the buffer in the buffer queue storing the picture frame to the layer provider. After obtaining the address of the buffer storing the picture frame, the layer provider can obtain the picture frame from the address of the buffer. The layer provider can put the picture frame obtained from the buffer queue into the idle buffer in the camera buffer area. The layer provider can include an image synthesis module. The image synthesis module can obtain the picture frame from the camera buffer area and can perform synthesis processing on the picture frame.
[0126] When there is no free buffer in the buffer queue (BufferQuene) or the data in the buffer has not been released, the buffer queue cannot send a frame receiving request. When the camera drives out frames and the camera hardware abstraction layer has no free buffer to receive frames, it will cause the loss of picture frames. Therefore, the risk level of frame loss can be quantified by counting the number of requests waiting for free (for example, the number of free buffers) at the frame receiving point of the camera hardware abstraction layer.
[0127] For example, the idle buffer threshold is 2, and when the number of idle buffers is 2, the frame loss risk level is 0. When the number of idle buffers is 1, the frame loss risk level is 1. When the number of idle buffers is 0, the frame loss risk level is 2. The larger the value of the frame loss risk level, the higher the possibility of frame loss.
[0128] The following is a detailed description of a flow chart of a discrete training process involved in an embodiment of the present application.
[0129] Figure 6 A schematic diagram of a discrete training process of a training device in an embodiment of the present application is shown.
[0130] like Figure 6 As shown, a discrete training process of a training device may include the following steps:
[0131] S601. Determine the device model of the training device.
[0132] For example, the device model of the training device may be Honor Magic5.
[0133] S602: Randomly load applications on the training device and detect the load condition of the training device.
[0134] The load of random applications is based on the load conditions when 80% of users use the camera on the training device, and the load gradient is set according to the load conditions. For example, the load of most users when using the camera on the Honor Magic50 is generally 30%-50%, and the load gradient is set every 10% (for example, 30%-40% is a load gradient 1, and 40%-50% is a load gradient 2).
[0135] The load condition of the training equipment detected above may be referred to as a fourth load.
[0136] S603. Randomly input CPU frequency parameters of the training device.
[0137] The CPU frequency parameters of the training device may include a large core frequency, a medium core frequency, and a small core frequency.
[0138] In a possible implementation, cores of the same type have the same frequency.
[0139] The initial CPU frequency parameters of the training device default to a set of frequency parameters calculated by the core (including large core, medium core and small core) according to its own computing power (util). For example, the initial CPU frequency parameters of the training device default to 3.19GHz for the large core, 2.85GHz for the medium core and 2GHz for the small core.
[0140] For example, the CPU of the training device has 8 cores (4 small cores, 3 medium cores and 1 large core). Among them, the initial CPU frequency parameters can be defaulted to the same frequency of the 4 small cores, which is 2GHz. The frequency of the 3 medium cores is the same, which is 2.85GHz. The frequency of the 1 large core is 3.19GHz. The initial CPU frequency parameters are calculated based on the computing power of the CPU itself. Then, you can enter the random CPU frequency parameters of the training device to change the frequency of the core, for example, change the frequency of the 4 small cores from 2GHz to 1.8GHz. Change the frequency of the 3 medium cores from 2.85GHz to 2.65GHz. Change the frequency of the 1 large core from 3.19GHz to 3GHz.
[0141] It should be understood that the CPU does not necessarily use all cores, and the CPU may use only some of the cores (eg, 1 large core and 1 medium core) depending on the situation.
[0142] S604: Set the camera mode of the camera application of the training device.
[0143] The camera mode of the camera application of the training device may include any one of a night scene mode, a photo mode, a video recording mode, and the like.
[0144] The camera mode of the training device camera application described above may be referred to as a second camera mode.
[0145] S605: Put the training device into the camera mode of the current camera application and detect the number of free buffers.
[0146] For example, the load of the training device is 30%-40%. In the CPU frequency parameters of the training device, the frequency of the small core is 1.8GHz, the frequency of the medium core is 2.65GHz, and the frequency of the large core is 3GHz. Detect the number of free buffers of the training device. The camera hardware abstraction layer can detect the number of free buffers in the buffer queue. For example, the number of rotating buffers in the buffer queue is 11, and the camera hardware abstraction layer can detect that the number of free buffers in the buffer queue is 2. Among them, the time of the preview process can be determined based on the preview process time used by most of the collected users.
[0147] S606: Determine the power consumption and frame loss risk level based on the CPU frequency parameter and the number of idle buffers.
[0148] Among them, based on the CPU frequency parameters, the above Figure 2The power consumption is determined in the frequency point and power consumption relationship diagram in the illustrated embodiment. The power consumption can be represented by a numerical value, and the larger the numerical value of the power consumption, the more power consumption. For example, the power consumption of a power consumption of 0.5W is greater than the power consumption of a power consumption of 0.4W.
[0149] The frame loss risk level can be determined based on the number of free buffers. The frame loss risk level can be divided into 0, 1, 2, etc. The larger the value of the frame loss risk level, the greater the possibility of frame loss. For example, the free buffer threshold is 2. When the number of free buffers is greater than or equal to 3, the frame loss risk level is 0. At this time, the shooting performance in this case will be reduced and the power consumption will be relatively high. When the number of free buffers is 2, the frame loss risk level is 0. At this time, there will be no frame loss in this case, and the performance and power consumption can be well balanced. When the number of free buffers is 1, the frame loss risk level is 1. At this time, frame loss may occur in this case. When the number of free buffers is 0, the frame loss risk level is 2. At this time, frame loss is very likely to occur in this case.
[0150] S607. Record the device model of the training device, the load of the training device, the CPU frequency parameters of the training device, the camera mode of the current camera application of the training device, the frame loss risk level of the training device, and the power consumption of the training device.
[0151] For example, the model of the training device is Honor Magic50, and its load is 30%-40%. The CPU frequency parameters of the training device are 1.8GHz for the small core, 2.65GHz for the medium core, and 3GHz for the large core. The camera application of the training device is in night scene mode. The number of idle buffers of the training device is detected to be 2, and the frame loss risk level is determined to be 0 and the power consumption is determined to be 0.4W.
[0152] S608. Determine whether the training device has screened out the optimal CPU frequency parameters under the current device model, load condition, and camera mode.
[0153] Among them, when the device model of the training device is model 1, the load condition is load gradient 1, and the camera mode is mode 1, the frame loss risk level is 0 and the CPU frequency parameter with the lowest corresponding power consumption is determined as the optimal CPU frequency parameter.
[0154] If the optimal CPU frequency parameter is not screened out, step S609 is executed; if the optimal CPU frequency parameter is screened out, step S610 is executed.
[0155] S609, changing the CPU frequency parameters in the training device.
[0156] While keeping S601 and S602 unchanged, change the CPU frequency parameter in the training device, and then execute S603, S604, S605, S606, S607 and S608 in sequence to ensure that the optimal CPU frequency parameter is found in this case.
[0157] For example, when the device model of the training device is model 1, the load condition is load gradient 1, and the camera mode is mode 1, the CPU frequency parameter in the training device is increased in sequence, and the number of idle buffers of the training device is detected until the CPU frequency parameter with a frame loss risk level of 0 and the lowest corresponding power consumption is found and determined as the optimal CPU frequency parameter.
[0158] S610: Re-determine the load condition of the training device, and detect the frame loss risk level and power consumption of the training device under different CPU frequency parameters and camera modes.
[0159] When the device model of the training device is model 1, the frame loss risk level and power consumption of the training device under different load conditions, different camera modes and different CPU frequency parameters are determined. Among them, the frame loss risk level and power consumption under different load conditions, different camera modes and different CPU frequency parameters can be shown in the following Table 1:
[0160] Table 1
[0161]
[0162]
[0163] For example, as shown in Table 1, when the device model of the training device is Honor Magic50, the load is 30%-40%, the large core frequency is 3GHz, the medium core frequency is 1.7GHz, and the small core frequency is 1.6GHz in the CPU frequency parameters, and the camera application is in night scene mode, the frame loss risk level is 1 and the power consumption is 0.3W.
[0164] For example, as shown in Table 1, when the device model of the training device is Honor Magic50, the load is 30%-40%, the CPU frequency parameters include a large core frequency of 2.95GHz, a medium core frequency of 2.65GHz, and a small core frequency of 1.8GHz, and the camera application is in photo mode, the frame loss risk level is 1 and the power consumption is 0.4W.
[0165] For example, as shown in Table 1, when the device model of the training device is Honor Magic50, the load is 40%-50%, the CPU frequency parameters include a large core frequency of 3.19 GHz, a medium core frequency of 2.85 GHz, and a small core frequency of 2 GHz, and the camera is in night scene mode, the frame loss risk level is 0 and the power consumption is 0.7W.
[0166] For example, as shown in Table 1, when the device model of the training device is Honor Magic50, the load is 40%-50%, the CPU frequency parameters include a large core frequency of 2.95GHz, a medium core frequency of 2.65GHz, and a small core frequency of 1.6GHz, and the camera application is in photo mode, the frame loss risk level is 2 and the power consumption is 0.5W.
[0167] When the device model of the training device is Model 1, the frame loss risk level and power consumption of the training device under different load conditions, different camera modes and different CPU frequency parameters are not described here.
[0168] In a possible implementation, the frame loss risk level and power consumption of the training device under different device models, different load conditions, different camera modes, and different CPU frequency parameters are found. The data table of the frame loss risk level and power consumption under different device models, different load conditions, different camera modes, and different CPU frequency parameters can be shown in Table 2 below:
[0169] Table 2
[0170]
[0171]
[0172] For example, as shown in Table 2, when the device model of the training device is Honor Magic50, the load condition can be 30%-40%, the large core frequency in the CPU frequency parameters can be 3GHz, the medium core frequency is 2.65GHz, and the small core frequency is 1.8GHz, and when the camera application is in night scene mode, the frame loss risk level is 0 and the power consumption is 0.4W.
[0173] For example, as shown in Table 2, when the device model of the training device is Honor 80, the load is 30%-40%, the large core frequency is 3GHz, the medium core frequency is 2.65GHz, and the small core frequency is 1.8GHz in the CPU frequency parameters, and the camera application is in night scene mode, the frame loss risk level is 0 and the power consumption is 0.5W.
[0174] The data table recording the frame loss risk levels and power consumption conditions under different device models, under different load conditions, under different camera modes, and under different CPU frequency parameters may be referred to as a second data table.
[0175] When the training devices are of different device models, the power consumption of the frame loss risk levels of the training devices under different load conditions, different camera modes, and different CPU frequency parameters are not described here.
[0176] The optimal CPU frequency parameters with a frame loss risk level of 0 and the lowest corresponding power consumption are screened out from the training devices of different device models, different load conditions and different camera modes, and are organized into an optimal data table, such as shown in Table 3:
[0177] Table 3
[0178]
[0179]
[0180] Exemplarily, as shown in Table 3, when the device model of the training device is Honor Magic50, the load condition is 30%-40%, the large core frequency is 3GHz, the medium core frequency is 2.65GHz, and the small core frequency is 1.8GHz in the CPU frequency parameters, and the camera application is in night scene mode, there is no risk of frame loss and the power consumption is the lowest. Therefore, when the device model of the training device is Honor Magic50, the load condition is 30%-40%, and the camera application is in night scene mode, the large core frequency is 3GHz, the medium core frequency is 2.65GHz, and the small core frequency is 1.8GHz in the optimal CPU frequency parameters.
[0181] When the training device model is Honor 80, the load is 30%-40%, the CPU frequency parameters are 3GHz for the large core frequency, 2.65GHz for the medium core frequency, and 1.8GHz for the small core frequency, and the camera is in night scene mode, there is no risk of frame loss and the power consumption is the lowest. Therefore, when the training device model is Honor 80, the load is 30%-40%, and the camera is in night scene mode, the optimal CPU frequency parameters are 3GHz for the large core frequency, 2.65GHz for the medium core frequency, and 1.8GHz for the small core frequency.
[0182] The above-mentioned optimal data table may be referred to as a first data table.
[0183] For training devices of different device models, the frame loss risk level is 0 under different load conditions and in different camera modes, and the optimal CPU frequency parameters with the lowest corresponding power consumption are not described here.
[0184] In a possible implementation, the training device may store the screened optimal data table in a server.
[0185] Through the above training method, the risk level of frame loss and power consumption of different electronic devices under different device models, different load conditions, different camera modes and different CPU frequency parameters can be determined, and an optimal data table can be obtained. The optimal data table can be stored in the server. The server can give the trained optimal data table to the electronic device 100. When the user is using the electronic device 100, the electronic device 100 can adjust the frequency parameters of the electronic device 100 during the operation of the camera application according to the optimal data table. In this way, the frequency parameters of the CPU of the electronic device 100 can be adjusted in real time to ensure that the electronic device 100 runs in the best state under the camera application.
[0186] The following is a flow chart of a frequency modulation method involved in an embodiment of the present application.
[0187] Figure 7 A flow chart of a frequency modulation method in an embodiment of the present application is shown.
[0188] like Figure 7 As shown, a process of a frequency modulation method of the electronic device 100 may include the following steps:
[0189] S701 : The electronic device 100 may detect the device model of the electronic device 100 , the load condition of the electronic device 100 , and the camera mode of the camera application.
[0190] For example, when a user uses the electronic device 100 , the electronic device 100 may detect that the current device model of the electronic device 100 is model 1 , the camera mode of the camera application is mode 1 , and the current load condition of the electronic device 100 is load gradient 1 .
[0191] S702 : The electronic device 100 may determine the CPU frequency parameter A of the electronic device 100 from the optimal data table according to the device model of the electronic device 100 , the camera mode of the camera application, and the current load condition of the electronic device 100 .
[0192] The optimal data table records the optimal CPU frequency parameters with the lowest power consumption when the training device is different device models, the risk level of frame loss is 0 in different load conditions and different camera modes, and the optimal data table is transmitted to the electronic device 100 through the server.
[0193] For example, when the user uses the electronic device 100, the device model of the electronic device 100 is model 1, the load condition is load gradient 1, and the camera mode is mode 1, the electronic device 100 can determine from the optimal data table the optimal CPU frequency parameter with the lowest corresponding power consumption and the frame loss risk level being 0. The optimal CPU frequency parameter is CPU frequency parameter A.
[0194] S703: The electronic device 100 may detect the number of rotating buffers in the buffer queue.
[0195] For example, when the camera mode of the electronic device 100 is the normal video recording mode, the number of rotating buffers in the buffer queue is 11.
[0196] S704: The electronic device 100 may detect an average value of the returned frames of the rotating buffer in the buffer queue.
[0197] For example, when the electronic device 100 is running stably, the number of rotating buffers in its buffer queue may fluctuate to a certain extent. For example, the number of rotating buffers fluctuates between 7, 8 and 9, and the average return frame value is the average of 7, 8 and 9, that is, the average return frame value is 8.
[0198] S705: The electronic device may determine a margin value of the idle buffer according to the number of the round-robin buffers in the detected buffer queue and the average return frame value of the round-robin buffers.
[0199] For example, the electronic device 100 detects that the number of rotating buffers in the buffer queue is 11. When the electronic device 100 is running stably, the average return frame value of the rotating buffers in the buffer queue is 8. The maximum margin value of the idle buffer in the electronic device 100 is the number of rotating buffers in the buffer queue minus the average return frame value, and the minimum is 0, that is, the margin value of the idle buffer is 3.
[0200] S706: The electronic device 100 may obtain the number of free buffers in the rotating buffer.
[0201] The electronic device 100 can obtain the number of free buffers in the buffer queue at the frame reception of the camera hardware abstraction layer.
[0202] S707: The electronic device 100 may determine a frequency modulation strategy according to the margin value of the idle buffer and the number of the idle buffers.
[0203] The electronic device 100 can determine different frequency modulation strategies according to the margin value of the idle buffer and the number of idle buffers. For example, the margin value of the idle buffer is 3, and the number of idle buffers is 2. Generally, the default idle buffer threshold is 2. When the number of idle buffers changes during the operation of the electronic device 100, the electronic device 100 can determine the frequency modulation strategy.
[0204] S708 . The electronic device 100 may determine the CPU frequency parameter B according to the frequency modulation strategy and the CPU frequency parameter A, and control the CPU to operate at the CPU frequency parameter B.
[0205] The electronic device 100 may determine different frequency modulation strategies according to the margin value of the idle buffer and the number of the idle buffers.
[0206] The margin value of the idle buffer is greater than the first threshold value. When the number of idle buffers is greater than the first threshold value, the power consumption of the CPU of the electronic device 100 when operating at the CPU frequency parameter B is less than the power consumption of the CPU when operating at the CPU frequency parameter A. Both the margin value of the idle buffer and the first threshold value are integer values.
[0207] When the number of free buffers is equal to the first threshold, the CPU frequency parameter B is the same as the CPU frequency parameter A;
[0208] When the number of free buffers is less than the first threshold, the power consumption of the CPU of the electronic device 100 when operating at the CPU frequency parameter B is greater than the power consumption of the CPU when operating at the CPU frequency parameter A.
[0209] The electronic device 100 can control the CPU to operate at the CPU frequency parameter B.
[0210] For example, the CPU frequency parameter A may be 3 GHz for the big core frequency, 2.5 GHz for the medium core frequency, and 2 GHz for the small core frequency, the margin value of the idle buffer may be 3, and the first threshold may be 2. If the number of idle buffers is 2, the CPU frequency parameter B may be 3 GHz for the big core frequency, 2.5 GHz for the medium core frequency, and 2 GHz for the small core frequency.
[0211] For example, when the number of free buffers becomes 3, the CPU frequency parameter A is lowered to the CPU frequency parameter B. The CPU frequency parameter B may be 2.9 GHz for the big core, 2.4 GHz for the medium core, and 1.8 GHz for the small core.
[0212] When the number of free buffers becomes 1, CPU frequency parameter A is increased to CPU frequency parameter B. CPU frequency parameter B may be 3.1 GHz for the big core, 2.6 GHz for the medium core, and 2.1 GHz for the small core.
[0213] When the number of free buffers becomes 0, CPU frequency parameter A is increased to CPU frequency parameter B. CPU frequency parameter B may be 3.4 GHz for the big core frequency, 2.8 GHz for the medium core frequency, and 2.4 GHz for the small core frequency.
[0214] The above CPU frequency parameter A may be referred to as a first CPU frequency parameter.
[0215] The above CPU frequency parameter B may be referred to as a second CPU frequency parameter.
[0216] S709: Each time the electronic device 100 outputs a picture frame, the number of free buffers in the rotating buffer may be obtained.
[0217] Each time the electronic device 100 outputs a picture frame, the number of free buffers in the rotating buffer can be obtained at the request frame of the camera hardware abstraction layer. Then, the electronic device 100 can determine a new frequency modulation strategy based on the margin value of the free buffer and the number of free buffers. The electronic device 100 can determine the CPU frequency parameters after the frequency modulation strategy based on the new frequency modulation strategy and the current CPU frequency parameters, and let the electronic device 100 run under the CPU frequency parameters after the frequency modulation strategy. In this way, the CPU frequency parameters can be changed in real time according to the situation of the electronic device 100, so that the frame loss risk level of the electronic device 100 is 0.
[0218] In a possible implementation, the electronic device 100 obtains the number of free buffers every N frames, where N is a positive integer greater than or equal to 2.
[0219] In one possible implementation, the electronic device 100 can compare the operating frequency parameter of the current electronic device 100 operation and the CPU frequency parameter B after adjusting the CPU frequency parameter A, and take the larger CPU frequency parameter as the CPU frequency parameter sent to the CPU parameter adjustment module.
[0220] In one possible implementation, the power consumption of the CPU of the electronic device 100 when operating at the CPU frequency parameter B is less than the power consumption of the CPU when operating at the CPU frequency parameter A, including: the large core frequency in the CPU frequency parameter B is lower than the large core frequency in the CPU frequency parameter A; and / or, the medium core frequency in the CPU frequency parameter B is lower than the medium core frequency in the CPU frequency parameter A; and / or, the small core frequency in the CPU frequency parameter B is lower than the small core frequency in the CPU frequency parameter A.
[0221] In one possible implementation, the power consumption of the CPU of the electronic device 100 when operating at the CPU frequency parameter B is greater than the power consumption of the CPU when operating at the CPU frequency parameter A, including: the large core frequency in the CPU frequency parameter B is higher than the large core frequency in the CPU frequency parameter A; and / or, the medium core frequency in the CPU frequency parameter B is higher than the medium core frequency in the CPU frequency parameter A; and / or, the small core frequency in the CPU frequency parameter B is higher than the small core frequency in the CPU frequency parameter A.
[0222] In a possible implementation, if the optimal CPU frequency parameter determined in the optimal data table is frequently changed during the use of the electronic device 100, then the electronic device 100 can upload the changed CPU frequency parameter and the device model, load condition and camera mode of the electronic device 100 to the server. When the server counts that the number of times that the CPU frequency parameter A of the device model, load condition and camera mode of a certain electronic device 100 in the optimal data table is inconsistent with the CPU frequency parameter B actually used is greater than a certain value, the server can modify the CPU frequency parameter A under the condition in the optimal data table to CPU frequency parameter B. Then, the server sends the modified optimal data table to the electronic device 100 for use.
[0223] By using the frequency modulation method, the electronic device 100 can detect the load of the electronic device 100, the number of free buffers, and the camera mode, and then determine the frequency point parameters of the CPU. In this way, the electronic device can reduce the risk of frame loss and power consumption during the operation of the camera application.
[0224] The following is a schematic diagram of the electronic device 100 involved in an embodiment of the present application adjusting the CPU frequency point parameters internally when the camera starts working.
[0225] Figure 8 A schematic diagram showing the electronic device 100 adjusting the CPU frequency parameters internally when the camera starts working in an embodiment of the present application is shown.
[0226] like Figure 8 As shown, the electronic device 100 internally adjusts the CPU frequency point parameters when the camera starts working, which may include the following steps:
[0227] S801. The kernel scheduling layer may search for a camera-critical thread and set the priority of the camera-critical thread to be the highest.
[0228] When the camera application is started, the electronic device 100 can let the kernel scheduling layer search for the camera key thread. After receiving the relevant instructions, the kernel scheduling layer can search for the key thread of the camera application and set the priority of the camera key thread to the highest. When the priority of the camera key thread is set to the highest, when the camera application is started, the camera application will give priority to the computing power of the processor of the electronic device 100 to ensure better completion of the processing task. In this way, it can be ensured that when the camera is running, it is easier to prioritize the computing power resources of the processor compared to other processes.
[0229] S802. When the picture frame 1 is output, the camera hardware abstraction layer may send a recording signal to the kernel scheduling layer.
[0230] When the camera frame 1 is output, the camera hardware abstraction layer can send a record signal to the kernel scheduling layer. The record signal can enable the kernel scheduling layer to record the load of the electronic device 100 at this time (for example, the CPU load is 15% at this time). The camera hardware abstraction layer can send the record signal to the kernel scheduling layer through the ioctl interface function.
[0231] S803. When the picture frame 2 is output, the camera hardware abstraction layer may send a recording signal to the kernel scheduling layer.
[0232] The camera hardware abstraction layer can send a record signal to the kernel scheduling layer again when the picture frame 2 is output. The record signal can enable the kernel scheduling layer to record the load of the electronic device 100 at this time (for example, the CPU load is 50% at this time).
[0233] S804: The kernel scheduling layer may detect the load condition within the frame interval.
[0234] For example, the kernel scheduling layer can detect the load of the camera hardware abstraction layer when the picture frame 1 is output (for example, the CPU load is 15% at this time) and the load when the picture frame 2 is output (for example, the CPU load is 50% at this time). The kernel scheduling layer can detect the load in the interval between the picture frame 1 and the picture frame 2. For example, the CPU load of 50% when the picture frame 2 is output minus the CPU load of 15% when the picture frame 1 is output, and the CPU load in the interval between the picture frame 1 and the picture frame 2 is 35%.
[0235] The load condition within the above frame interval may be referred to as a second load.
[0236] S805 . The kernel scheduling layer may determine the CPU frequency parameter 1 from the trained optimal data table according to the load condition within the detected frame interval, the device model of the electronic device 100 , and the camera mode of the camera application of the electronic device 100 .
[0237] The electronic device 100 can determine the CPU frequency parameter 1 from the optimal data table stored in the electronic device 100 according to the device model of the electronic device 100 (for example, model 1), the camera mode of the camera application (for example, mode 1) and the load condition (for example, load gradient 1).
[0238] The above-mentioned CPU frequency parameter 1 may be referred to as a third CPU frequency parameter.
[0239] S806. The kernel scheduling layer may send CPU frequency parameter 1 to the CPU parameter adjustment module.
[0240] The kernel scheduling layer can send the CPU frequency parameter 1 to the CPU parameter adjustment module. Then, the CPU parameter adjustment module can control the CPU of the electronic device 100 to work with the CPU frequency parameter 1.
[0241] By using a frequency modulation method provided by an embodiment of the present application, when the camera application of the electronic device 100 starts working, the margin value of the idle buffer cannot be obtained because the camera application of the electronic device 100 is unstable. Therefore, the optimal CPU frequency point parameter can be directly determined from the optimal data table according to the load of the electronic device 100. In this way, the camera application of the electronic device 100 can have better CPU frequency point parameters when it starts working.
[0242] The following is a detailed description of a schematic diagram of adjusting the CPU frequency parameters of the electronic device 100 involved in an embodiment of the present application when the camera is working.
[0243] Fig. 9 A schematic diagram showing the internal adjustment of CPU frequency parameters of the electronic device 100 when the camera is working in an embodiment of the present application is shown.
[0244] like Fig. 9 As shown, the electronic device 100 may adjust the CPU frequency parameters internally when the camera is working, including the following steps:
[0245] S901. When picture frame 1 is output, the camera hardware abstraction layer may send a recording signal to the kernel scheduling layer.
[0246] When the picture frame 1 is output, the camera hardware abstraction layer can send a record signal to the kernel scheduling layer. The record signal can enable the kernel scheduling layer to record the load of the electronic device 100 at this time (for example, the CPU load is 15% at this time). The camera hardware abstraction layer can send the record signal to the kernel scheduling layer through the ioctl interface function.
[0247] S902. When the picture frame 2 is output, the camera hardware abstraction layer may send a recording signal to the kernel scheduling layer.
[0248] The camera hardware abstraction layer can send a record signal to the kernel scheduling layer again when the picture frame 2 is output. The record signal can enable the kernel scheduling layer to record the load of the electronic device 100 at this time (for example, the CPU load is 50% at this time).
[0249] S903. The kernel scheduling layer may detect the load condition within the frame interval.
[0250] For example, the kernel scheduling layer can detect the load of the camera hardware abstraction layer when the picture frame 1 is output (for example, the CPU load is 15% at this time) and the load when the picture frame 2 is output (for example, the CPU load is 50% at this time). The kernel scheduling layer can detect the load in the interval between the picture frame 1 and the picture frame 2. For example, the CPU load of 50% when the picture frame 2 is output minus the CPU load of 15% when the picture frame 1 is output, and the CPU load in the interval between the picture frame 1 and the picture frame 2 is 35%.
[0251] The load condition within the above frame interval may be referred to as a second load.
[0252] S904 . The kernel scheduling layer may determine the CPU frequency parameter 1 from the trained optimal data table according to the load condition within the detected frame interval, the device model of the electronic device 100 , and the camera mode of the camera application of the electronic device 100 .
[0253] For example, the electronic device 100 can determine the CPU frequency parameter 1 from the optimal data table stored in the electronic device 100 according to the device model of the electronic device 100 being model 1, the camera mode of the camera application being mode 1, and the load condition being load gradient 1.
[0254] The above-mentioned CPU frequency parameter 1 may be referred to as a third CPU frequency parameter.
[0255] S905: When the number of free buffers in the buffer queue tends to be stable, the camera hardware abstraction layer may calculate a margin value of the free buffers.
[0256] When the electronic device 100 waits for the idle rotating buffer in the buffer queue to become stable, the camera hardware abstraction layer can calculate the margin value of the idle buffer according to the number of rotating buffers and the average return frame value of the rotating buffer. For example, when the number of idle buffers in the buffer queue becomes stable, the electronic device 100 can detect that the number of rotating buffers in the buffer queue is 11. The electronic device 100 can detect that the average return frame value of the rotating buffer in the buffer queue is 8. The maximum margin value of the idle buffer in the electronic device 100 is the number of rotating buffers in the buffer queue minus the average return frame value, and the minimum is 0, that is, the margin value of the idle buffer is 3.
[0257] The average number of used round-robin buffers may be referred to as the average number of returned frames of the round-robin buffer.
[0258] S906. The kernel scheduling layer may send CPU frequency parameter 1 to the CPU parameter adjustment module.
[0259] The kernel scheduling layer can send the CPU frequency parameter 1 to the CPU parameter adjustment module. Then, the CPU parameter adjustment module can control the CPU of the electronic device 100 to work with the CPU frequency parameter 1.
[0260] S907 , when the camera hardware layer outputs each picture frame, the number of free buffers can be detected, and the frequency modulation strategy can be determined according to the number of free buffers and the margin value of the free buffers.
[0261] The camera hardware abstraction layer can detect the number of free buffers in the processor of the electronic device 100 each time the electronic device 100 generates a frame. The camera hardware abstraction layer can determine the frequency modulation strategy according to the number of free buffers and the margin value of the free buffers. For example, the margin value of the free buffer is 3, and the number of free buffers is 2. Generally, the default free buffer threshold is 2. During the operation of the electronic device 100, when the number of free buffers changes, the electronic device 100 can determine the frequency modulation strategy. For example, when the number of free buffers becomes 3, the CPU frequency parameter 1 needs to be reduced (for example, the large core frequency in the CPU frequency parameter 1 is reduced from 3GHz to 2.9GHz, the medium core frequency is reduced from 2.5GHz to 2.4GHz, and / or the small core frequency is reduced from 2GHz to 1.8GHz). When the number of idle buffers becomes 1, the CPU frequency parameter 1 needs to be increased (for example, the large core frequency in the CPU frequency parameter 1 is reduced from 3GHz to 3.1GHz, the medium core frequency is reduced from 2.5GHz to 2.6GHz, and / or the small core frequency is reduced from 2GHz to 2.1GHz). When the number of idle buffers becomes 0, the CPU frequency parameter 1 needs to be adjusted even larger (for example, the large core frequency in the CPU frequency parameter 1 is reduced from 3GHz to 3.4GHz, the medium core frequency is reduced from 2.5GHz to 2.8GHz, and / or the small core frequency is reduced from 2GHz to 2.4GHz).
[0262] In a possible implementation, the electronic device 100 obtains the number of idle buffers every N frames, and determines the frequency modulation strategy according to the number of idle buffers and the margin value of the idle buffers. N is a positive integer greater than or equal to 2.
[0263] S908: During the operation of the camera, the kernel scheduling layer may detect the load condition within the frame interval.
[0264] S909. During the operation of the camera, the kernel scheduling layer may determine the CPU frequency parameter 3 from the trained optimal data table according to the load condition within the detected frame interval, the type of the electronic device 100 and the camera mode of the camera application of the electronic device 100.
[0265] S910, the camera hardware abstraction layer can send the frequency modulation strategy to the kernel scheduling layer.
[0266] The camera hardware abstraction layer can detect the number of free buffers and determine the frequency modulation strategy based on the number of free buffers and the margin value of the free buffers. The camera hardware abstraction layer can send the frequency modulation strategy to the kernel scheduling layer.
[0267] S911. The kernel scheduling layer may adjust the CPU frequency parameter 3 to the CPU frequency parameter 4 based on the frequency adjustment strategy.
[0268] The margin value of the idle buffer is greater than the first threshold. When the number of idle buffers is greater than the first threshold, the power consumption of the CPU of the electronic device 100 when operating at the CPU frequency parameter 4 is less than the power consumption of the CPU when operating at the CPU frequency parameter 3.
[0269] When the number of free buffers is equal to the first threshold, CPU frequency parameter 4 is the same as CPU frequency parameter 3;
[0270] When the number of free buffers is less than the first threshold, the power consumption of the CPU of the electronic device 100 when operating at the CPU frequency parameter 4 is greater than the power consumption of the CPU when operating at the CPU frequency parameter 3.
[0271] In one possible implementation, the kernel scheduling layer can compare the operating frequency parameter of the current electronic device 100 and the size of the CPU frequency parameter 4 after adjusting the CPU frequency parameter 3, and take the higher CPU frequency parameter as the CPU frequency parameter sent to the CPU parameter adjustment module.
[0272] In one possible implementation, the power consumption of the CPU of the electronic device 100 when operating at the CPU frequency parameter 4 is less than the power consumption of the CPU when operating at the CPU frequency parameter 3, including: the large core frequency in the CPU frequency parameter 4 is lower than the large core frequency in the CPU frequency parameter 3; and / or, the medium core frequency in the CPU frequency parameter 4 is lower than the medium core frequency in the CPU frequency parameter 3; and / or, the small core frequency in the CPU frequency parameter 4 is lower than the small core frequency in the CPU frequency parameter 3.
[0273] In one possible implementation, the power consumption of the CPU of the electronic device 100 when operating at the CPU frequency parameter 4 is greater than the power consumption of the CPU when operating at the CPU frequency parameter 3, including: the large core frequency in the CPU frequency parameter 4 is higher than the large core frequency in the CPU frequency parameter 3; and / or, the medium core frequency in the CPU frequency parameter 4 is higher than the medium core frequency in the CPU frequency parameter 3; and / or, the small core frequency in the CPU frequency parameter 4 is higher than the small core frequency in the CPU frequency parameter 3.
[0274] S912. The kernel scheduling layer can send CPU frequency parameter 4 to the CPU parameter adjustment module.
[0275] The CPU parameter adjustment module can control the CPU of the electronic device 100 to operate under the CPU frequency parameter 4.
[0276] The above steps S907 to S912 may be performed periodically, and the period may be a frame output interval of the picture frames in the first camera mode.
[0277] For example, at the time of picture frame A, the electronic device 100 can detect that the electronic device 100 is in a first load. The electronic device 100 can also detect that the number of free buffers in the rotating buffer is a first number. The electronic device 100 can determine the first CPU frequency parameter from the first data table according to the detected first load. The electronic device 100 can adjust the first CPU frequency parameter to the second CPU frequency parameter according to the first number and the margin value of the free buffer.
[0278] At the time of picture frame B, the electronic device 100 can detect that the electronic device 100 is in the third load. The electronic device 100 can also detect that the number of free buffers in the rotating buffer is the second number. The electronic device 100 can determine the fourth CPU frequency parameter from the first data table according to the detected third load. The electronic device 100 can adjust the fourth CPU frequency parameter to the fifth CPU frequency parameter according to the second number and the margin value of the free buffer.
[0279] A frequency modulation method is provided in the embodiment of the present application. Since the camera application of the electronic device 100 is in a stable working state after a period of time, the CPU frequency point parameters of the electronic device 100 can be determined from the first data table through the load and camera mode, and then the CPU frequency point parameters determined from the first data table are fine-tuned according to the number of free buffers in the detected rotating buffer, and the CPU is controlled to work with the CPU frequency point parameters after fine-tuning. In this way, the electronic device 100 can keep the camera application in the best state according to its actual operating conditions, avoid frame loss during shooting or previewing, and reduce power consumption.
[0280] The embodiment of the present application further provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.
[0281] The embodiments of the present application also provide a computer program product. When the computer program product is executed on an electronic device, the electronic device can implement the steps in the above-mentioned various method embodiments.
[0282] The embodiment of the present application also provides a chip system, the chip system includes a processor and an interface circuit, the interface circuit is used to receive instructions and transmit them to the processing circuit, and the processing circuit is used to run the instructions to implement the steps of any method embodiment of the present application. The chip system can be a single chip or a chip module composed of multiple chips.
[0283] The term "user interface (UI)" in the specification and drawings of this application refers to the medium interface for interaction and information exchange between an application or operating system and a user, which realizes the conversion between the internal form of information and the form acceptable to the user. The user interface of an application is a source code written in a specific computer language such as Java and extensible markup language (XML). The interface source code is parsed and rendered on the electronic device, and finally presented as content that the user can recognize, such as pictures, text, buttons and other controls. Controls, also known as widgets, are the basic elements of the user interface. Typical controls include toolbars, menu bars, text boxes, buttons, scroll bars, pictures and text. The properties and contents of controls in the interface are defined by tags or nodes, such as XML through <textview> 、 <imgview> 、 <videoview>The controls contained in the interface are specified by nodes such as <head> and <body>. A node corresponds to a control or attribute in the interface. After being parsed and rendered, the node is presented as user-visible content. In addition, many applications, such as hybrid applications, usually also contain web pages in their interfaces. A web page, also known as a page, can be understood as a special control embedded in the application interface. A web page is source code written in a specific computer language, such as hypertext markup language (HTML), cascading style sheets (CSS), JavaScript (JS), etc. The web page source code can be loaded and displayed as user-recognizable content by a browser or a web page display component with similar functions to a browser. The specific content contained in a web page is also defined by tags or nodes in the web page source code. For example, HTML is defined by <body> tags or nodes in the web page source code. 、 、 <video> 、 <canvas>To define the elements and attributes of a web page.
[0284] The most common form of user interface is graphical user interface (GUI), which refers to a user interface related to computer operation that is displayed in a graphical manner. It can be an icon, window, control or other interface element displayed on the display screen of an electronic device, where a control can include icons, buttons, menus, tabs, text boxes, dialog boxes, status bars, navigation bars, widgets and other visual interface elements.
[0285] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more available media integration. The available medium can be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk), etc.
[0286] Those skilled in the art can understand that to implement all or part of the processes in the above-mentioned embodiments, the processes can be completed by computer programs to instruct related hardware, and the programs can be stored in computer-readable storage media. When the programs are executed, they can include the processes of the above-mentioned method embodiments. The aforementioned storage media include: ROM or random access memory RAM, magnetic disk or optical disk and other media that can store program codes.
[0287] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.< / canvas> < / video> < / videoview> < / imgview> < / textview>
Claims
1. A frequency modulation method, characterized in that: Applied to an electronic device including a camera and a CPU, the method comprises: Displaying a first shooting interface of the camera application in the first camera mode, wherein the first shooting interface includes picture frames captured by the camera in the first camera mode; Get the total number of rotating buffers; detecting an average number of uses of a rotary buffer in a first time period under the first camera mode, the rotary buffer being used to store picture frames reported by the camera; Determining a margin value of an idle buffer based on the total number of the rotating buffers and the average number of used rotating buffers; When the CPU is under a first load, detecting that the number of the idle buffers in the rotating buffer is a first number; Determine a first CPU frequency parameter from a first data table based on the first load; the first data table includes a correspondence between a camera mode, a load, and an optimal CPU frequency parameter with the lowest corresponding power consumption when there is no risk of frame loss; Based on the first number and the margin value of the idle buffer, adjusting the first CPU frequency parameter to a second CPU frequency parameter; The CPU of the electronic device is controlled to operate at the second CPU frequency parameter.
2. The method according to claim 1, characterized in that The controlling the CPU of the electronic device to operate with the second CPU frequency parameter specifically includes: Obtain the current operating frequency parameters of the CPU; If the power consumption corresponding to the second CPU frequency parameter is higher than the power consumption corresponding to the operating frequency parameter, the CPU of the electronic device is controlled to operate at the second CPU frequency parameter.
3. The method according to claim 2, characterized in that The method further comprises: If the power consumption corresponding to the second CPU frequency parameter is not higher than the power consumption corresponding to the operating frequency parameter, the CPU of the electronic device is controlled to operate at the operating frequency parameter.
4. The method according to any one of claims 1 to 3, characterized in that The margin value of the idle buffer is greater than a first threshold; wherein, When the first number is greater than the first threshold, the power consumption of the CPU when operating at the second CPU frequency parameter is less than the power consumption of the CPU when operating at the first CPU frequency parameter; When the first number is equal to the first threshold, the second CPU frequency parameter is the same as the first CPU frequency parameter; When the first number is smaller than the first threshold, the power consumption of the CPU when operating at the second CPU frequency parameter is greater than the power consumption of the CPU when operating at the first CPU frequency parameter.
5. The method according to any one of claims 1 to 3, characterized in that: The method further comprises: When starting to display a first shooting interface of the camera application in the first camera mode, the electronic device is in a second load; Based on the second load, determining a third CPU frequency parameter from the first data table; The CPU is controlled to operate at the third CPU frequency parameter.
6. The method according to any one of claims 1 to 3, characterized in that When displaying the first shooting interface of the camera application in the first camera mode, the method further includes: The scheduling priority of the key thread of the camera application is set to the highest priority. When the priority of the key thread of the camera application is set to the highest priority, the camera application preferentially calls the computing resources of the CPU.
7. The method according to claim 4, characterized in that The power consumption of the CPU when operating at the second CPU frequency parameter is less than the power consumption of the CPU when operating at the first CPU frequency parameter, specifically including: The large core frequency in the second CPU frequency parameter is lower than the large core frequency in the first CPU frequency parameter; and / or, The mid-core frequency in the second CPU frequency parameter is lower than the mid-core frequency in the first CPU frequency parameter; and / or, The small core frequency in the second CPU frequency parameter is lower than the small core frequency in the first CPU frequency parameter.
8. The method according to claim 4, characterized in that The power consumption of the CPU when operating at the second CPU frequency parameter is greater than the power consumption of the CPU when operating at the first CPU frequency parameter, specifically including: The large core frequency in the second CPU frequency parameter is higher than the large core frequency in the first CPU frequency parameter; and / or, The mid-core frequency in the second CPU frequency parameter is higher than the mid-core frequency in the first CPU frequency parameter; and / or, The small core frequency in the second CPU frequency parameter is higher than the small core frequency in the first CPU frequency parameter.
9. The method according to any one of claims 1 to 3, characterized in that: The method further comprises: When the electronic device is under a third load, detecting that the number of free buffers in the rotating buffer is a second number; Determining a fourth CPU frequency parameter from the first data table based on the third load; Based on the second number and the margin value of the idle buffer, adjusting the fourth CPU frequency parameter to a fifth CPU frequency parameter; The CPU of the electronic device is controlled to operate at the fifth CPU frequency parameter.
10. The method according to any one of claims 1 to 3, characterized in that: The method further comprises: When the CPU obtains each picture frame captured by the camera, the CPU load and the number of free buffers in the rotating buffer are detected.
11. The method according to any one of claims 1 to 3, characterized in that: The operating system running on the CPU includes the camera HAL layer, kernel scheduling layer and CPU parameter adjustment module: The camera HAL layer is used to detect that the number of the free buffers is the first number, determine a frequency modulation strategy based on the first number, and send the frequency modulation strategy to the kernel scheduling layer; The kernel scheduling layer is used to detect that the load of the CPU is the first load, and determine the first CPU frequency point parameter from the first data table based on the first load; The kernel scheduling layer is further used to adjust the first CPU frequency parameter to the second CPU frequency parameter based on the frequency adjustment strategy, and send the second CPU frequency parameter to the CPU parameter adjustment module; The CPU parameter adjustment module is used to control the CPU to operate at the second CPU frequency point parameters.
12. The method according to claim 11, characterized in that The kernel scheduling layer is also used to find the key thread of the camera application and set the priority of the key thread of the camera application to the highest priority. When the priority of the key thread of the camera application is set to the highest priority, the camera application preferentially calls the computing resources of the CPU.
13. A method for training frequency modulation parameters, characterized in that: Applied to a training device including a CPU and a camera, the method comprises: randomly loading an application on the training device, and detecting a fourth load of the training device; Setting a camera mode of a camera application on the training device to a second camera mode; Controlling the CPU to work at a plurality of CPU frequency parameters respectively, and recording the number of free buffers in a rotating buffer and the power consumption of the CPU when the CPU works at each CPU frequency parameter, wherein the rotating buffer is used to store the picture frames reported by the camera; Determining the frame loss risk level when each CPU frequency parameter of the CPU is working according to the number of free buffers in the rotating buffer when the CPU is working at each CPU frequency parameter; The corresponding relationship between the CPU frequency parameter, the frame loss risk level and the power consumption when the training device is in the second camera mode and under the fourth load is recorded in the second data table, wherein the second data table includes the corresponding relationship between the CPU frequency parameter, the frame loss risk level and the power consumption when the training device is in different camera modes and different loads; A first data table is determined from the second data table, wherein the first data table includes optimal CPU frequency parameters with no risk of frame loss and lowest power consumption under each camera mode and load condition.
14. An electronic device, characterized in that: It comprises a camera, one or more processors and one or more memories; wherein the camera, the one or more memories are coupled to the one or more processors, the one or more memories are used to store computer program codes, and the computer program codes include computer instructions, and when the one or more processors execute the computer instructions, the method described in any one of claims 1-12 is executed.
15. A chip system, applied to electronic equipment, characterized in that: The chip system includes a processing circuit and an interface circuit, wherein the interface circuit is used to receive instructions and transmit them to the processing circuit, and the processing circuit is used to run the instructions to execute the method as described in any one of claims 1-12.
16. A computer-readable storage medium, characterized in that: The method comprises instructions, which, when executed on a processor of an electronic device, cause the electronic device to execute the method as claimed in any one of claims 1 to 12.
17. A training device, characterized in that It includes a camera, one or more processors and one or more memories; wherein the camera, the one or more memories are coupled to the one or more processors, the one or more memories are used to store computer program codes, and the computer program codes include computer instructions, and when the one or more processors execute the computer instructions, the method as claimed in claim 13 is executed.
18. A computer-readable storage medium, characterized in that: Comprising instructions which, when executed on a processor of a training device, cause the training device to perform the method as claimed in claim 13.