A fault injection device compatible with FC and customized fiber protocols

By designing a fault injection device that is compatible with FC and customized fiber protocols, the problem that the existing technology cannot meet the needs of multibus, multichannel and fiber modes is solved, and stability testing of aerospace electronic equipment is achieved, with high cost performance.

CN118487656BActive Publication Date: 2025-02-25AVIC GENERAL TECH CO LTD
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Patent Information

Application Number
CN202410914669.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-07-09
Publication Date
2025-02-25
Estimated Expiration
2044-07-09

AI Technical Summary

Technical Problem

The existing fault injection devices cannot meet the fault injection requirements of multi-bus and multi-channels, and lack the ability to support fiber optic mode and long-distance transmission, resulting in poor data transmission stability.

Method used

A fault injection device compatible with FC and customized fiber protocols is designed, using a portable reinforced computer and fault injection optical board, connected through the PCIe interface, supports multi-channel fault injection, and implements protocol conversion and fault injection through FPGA logic.

Benefits of technology

It realizes compatibility and multi-channel injection capabilities for multiple buses, supports fiber buses, has high cost performance, and is suitable for stability testing of aerospace electronic equipment.

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Abstract

The present invention discloses a fault injection device compatible with FC and customized optical fiber protocols, comprising a host; the host comprises a portable reinforced computer and a fault injection optical port board; the fault injection optical port board is connected to the portable reinforced computer via a PCIe interface; the portable reinforced computer is installed with fault injection software compatible with FC and customized optical fiber protocols. The fault injection device of the present invention is easy to carry, supports multiple buses commonly used in aerospace, can be multi-channel injected, supports optical fiber buses, has high cost performance, and has extremely high promotion value.
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Description

Technical Field

[0001] The present invention relates to the technical field of fault injection, and in particular to a fault injection device compatible with FC and customized optical fiber protocols. Background Art

[0002] Due to the diversity of aviation equipment and the diversity of communication buses involved in the field of avionics, the single-bus fault injection device currently used in the domestic industry can no longer meet the needs of multi-bus and multi-channel fault injection. Most interfaces currently support electrical port mode, lack support for optical fiber mode, and cannot be transmitted over long distances. Cables are greatly affected by electromagnetic interference, resulting in weak data transmission stability. At the same time, large-scale fault injection devices based on industrial computers are not easy to carry and cannot meet the requirements of on-board and field testing. The cost of introducing foreign fault injection devices is too high, so it is extremely necessary to provide a fault injection device that supports multiple buses commonly used in aerospace, can be multi-channel injected, is portable, supports optical fiber buses, and has cost-effective advantages. Summary of the invention

[0003] In view of the above-mentioned defects or deficiencies in the prior art, it is desired to provide a fault injection device that is compatible with FC and customized fiber optic protocols, is easy to carry, supports multiple buses commonly used in aerospace, can be injected into multiple channels, supports fiber optic buses, has high cost performance, and has extremely high promotion value.

[0004] The present invention provides a fault injection device compatible with FC and customized optical fiber protocols, comprising a host; the host comprises a portable reinforced computer and a fault injection optical port board; the fault injection optical port board is connected to the portable reinforced computer through a PCIe interface; the portable reinforced computer is installed with fault injection software compatible with FC and customized optical fiber protocols;

[0005] The fault injection optical port board is connected to the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus networks through the first bus optical fiber, and the test FC terminal and the tested FC terminal are respectively connected to the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus networks through the second bus optical fiber;

[0006] The test FC terminal sends a fault message to the host, and the host filters, matches, replaces data fields of the fault message, or generates and inserts faults in a timely and quantitative manner on bus data, and sends the fault message to the tested FC terminal; the host performs statistics and analysis on the information fed back by the tested FC terminal after receiving the fault message to obtain a calculation result, and determines the reliability and stability of the tested FC terminal based on the calculation result;

[0007] The main control chip of the fault injection optical port board is FPGA, and the protocol conversion between Glink and FC-AE and PCIe is realized through FPGA logic; the external interface of the fault injection optical port board is an SFP optical module, which is connected to the LC optical fiber, and an active optical cable assembly with an integrated transceiver is used by using an LC to LC cable or an LC to FC cable;

[0008] The submodules of the FPGA logic of the fault injection optical port board include a high-speed transceiver, a framing module, a data matching module, a data monitoring module, a fault injection module, a PCIE DMA module and a register module;

[0009] The high-speed transceiver includes a dynamic configuration function, which is implemented through the DRP interface provided by the GTX IP core to configure the registers inside the IP core;

[0010] The framing module frames the FC message and primitive sequence received by the high-speed transceiver and converts them into a standard Axi-Stream format; in the fault injection module, the data first enters the data matching module to configure the register module, the host computer controls the reading and writing of the internal register of the FPGA through the PCIE DMA module, and the FPGA realizes the address mapping of different modules through the AXI-Lite Crossbar;

[0011] The fault injection module receives data input from the high-speed transceiver. The operation of the module state machine is performed according to the matching module. After receiving the matching success signal and the corresponding status returned by the matching module, it will be replaced, deleted or delayed according to the configured conditions; if the match is not successful, the data will be transparently transmitted. The module will also count the number of input, output and processed messages and display them on the software interface; the output data will be adjusted to the byte order again by the framing module and the standard Axi-Stream will be converted into the high-speed transceiver interface data format, and then output by the high-speed transceiver optical port;

[0012] The PCIe driver provides a way for fault injection software compatible with FC and customized fiber protocols to access the board hardware devices, and a mixed high- and low-speed bus API encapsulation interface to configure various bus parameters and read bus data;

[0013] The fault injection software includes a device management module, a matching injection module, a message storage module, a message collection module, a bus status module, a protocol analysis module and a result statistics module;

[0014] Wherein, the device management module is used to open the fault injection optical port board and select the relevant channel;

[0015] The matching injection module calls the hybrid high-low speed bus API to write the matching field and injection field information configured by the user into the corresponding logic register on the fault injection optical port board. The logic program on the fault injection optical port board filters the message and matches the qualified message for injection;

[0016] The message storage module stores the bus data received by the message collection module into the disk according to the file path specified by the user;

[0017] The message collection module is used to receive data from the bus;

[0018] The bus status module is used to obtain the status information on the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus networks in real time so that users can observe whether the bus status is normal;

[0019] The protocol analysis module is used to analyze the received message according to the protocol and display the data of each field in the protocol for the user to analyze;

[0020] The result statistics module calls the hybrid high-low speed bus API to obtain the total number of received messages from the fault injection optical port board logic, matches the total number of successful messages, and injects the number of processed messages for result statistics to test whether the processing is performed according to the expected configured results.

[0021] Furthermore, the host simultaneously injects faults into multiple GLINK buses, multiple FC-AE-1553 buses, and multiple FC-AE-ASM buses in a multi-channel mode.

[0022] Furthermore, the fault injection software includes multiple types of fault injection strategies, and the fault injection strategies at least include communication link interruption, keyword replacement, message deletion, message jump and CRC replacement.

[0023] Furthermore, the fault injection software supports real-time storage and playback analysis of collected messages, and supports port traffic statistics, port frame rate statistics, and port rate statistics.

[0024] Furthermore, the fault injection software has a message collection status view, a bus status view, a message list view, a protocol analysis view and a fault injection configuration window.

[0025] Compared with the prior art, the beneficial effects of the present invention are:

[0026] The portable reinforced computer of the fault injection device of the present invention has its own battery, is easy to carry, is waterproof and dustproof, can meet the needs of various test scenarios on board and in the field, and has good adaptability. The present application supports monitoring and analysis of multiple types of buses and multiple channels through a single device, solving the problem that different devices were required to monitor different buses in the past. It supports fiber optic mode interfaces to achieve long-distance transmission, and the data on the line is not affected by electromagnetic signals. The present application can quickly and easily perform stability tests on aerospace electronic equipment, is cost-effective, and has extremely high promotion value.

[0027] It should be understood that the contents described in the summary of the invention are not intended to limit the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0029] Figure 1 The overall block diagram of the test scheme for the fault injection device;

[0030] Figure 2 This is the structural block diagram of the host;

[0031] Figure 3 The hardware structure diagram of the fault injection optical port board;

[0032] Figure 4 FPGA logic block diagram of the fault injection optical port board;

[0033] Figure 5 The overall architecture diagram of the fault injection software;

[0034] Figure 6 Block diagram of the fault injection software. DETAILED DESCRIPTION

[0035] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It should also be noted that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.

[0036] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0037] Please refer to Figure 1 to Figure 6, an embodiment of the present invention provides a fault injection device compatible with FC and customized optical fiber protocols, including a host; the host includes a portable reinforced computer and a fault injection optical port board; the fault injection optical port board is connected to the portable reinforced computer through a PCIe interface; the portable reinforced computer is installed with fault injection software compatible with FC and customized optical fiber protocols;

[0038] The fault injection optical port board is connected to the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus networks through the first bus optical fiber, and the test FC terminal and the tested FC terminal are respectively connected to the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus networks through the second bus optical fiber;

[0039] The test FC terminal sends a fault message to the host, which filters, matches, replaces data fields, or generates and inserts faults in a timely and quantitative manner on the bus data, and sends the fault message to the FC terminal under test. The host performs statistics and analysis on the information fed back by the FC terminal under test after receiving the fault message to obtain calculation results, and judges the reliability and stability of the FC terminal under test based on the calculation results.

[0040] In this embodiment, if Figure 3 As shown in the figure, the PCIe bus-based fault injection optical port board uses a standard FPGA as the main control chip, and implements the protocol conversion between Glink and FC-AE and PCIe through FPGA logic. The SFP optical module is selected as the external interface, connected to the LC optical fiber, and the LC to LC cable or LC to FC cable transceiver active optical cable assembly is used.

[0041] like Figure 4 As shown in the figure, the submodules of the FPGA logic of the fault injection optical port board can be divided into high-speed transceiver (GTX), framing module (Gen Frame), data matching module (Match), data monitoring module (Data Monitor), fault injection module (Err Inject), PCIE DMA module (PCIE DMA), and register module (Register). The main process of fault injection is: matching, triggering, and injection.

[0042] High-speed transceiver (GTX), this module contains dynamic configuration function, which is realized through the DRP interface provided by the GTX IP core, which is essentially to configure the registers inside the IP core. Data enters from the RX end of GTX, and fault injection has multiple channels. Before entering the fault injection module, the data of the two channels are swapped so that the fault injection output data can be sent from another optical port.

[0043] The framing module (Gen Frame) frames the FC message and primitive sequence received by GTX and converts them into the standard Axi-Stream format. Since the byte order of the data coming from GTX is different from that of the data processed by the fault injection module, the byte order needs to be adjusted in this module and then input into the corresponding fault injection module. In the fault injection module, the data first enters the data matching module (Match) and configures the register module (Register). The host computer controls the reading and writing of the internal registers of the FPGA through PCIE, and the FPGA implements the address mapping of different modules through AXI-Lite Crossbar. The input data is matched through the register module and the writing to the RAM. If the input data and the configuration content meet the matching conditions, the matching success signal and the corresponding status are returned to the fault injection module.

[0044] The fault injection module (Err Inject) receives data from the GTX input. The operation of the module state machine must be carried out according to the matching module. After receiving the matching success signal and corresponding status returned by the matching module, it will replace, delete or delay according to the configured conditions; if there is no match, the data will be transparently transmitted. The module will also count the number of input, output and processed messages, which can be displayed in the software interface. The output data will be adjusted to the byte order again by the framing module and the standard Axi-Stream will be converted into the GTX interface data format, and then output by the GTX optical port.

[0045] like Figure 5 As shown in the figure, the PCIe driver provides a way for fault injection software that is compatible with FC and customized fiber protocols to access the board hardware devices. The mixed high-speed and low-speed bus API encapsulates the interfaces for configuring various bus parameters and reading bus data, providing rich business functions for the fault injection software.

[0046] like Figure 6 As shown, the fault injection software is modularly designed to meet the fault injection requirements of different buses and multiple channels in actual scenarios. The software integrates multiple functional modules, including device management module, matching injection module, message storage module, message collection module, bus status module, protocol analysis module and result statistics module.

[0047] The specific implementation steps are as follows: after inserting the fault injection optical port board, open the fault injection optical port board through the device management module and select the relevant channel. At this time, the bus status module will obtain the status information on the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus network in real time for the user to observe whether the bus status is normal. After clicking the start test button, the message collection module begins to receive data from the bus. At this time, the received message can be parsed according to the protocol through the protocol parsing module, and the data of each field in the protocol can be displayed for user analysis; at the same time, the message storage module stores the bus data received by the message collection module into the disk according to the file path specified by the user, which is convenient for later callback analysis.

[0048] The matching injection module calls the hybrid high-low speed bus API to write the matching fields and injection field information configured by the user into the corresponding logical registers on the fault injection optical port board. The logical program on the fault injection optical port board filters the messages and matches the qualified messages for injection. The result statistics module calls the hybrid high-low speed bus API to obtain the total number of received messages, the total number of successful matching messages, the number of various injection processing messages, etc. from the logic on the fault injection optical port board for result statistics to test whether the processing is performed according to the expected configured results.

[0049] The present invention realizes a complete set of processes including bottom-level data collection and upper-level application analysis through hardware design, FPGA design, and software design, and provides a solution for a fault injection device that is compatible with FC and customized optical fiber protocols. The present invention is easy to carry, supports a variety of buses commonly used in aerospace, can perform multi-channel injection, supports optical fiber buses, has a high cost-effectiveness, and has extremely high promotion value.

[0050] In a preferred embodiment, the host simultaneously injects faults into multiple GLINK buses, multiple FC-AE-1553 buses, and multiple FC-AE-ASM buses through a multi-channel mode, and can simultaneously inject faults into high- and low-speed buses GLINK, FC-AE-1553, and FC-AE-ASM commonly used in the aerospace and military fields.

[0051] In a preferred embodiment, the fault injection software includes multiple types of fault injection strategies, and the fault injection strategies at least include communication link interruption, keyword replacement, message deletion, message jump and CRC replacement.

[0052] In a preferred embodiment, the fault injection software supports real-time storage and playback analysis of collected messages, and supports port traffic statistics, port frame rate statistics, and port speed statistics.

[0053] In a preferred embodiment, the fault injection software has a message collection state view, a bus state view, a message list view, a protocol analysis view and a fault injection configuration window.

[0054] In the description of this specification, the description of the terms "one embodiment", "some embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0055] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A fault injection device compatible with FC and customized fiber protocols, characterized in that: The host comprises a portable reinforced computer and a fault injection optical port card; the fault injection optical port card is connected to the portable reinforced computer via a PCIe interface; the portable reinforced computer is installed with fault injection software compatible with FC and customized optical fiber protocols; The fault injection optical port board is connected to the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus networks through the first bus optical fiber, and the test FC terminal and the tested FC terminal are respectively connected to the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus networks through the second bus optical fiber; The test FC terminal sends a fault message to the host, and the host filters, matches, replaces data fields, or generates and inserts faults in a timely and quantitative manner on the bus data, and sends the fault message to the tested FC terminal; The host performs statistics and analysis on the information fed back by the tested FC terminal after receiving the fault message to obtain a calculation result, and determines the reliability and stability of the tested FC terminal according to the calculation result; The main control chip of the fault injection optical port board is FPGA, and the protocol conversion between Glink and FC-AE and PCIe is realized through FPGA logic; The external interface of the fault injection optical port card is an SFP optical module, which is connected to an LC optical fiber by using an LC to LC cable or an LC to FC cable transceiver active optical cable assembly; The submodules of the FPGA logic of the fault injection optical port board include a high-speed transceiver, a framing module, a data matching module, a data monitoring module, a fault injection module, a PCIE DMA module and a register module; The high-speed transceiver includes a dynamic configuration function, which is implemented through the DRP interface provided by the GTXIP core to configure the registers inside the IP core; The framing module frames the FC message and primitive sequence received by the high-speed transceiver and converts them into a standard Axi-Stream format; in the fault injection module, the data first enters the data matching module to configure the register module, the host computer controls the reading and writing of the internal registers of the FPGA through the PCIE DMA module, and the FPGA realizes the address mapping of different modules through the AXI-Lite Crossbar; The fault injection module receives data input from the high-speed transceiver. The operation of the module state machine is performed according to the matching module. After receiving the matching success signal and the corresponding status returned by the matching module, it will be replaced, deleted or delayed according to the configured conditions; if the match is not successful, the data will be transparently transmitted. The module will also count the number of input, output and processed messages and display them on the software interface; the output data will be adjusted to the byte order again by the framing module and the standard Axi-Stream will be converted into the high-speed transceiver interface data format, and then output by the high-speed transceiver optical port; The PCIe driver provides a way for fault injection software compatible with FC and customized fiber protocols to access the board hardware devices, and a mixed high- and low-speed bus API encapsulation interface to configure various bus parameters and read bus data; The fault injection software includes a device management module, a matching injection module, a message storage module, a message collection module, a bus status module, a protocol analysis module and a result statistics module; Wherein, the device management module is used to open the fault injection optical port board and select the relevant channel; The matching injection module calls the hybrid high-low speed bus API to write the matching field and injection field information configured by the user into the corresponding logic register on the fault injection optical port board. The logic program on the fault injection optical port board filters the message and matches the qualified message for injection; The message storage module stores the bus data received by the message collection module into the disk according to the file path specified by the user; The message collection module is used to receive data from the bus; The bus status module is used to obtain the status information on the GLINK, FC-AE-1553, and FC-AE-ASM protocol bus networks in real time so that users can observe whether the bus status is normal; The protocol analysis module is used to analyze the received message according to the protocol and display the data of each field in the protocol for the user to analyze; The result statistics module calls the hybrid high-low speed bus API to obtain the total number of received messages from the fault injection optical port board logic, matches the total number of successful messages, and injects the number of processed messages for result statistics to test whether the processing is performed according to the expected configured results.

2. The fault injection device compatible with FC and customized optical fiber protocols according to claim 1, characterized in that: The host simultaneously injects faults into multiple GLINK buses, multiple FC-AE-1553 buses and multiple FC-AE-ASM buses in a multi-channel mode.

3. The fault injection device compatible with FC and customized optical fiber protocols according to claim 1, characterized in that: The fault injection software includes multiple types of fault injection strategies, and the fault injection strategies at least include communication link interruption, keyword replacement, message deletion, message jump and CRC replacement.

4. The fault injection device compatible with FC and customized optical fiber protocols according to claim 1, characterized in that: The fault injection software supports real-time storage and playback analysis of collected messages, and supports port traffic statistics, port frame rate statistics, and port speed statistics.

5. The fault injection device compatible with FC and customized optical fiber protocols according to claim 1, characterized in that: The fault injection software has a message collection state view, a bus state view, a message list view, a protocol analysis view and a fault injection configuration window.

Citation Information

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