A resolution-adjustable and alignment-free high-density micro-led display bonding method

Abstract

The application discloses a high-density Micro-LED display bonding method with adjustable resolution and without alignment, and relates to the field of photoelectric display, comprising the following steps: first, a first metal array containing first metal bumps is prepared on each driving pixel of a CMOS driving backboard, and a second metal array containing second metal bumps is prepared on a Micro-LED epitaxial wafer; then, based on the non-alignment type, the Micro-LED epitaxial wafer provided with the second metal array is bonded with the CMOS driving backboard provided with the first metal array; then, after bonding, the substrate of the Micro-LED epitaxial wafer is peeled off to expose a Micro-LED display layer; finally, according to the required resolution, photolithography etching is performed on the peeled-off Micro-LED display layer, and a Micro-LED display pixel unit is divided; the Micro-LED display pixel unit corresponds to M driving units in the corresponding area of the CMOS driving backboard, and a Micro-LED display array with corresponding resolution is formed. The application has low cost, greatly reduces the bonding alignment difficulty between metal bumps, and improves the picture quality and production efficiency of the Micro-LED display.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging, and more specifically to a high-density Micro-LED display bonding method with adjustable resolution and no alignment required. Background Technology

[0002] Micro-LED, or micro-light-emitting diode, refers to a high-density array of tiny LEDs integrated on a single chip. Compared to previous display products, Micro-LED has a simpler structure and does not use organic light-emitting materials, significantly reducing the requirements for polarization and encapsulation layers. This allows for thinner display panels, combining almost all the advantages of LCD and OLED while eliminating some of their disadvantages. Micro-LED features high efficiency, high brightness, and high reliability, and is self-emissive. It also boasts advantages such as energy saving, small size, low on-resistance, and good current uniformity. Furthermore, it offers rich and vibrant colors and a wide dynamic range. Its miniaturization and matrix-like characteristics make Micro-LED more suitable for flexible display technologies. Its thinner and more refined structure better aligns with future development trends.

[0003] Micro-LEDs boast superior performance, but currently face numerous challenges, including mass transfer, full-color display, and packaging technology. Packaging is a crucial step in connecting high-density Micro-LED chips to the driving substrate. Packaging technology involves connecting each individual Micro-LED pixel to the corresponding pads in the active matrix. Currently, there are four main types of Micro-LED packaging processes: wire bonding, microtube bonding, anisotropic conductive film (ACF) bonding, and flip-chip bonding. As Micro-LED sizes decrease and pixel densities increase, the difficulty of wire bonding and microtube bonding increases dramatically. Anisotropic conductive film bonding refers to the formation of a stable and reliable interconnect between the chip and the substrate under thermal pressure, exhibiting lateral insulation and longitudinal conductivity. However, ACF interconnects are prone to short circuits due to uneven distribution of conductive particles, and many process issues remain to be resolved. Furthermore, the etching process in this technology can easily corrode the sidewalls of the fabricated metal bumps. Flip-chip bonding technology remains the mainstream technology for the development and application of Micro-LED packaging. Flip-chip bonding technology, based on traditional processes, involves packaging and interconnecting the active surface of the chip with the substrate facing downwards. Therefore, designing small-sized, high-density metal bump structures on Micro-LED chips is a current research hotspot. However, as Micro-LED chip sizes continue to shrink, the difficulty of one-to-one bonding of metal bumps in flip-chip bonding technology is constantly increasing. Flip-chip bonding typically uses a CMOS driving backplane, employing semiconductor chip fabrication processes, achieving pixel pitches below 1 micrometer. However, it is still difficult to achieve such small-sized, high-density pixels and metal bump fabrication on corresponding Micro-LED chips. Thin-film bonding methods hold promise for achieving small-sized, high-density Micro-LED pixels and bonding; however, during subsequent pixel etching, metal etching can easily contaminate the Micro-LED sidewalls, leading to a degradation in Micro-LED performance. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a high-density Micro-LED display bonding method with adjustable resolution and no need for alignment, which aims to solve the above problems, greatly reduce the difficulty of bonding alignment, and improve production efficiency.

[0005] The purpose of this invention is to propose a high-density Micro-LED display bonding method with adjustable resolution and no alignment required. This method achieves adjustable resolution and no alignment required by utilizing a redundant submicron-level metal bump array fabricated on a Micro-LED epitaxial wafer. Through this metal bump fabrication and bonding method, this invention can achieve higher pixel density per unit area, reduce the difficulty of inter-chip bonding alignment, and improve the image quality and production efficiency of Micro-LED displays.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] In a specific embodiment of the present invention, a high-density Micro-LED display bonding method with adjustable resolution and no alignment required is provided, comprising:

[0008] Step S1: Prepare a first metal array containing a first metal bump on each driving pixel of the CMOS driving backplane, and prepare a second metal array containing a second metal bump on the Micro-LED epitaxial wafer; wherein the particle size of the second metal bump is smaller than the particle size of the first metal bump and the distribution density of the second metal bump is greater than the distribution density of the first metal bump.

[0009] Step S2: Based on the non-alignment method, the Micro-LED epitaxial wafer with the second metal array is bonded to the CMOS driving backplane with the first metal array; wherein, the first metal bump on each driving pixel of the CMOS driving backplane corresponds to N second metal bumps on the Micro-LED epitaxial wafer, where N is an integer greater than or equal to 1.

[0010] Step S3: After bonding, the substrate of the Micro-LED epitaxial wafer is peeled off to expose the Micro-LED display layer;

[0011] Step S4: According to the required resolution, perform photolithography etching on the stripped Micro-LED display layer and divide it into Micro-LED display pixel units; the Micro-LED display pixel units correspond to the M driving units in the corresponding area of ​​the CMOS driving backplane, and form a Micro-LED display array with the corresponding resolution.

[0012] In one specific embodiment, in step S1, the fabrication process for the first metal bump and / or the second metal bump employs a double-layer photoresist and a single-exposure photomask layer, wherein the photomask layer has an undercut structure; step S1 includes:

[0013] S11. Clean and dry the CMOS driving backplane and / or the Micro-LED epitaxial wafer;

[0014] S12. First, spin-coat a layer of LOR photoresist onto the CMOS driving backplane or the Micro-LED epitaxial wafer, then spin-coat a layer of high-precision positive photoresist, and perform one exposure and development to form the high-precision photomask layer with an undercut structure.

[0015] S13. A highly uniform metal thin film is prepared on the surface of the CMOS driving backplane and / or the surface of the Micro-LED epitaxial wafer;

[0016] S14. Place the CMOS driving backplane and / or the Micro-LED epitaxial wafer in a stripping solution to remove the photomask layer, forming the first metal array or the second metal array.

[0017] In one specific embodiment, in step S3, based on the pixel size of the CMOS driving backplane, when the first metal bump on the CMOS driving backplane is not aligned and bonded, the second metal bump on the Micro-LED epitaxial wafer has effectively bonded electrical connection points and ineffectively bonded floating points.

[0018] In one specific embodiment, in step S4, the Micro-LED epitaxial wafer is etched and divided according to the required resolution. The Micro-LED epitaxial wafer corresponding to the driving pixels of each M CMOS driving backplane is etched and divided into a whole, wherein the driving pixels of the M CMOS driving backplane drive one Micro-LED display pixel.

[0019] In one specific embodiment, in step S1, the preparation method of the first metal array and / or the second metal array includes physical vapor deposition, chemical vapor deposition, electroplating, electroless plating, template assembly, and chemical self-assembly.

[0020] In one specific embodiment, the materials of the first metal bump and / or the second metal bump include: gold, indium, silver, copper, tin, and their alloys.

[0021] In one specific embodiment, the bonding conditions in step S2 are: bonding temperature of 20℃~300℃, pressure of 1-100 MPa, and bonding time of 10-90 min.

[0022] A second aspect of the invention provides a high-density Micro-LED display bonding structure with adjustable resolution and no alignment required, the bonding structure comprising:

[0023] CMOS driver backplane;

[0024] A first metal array containing first metal bumps is disposed on the CMOS driving backplane;

[0025] A second metal array that is not aligned with the first metal array and includes second metal bumps; wherein the particle size of the second metal bumps is smaller than that of the first metal bumps and the distribution density of the second metal bumps is greater than that of the first metal bumps; the first metal bumps on each driving pixel of the CMOS driving backplane correspond to N second metal bumps, where N is an integer greater than or equal to 1.

[0026] A Micro-LED display array disposed on the second metal array and transferred based on a Micro-LED epitaxial wafer; the Micro-LED display array includes Micro-LED display pixel units, the Micro-LED display pixel units corresponding to M driving units in the corresponding area of ​​the CMOS driving backplane; wherein, the Micro-LED display array is formed by peeling off the substrate of the Micro-LED epitaxial wafer and dividing it by photolithography etching.

[0027] In one specific embodiment, the fabrication process for the first metal bump and / or the second metal bump employs a double-layer photoresist and a single-exposure photomask layer, wherein the photomask layer has an undercut structure; the fabrication of the double-layer photoresist and single-exposure photomask layer includes:

[0028] S11. Clean and dry the CMOS driving backplane and / or the Micro-LED epitaxial wafer;

[0029] S12. First, spin-coat a layer of LOR photoresist onto the CMOS driving backplane or the Micro-LED epitaxial wafer, then spin-coat a layer of high-precision positive photoresist, and perform one exposure and development to form the high-precision photomask layer with an undercut structure.

[0030] S13. A highly uniform metal thin film is prepared on the surface of the CMOS driving backplane and / or the surface of the Micro-LED epitaxial wafer;

[0031] S14. Place the CMOS driving backplane and / or the Micro-LED epitaxial wafer in a stripping solution to remove the photomask layer, forming the first metal array or the second metal array.

[0032] In one specific embodiment, based on the pixel size of the CMOS driving backplane, when the first metal bump on the CMOS driving backplane is not aligned and bonded, the second metal bump on the Micro-LED epitaxial wafer has effectively bonded electrical connection points and ineffectively bonded floating points.

[0033] Compared with existing technologies, this invention has the following advantages: It not only requires lower costs but also enables the production of smaller mask layers. This invention significantly reduces the difficulty of bonding and aligning metal bumps, allowing for higher pixel density per unit area through this metal bump fabrication and bonding method, thereby improving the image quality and production efficiency of Micro-LED displays. This invention can be applied to the field of semiconductor packaging and has practical value. Attached Figure Description

[0034] Figures 1-3 This is a schematic diagram of the fabrication process of the first metal array on the CMOS driving backplane in an embodiment of the present invention;

[0035] Figures 4-6 This is a schematic diagram of the fabrication process of the second metal array on the Micro-LED epitaxial wafer in an embodiment of the present invention;

[0036] Figure 7 No alignment bonding diagram is required in the embodiments of the present invention;

[0037] Figure 8 This is a schematic diagram of the substrate removal process for Micro-LEDs in an embodiment of the present invention;

[0038] Figure 9 This is a schematic diagram of the photolithography and etching process of the Micro-LED epitaxial wafer in an embodiment of the present invention;

[0039] Figure 10 This is a schematic diagram of the filling process in an embodiment of the present invention;

[0040] Figure 11 This is a schematic diagram of the bonding three-dimensional structure of the Micro-LED display in an embodiment of the present invention.

[0041] Symbol explanation: 101-CMOS driver backplane, 102-first metal bump, 103-Micro-LED epitaxial wafer, 104-photolithography mask layer, 105-substrate, 106-second metal bump. Detailed Implementation

[0042] The following detailed description of a typical embodiment of a high-density Micro-LED display bonding method with adjustable resolution and no alignment required according to the present invention provides a further specific description of the invention. It is necessary to point out that the following embodiments are only used to further illustrate the present invention and should not be construed as limiting the scope of protection of the present invention. Any non-essential improvements and adjustments made to the present invention by those skilled in the art based on the above description still fall within the scope of protection of the present invention.

[0043] like Figures 1-11As shown, in the first embodiment of the present invention, a high-density Micro-LED display bonding method with adjustable resolution and no alignment required is provided, comprising:

[0044] Step S1: A first metal array containing first metal bumps 102 is fabricated on each driving pixel of the CMOS driving backplane 101, and a second metal array containing second metal bumps 106 is fabricated on the Micro-LED epitaxial wafer 103; wherein, the particle size of the second metal bump array 106 is smaller than the particle size of the first metal bump 102 and the distribution density of the second metal bump array 106 is greater than the distribution density of the first metal bump 102.

[0045] It is worth mentioning that a highly uniform metal thin film can be prepared on the surface of the CMOS driving backplane 101 and the surface of the Micro-LED epitaxial wafer 103 by vapor deposition, and then etching can be performed to obtain the corresponding first metal array and second metal array; alternatively, photoresist can be set first, and then the first metal array and second metal array can be vapor deposited.

[0046] Typically, the first metal array of a CMOS chip has a spacing of 8µm, a diameter of 4.5µm, and a height of 5µm, while the second metal array on a Micro-LED chip has a spacing of 600nm, a diameter of 300nm, and a height of 2µm.

[0047] Step S2: Based on the non-alignment method, the Micro-LED epitaxial wafer 103 with the second metal array is bonded to the CMOS driving backplane 101 with the first metal array; wherein, the first metal bump 102 on each driving pixel of the CMOS driving backplane 101 corresponds to N second metal bumps 106 on the Micro-LED epitaxial wafer 103, where N is an integer greater than or equal to 1.

[0048] The bonding process is divided into three stages: first, pre-bonding, with a pressure of 15 MPa and heating to 200°C for 10 min in a formic acid environment; second, final bonding, with the temperature continuing to rise to 260°C and held for 5 min; third, annealing, with annealing at 200°C for 20 min; and finally, slow cooling to room temperature to reduce stress.

[0049] Step S3: After bonding, the substrate 105 of the Micro-LED epitaxial wafer 103 is peeled off to expose the Micro-LED display layer;

[0050] Step S4: According to the required resolution, perform photolithography etching on the stripped Micro-LED display layer and divide it into Micro-LED display pixel units; the Micro-LED display pixel units correspond to the M driving units in the corresponding area of ​​the CMOS driving backplane 101, and form a Micro-LED display array with the corresponding resolution.

[0051] In step S1 of this embodiment, a layer of LOR photoresist is first spin-coated onto the CMOS driving backplane 101 and the Micro-LED epitaxial wafer 103, followed by a layer of high-precision positive resist. After one exposure and development, a high-precision photomask layer 104 with an undercut structure is formed. In the photomask layer 104 on the CMOS driving backplane 101, the aperture diameter of the via array is approximately 4.5 μm, and the via pitch is 8 μm. In the photomask layer 104 on the Micro-LED epitaxial wafer 103, the aperture diameter of the via array is approximately 500 nm, and the via pitch is 1 μm. Specifically, the following methods are included:

[0052] Method 1: Since LOR photoresist has different properties from conventional positive photoresist, LOR photoresist does not denature during exposure and only dissolves in the developer. Therefore, after one exposure and development, the developer flows through the pre-formed positive photoresist aperture array on the upper layer to the lower LOR photoresist. The size of the photoresist undercut structure can be controlled by controlling the development time.

[0053] Method 2: Since the dissolution rate of LOR photoresist varies in different directions in the developer, the following two methods can be used to achieve complete longitudinal development of the lower layer of LOR photoresist and appropriate transverse undercut structure: increase the spin coating speed or dilute the photoresist.

[0054] Preferably, in step S1, the fabrication process for the first metal bump 102 and / or the second metal bump 106 employs a double-layer photoresist and a single-exposure photomask layer 104, and the photomask layer 104 has an undercut structure; step S1 includes:

[0055] S11. Clean and dry the CMOS driving backplane 101 and / or the Micro-LED epitaxial wafer 103.

[0056] S12. First, spin coat a layer of LOR photoresist onto the CMOS driving backplane 101 or the Micro-LED epitaxial wafer 103, then spin coat a layer of high-precision positive photoresist, and after one exposure and development, form the high-precision photomask layer 104 with an undercut structure.

[0057] S13. A highly uniform metal thin film is prepared on the surface of the CMOS driving backplane 101 and / or the surface of the Micro-LED epitaxial wafer 103.

[0058] Optionally, a highly uniform metal film is prepared on the surface of the CMOS driving backplane 101 and the surface of the Micro-LED epitaxial wafer 103 by vapor deposition process. The thickness of the metal film on the surface of the CMOS driving backplane 101 is 5 μm, and the thickness of the metal film on the surface of the Micro-LED epitaxial wafer 103 is 2 μm.

[0059] S14. Place the CMOS driving backplane 101 and / or the Micro-LED epitaxial wafer 103 in a stripping solution to remove the photolithography mask layer 104, forming the first metal array or the second metal array.

[0060] It is worth mentioning that a layer of LOR photoresist is first spin-coated onto the substrate, followed by a layer of high-precision positive photoresist, then an exposure is performed, and finally development is carried out. Since the properties of LOR photoresist are different from those of conventional positive photoresist, LOR photoresist does not undergo denaturation during exposure and only dissolves in the developer. Therefore, after the first exposure and development, the developer flows into the lower LOR photoresist through the pre-formed positive photoresist aperture array. The size of the photoresist undercut structure can be controlled by controlling the development time.

[0061] In step S3 of this embodiment, based on the pixel size of the CMOS driving backplane 101, when the first metal bump 102 on the CMOS driving backplane 101 is not aligned and bonded, the second metal bump 106 on the Micro-LED epitaxial wafer 103 has an effective bonded electrical connection point and an ineffective bonded floating point.

[0062] In step S4 of this embodiment, the Micro-LED epitaxial wafer 103 is etched and divided according to the required resolution. The Micro-LED epitaxial wafer 103 corresponding to the driving pixels of each M CMOS driving backplane 101 is etched and divided into a whole, wherein the driving pixels of the M CMOS driving backplane 101 drive one Micro-LED display pixel.

[0063] It is worth mentioning that, in step S1, the preparation methods of the first metal array and / or the second metal array include, but are not limited to, physical vapor deposition, chemical vapor deposition, electroplating, electroless plating, template assembly, and chemical self-assembly.

[0064] It is worth mentioning that the materials of the first metal bump 102 and / or the second metal bump 106 include, but are not limited to, gold, indium, silver, copper, tin and their alloys.

[0065] In this embodiment, the bonding conditions in step S2 are: bonding temperature of 20℃~300℃, pressure of 1-100 MPa, and bonding time of 10-90 min.

[0066] like Figure 11 As shown, in fact, in the second embodiment of the present invention, a corresponding high-density Micro-LED display bonding structure with adjustable resolution and no alignment required is also provided, characterized in that the bonding structure includes:

[0067] CMOS driver backplane 101;

[0068] A first metal array containing first metal bumps 102 is disposed on the CMOS driving backplane 101;

[0069] A second metal array is not aligned with the first metal array and includes second metal bumps 106; wherein the particle size of the second metal bump array 106 is smaller than the particle size of the first metal bump 102 and the distribution density of the second metal bump array 106 is greater than the distribution density of the first metal bump 102; each driving pixel of the CMOS driving backplane 101 has N second metal bumps 106 corresponding to the first metal bump 102, where N is an integer greater than or equal to 1;

[0070] A Micro-LED display array disposed on the second metal array and transferred based on the Micro-LED epitaxial wafer 103; the Micro-LED display array includes Micro-LED display pixel units, the Micro-LED display pixel units corresponding to M driving units in the corresponding area of ​​the CMOS driving backplane 101; wherein, the Micro-LED display array is formed by peeling off the substrate 105 of the Micro-LED epitaxial wafer 103 and dividing it by photolithography etching.

[0071] Preferably, the fabrication process for the first metal bump 102 and / or the second metal bump 106 employs a double-layer photoresist and a single-exposure photomask layer 104, wherein the photomask layer 104 has an undercut structure; the fabrication of the double-layer photoresist and single-exposure photomask layer 104 includes:

[0072] S11. Clean and dry the CMOS driving backplane 101 and / or the Micro-LED epitaxial wafer 103.

[0073] S12. First, spin coat a layer of LOR photoresist onto the CMOS driving backplane 101 or the Micro-LED epitaxial wafer 103, then spin coat a layer of high-precision positive photoresist, and after one exposure and development, form the high-precision photomask layer 104 with an undercut structure.

[0074] S13. A highly uniform metal thin film is prepared on the surface of the CMOS driving backplane 101 and / or the surface of the Micro-LED epitaxial wafer 103.

[0075] S14. Place the CMOS driving backplane 101 and / or the Micro-LED epitaxial wafer 103 in a stripping solution to remove the photolithography mask layer 104, forming the first metal array or the second metal array.

[0076] Furthermore, in this embodiment, based on the pixel size of the CMOS driving backplane 101, when the first metal bump 102 on the CMOS driving backplane 101 is not aligned and bonded, the second metal bump 106 on the Micro-LED epitaxial wafer 103 has effectively bonded electrical connection points and ineffectively bonded floating points.

[0077] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made within the scope of the claims of the present invention should be included in the scope of the present invention.

Claims

1. A high-density Micro-LED display bonding method with adjustable resolution and no alignment required, characterized in that, include: Step S1: A first metal array containing first metal bumps is fabricated on each driving pixel of the CMOS driving backplane, and a second metal array containing second metal bumps is fabricated on the Micro-LED epitaxial wafer; wherein, the particle size of the second metal bumps is smaller than that of the first metal bumps, and the distribution density of the second metal bumps is greater than that of the first metal bumps; the diameter of the first metal bumps is 4.5 μm, the spacing is 8 μm, and the height is 5 μm, and the diameter of the second metal bumps is 300 nm, the spacing is 600 nm, and the height is 2 μm; and the materials of both the first and second metal bumps are gold or indium; in step S1, the first metal array and the second metal array are fabricated using the following method: S11. Clean and dry the CMOS driving backplane and the Micro-LED epitaxial wafer; S12. Spin-coat a layer of LOR photoresist onto the CMOS driving backplane and the Micro-LED epitaxial wafer, then spin-coat a layer of high-precision positive resist, and perform one exposure and development to form a high-precision photomask layer with an undercut structure; S13. Prepare a highly uniform metal thin film on the surface of the CMOS driving backplane and the Micro-LED epitaxial wafer using a vapor deposition process; S14. Place the CMOS driving backplane and the Micro-LED epitaxial wafer in a stripping solution to remove the photomask layer, forming the first metal array and the second metal array; Step S2: Based on the non-alignment method, the Micro-LED epitaxial wafer with the second metal array is bonded to the CMOS driving backplane with the first metal array; wherein, the first metal bump on each driving pixel of the CMOS driving backplane corresponds to N second metal bumps on the Micro-LED epitaxial wafer, where N is an integer greater than or equal to 1; wherein, the bonding conditions are: bonding temperature 260℃, pressure 15MPa, and bonding time 10-90min; Step S3: After bonding, the substrate of the Micro-LED epitaxial wafer is peeled off to expose the Micro-LED display layer; Step S4: According to the required resolution, perform photolithography etching on the stripped Micro-LED display layer and divide it into Micro-LED display pixel units; the Micro-LED display pixel units correspond to M driving units in the corresponding area of ​​the CMOS driving backplane, where M is an integer greater than 1, so that the driving pixels of the M CMOS driving backplane drive one Micro-LED display pixel and form a Micro-LED display array with the corresponding resolution.

2. The high-density Micro-LED display bonding method with adjustable resolution and no alignment required as described in claim 1, characterized in that, In step S3, based on the pixel size of the CMOS driving backplane, when the first metal bump on the CMOS driving backplane is not aligned and bonded, the second metal bump on the Micro-LED epitaxial wafer has both effectively bonded electrical connection points and ineffectively bonded floating points.

3. The high-density Micro-LED display bonding method with adjustable resolution and no alignment required as described in claim 1, characterized in that, In step S4, the Micro-LED epitaxial wafer is etched and divided according to the required resolution, and the Micro-LED epitaxial wafer corresponding to each M CMOS driving backplane driving pixel is etched and divided into a whole.

4. A high-density Micro-LED display bonding structure with adjustable resolution and no alignment required, characterized in that, The bonding structure includes: CMOS driver backplane; A first metal array containing first metal bumps is disposed on the CMOS driving backplane; A second metal array that is not aligned with the first metal array and includes second metal bumps; wherein the particle size of the second metal bumps is smaller than that of the first metal bumps and the distribution density of the second metal bumps is greater than that of the first metal bumps; the first metal bumps on each driving pixel of the CMOS driving backplane correspond to N second metal bumps, where N is an integer greater than or equal to 1. A Micro-LED display array disposed on the second metal array and transferred based on a Micro-LED epitaxial wafer; the Micro-LED display array includes Micro-LED display pixel units, each Micro-LED display pixel unit corresponding to M driving units in the corresponding region of the CMOS driving backplane; wherein, the driving pixels of the M CMOS driving backplane drive one Micro-LED display pixel, and the Micro-LED display array is formed by peeling off the substrate of the Micro-LED epitaxial wafer and dividing it by photolithography etching; The first metal bump has a diameter of 4.5 μm, a spacing of 8 μm, and a height of 5 μm; the second metal bump has a diameter of 300 nm, a spacing of 600 nm, and a height of 2 μm; both the first and second metal bumps are made of gold or indium; the bonding conditions are: bonding temperature 260℃, pressure 15 MPa, and bonding time 10-90 min; M is an integer greater than 1. Specifically, the fabrication process for the first and second metal bumps employs a double-layer photoresist and a single-exposure photomask layer, wherein the photomask layer has an undercut structure; the fabrication of the double-layer photoresist and single-exposure photomask layer includes: S11. Clean and dry the CMOS driver backplane and the Micro-LED epitaxial wafer; S12. First, spin-coat a layer of LOR photoresist onto the CMOS driving backplane and the Micro-LED epitaxial wafer, then spin-coat a layer of high-precision positive photoresist, and perform one exposure and development to form the high-precision photomask layer with an undercut structure. S13. A highly uniform metal thin film is prepared on the surface of the CMOS driving backplane and the surface of the Micro-LED epitaxial wafer; S14. Place the CMOS driving backplane and the Micro-LED epitaxial wafer in a stripping solution to remove the photomask layer, forming the first metal array and the second metal array.

5. The high-density Micro-LED display bonding structure with adjustable resolution and no alignment required as described in claim 4, characterized in that, Based on the pixel size of the CMOS driving backplane, when the first metal bump on the CMOS driving backplane is not aligned and bonded, the second metal bump on the Micro-LED epitaxial wafer has effectively bonded electrical connection points and ineffectively bonded floating points.

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